Double-sided redistribution layer (RDL) substrate for passive and device integration

Abstract

A device includes a redistribution layer (RDL) substrate. The device also includes a passive component in the RDL substrate adjacent to a first surface of the RDL substrate. The device further includes a first die coupled to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate.

Description

[Technical Field]

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Patent Application No. 17 / 579,038, filed January 19, 2022, entitled “DOUBLE-SIDED REDISTRIBUTION LAYER (RDL) SUBSTRATE FOR PASSIVE AND DEVICE INTEGRATION”, the disclosure of which is incorporated herein by reference in its entirety.

[0003] The various aspects of this disclosure relate to semiconductor devices, and more particularly to wafer-level double-sided redistribution layer (RDL) substrates for the integration of passive and active devices. [Previous Technology]

[0004] Wireless communication devices integrate radio frequency (RF) modules, which enable communication and the features expected by users. As wireless systems become more prevalent and include more functions, the chips become more complex. Fifth-generation (5G) new radio (NR) wireless communication devices integrate the latest generation of electronic chips, which are packaged in smaller modules with smaller interconnects. Design challenges include integrating passive and active components to realize the RF front-end module (FEM).

[0005] RF front-end modules can be implemented by integrating RF filters, active devices, and surface mount technology (SMT) devices on a laminated substrate. These RF filters, active devices, and SMT devices are conventionally arranged in a side-by-side package configuration supported by the laminated substrate. Unfortunately, due to the decreasing form factor of future applications, these conventional side-by-side package laminate configurations are limited by the reduction in XY size and Z height. That is, the XY size and Z height dimensions of the conventional side-by-side package laminate configuration exceed the form factor of future RF front-end module applications. A front-end implementation that meets the reduced XY size and Z height dimensions specified by the form factor of future RF front-end module applications is desired. [Summary of the Invention]

[0006] A device includes a redistribution layer (RDL) substrate. The device also includes a passive component in the RDL substrate adjacent to a first surface of the RDL substrate. The device further includes a first die coupled to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate.

[0007] A method for manufacturing a device is described. The method includes forming a redistribution layer (RDL) substrate on a carrier glass substrate. The method also includes forming a passive component in an interlayer dielectric (ILD) layer of the RDL substrate adjacent to a first surface of the RDL substrate and the carrier glass substrate. The method further includes coupling a first die to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate. The method also includes removing the carrier glass substrate from the first surface of the RDL substrate.

[0008] This has provided a fairly broad overview of the features and technical advantages of this disclosure in order to better understand the detailed description that follows. Further features and advantages of this disclosure will be described below. Those skilled in the art will understand that this disclosure can be readily used as the basis for modifying or designing other structures for achieving the same purpose as this disclosure. Those skilled in the art will also recognize that such equivalent configurations do not depart from the teachings of this disclosure as set forth in the appended claims. The novel features considered to be characteristic of this disclosure (including both its organization and methods of operation), as well as further objects and advantages, will be better understood from the following description when considered in conjunction with the accompanying drawings. However, it should be clearly understood that each of the figures is provided for illustrative and descriptive purposes only and is not intended to be a definition of limitation of this disclosure.

Implementation Method

[0023] The detailed description below, set forth in conjunction with the accompanying drawings, is intended as a description of various configurations, and not as representing the only configuration in which the concepts described herein can be practiced. The detailed description includes specific details intended to provide a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts can be practiced without these specific details. In some cases, to avoid confusion with such concepts, well-known structures and components are shown in block diagram form.

[0024] As described herein, the term “and / or” is used to mean “inclusive or”, and the term “or” is used to mean “exclusive or”. As described herein, the term “example” as used throughout this specification means “used as an example, instance, or illustration” and should not be construed as being more preferred or advantageous than other example configurations. As described herein, the term “coupling” as used throughout this specification means “connection, whether direct or via an intermediate connection (e.g., a switch), electrical, mechanical, or other means,” and is not necessarily limited to physical connections. Additionally, a connection can result in objects being permanently or releasably connected. A connection can be made via a switch. As described herein, the term “proximity” as used throughout this specification means “adjacent, very close, adjacent, or near”. As described herein, the term “on” as used throughout this specification means “directly on” in some configurations and “indirectly on” in others.

[0025] Wireless communication devices integrate radio frequency (RF) modules, which enable communication and the features expected by users. As wireless systems become more prevalent and include more functions, chips become more complex. For example, due to cost and power consumption considerations, mobile RF chips (e.g., mobile RF transceivers) have migrated to deep submicron process nodes. The design of mobile RF transceivers is complicated by the addition of circuitry functions to support communication enhancements, such as fifth-generation (5G) new radio (NR) communication systems. In particular, 5G NR wireless communication devices integrate the latest generation of electronic chips, which are packaged in smaller modules with smaller interconnects. Design challenges include integrating passive and active components to realize the RF front-end module (FEM).

[0026] RF filters in mobile RF transceivers may include high-performance capacitor and inductor components. For example, RF filters use various types of passive devices, such as integrated capacitors and integrated inductors. Integrated capacitors may include metal-oxide-semiconductor (MOS) capacitors, pn junction capacitors, metal-insulator-metal (MIM) capacitors, polysilicon-polysilicon capacitors, metal-oxide-metal (MOM) capacitors, and other similar capacitor structures. Capacitors are typically passive components used to store charge in integrated circuits. For example, parallel-plate capacitors are typically made using conductive plates or structures with insulating material between the plates.

[0027] An inductor is an example of an electrical device used to temporarily store energy in a magnetic field within a wiring coil, based on its inductance value. This inductance value provides a measure of the ratio of voltage to the rate of change of current through the inductor. When the current flowing through the inductor changes, energy is temporarily stored in the magnetic field of the coil. In addition to its magnetic field storage capability, inductors are frequently used in alternating current (AC) electronic equipment, such as radio equipment. For example, the design of mobile RF transceivers includes the use of inductors with increased inductance density while reducing magnetic losses at millimeter-wave (mmW) frequencies (e.g., frequency range two (FR2)).

[0028] The radio frequency front-end (RFFE) module may include a 5G broadband FR2 filter, which includes MIM capacitors and inductors. In practice, the RFFE module can be implemented by integrating the RF filter, active devices, and surface mount technology (SMT) devices on a laminated substrate. These RF filters, active devices, and SMT devices are conventionally arranged in a side-by-side package configuration supported by the laminated substrate. Unfortunately, due to the reduced form factor of future RF applications, this conventional side-by-side package laminate configuration is limited by the reduced XY size and Z height. That is, the XY size and Z height dimensions of the conventional side-by-side package laminate configuration exceed the form factor of future RFFE module applications. An RFFE implementation that meets the reduced XY size and Z height dimensions specified by the form factor of future RFFE module applications is desired.

[0029] Various embodiments of this disclosure provide wafer-level double-sided redistribution layer (RDL) substrates for the integration of passive and active devices. The process flow for manufacturing the RDL substrate may include wafer-level processes such as front-end online (FEOL), mid-end online (MOL), and back-end online (BEOL) processes. It should be understood that the term "layer" includes thin films and should not be construed as indicating vertical or horizontal thickness unless otherwise stated. As described, the term "substrate" may refer to a substrate of a diced wafer or a substrate of an undicated wafer. Similarly, the terms wafer and die are used interchangeably.

[0030] As described, a back-end process (BEOL) interconnect layer can refer to a conductive interconnect layer (e.g., a first interconnect layer (M1) or metal one (M1), metal two (M2), metal three (M3), metal four (M4), etc.) used for electrical coupling to the active device layer of the integrated circuit. Various BEOL interconnect layers are formed at the corresponding BEOL interconnect layer, wherein the lower BEOL interconnect layer uses a thinner metal layer relative to the upper BEOL interconnect layer. BEOL interconnect layers can be electrically coupled to middle-end (MOL) interconnect layers, for example, to couple M1 to the oxide diffusion (OD) layer of the integrated circuit. MOL interconnect layers may include a zero interconnect layer (M0) for connecting M1 to the active device layer of the integrated circuit. A BEOL first via (V2) can connect M2 to M3 or other BEOL interconnect layers. BEOL vias may also provide via pads (VP) to support package (or device) (such as package balls) interconnects.

[0031] According to various embodiments of this disclosure, the RFFE module includes a redistribution layer (RDL) substrate. Furthermore, the RFFE module includes a passive component in the RDL substrate adjacent to a first surface of the RDL substrate. In some embodiments of this disclosure, the RFFE module includes a first die coupled to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate. In some embodiments of this disclosure, the RFFE module includes a second die coupled to the passive component, the second die being opposite to the first die. In a multi-die configuration, the RFFE module includes a third die coupled to the passive component, the third die being opposite to the first die and adjacent to the second die. In some embodiments of this disclosure, the first die, the second die, and the third die can provide active components of the antenna module, such as an RF switch.

[0032] Figure 1 is a schematic diagram of a radio frequency front-end (RFFE) module 100 employing a redistribution layer (RDL) substrate integrating active and passive devices according to various embodiments of the present disclosure. The RFFE module 100 includes a power amplifier 102, a duplexer / filter 104, and a radio frequency (RF) switching module 106. The power amplifier 102 amplifies the signals to a certain power level for transmission. The duplexer / filter 104 filters the input / output signals according to various parameters including frequency, insertion loss, suppression, or other similar parameters. Furthermore, the RF switching module 106 can select certain portions of the input signal to pass to the remainder of the RFFE module 100.

[0033] The radio frequency front-end (RFFE) module 100 also includes a tuner circuit system 112 (e.g., a first tuner circuit system 112A and a second tuner circuit system 112B), a duplexer 190, a capacitor 116, an inductor 118, a ground terminal 115, and an antenna 114. The tuner circuit system 112 (e.g., the first tuner circuit system 112A and the second tuner circuit system 112B) includes components such as a tuner, a portable data login terminal (PDET), and a home analog-to-digital converter (HKADC). The tuner circuit system 112 can perform impedance tuning (e.g., voltage standing wave ratio (VSWR) optimization) for the antenna 114. The RFFE module 100 also includes a passive combiner 108 coupled to a wireless transceiver (WTR) 120. The passive combiner 108 combines the detected power from the first tuner circuit system 112A and the second tuner circuit system 112B. Wireless transceiver 120 processes information from passive combiner 108 and provides this information to modem 130 (e.g., mobile station modem (MSM)). Modem 130 provides digital signals to application processor (AP) 140.

[0034] As shown in Figure 1, a duplexer 190 is located between the tuner assembly of the tuner circuitry system 112 and the capacitor 116, inductor 118, and antenna 114. The duplexer 190 can be placed between the antenna 114 and the tuner circuitry system 112 to provide high system performance from the radio frequency front-end (RFFE) module 100 to a chipset including a wireless transceiver 120, a modem 130, and an application processor 110. The duplexer 190 also performs frequency domain multiplexing for both high-frequency and low-frequency bands. After the duplexer 190 performs its frequency multiplexing function on the input signal, the output of the duplexer 190 is fed to an optional inductor / capacitor (LC) network including the capacitor 116 and inductor 118. When needed, the LC network can provide additional impedance matching components for the antenna 114. Signals with specific frequencies are then transmitted or received by the antenna 114. Although a single capacitor and inductor are shown, multiple components are also possible.

[0035] Figure 2 is a schematic diagram of an RF integrated circuit (RFIC) chip 200 having a wireless local area network (WLAN) (e.g., WiFi) module 150 and an RF front-end (RFFE) module 170 for a chipset 210. The WiFi module 150 includes a first duplexer 162 communicatively coupled to an antenna 164 to the WLAN module 152. A first RF switch 160 communicatively couples the first duplexer 162 to the WLAN module 152. The RFFE module 170 includes a second duplexer 190 that communicatively couples the antenna 192 to a wireless transceiver (WTR) 120 via the duplexer 172. A second RF switch 180 communicatively couples the second duplexer 190 to the duplexer 172.

[0036] The WTR 120 of the WiFi module 150 and the WLAN module 152 are coupled to a modem (mobile station modem (MSM), such as a baseband modem) 130, which is powered by a power supply 202 through a power management integrated circuit (PMIC) 140. The chipset 210 also includes capacitors 144 and 148 and inductors 146 to provide signal integrity. Each of the PMIC 140, modem 130, WTR 120, and WLAN module 152 includes a capacitor (e.g., 142, 132, 122, and 154) and operates according to a clock 204. In addition, inductors 146 couple modem 130 to PMIC 140. The geometry and arrangement of the various inductor and capacitor assemblies in the RFIC chip 200 can reduce electromagnetic coupling between components.

[0037] The WTR 120 of the wireless device typically includes a mobile RF transceiver for transmitting and receiving bidirectional communication data. The WTR 120 and RFFE module 170 can be implemented using high-performance complementary metal-oxide-semiconductor (CMOS) RF switching technology to realize the switching transistors of the first RF switch 160 and the second RF switch 180. The RFFE module 170 can rely on these high-performance CMOS RF switching technologies to implement the active die for successful operation. In practice, the active die used to implement the CMOS RF switching technology can involve integration with a passive RF filter to realize an antenna module, for example, as shown in Figure 3.

[0038] FIG3 is a block diagram illustrating a cross-sectional view of a radio frequency front-end (RFFE) module 300 including a semiconductor die and an integrated passive device (IPD) filter die according to various embodiments of the present disclosure. In this example, the RFFE module 300 includes a semiconductor die 350 and an IPD filter die 320 supported by a package substrate 310 (e.g., a laminated substrate). The semiconductor die 350 may be an active die having a semiconductor substrate 360 ​​(e.g., an active silicon substrate) coupled to a package ball 302 via a back-end process (BEOL) layer 370. The BEOL layer 370 includes a plurality of BEOL metallization layers (M1, M2, M3, ..., Mn) on the semiconductor substrate 360 ​​(e.g., a diced silicon wafer). An interconnect layer 312 is coupled to the package ball 302.

[0039] The IPD filter die 320 includes a substrate 330 (e.g., a passive substrate) coupled to a package ball 302 via a back-to-office (BEOL) layer 340 and a redistribution layer (RDL) 342. An interconnect layer 312 is coupled to the IPD filter die 320 via the package ball 302. In some embodiments of this disclosure, the substrate 330 is made of glass, and the IPD filter die 320 is a glass-substrate integrated passive device (GIPD) filter die. In practice, the RFFE module 300 integrates the IPD filter die 320, a semiconductor die 350, and surface mount technology (SMT) devices on a package substrate 310 (e.g., a laminate). The IPD filter die 320, the semiconductor die 350, and the SMT devices (not shown) are arranged in a side-by-side package configuration supported by the package substrate 310. Unfortunately, this side-by-side package substrate configuration is limited by the reduction in XY size and Z height due to the decreasing form factor of future RF applications. In other words, the XY size and Z height dimensions of the conventional side-by-side packaged laminate configuration exceed the form factor of future RFFE module applications. For example, Figures 4A to 4C show RFFE implementations that meet the reduced XY size and Z height dimensions specified by the form factor of future RFFE module applications.

[0040] Figures 4A to 4C are block diagrams illustrating various embodiments of a radio frequency front-end (RFFE) module including a wafer-level double-sided redistribution layer (RDL) substrate for integrating passive and active devices, according to the present disclosure. Typically, the RFFE module 400 includes an RDL substrate composed of an interlayer dielectric (ILD) layer 404, which is composed of, for example, polyimide. In some embodiments of the present disclosure, the ILD layer 404 includes a metal-insulator-metal (MIM) capacitor C and an inductor L formed from back-end process (BEOL) layers of M1, M2, M3, and M4. The ILD layer 404 also includes a first redistribution layer (RDL 1) to complete the RDL substrate 402. In this example, a MIM capacitor C is formed using a board with metallization layers M1 and M2. An insulating layer (I) is used under the metallization layer M3. This insulating layer (I) is not available during the fabrication of organic laminate substrates made of materials such as silicon nitride (SiN) or other similar dielectric materials. The capacitor C and inductor L provide passive components that can be interconnected to provide RF filtering and surface mount technology (SMT) compatible with the passive components of the RFFE module 400.

[0041] As shown in FIG4A, according to various embodiments of the present disclosure, the RFFE module 400 further includes a first active die 420 coupled to the RDL substrate 402 using flip-chip bonding. In this example, a package ball 422 (e.g., a device interconnect) secures the first active die 420 to the landing pads of the first RDL 1 and the inductor L. Furthermore, the first active die 420 is encapsulated in a molding compound 430 (such as an epoxy molding compound). In some embodiments of the present disclosure, the first active die 420 implements an antenna module including active components (such as RF switches and / or low-noise amplifiers).

[0042] In some embodiments of this disclosure, the RDL substrate 402 provides a double-sided substrate to enable the integration of RF filters, SMT passive component matching, and laminated wiring / inductors. The benefits of the RDL substrate 402 include a significant reduction in the size of the RFFE module 400 in the XY dimensions (e.g., by a factor of 2). Furthermore, the RDL substrate 402 also allows for a significant reduction in the Z-height (e.g., by a factor of 2). For example, a four-layer (4L) laminated package substrate can have a thickness of 260 micrometers compared to the 50-micrometer thickness of the RDL substrate 402. Eliminating the need for a laminated package substrate by using the RDL substrate 402 provides both a reduction in cost and size of the RFFE module 400, while providing performance comparable to side-by-side laminated package substrate RFFE module configurations.

[0043] FIG4B is a block diagram illustrating an alternative configuration of an RFFE module 440 including an RDL substrate 402 for integrating passive and active devices, according to the present disclosure. Typically, the RFFE module 440 includes components similar to those in the RFFE module 400 of FIG4A, which are identified using the same symbols. In this alternative configuration, a first active die 420 is coupled to the RDL substrate 402 using through-hole pads (VP) via metal-to-metal direct bonding or metal-to-metal or metal-to-semiconductor eutectic bonding.

[0044] FIG4C is a block diagram illustrating an alternative embodiment of the present disclosure, comprising an RDL substrate 402 for the integration of passive and active devices. The RFFE module 450 includes components similar to those in the RFFE module 440 of FIG4B, which are identified using the same symbols. Furthermore, the first active die 420 is coupled to the RDL substrate 402 using through-VP coupling via metal-to-metal direct bonding, metal-to-metal or metal-to-semiconductor eutectic bonding, or other similar thermocompression bonding. In these alternative embodiments of the present disclosure, a back-side polishing process is applied to the molding compound to further reduce the Z-height of the RFFE module 450.

[0045] Figures 5A to 5C are block diagrams further illustrating the RFFE module 400 of Figure 4A according to various embodiments of the present disclosure. As shown in Figure 5A, the RFFE module 500 is illustrated, wherein the XY dimensions of the RDL substrate 402 are larger than the XY dimensions of the first active die 420 to provide additional passive components. This configuration of the RDL substrate 402 is similar to the configuration shown in Figure 4A and is described using similar notation. In this example, the RDL substrate 402 includes a first RDL 1, a second RDL 2, and a third RDL 3 coupled to a 3D inductor 460. In some embodiments of the present disclosure, the 3D inductor 460 consists of a through-molded via (TMV) 410 coupled to the second RDL 2 and the third RDL 3 and joined together by conductive traces 462 on the surface of the molding compound 430. In this example, the package ball 422 also attaches the first active die 420 to the landing pads of the first RDL 1 and the inductor L.

[0046] FIG5B illustrates an RFFE module 540 in a multi-active die configuration according to various embodiments of the present disclosure. This configuration of the RFFE module 540 is similar to the configuration shown in FIG4A and is described using similar notation. In this example, the RDL substrate 402 also includes a second RDL 2 and a third RDL 3 coupled to a 3D inductor 460. The 3D inductor 460 is also composed of TMV 410 (e.g., a first TMV and a second TMV) coupled to the second RDL 2 and the third RDL 3 and bonded together by conductive traces 462 on the surface of the molding compound 430. In some embodiments of the present disclosure, a ball grid array (BGA) 412 is coupled to the conductive traces 462. Furthermore, a package ball 422 also secures the first active die 420 to the landing pads of the first RDL 1 and the inductor L.

[0047] In some embodiments of this disclosure, the antenna module function of the first active die 420 of FIG4A is separated to provide a second active die 470 and a third active die 480. The first active die 420, the second active die 470, and the third active die 480 can be implemented as active dies made of silicon (Si) or III-V materials. Alternatively, one of these active dies is implemented as a passive die or an acoustic die, although this configuration is unlikely due to hermetic sealing specifications for acoustic / microelectromechanical systems (MEMS) devices. Furthermore, flip-chip bonding or copper-to-copper (Cu-Cu) bonding (not shown) can be used to fulfill the connection between the active die and the passive component. In some embodiments of this disclosure, the first active die 420 provides an RF switch die, the second active die 470 provides a low-noise amplifier (LNA) die, and the third active die 480 is implemented as a gallium arsenide (GaAs) die. In this example, package ball 472 attaches the second active die 470 to the landing pads of the first RDL 1 and the second RDL 2. Additionally, package ball 482 also attaches the third active die 480 to the landing pads of the second RDL 1 and the inductor L. Molding compound 430 encapsulates the second active die 470 and the third active die 480.

[0048] FIG. 5C illustrates an RFFE module 550 in a multi-active die configuration according to various embodiments of the present disclosure. This configuration of the RFFE module 550 is similar to the configuration shown in FIG. 5B and is described using similar notation. In this example, the RDL substrate 402 includes a second RDL 2 and a third RDL 3, but does not include a 3D inductor 460 or a TMV 410. Instead, package balls 414 are attached to through-hole pads of the second RDL 2 and the third RDL 3. The RFFE module 550 also includes a second active die 470 and a third active die 480, which can be configured similarly as shown in FIG. 5B.

[0049] Figures 6A and 6B are block diagrams further illustrating the RFFE module 400 of Figure 4A according to various embodiments of the present disclosure. As shown in Figure 6A, the RFFE module 600 is illustrated, wherein the XY dimensions of the RDL substrate 402 are smaller than the XY dimensions of the first active die 420 to provide additional active components. This configuration of the RDL substrate 402 is similar to the configuration shown in Figure 4A and is described using similar notation. In this example, the RDL substrate 402 includes a first active die 420 coupled to a 3D inductor 460. In some embodiments of the present disclosure, the 3D inductor 460 is composed of a TMV 410 coupled to the first active die 420. In this example, the package ball 422 also secures the first active die 420 to the landing pads of the first RDL 1 and the inductor L.

[0050] FIG6B illustrates an RFFE module 640 in a multi-active die configuration according to various embodiments of the present disclosure. This configuration of the RFFE module 640 is similar to the configuration shown in FIG4A and is described using similar notation. In this example, the RDL substrate 402 also includes a first active die 420 coupled to a 3D inductor 460 via a TMV 410. The 3D inductor 460 is composed of a TMV 410 coupled to the first active die 420 and bonded together via conductive traces 462 on the surface of the molding compound 430. In some embodiments of the present disclosure, a ball grid array (BGA) 416 is coupled to the conductive traces 462. Furthermore, a package ball 472 secures a second active die 470 to the landing pads of the first RDL 1 and the inductor L.

[0051] Figures 7A to 7D are block diagrams illustrating various options for assembling an RDL substrate 402 and a first active die 420 to form an RFFE module according to various configurations of the present disclosure. As shown in Figure 7A, an RFFE module 700 is illustrated, wherein, according to a front-to-front configuration, the front side of the RDL substrate 402 is attached to the front side of the first active die 420. This configuration of the RDL substrate 402 is similar to the configuration shown in Figure 4A and is described using similar notation. In this example, the capacitor C side of the RDL substrate 402 is the front side of the RDL substrate 402. The back side of the RDL substrate 402 includes microbumps 406, and the front side of the first active die 420 includes encapsulation balls 414.

[0052] FIG. 7B illustrates an RFFE module 740, wherein, according to a front-to-front configuration, the front side of the RDL substrate 402 is fixed to the front side of the first active die 420. This configuration of the RDL substrate 402 is similar to the configuration shown in FIG. 4A and is described using similar notation. As described above, the capacitor C side of the RDL substrate 402 is the front side of the RDL substrate 402. In some embodiments of this disclosure, the back side of the RDL substrate 402 includes sidewall interconnects 408 coupled to the front side of the first active die 420, which includes conductive pillars 418 instead of the package balls 414 shown in FIG. 7A.

[0053] FIG. 7C illustrates an RFFE module 750, wherein, according to a back-to-front configuration, the back side of the RDL substrate 402 is attached to the front side of the first active die 420. This configuration of the RDL substrate 402 is similar to the configuration shown in FIG. 4A and is described using similar notation. In this example, the inductor L side of the RDL substrate 402 is the back side of the RDL substrate 402. In some embodiments of this disclosure, the back side of the RDL substrate 402 includes micropillar interconnects 409 coupled to the front side of the first active die 420, which includes conductive pillars 418 instead of the package balls 414 shown in FIG. 7A.

[0054] FIG. 7D illustrates an RFFE module 790, wherein, according to a back-to-back configuration, the back side of the RDL substrate 402 is fixed to the front side of the first active die 420. This configuration of the RDL substrate 402 is similar to the configurations shown in FIG. 4B and FIG. 4C, and is described using similar notation. As described above, the inductor L side of the RDL substrate 402 is the back side of the RDL substrate 402. In some embodiments of this disclosure, the back side of the RDL substrate 402 includes through-hole pads (VPs) coupled to the front side of the first active die 420. In this alternative configuration, the first active die 420 is coupled to the RDL substrate 402 using through-VPs via metal-to-metal direct bonding or metal-to-metal or metal-to-semiconductor eutectic bonding. Furthermore, the front side of the RDL substrate 402, including the package ball 419, may be part of a ground grid array (LGA), a ball grid array (BGA), or other similar interconnect structure.

[0055] Figures 8A to 8C are block diagrams illustrating the assembly process of a radio frequency front-end (RFFE) module formed and fixed to an active motherboard according to various embodiments of the present disclosure. As shown in Figure 8A, an RFFE module 800 is illustrated, wherein the front side of the RDL substrate 402 is fixed to the front side of the first active die 420 according to a front-to-front configuration. This configuration of the RFFE module 800 is similar to the configuration shown in Figure 7A and is described using similar notation. In this example, the front side of the first active die 420 includes conductive pillars 418 instead of encapsulation balls 414, as shown in Figure 7A. In some embodiments of the present disclosure, the first conductive pillar 418-1 provides ground (GND) and the second conductive pillar 418-2 provides input to the first active die 420. In addition, the first microbump 406-1 provides an antenna (ANT), and the second microbump 406-2 provides a passive output of the RFFE module 800.

[0056] As shown in FIG8B, according to various embodiments of this disclosure, in a fan-out wafer-level package (FOWLP) configuration, a molding compound is deposited on the front side of the first active die 420. As shown in FIG8C, an overlay molding process (e.g., on an LGA / BGA / leadframe) is performed to attach the RFFE module 800 to the printed circuit board (PCB) 490. In some embodiments of this disclosure, the RFFE module 800 is attached to a motherboard to complete the assembly of the RFFE module package 840.

[0057] Figures 9A to 9C are block diagrams illustrating various forms of radio frequency (RF) filters including a redistribution layer (RDL) substrate according to the present disclosure. As shown in Figure 9A, an RF filter module 900 is illustrated according to a configuration similar to that of the RFFE module 500 shown in Figure 5A. This configuration of the RF filter module 900 is similar to the configuration shown in Figure 7A and is described using similar notation. In this example, the first active die 420 is omitted from the RF filter module 900.

[0058] As shown in FIG9B, an RF filter module 940 is illustrated according to a configuration similar to that of the RFFE module 400 shown in FIG4A. This configuration of the RF filter module 940 is similar to that shown in FIG7A and is described using similar notation. In some versions of this disclosure, a through-hole (TMV) 410 is used to attach a ball grid array (BGA) 412 to the inductor L and the first RDL 1. In this example, the first active die 420 is also omitted from the RF filter module 940.

[0059] As shown in FIG. 9C, an RF filter module 950 is illustrated according to a configuration similar to that of the RF filter module 940 shown in FIG. 9B. This configuration of the RF filter module 950 is similar to that shown in FIG. 9B and is described using similar notation. In some embodiments of this disclosure, the TMV 410 also attaches the BGA 412 to the inductor L and the first RDL 1. In this example, the RF filter module 950 is shown according to a six-layer configuration compared to the four-layer configuration of the RF filter module 940 shown in FIG. 9B. In operation, the six-layer configuration of the RF filter module 950 can improve RF performance compared to the four-layer configuration of the RF filter module 940 shown in FIG. 9B. Furthermore, the first active die 420 is also omitted from the RF filter module 950. For example, the manufacturing process of an RFFE module including an RDL substrate is shown in FIGS. 10A to 10C.

[0060] Figures 10A to 10C are block diagrams illustrating the process of manufacturing an RFFE module including an RDL substrate according to various embodiments of the present disclosure. As shown in Figure 10A, at step 1000, an RDL substrate 402 is formed on a carrier glass substrate 1002, the RDL substrate including at least one passive component (e.g., C and / or L) in an interlayer dielectric (ILD) layer 404 of the RDL substrate 402. In some embodiments of the present disclosure, the carrier glass substrate 1002 is temporarily fixed to the RDL substrate 402 using an adhesive layer 1004.

[0061] As shown in FIG10B, in step 1010, the first active die 420 is coupled to the second surface of the RDL substrate 402, which is opposite to the first surface of the RDL substrate 402 adjacent to the carrier glass substrate 1002. As shown in FIG10C, in step 1020, the carrier glass substrate 1002 is removed from the first surface of the RDL substrate 402 and a molding compound 430 is formed on the first active die 420 to complete the formation of the RFFE module 400, for example, as shown in FIG4A. In some embodiments of this disclosure, the carrier glass substrate 1002 is removed from the RDL substrate 402 by exposing and irradiating the adhesive layer 1004 through the carrier glass substrate 1002.

[0062] FIG11 is a process flow diagram illustrating various embodiments of a method for manufacturing a radio frequency front-end (RFFE) module including a redistribution layer (RDL) substrate according to the present disclosure. Method 1100 begins at block 1102, wherein a redistribution layer (RDL) substrate is formed on a carrier glass substrate. For example, as shown in FIG10A, at step 1000, an RDL substrate 402 is formed on a carrier glass substrate 1002. In this example, an adhesive layer 1004 is used to temporarily fix the carrier glass substrate 1002 to the RDL substrate 402. That is, the carrier glass substrate 1002 provides a wafer support system (WSS).

[0063] In block 1104, a passive component is formed in the interlayer dielectric (ILD) layer of the RDL substrate near the first surface of the RDL substrate and the carrier glass substrate. As shown in FIG4A, the RDL substrate 402 is composed of an interlayer dielectric (ILD) layer 404, which is composed of, for example, polyimide. In some embodiments of this disclosure, the ILD layer 404 includes a metal-insulator-metal (MIM) capacitor C and an inductor L formed by back-end process (BEOL) layers M1, M2, M3 and M4. The ILD layer 404 also includes a first redistribution layer (RDL 1) to complete the RDL substrate 402. In this example, the MIM capacitor C is formed using a plate with metallization layers M1 and M2, and an insulating layer (I) is used under the metallization layer M3, which is not available during the manufacture of organic laminate substrates such as silicon nitride (SiN) or other similar dielectric materials. Capacitor C and inductor L provide passive components that can be interconnected to provide RF filtering and surface mount technology (SMT) compatible with the passive components of the RFFE module 400.

[0064] Referring again to FIG. 11, at block 1106, a first die is coupled to a second surface of the RDL substrate, which is opposite to a first surface of the RDL substrate. For example, as shown in FIG. 4A, according to various embodiments of the present disclosure, the RFFE module 400 further includes a first active die 420 coupled to the RDL substrate 402 using flip-chip bonding. In this example, a package ball 422 secures the first active die 420 to the landing pads of the first RDL 1 and the inductor L. As shown in FIG. 10B, at step 1010, the first active die 420 is coupled to a second surface of the RDL substrate 402, which is opposite to a first surface of the RDL substrate 402 adjacent to the carrier glass substrate 1002.

[0065] At block 1108, the carrier glass substrate is removed from the first surface of the RDL substrate. For example, as shown in FIG10C, at step 1020, the carrier glass substrate 1002 is removed from the first surface of the RDL substrate 402 and a molding compound 430 is formed on the first active die 420 to complete the formation of the RFFE module 400, for example, as shown in FIG4A. In some embodiments of this disclosure, the carrier glass substrate 1002 is removed from the RDL substrate by exposing and irradiating the adhesive layer 1004 through the carrier glass substrate 1002.

[0066] In some embodiments of this disclosure, the RDL substrate provides a double-sided substrate to enable the integration of RF filters, SMT passive component matching, and laminated wiring / inductors. The benefits of the RDL substrate include a significant reduction in the size of the RFFE module in the XY dimensions (e.g., by a factor of 2). Furthermore, the RDL substrate also allows for a significant reduction in the Z-height (e.g., by a factor of 2). For example, a four-layer (4L) laminated package substrate can have a thickness of 260 micrometers compared to a 50-micrometer thick RDL substrate. Eliminating the need for a laminated package substrate by using an RDL substrate provides both a reduction in cost and size of the RFFE module, while providing performance comparable to that of a side-by-side laminated package substrate RFFE module.

[0067] According to another embodiment of this disclosure, a device includes a redistribution layer (RDL) substrate and a first die coupled to a second surface of the RDL substrate, the second surface being opposite to a first surface of the RDL substrate. In one configuration, the device has a charge storage component adjacent to the first surface of the RDL substrate. In one configuration, the charge storage component may be a MIM capacitor C, as shown in FIG4. In another embodiment, the aforementioned component may be any structure or any material configured to perform the functions listed above.

[0068] FIG12 is a block diagram illustrating an exemplary wireless communication system 1200 in which the present disclosure can be advantageously employed. For illustrative purposes, FIG12 illustrates three remote units 1220, 1230, and 1250 and two base stations 1240. It will be appreciated that the wireless communication system may have more remote units and base stations. Remote units 1220, 1230, and 1250 include integrated circuit (IC) devices 1225A, 1225C, and 1225B, which include the disclosed RDL substrate. It will be appreciated that other devices may also include the disclosed RDL substrate, such as base stations, switching devices, and network equipment. FIG12 illustrates a forward link signal 1280 from base station 1240 to remote units 1220, 1230, and 1250, and a reverse link signal 1290 from remote units 1220, 1230, and 1250 to base station 1240.

[0069] In FIG12, remote unit 1220 is shown as a mobile phone, remote unit 1230 is shown as a portable computer, and remote unit 1250 is shown as a fixed-location remote unit in a wireless local loop system. For example, a remote unit may be a mobile phone, a handheld personal communication system (PCS) unit, a portable data unit (such as a personal data assistant, GPS-enabled device, navigation device, set-top box, music player, video player), an entertainment unit, a fixed-location data unit (such as a meter reading device), or other devices for storing or retrieving data or computer instructions, or combinations thereof. Although FIG12 illustrates various forms of remote units according to this disclosure, this disclosure is not limited to the units illustrated in these examples. Various forms of this disclosure may be suitably used in many devices including the disclosed RDL substrate.

[0070] Figure 13 is a block diagram illustrating a design workstation for circuit, layout, and logic design of semiconductor components (such as the RDL substrate disclosed above). Design workstation 1300 includes a hard disk 1301 containing operating system software, support files, and design software such as Cadence or OrCAD. Design workstation 1300 also includes a display 1302 for designing circuits 1310 or radio frequency (RF) components 1312, such as the RDL substrate. Storage medium 1304 is provided for tangibly storing the design of circuits 1310 or RF components 1312 (e.g., the RDL substrate). The design of circuits 1310 or RF components 1312 can be stored on storage medium 1304 in file formats such as GDSII or GERBER. Storage medium 1304 can be a compact optical disc read-only memory (CD-ROM), a digital multifunction disc (DVD), a hard disk, flash memory, or other suitable device. In addition, the design workstation 1300 includes a drive 1303 for accepting input from the storage medium 1304 or writing output to the storage medium 1304.

[0071] The data recorded on the storage medium 1304 may specify logic circuit configurations, pattern data for photolithography masks, or mask pattern data for serial writing tools such as electron beam lithography. This data may further include logic verification data, such as timing diagrams or network circuits associated with logic simulations. By reducing the number of processes required to design semiconductor wafers, providing data on the storage medium 1304 facilitates the design of circuit 1310 or RF component 1312.

[0072] The following numbered clauses describe implementation examples: 1. A device comprising: a redistribution layer (RDL) substrate; a passive component in the RDL substrate adjacent to a first surface of the RDL substrate; and a first die coupled to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate. 2. The device of clause 1, further comprising device interconnects coupled between the first die and the second surface of the RDL substrate. 3. The device of any one of clauses 1 or 2, further comprising a second die coupled to the passive component, the second die being opposite to the first die. 4. The device of clause 3, further comprising a third die coupled to the passive component, the third die being opposite to the first die and adjacent to the second die. 5. The device of any one of Clauses 1 to 4, further comprising: a molding compound on a second surface of an RDL substrate and a first die; a first RDL in the RDL substrate; a second RDL in the RDL substrate; a first through-hole molded via (TMV) coupled to the first RDL; a second TMV coupled to the second RDL; and a 3D inductor contained on the surface of the molding compound and a trace coupled to the first TMV and the second TMV. 6. The device of any one of Clauses 1 to 5, wherein the first die comprises an antenna module. 7. The device of any one of Clauses 1 to 6, wherein the passive component comprises a metal-insulator-metal (MIM) capacitor. 8. The device of Clause 7, further comprising an inductor coupled to the MIM capacitor. 9. The device of any one of Clauses 1 to 8, wherein the device comprises a radio frequency (RF) filter. 10. The device of any one of Clauses 1 to 9, wherein the device comprises a radio frequency front-end (RFFE) module. 11. A method for manufacturing a device, comprising: forming a redistribution layer (RDL) substrate on a carrier glass substrate; forming a passive component in an interlayer dielectric (ILD) layer of the RDL substrate adjacent to a first surface of the carrier glass substrate and the RDL substrate; coupling a first die to a second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate; and removing the carrier glass substrate from the first surface of the RDL substrate. 12. The method of claim 11, further comprising forming device interconnects on the second surface of the RDL substrate to couple the first die to the second surface of the RDL substrate. 13. The method of any one of claims 11 or 12, further comprising coupling a second die to the passive component, opposite to the first die. 14. The method of claim 13, further comprising coupling a third die to the passive component, the third die being opposite to the first die and adjacent to the second die.15. The method of any one of Clauses 11 to 14, further comprising: depositing a molding compound on a second surface of an RDL substrate and on a first die; forming a first RDL in the RDL substrate; forming a second RDL in the RDL substrate; forming a first through-hole molded via (TMV) coupled to the first RDL; forming a second TMV coupled to the second RDL; and forming a 3D inductor by depositing traces on the surface of the molding compound and coupling them to the first TMV and the second TMV. 16. The method of any one of Clauses 11 to 15, wherein the first die comprises an antenna module. 17. The method of any one of Clauses 11 to 16, wherein the passive component comprises a metal-insulator-metal (MIM) capacitor. 18. The method of Clause 17, further comprising forming an inductor coupled to a MIM capacitor. 19. The method of Clause 18, further comprising integrating the device into a radio frequency (RF) filter. 20. The method of any one of Clauses 11 to 19 further includes integrating the device into a radio frequency front-end (RFFE) module.

[0073] For firmware and / or software implementations, these methods can be implemented using modules (e.g., programs, functions, etc.) that perform the functions described herein. Machine-readable media that tangibly implements instructions can be used to implement the methods described herein. For example, software code can be stored in memory and executed by a processor unit. Memory can be implemented within or outside a processor unit. As used herein, the term "memory" means long-term, short-term, volatile, non-volatile, or other types of memory and is not limited to a particular type or number of memories, or the type of media on which memory is stored.

[0074] If implemented in firmware and / or software, these functions can be stored as one or more instructions or code on a computer-readable medium. Examples include computer-readable media encoded with data structures and computer-readable media encoded with computer programs. Computer-readable media includes physical computer storage media. Storage media can be any available media accessible by a computer. By way of example and not limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disc storage, disk storage or other magnetic storage device or other media that can be used to store desired program code in the form of instructions or data structures and is accessible by a computer. Disks and optical discs as used herein include CDs, laser discs, optical discs, DVDs, floppy disks and Blu-ray® discs, wherein disks typically reproduce data magnetically and optical discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0075] In addition to being stored on a computer-readable medium, instructions and / or data may be provided as signals included on a transmission medium in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicating instructions and data. The instructions and data are configured to cause one or more processors to perform the functions outlined in the claims.

[0076] Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alterations may be made herein without departing from the technology of the present disclosure as defined by the appended claims. For example, relational terms such as “above” and “below” are used relative to a substrate or electronic device. Of course, if the substrate or electronic device is inverted, above becomes below, and vice versa. Additionally, if facing the side, above and below may refer to the side of the substrate or electronic device. Furthermore, the scope of this application is not intended to be limited to the specific configurations of processes, machines, manufactures, material compositions, components, methods, and steps described in the specification. As will be readily understood by one of ordinary skill in the art from the present disclosure, processes, machines, manufactures, material compositions, components, methods, or steps that perform substantially the same function or achieve substantially the same result as the corresponding configurations described herein can be utilized according to the present disclosure, whether currently existing or to be developed thereafter. Therefore, the appended claims are intended to include such processes, machines, manufactures, material compositions, components, methods, or steps within their scope.

[0077] Those skilled in the art will further understand that the various illustrative logic blocks, modules, circuits, and algorithm steps described in connection with this disclosure can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, various illustrative components, blocks, modules, circuits, and steps have been generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the entire system. Those skilled in the art can implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of this disclosure.

[0078] The various illustrative logic blocks, modules, and circuits described herein may be implemented or performed by a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware component, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, it may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0079] The steps of the methods or algorithms described in connection with this disclosure can be directly implemented in hardware, in a software module executed by a processor, or a combination of both. The software module can reside in random access memory (RAM), flash memory, read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), a register, a hard disk, a removable disk, a compact optical disc read-only memory (CD-ROM), or any other form of storage media known in the art. Exemplary storage media are coupled to a processor, enabling the processor to read information from and write information to the storage media. Alternatively, the storage media can be integrated into the processor. The processor and storage media can reside in an application-specific integrated circuit (ASIC). The ASIC can reside in a user terminal. Alternatively, the processor and storage media can reside as discrete components in the user terminal.

[0080] In one or more exemplary designs, the described functionality can be implemented using hardware, software, firmware, or any combination thereof. If implemented in software, these functions can be stored or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media that facilitate the transfer of computer programs from one place to another. Storage media can be any available media accessible by a general-purpose or special-purpose computer. By way of example and not limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact optical disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other media that can be used to carry or store specific program code components in the form of instructions or data structures and are accessible by a general-purpose or special-purpose computer or a general-purpose or special-purpose processor. Furthermore, any connection is properly referred to as computer-readable media. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared, radio, and microwave), then that coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology (such as infrared, radio, and microwave) is included in the definition of media. The disks and optical discs used herein include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray® discs, wherein disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0081] The foregoing description of this disclosure is intended to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. [Simplified Explanation of the Diagram]

[0009] To gain a more complete understanding of this disclosure, the following description is now taken in conjunction with the accompanying drawings.

[0010] Figure 1 is a schematic diagram of a radio frequency front-end (RFFE) module using active and passive devices.

[0011] Figure 2 is a schematic diagram of a radio frequency front-end (RFFE) module used for active and passive devices in a chipset.

[0012] Figure 3 is a block diagram illustrating a cross-sectional view of a radio frequency front-end (RFFE) module including semiconductor chips and integrated passive device (IPD) filter chips according to various embodiments of the present disclosure.

[0013] Figures 4A to 4C are block diagrams illustrating various types of radio frequency front-end (RFFE) modules including wafer-level double-sided redistribution layer (RDL) substrates for the integration of passive and active devices, according to the present disclosure.

[0014] Figures 5A to 5C are block diagrams of the radio frequency front-end (RFFE) module of Figure 4A, further illustrating various aspects of the present disclosure.

[0015] Figures 6A and 6B are block diagrams of the radio frequency front-end (RFFE) module of Figure 4A, further illustrating various aspects of the present disclosure.

[0016] Figures 7A to 7D are block diagrams illustrating various options for assembling a redistribution layer (RDL) substrate and active die to form a radio frequency front-end (RFFE) module according to various forms of the present disclosure.

[0017] Figures 8A to 8C are block diagrams illustrating the assembly process of various forms of radio frequency front-end (RFFE) modules fixed to a mobile motherboard according to the present disclosure.

[0018] Figures 9A to 9C are block diagrams illustrating various types of radio frequency (RF) filters including redistribution layer (RDL) substrates according to the present disclosure.

[0019] Figures 10A to 10C are block diagrams illustrating the process of manufacturing a radio frequency front-end (RFFE) module including a redistribution layer (RDL) substrate according to various embodiments of the present disclosure.

[0020] Figure 11 is a process flow diagram illustrating various methods for manufacturing a radio frequency front-end (RFFE) module including a redistribution layer (RDL) substrate according to the present disclosure.

[0021] FIG12 is a block diagram illustrating an exemplary wireless communication system in which the present disclosure can be advantageously adopted.

[0022] Figure 13 is a block diagram illustrating a design workstation for circuit, layout and logic design of semiconductor components according to one configuration.

Claims

1. A device comprising: a redistribution layer (RDL) substrate; a first passive component in the RDL substrate, adjacent to a first surface of the RDL substrate; and a second passive component in the RDL substrate, adjacent to a second surface of the RDL substrate and coupled in series with the first passive component. A first die is coupled to the second surface of the RDL substrate, the second surface being opposite to the first surface of the RDL substrate and coupled to the first passive component and the second passive component via a first device interconnect coupled between the first die and the second surface of the RDL substrate; The second grain is coupled to the first surface of the RDL substrate and to the first passive component and the second passive component; And a first RDL in the RDL substrate, the first RDL being coupled to the first die via a second device interconnect different from the first device interconnect.

2. The device of claim 1 further includes a third die coupled to the first RDL, the third die being opposite to the first die and close to the second die.

3. The device of claim 1 further comprises: a molding compound on the second surface and the first die of the RDL substrate; and a second RDL in the RDL substrate; A first through-hole (TMV) is coupled to the first RDL; The second TMV is coupled to the second RDL; Furthermore, the first passive component includes a 3D inductor, which is contained on the surface of the molding compound and coupled to the traces of the first TMV and the second TMV.

4. The device of claim 1, wherein the first die comprises an antenna module.

5. The device of claim 1, wherein the second passive component comprises a metal-insulator-metal (MIM) capacitor.

6. The device of claim 5, wherein the first passive component includes an inductor coupled to the MIM capacitor.

7. The device as claimed in claim 1, wherein the device includes a radio frequency (RF) filter.

8. The device as claimed in claim 1, wherein the device includes a radio frequency front-end (RFFE) module.

Images