Plasma treatment methods and methods for inspecting patterns in metal films

Abstract

One embodiment of the present invention comprises a plasma processing method for forming a pattern of a metal film, comprising: a first step (S1) in which information on the roughness and size of the mask pattern and the grain size of the metal film is obtained by using an image of a mask pattern obtained by electron beams; a third step (S2) in which etching conditions of the metal film are specified according to the allowable roughness value of the pattern of the metal film; and a fourth step (S3 to S7) in which the metal film is etched using the specified etching conditions of the metal film.

Description

Technical Field

[0001] This invention relates to a plasma processing method and a method for inspecting the pattern of a metal film. Prior Technology

[0002] Due to the miniaturization and three-dimensionalization of functional components such as semiconductor devices, three-dimensional processing technology for various materials has become crucial in the dry etching process of semiconductor manufacturing. This requires techniques that control shapes at the atomic level to process complex shapes. Even in wiring processes, miniaturization is progressing. For conventionally used Cu (copper) wiring, the increase in wiring resistance becomes a concern as the wiring width shrinks. This is because a barrier metal layer is formed between the interlayer film material and the Cu wiring to prevent metal atoms in the wiring from moving due to current and causing breakage. However, if the wiring width shrinks, the proportion of the barrier metal layer occupying the wiring width increases dramatically, accelerating the increase in wiring resistance.

[0003] To address this issue, the use of molybdenum (Mo) and ruthenium (Ru) as wiring materials has been examined. These metallic materials have relatively high melting points, allowing for thinner barrier metals, thus reducing the resistance of wiring including the barrier metal. Furthermore, these metallic materials can be patterned using plasma etching or similar methods, enabling the formation of wiring patterns from metal films with relatively large grains, thus making them promising materials for achieving low-resistance wiring.

[0004] Furthermore, as shown in Non-Patent Document 1, the resistance value of metal wiring can be calculated not only from the resistance value of the metal material, but also from the sum of the resistance value caused by electron scattering on the sidewalls of the wiring pattern and the resistance value caused by electron scattering at the grain interface. Therefore, in order to achieve low-resistance wiring, processing techniques that suppress the roughness and surface degradation of the surface or sidewalls of the wiring pattern become important.

[0005] On the other hand, conventional techniques for non-destructive measurement or inspection of the roughness or size of wiring patterns include, for example, using a scanning electron microscope, scanning electron beams are used to irradiate the pattern sample, and secondary electrons generated on the sample surface are detected to obtain a secondary electron image, thereby obtaining information such as the size of the pattern sample. For example, a pattern sample as shown in Figure 3(a) is irradiated by incident electron beam 116, thereby detecting secondary electrons 117 generated on the sample surface and obtaining a secondary electron image as shown in Figure 3(b), thereby determining the size 111 and roughness 112 of the uppermost mask pattern 103 of the sample.

[0006] However, since electron lines with voltages of several hundred eV to several keV are typically used as incident electron lines 116, as shown in Figure 3(a), when the width of the pattern (wiring pattern) of the etched material 102 under the mask pattern 103 is the same as or narrower than the size 111 of the mask pattern 103, the incident electron lines 116 cannot reach the pattern of the etched material 102, making it impossible to measure its size, roughness, and grain size. Furthermore, even if the thickness of the mask pattern 103 on the top layer of the sample is thin, when the incident electron lines 116 reach the pattern (wiring pattern) of the etched material 102, they cannot be detected by the detector because the secondary electrons 117 generated from its sidewalls are blocked by the mask pattern 103, making it impossible to measure the size, roughness, and grain size of the pattern of the etched material 102.

[0007] Transmission electron microscopy (TEM) is a well-known method for evaluating the size, roughness, and grain size of the topmost non-patterned wiring pattern. In TEM, electrons with energies in the hundreds of keV range are injected, and the size, roughness, and grain size of the etched material 102 pattern can be measured by detecting the image of the electron lines passing through the sample. However, this method requires destructive testing of the sample by thinning it into wafers to detect the electrons passing through. Therefore, wafers evaluated using this method cannot be used for subsequent processes on a semiconductor manufacturing line.

[0008] As a method for measuring the internal structure of a sample without cutting it, the conventional technology disclosed in Patent Document 1, as shown in FIG4(a), has the function of: injecting an incident electron beam 118 with energy that can reach the portion of the incident electron beam 118 not exposed into the sample, and detecting the signal 119 generated secondary from the irradiated portion of the incident electron beam 118. Using this technology, an incident electron beam 118 with energy that can reach the etched material 102 under the mask pattern 103 is injected, and reflected electrons 119 generated secondary from the pattern of the etched material 102 are detected, thereby obtaining a reflected electron image as shown in FIG4(b), and thus obtaining information on the roughness 114, size 113, and grain size 115 of the pattern of the etched material 102. [Previous Technical Documents] [Patent Literature]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 7-27549 [Patent Document 2] Japanese Patent Application Publication No. 2006-215020 [Patent Document 3] Japanese Unexamined Patent Application Publication No. 2019-215788 [Non-Patent Document]

[0010] [Non-Patent Document 1] R. S. Smith, et al. 12, “An evaluation of Fuchs-Sondheimer and Mayadas-Shatzkes models below 14nm node wide lines”, [online], February 13, 2019, AIP Advances 9, 025015 (2019), [searched on October 11, 2023], Internet <URL: https: / / doi.org / 10.1063 / 1.<5063896> [Non-Patent Document 2] Sara. Paolillo, et al. 5, “Direct metal etch of ruthenium for advanced interconnect”, Journal of Vacuum Science and Technology B 36, 03E103 (2018) [Non-Patent Document 3] Shibesh Dutta, et al. 8, “Thickness dependence of the resistivity of platinum-group metal thin films”, Journal of Applied Physics 122, 025107 (2017) [Non-Patent Document 4] A. F. Mayadas, et al. 1, “Electrical-Resistivity Model for Polycrystalline Films: the Case of Arbitrary Reflection at External Surfaces”, Physical Review B 1, 1382 - Published 15 February 1970 [Non-patent document 5] Daniel Gall, "The search for the most conductive metal for narrow interconnect lines", Journal of Applied Physics 127, 050901 (2020) Summary of the Invention

[0011] (The problem that the invention aims to solve)

[0012] First, Non-Patent Document 2 discloses a technique for forming wiring patterns using dry etching of wiring materials such as Mo and Ru. In wiring patterns, if roughness is formed on the surface or sidewalls, the wiring resistance increases. Therefore, to form low-resistance wiring patterns, it is necessary to control the cross-section of the wiring to achieve the desired shape while suppressing the formation of surface or sidewall roughness. When dry etching wiring patterns, suppressing the roughness of the mask is a challenge since a mask pattern is transferred to the underlying wiring material. Furthermore, the roughness of the processed wiring pattern varies depending on the processing conditions. Moreover, the roughness formed after processing a Ru wiring pattern is a challenge because it depends not only on the Ru etching conditions but also on the Ru film formation method or film formation temperature.

[0013] Furthermore, as shown in Non-Patent Documents 2 and 3, in metal wiring, electrons are easily scattered at the grain boundaries, so the wiring resistance depends on the size of the grains. When the grain size is small, the wiring resistance increases. Moreover, when wiring patterns are processed by plasma etching or the like, the grain boundaries in the metal material are more easily etched than the interior of the grains, resulting in an increase in the roughness of the sidewalls of the wiring pattern as etching progresses from the grain boundaries. Thus, the roughness of the wiring pattern depends not only on the roughness of the mask but also on the size of the grains of the etched material. Furthermore, this roughness can lead to increased wiring resistance or wire breakage, deteriorating the electrical characteristics of the wiring and preventing the desired device characteristics from being achieved.

[0014] On the other hand, before processing the aforementioned wiring pattern, the size or roughness of the masking pattern is determined by scanning an incident electron beam 116 with an energy of several hundred eV to several keV onto the masking pattern 103 using a scanning electron microscope. Secondary electrons 117 generated from the sample surface are detected to obtain an image, thereby obtaining sample information such as the size 111 or roughness 112 of the masking pattern 103. However, with this method, when the width of the wiring pattern under the masking pattern 103 is equal to or narrower than the size (width) 111 of the masking pattern 103, the secondary electrons generated from the sidewalls of the wiring pattern are blocked by the masking pattern 103 and cannot be detected by the detector. Therefore, there is a problem that the size 113, roughness 114, and grain size 115 of the wiring pattern cannot be measured in-line.

[0015] As a method for measuring the internal structure of a test sample without cutting it, the conventional technology disclosed in Patent Document 1 has the function of: injecting an incident electron beam 118 with energy that can reach the portion of the incident electron beam 118 that is not exposed, and detecting a signal containing a plurality of reflected electrons 119 secondaryly generated from the irradiated portion of the incident electron beam 118. If this technology is used to evaluate the etched material (metal film) 102 under the mask pattern 103 shown in FIG2(a) before etching, an image of the signal secondaryly generated from the etched material (metal film) 102 can be obtained, and information on the grains 115 of the metal wiring can be evaluated.

[0016] However, while this method can obtain information on the dimensions 111 and roughness 112 of the mask pattern 103 and the grain size 115 of the underlying metal film 102, it cannot evaluate the electrical characteristics of the wiring pattern formed after etching. Furthermore, when evaluating the wiring pattern shown in Figure 4(b), although information on the dimensions 113 and roughness 114 of the pattern (wiring pattern) of the etched material 102 and the grain size 115 can be obtained, it cannot evaluate the electrical characteristics of the formed wiring pattern. Therefore, it is impossible to process the etched material 102 into appropriate dimensions 113 and roughness 114 and manage the pattern shape and electrical characteristics based on the comprehensive information of the roughness 112 and dimensions 111 of the mask pattern 103 and the grain size 115 of the etched material 102.

[0017] The purpose of this invention is to obtain information such as the roughness and grain size of a mask or metal wiring during the production line, and to perform etching to ensure wiring resistance by making the roughness of the wiring pattern below the allowable value. Furthermore, the optimal etching conditions are estimated based on the measured dimensions, roughness, and grain size information, with the aim of providing a wiring pattern with low wiring resistance. (Methods used to solve problems)

[0018] One embodiment of the present invention is a plasma processing method for forming a pattern of a metal film, comprising: The first step involves obtaining information on the roughness and size of the mask pattern and the grain size of the metal film by using an image of the mask pattern obtained through electron beams. The third step specifies the etching conditions of the aforementioned metal film based on the allowable roughness value of the pattern of the aforementioned metal film; and The fourth step involves etching the aforementioned metal film using the specified etching conditions. [The effects of the invention]

[0019] The wiring resistance can be estimated based on information such as the size and roughness of the mask pattern and the grain size of the metal film. Based on the obtained information, the optimal etching conditions can be set according to the allowable roughness value of the aforementioned metal film pattern to create a wiring pattern with low wiring resistance, thereby providing a device with excellent performance. Simple Explanation of the Diagram

[0020] [Figure 1] is a diagram showing one example of the process flow of the plasma processing method of this embodiment. [Figure 2] is an explanatory diagram of the sample cross-sectional structure of the plasma treatment method of this embodiment. [Figure 3] is an explanatory diagram used to illustrate the subject of the prior method. (a) is a cross-sectional view of the sample formed by the mask after the metal pattern is processed, and (b) is a top view of the secondary electronic image. [Figure 4] is an explanatory diagram of one example of the method for inspecting metal patterns in this embodiment, showing (a) a cross-sectional view and (b) a top view of the reflected electron image when electron lines that can reach the metal pattern are irradiated. [Figure 5] is a diagram showing an example of a scanning secondary electron microscope used for pattern inspection in this embodiment. [Figure 6] is a diagram showing an example of a secondary electronic image and a reflected electronic image of the mask pattern obtained in step 1 of this embodiment. [Figure 7] is a diagram showing an example of a secondary electronic image and a reflected electronic image of the pattern obtained in step 8 of this embodiment. [Figure 8] is a diagram showing an example of a plasma treatment apparatus applicable to this embodiment. [Figure 9](a) is an explanatory diagram of the method for setting the allowable roughness value of this embodiment, and (b) is an explanatory diagram of the method for setting the protective film thickness of the mask in this embodiment. [Figure 10] is an explanatory diagram of the sidewall protective film thickness setting method of this embodiment. Implementation

[0021] The following diagrams will be used to explain the implementation of this invention in detail. Furthermore, in all the diagrams, items with the same function will be marked with the same symbol, and redundant descriptions will be omitted.

[0022] Figure 1 is a diagram showing an example of the process flow of the pattern forming method of this embodiment. Figure 2 is also an example of a cross-sectional view illustrating the process flow of the pattern forming method of this embodiment. In this embodiment, the method for processing the etched material (metal film) 102 is described according to the flow of Figure 1. The etched material 102, as the metal material, can be, for example, a metal film containing Mo or Ru. In Figure 2, the substrate 101 corresponds to the wafer. In this embodiment, the case where silicon nitride (SiN) is used as the material of the mask pattern 103, and Ru is used as the metal material of the etched material (metal film) 102, is described as an example. The material of the mask pattern 103 is a material containing oxygen (O), nitrogen (N), or carbon (C) other than Si, such as silicon oxide film (SiO 2), silicon nitride film (SiN), and silicon carbide (SiC); a material containing titanium (Ti) such as titanium nitride (TiN) and titanium dioxide (TiO 2); a material containing aluminum (Al) or tantalum (Ta) such as aluminum oxide (Al 2O 3) and tantalum nitride (TaN); and a material containing carbon (C) may also be used.

[0023] First, as an inspection process of the wafer after mask formation (step S1), a semiconductor inspection device is used to irradiate the wafer on which the mask pattern 103 is formed on the etched material (metal film) 102 using incident electron beams, and to measure the width of the mask pattern 103, the roughness of the mask pattern sidewalls, and the grain size of the etched material (metal film) 102 (step S1). After the mask pattern 103 shown in FIG. 2(a) is formed, the incident electron beams are scanned and irradiated to detect the secondary generated electrons and obtain an image. Electrons carrying energy that can pass through the mask pattern 103 and reach the etched material (metal film) 102 are injected as incident electron beams, and the composition mainly consisting of secondary generated electrons is detected, thereby measuring the roughness and size of the mask pattern 103. On the other hand, if the incident electron beams reach the etched material (metal film) 102, most of the electrons will be reflected by metal atoms and reach the detector. Since the scattering profile of reflected electrons increases depending on the atomic number of the target metal atoms, information about the grains of the etched material (metal film) 102 can be obtained by acquiring an image dominated by reflected electrons.

[0024] Signals primarily composed of reflected electrons can be imaged using a semiconductor inspection apparatus 1 as shown in Figure 5. An incident electron beam 118 emitted from an electron source 5 is polarized by a scanning coil 8 controlled by a scanning control unit 7, and then scanned on a wafer 100 mounted on a moving platform 3. Secondary electrons and reflected electrons generated a second time from the surface of the wafer 100 by the scanning of the incident electron beam 118 are detected in a secondary electron detector 11 and a reflected electron detector 12, respectively, and amplified in an amplification unit 13. The secondary electron detector 11 detects low-energy components, primarily secondary electrons generated from the wafer 100, while the reflected electron detector 12 detects high-energy components, primarily reflected electrons. The electron signals amplified in the amplification unit 13 are transmitted to a control unit 4 via a conversion unit 14 and a detector control unit 15, and displayed as a scanned image on a monitor 16 by the control unit 4.

[0025] In Figure 6, as an example of the images obtained by the semiconductor inspection apparatus 1 in the wafer inspection process (step S1) after mask formation, Figure 6(a) mainly shows the secondary electron image 120 with secondary electrons, and Figure 6(b) mainly shows the reflected electron image 121 with reflected electrons. In Figure 6(a), a majority of the generated secondary electrons are obtained at the edge of the mask pattern 103, and the size and roughness of the mask pattern 103 can be measured. Figure 6(b) is the reflected electron image 121 generated by reflected electrons, which are reflected by atoms contained in the etched material (metal film) 102. Since the contrast varies depending on the crystal orientation of the grains, the grains of the etched material (metal film) 102 can be evaluated.

[0026] The roughness of the mask pattern 103 can be measured, for example, using the method disclosed in Patent Document 2. The grain size of the etched material (metal film) 102 can be measured, for example, using the method disclosed in Patent Document 3. Information such as the grain size, the length of the grain boundary across the mask pattern 103, and the crystal orientation of the grains can be obtained. The secondary electron image 120, the reflected electron image 121, and the measured information on the size, roughness, and grain size of the mask pattern 103 and the etched material (metal film) 102 obtained in step S1 are stored in the storage unit 18. Here, FIG5 shows the storage unit 18 and the arithmetic unit 19 stored in the semiconductor inspection apparatus 1, but the storage unit 18 and the arithmetic unit 19 can also be placed in the external server 21 or the plasma processing apparatus 30 shown in FIG8.

[0027] Next, based on the information obtained from the pattern inspection (step S1) performed after mask formation, which includes the roughness, size, and grain size of the mask pattern 103, and the etched material (metal film) 102, it is assumed that the pattern of the etched material (metal film) 102 is transferred and formed with the same roughness as the mask pattern 103, and the wiring resistance of the etched material (metal film) 102 after processing is estimated (step S2). The measured information on the size, roughness, and grain size of the mask pattern 103 and the etched material (metal film) 102, stored in the storage unit 18, is transmitted to the calculation unit 19, where the wiring resistance after processing is estimated and the allowable value of the roughness is calculated.

[0028] Here, Non-Patent Documents 4 and 5 disclose that the resistance of the wiring depends not only on the resistivity of the wiring material, but also on the scattering of electrons flowing within the wiring due to the roughness of the wiring sidewalls and the scattering at the grain boundaries of the wiring material. The relationship between the scattering at the sidewalls, the scattering at the grain boundaries, and the effective resistance value of the wiring is expressed as follows (Mathematical Formula 1). Here, ρ0 is the volume resistivity of the wiring metal, λ is the mean free path of electrons within the wiring metal, D is the particle size coefficient, p is the sidewall scattering coefficient, d is the wiring width, and R is the grain boundary scattering coefficient. Therefore, the effective volume resistivity ρ of the wiring pattern can be obtained by summing the scattering caused by sidewall roughness and the scattering caused by grain boundaries. Although the etched material (metal film) 102 is not processed in step S2, in the subsequent metal etching step S5, the etched material (metal film) 102 is basically processed according to the mask pattern 103. Therefore, here, the size and roughness of the secondary electron image 120 of the mask pattern 103 obtained in step S1 are replaced with the size and sidewall roughness of the etched material (metal film) 102 to infer the wiring resistance. The wiring width d can be obtained from the size of the mask pattern 103 of the secondary electron image 120. The sidewall scattering coefficient p varies depending on the roughness of the wiring and can therefore be obtained by measuring the roughness of the mask pattern 103 from the secondary electron image 120. The grain size coefficient D can be obtained by measuring the grain size of the etched material (metal film) 102 from the reflected electron image 121.

[0029] Once the wiring resistance is estimated in the calculation unit 19, it is confirmed whether the estimated resistance value is within the desired resistance value range stored in the storage unit 18. If the wiring resistance value estimated in step S2 is within the desired resistance value range, the etchable material (metal film) 102 is etched according to the etching conditions stored in the storage unit 18 (steps S3, S4, S5). On the other hand, if the wiring resistance value estimated in step S2 is not within the desired resistance value range, the etchable material (metal film) 102 is etched according to the processing conditions stored in the database, so that the roughness of the pattern of the etched material (metal film) 102 is within an acceptable range. If it is not within the desired resistance value range, firstly, the size and roughness of the pattern of the etched material (metal film) 102 necessary to make the wiring resistance within the desired resistance value range are calculated.

[0030] As an example, Figure 9(a) shows the relationship between wiring resistance and roughness, illustrating the method for setting the allowable value of the roughness of the pattern of the etched material (metal film) 102. For example, as shown in Figure 9(a), when the measured grain size is large, the allowable value of the sidewall roughness necessary to obtain the desired wiring resistance can be set to be larger than when the grain size is small. The relationship between wiring resistance and roughness can be obtained using a relationship previously obtained from the test pattern, or it can be calculated using the relationship described above (Mathematical Formula 1).

[0031] When the allowable roughness value of the pattern of the etched material (metal film) 102 obtained in this way is greater than the roughness of the mask pattern 103 measured in step S1, for example, the roughness can be reduced by forming a protective film 104 in steps S3 and S4. Figure 9(b) shows the relationship between the thickness of the protective film 104 formed on the mask pattern 103 and the roughness of the mask. This relationship can be obtained in advance through experiments using test patterns and stored in the storage unit 18. When the roughness of the mask pattern 103 measured is greater than the allowable roughness value of the pattern of the etched material (metal film) 102, the roughness of the mask pattern 103 can be reduced to below the allowable roughness value of the pattern of the etched material (metal film) 102 by forming the protective film 104. In this way, the thickness of the protective film 104 on the mask pattern 103 formed in steps S3 and S4 is set according to the measured roughness of the mask pattern 103.

[0032] Figure 8 shows the overall configuration of an example of the plasma processing apparatus 30 used in this invention. The plasma processing apparatus 30 includes a processing chamber 31, a wafer platform 32, a gas supply unit 33, a bias power supply 39, a high-frequency power supply 40, a high-frequency application unit 41, and an apparatus control unit 43. The apparatus control unit 43 includes functional blocks such as a gas control unit 44, an exhaust system control unit 45, a high-frequency control unit 46, a bias control unit 47, a protective film formation process control unit 48, an etching control unit 49, a database 50, and a memory unit 51. The control unit 52 includes an arithmetic unit 53 and a database storage unit 54. By referring to the database storage unit 54, it can be determined whether the desired processing has been completed in the arithmetic unit 53. The arithmetic unit 53 and the database storage unit 54 of the control unit 52 can also be shared with the arithmetic unit 19 and the storage unit 1819 of the semiconductor inspection apparatus 1 shown in Figure 5.

[0033] The plasma processing apparatus 30 is equipped with a wafer platform 32 located in a processing chamber 31 and a gas supply unit 33 equipped with gas cylinders and valves. The protective film forming gas 34, micro-tune gas 35, etching gas 36, sidewall protective film forming gas 37, and post-processing gas 38 are supplied to the processing chamber 31 according to the processing steps based on the control signal 57 from the apparatus control unit 43.

[0034] The processing gas supplied to the processing chamber 31 is decomposed into plasma 42 within the processing chamber 31 by high-frequency power 56 applied to the high-frequency application unit 41 from a high-frequency power supply 40 controlled by the device control unit 43. Furthermore, the pressure within the processing chamber 31 can be maintained at a constant level by means of a predetermined flow rate of processing gas connected to the processing chamber 31 via a variable flow guide valve (not shown) and a vacuum pump. The free radicals generated by the decomposition into plasma 42 within the processing chamber 31 diffuse within the processing chamber 31 and are irradiated onto the surface of the wafer 100 mounted on the wafer platform 32. The ions generated in the plasma 42 are accelerated and irradiated onto the surface of the wafer 100 by a bias voltage 55 applied to the wafer platform 32 from a bias power supply 39 controlled by the bias control unit 47.

[0035] Secondly, as an example of the etching method in this embodiment, an example of an etching method in which the roughness of the mask pattern obtained in step S1 is reduced to within an acceptable range is shown below. First, as shown in FIG2(b), a thin protective film 104 is formed on the mask pattern 103 (step S3). The thickness of the formed protective film 104 is set, for example, as shown in FIG9(b), by the relationship between the thickness of the protective film 104 and the roughness of the mask pattern 103.

[0036] Figure 2 illustrates a method for improving the roughness of a mask by forming a C-containing thin film as a protective film 104 on a mask pattern 103. In this embodiment, the material of the mask pattern 103 is described as SiN, and the etched material (metal film) 102 is Ru. The material of the mask pattern 103 can be SiO2, Si3N4, SiC, etc., or materials containing C, O, or N other than Si, such as TiN, TiO2, etc., materials containing Al or Ta such as Al2O3, TaN, etc. Materials containing C can also be used.

[0037] First, as a condition for processing the mask pattern 103 formed on the wafer 100, the processing conditions for the protective film formation process of the database storage unit 54 stored in the control unit 52 are transmitted to the device control unit 43 based on the roughness measured in step S1 and the allowable roughness value determined in step S2.

[0038] If the protective film formation process (step S3) begins, the protective film forming gas 34 is supplied to the processing chamber 31 at a predetermined flow rate according to the control signal 57 from the device control unit 43. The supplied protective film forming gas 34 becomes plasma 42 by the high-frequency power 56 applied to the high-frequency application unit 41, generating free radicals and ions. The free radicals and ions generated from the protective film forming gas 34 have the property of adhering to or being attached to the material holding the mask pattern 103 and accumulating. The free radicals or ions generated in the plasma 42 reach the surface of the wafer 100, forming a C-containing protective film 104 on the top and sidewalls of the mask pattern 103. In the protective film formation process control unit 48, the film thickness and quality of the protective film 104 can be controlled by setting and adjusting the flow rate of the protective film forming gas 34, the high-frequency power applied to the high-frequency application unit 41, the substrate temperature, the plasma irradiation time, etc.

[0039] For example, the protective film forming gas 34 can be a C-containing gas such as CH4, CF4, CHF3, CH3F, C4F8, CO2, or CO, or a COS gas, or a mixture of the aforementioned gases with Ar, He, O2, CO2, CO, COS, SO2, N2, H2, etc. Alternatively, the protective film forming gas 34 can also be HBr, BCl3, SO2, or a mixture of the aforementioned gases with Ar, He, O2, CO2, CO, COS, SO2, N2, H2, etc. In this case, the thin film formed after the free radicals or ions generated by the plasma 42 induced by the aforementioned gases react with the material of the mask pattern 103 will form a protective film 104. The thickness of the protective film 104 can be adjusted by the plasma irradiation time, the gas flow rate of the protective film forming gas 34, the substrate temperature, etc. Alternatively, by applying high-frequency power 56 to the high-frequency application section 41, the degree of plasma dissociation can be adjusted, thereby adjusting the reactivity of the generated free radicals and ions with the material surface, and thus adjusting the film thickness of the protective film 104.

[0040] Once the protective film 104 is formed in step S3, a portion of the protective film is removed for fine-tuning (step S4). An example of a cross-section of the fine-tuned pattern is shown in FIG2(c). After the protective film 104 is formed, further fine-tuning is performed to remove a portion of the protective film 104, thereby smoothing the shape of the protective film 104 and reducing the roughness of the pattern or the surface roughness of the protective film, while achieving the desired mask size.

[0041] According to the control signal from the protective film formation process control unit 48, the protective film micro-application gas 35 is supplied to the processing chamber 31 at a predetermined flow rate. It is converted into plasma 42 by the high-frequency power 56 applied to the high-frequency application unit 41, generating free radicals and ions. The free radicals and ions generated from the protective film micro-application gas 35 remove a portion of the material of the protective film 104 by reacting with or sputtering it, thereby reducing the roughness of the pattern or the surface roughness of the protective film.

[0042] When the protective film 104 is a material containing a large amount of C, the micro-gas 35 can be, for example, a mixture of gases such as argon (Ar), helium (He), O2, CO2, CO, COS, SO2, nitrogen (N2), and hydrogen (H2), or gases containing F such as NF3, CF4, CHF3, and SF6.

[0043] The roughness of the protective film 104 can be adjusted by the plasma irradiation time, the gas flow rate of the protective film micro-adjustment gas 35, the substrate temperature, etc. Alternatively, the degree of plasma dissociation can be adjusted by applying high-frequency power 56 to the high-frequency application section 41, thereby adjusting the reactivity of the generated free radicals and ions with the material surface, and thus adjusting the film thickness, film quality, and roughness of the protective film 104. Alternatively, the energy of ions injected into the surface of the wafer 100 can be controlled by adjusting the bias voltage 55 applied to the wafer platform 32 in the bias power supply 39, thereby adjusting the film thickness, film quality, and roughness of the protective film 104.

[0044] In this embodiment, fine-tuning (step S4) is performed after the protective film is formed (step S3) in order to obtain a pattern with a roughness within a specified range. However, fine-tuning of the mask pattern 103 can also be performed before the protective film is formed to reduce the roughness, and then the protective film 104 can be formed. Alternatively, either the protective film formation and fine-tuning can be performed. Furthermore, after fine-tuning (step S4) is performed after the protective film is formed (step S3), the same pattern check as in step S1 can be performed to confirm whether a protective film of the desired size and roughness has actually been formed on the mask pattern.

[0045] Once the roughness of the mask meets the specified roughness and the mask pattern of the desired size is obtained, the etching of the material to be etched (metal film) 102 is performed (step S5).

[0046] According to the control signal 57 from the device control unit 43, the etching gas 36 is supplied to the processing chamber 31 at a predetermined flow rate. The supplied etching gas 36 is converted into plasma 42 by the high-frequency power 56 applied to the high-frequency application unit 41, generating free radicals and ions for etching the material to be etched (metal film) 102. The free radicals or ions generated in the plasma 42 reach the surface of the wafer 100, as shown in FIG2(d), and the etching of the material to be etched (metal film) 102 begins with the mask pattern 103 and the protective film 104 as a mask. As the etching gas 36, for example, a halogen-containing gas such as Cl2, HBr, NF3, SF6, or a mixture of the aforementioned gases and O2 gas can be used. Alternatively, a mixture of fluorocarbon gas such as CF4, CHF3, hydrofluorocarbon gas, and O2 gas can be used as the etching gas 36. Ions generated from etching gas 36 are accelerated by bias voltage 55 and irradiated onto the surface of wafer 100. The bias voltage 55 is applied to wafer platform 32 by bias power supply 39 controlled by bias control unit 47.

[0047] Here, during the etching in step S5, as etching progresses towards the sidewalls of the etched material (metal film) 102, the desired metal pattern shape may not be achieved, or the roughness may increase. In particular, as shown in FIG4(b), when the boundaries of the grains of the etched material (metal film) 102 are mostly located on the sidewalls of the pattern, etching proceeds more easily at these boundaries than inside the grains, resulting in increased roughness. In such cases, as shown in FIG2(e), the increase in roughness can be suppressed by forming a sidewall protective film 105 on the sidewalls of the pattern of the etched material (metal film) 102.

[0048] As a method for forming a sidewall protective film 105 in the etching of the etched material (metal film) 102, there is a method of adding a gas with a sidewall protective effect to the etching gas of the etched material (metal film) 102 as described in step S5 and etching thereby, and a method of performing a step of forming a sidewall protective film 105 after the etching step of the etched layer (step S5) (step S6), and repeating steps S5 and S6.

[0049] As a method of adding a gas with sidewall protection effect to the etching gas of the etched material (metal film) 102, methods include using a mixture of Cl2 and O2 gases, CH4 gas, and hydrofluorocarbons, etc., which are gases with high packing properties, to form a C-based protective film on the sidewall. Alternatively, by adding HBr gas, CO2 gas, COS gas, N2 gas, SO2 gas, etc., and reacting with the sidewall of the etched material (metal film) 102, a reaction film with low volatility is formed, thereby preventing the etching of the sidewall.

[0050] When performing the step of forming the sidewall protective film 105 (step S6), according to the control signal from the protective film formation process control unit 48, the sidewall protective film forming gas 37 is supplied to the processing chamber 31 at a predetermined flow rate. By applying high-frequency power 56 to the high-frequency application unit 41, plasma 42 is formed, generating free radicals and ions. The free radicals and ions generated from the sidewall protective film forming gas 37 have the property of holding and adhering to the etched material (metal film) 102 and accumulating. The free radicals or ions generated in the plasma 42 reach the surface of the wafer 100, forming the sidewall protective film 105 on the top of the mask pattern 103, the sidewalls, and the sidewalls (sidewall surfaces) of the pattern of the etched material (metal film) 102. In the protective film formation process control unit 48, the thickness and quality of the sidewall protective film 105 can be controlled by setting and adjusting the flow rate of the sidewall protective film forming gas 37, the high-frequency power 56 applied to the high-frequency application unit 41, the substrate temperature, the plasma irradiation time, etc.

[0051] As the gas 37 for forming the sidewall protective film, for example, gases containing C such as CH4, CF4, CHF3, CH3F, C4F8, CO2, and CO, HBr, BCl3, COS, SO2, or a mixture of the aforementioned gases with Ar, He, O2, CO2, CO, COS, SO2, N2, H2, etc., can be used. The thin film formed after the free radicals or ions generated by the plasma 42 induced by the aforementioned gases react with the material being etched (metal film) 102 will form a sidewall protective film 105 on the sidewall of the material being etched (metal film) 102. The thickness of the sidewall protective film 105 can be adjusted by the plasma irradiation time, the gas flow rate of the sidewall protective film forming gas 37, the substrate temperature, etc. Alternatively, by applying high-frequency power 56 to the high-frequency application section 41, the degree of plasma dissociation can be adjusted, thereby adjusting the reactivity of the generated free radicals and ions with the material surface, and thus adjusting the thickness of the sidewall protective film 105.

[0052] After the sidewall protective film 105 is formed, plasma generated by introducing gases such as Ar gas, He gas, N2 gas, and H2 gas can be further irradiated onto the pattern of the groove, thereby smoothing the shape of the sidewall protective film 105 and reducing the roughness of the groove pattern or the surface roughness of the sidewall protective film.

[0053] Once the etching of the etched material (metal film) 102 is completed (step S7), pattern inspection is performed (step S8). As an example, the process of inspecting the etched pattern shown in FIG2(f) using the semiconductor inspection apparatus 1 is described. An electron beam carrying energy that passes through the mask pattern 103 and reaches the pattern of the etched material (metal film) 102 is irradiated onto the wafer 100 after the pattern of the etched material (metal film) 102 is formed. Secondary electrons and reflected electrons generated from the surface of the wafer 100 by scanning the electron beam are detected by the secondary electron detector 11 and the reflected electron detector 12, and amplified in the amplification unit 13. The electron signal amplified in the amplification unit 13 is displayed as a scan image on the monitor 16 by the control unit 4.

[0054] Figure 7 is an explanatory diagram illustrating one example of a wafer inspection method after the etched pattern is formed. In the secondary electron detector 11, a component primarily composed of secondary electrons is detected, and a secondary electron image 120, as shown in Figure 7(a), is obtained. The size and roughness of the mask pattern can then be measured. Conversely, in the reflected electron detector 12, a component primarily composed of reflected electrons is detected, and a reflected electron image 121, as shown in Figure 7(b), is obtained. Information such as the width of the pattern on the etched material (metal film) 102, the roughness of the sidewalls, and the grain size, grain length through the wiring pattern, and crystal orientation of the metal pattern are measured. When the pattern on the etched material (metal film) 102 is particularly fine, making it difficult to evaluate the grains after etching, the grain boundaries can be accurately determined by pattern matching with the image of the grains on the etched material (metal film) 102 before pattern processing, as measured in step S1. The secondary electron image 120, the reflected electron image 121 obtained in step S8, and the size, roughness, and grain information of the etched material (metal film) 102, as well as the size and roughness of the mask pattern 103, are stored in the storage unit 18.

[0055] Next, it is determined whether the roughness of the pattern of the etched material (metal film) 102 after processing is below a predetermined allowable value (step S9). If it is not within the predetermined allowable value range, the predetermined value of the mask pattern 103 is corrected. The roughness value of the mask pattern 103 measured in step S1 and stored in the storage unit 18 is compared with the roughness value of the mask pattern 103. When the roughness of the etched material (metal film) 102 increases after the pattern is formed, feedback can be provided to the conditions of the protective film formation process (step S3), fine-tuning (step S4), etching (steps S5, S7), and sidewall protective film formation (step S6). For example, even if the roughness of the mask pattern 103 measured in step S1 is within the allowable value, if the size of the pattern of the etched material (metal film) 102 after processing is smaller than the desired value and the roughness increases, and the roughness of the mask after the sidewall protective film is formed is not within the allowable value, the roughness of the pattern of the etched material (metal film) 102 can be reduced to the allowable value by modifying the conditions of the sidewall protective film forming process (step S6). For example, as shown in FIG10, as long as the relationship between the roughness of the pattern of the etched material (metal film) 102 after processing and the thickness of the formed sidewall protective film or the sidewall protective film forming time is obtained and stored in the storage unit 18, the conditions for increasing the sidewall protective film thickness by ΔH can be modified and implemented as the conditions for the next wafer processing. In this way, the roughness of the pattern of the etched material (metal film) 102 after processing can be reduced to the allowable value, and the manufacture of defective patterns can be avoided.

[0056] Alternatively, if the size of the pattern on the etched material (metal film) 102 is larger than the desired value, and the roughness is within the allowable value, the size of the etched pattern material (metal film) 102 can be fine-tuned by shortening the time for forming the protective film (step S3) and the sidewall protective film (step S6) and lengthening the time for fine-tuning (step S4).

[0057] Next, the wiring resistance is estimated (step S10) from the information on the roughness, size, and grain size of the pattern of the etched material (metal film) 102 obtained from the pattern inspection performed after the processing of the etched material (metal film) 102 (step S8). The information on the size, roughness, and grain size of the pattern of the etched material (metal film) 102 stored in the storage unit 18 is transmitted to the calculation unit 19 to estimate the wiring resistance after processing and calculate the specified value of the roughness. The wiring resistance value can be obtained by taking into account the effective resistance value of the wiring considering the scattering at the sidewalls and the scattering at the grain boundaries shown in the above (Mathematical Formula 1). The wiring width d after the metal pattern processing can be obtained from the size of the pattern of the etched material (metal film) 102 in the reflected electron image 121. The sidewall scattering coefficient p varies depending on the roughness of the wiring, so it can be obtained by measuring the roughness of the pattern of the etched material (metal film) 102 from the reflected electron image 121. The grain size factor D can be obtained from the grain size of the etched material (metal film) 102 of the reflected electron image 121. Once the wiring resistance is estimated, it is confirmed whether the resistance value is within the desired range.

[0058] Once the estimated resistance value is confirmed to be within the desired resistance value range, the sidewall protective film 105 and etching residue are removed (step S11). For example, when the sidewall protective film 105, oxidized etched material 102, and etching residue remain in the etched pattern groove, they can be mixed into the wiring material as impurities, increasing the wiring resistance or causing wire breakage. Therefore, they need to be removed after etching.

[0059] In the subsequent processing step (step S11), firstly, the device control unit 43 controls the gas supply unit 33 to supply the post-processing gas 38 to the processing chamber 31 at a predetermined flow rate. Under a predetermined pressure formed inside the processing chamber 31 by the supply of the post-processing gas 38, the device control unit 43 controls the high-frequency power supply 40 to apply high-frequency power 56 to the high-frequency application unit 41, thereby generating plasma 42 caused by the post-processing gas 38 inside the processing chamber 31. The post-processing gas 38 becomes plasma 42, generating free radicals and ions that remove the sidewall protective film 105, oxide film, and etching residue from the etched material (metal film) 102. The etching residue can be referred to as a modified layer. The post-processing gas 38 can be, for example, a mixed gas containing H2 gas. Alternatively, a mixed gas of H2 gas and N2, etc., can be used. Alternatively, it can be removed by short-time processing with a mixed gas containing F.

[0060] According to the present invention, information on the size, roughness, and grain size of the wiring pattern under the mask can be obtained non-destructively before the etched film is processed. Furthermore, the wiring resistance can be estimated based on the measured information on the size, roughness, and grain size of the mask pattern and the metal film. Moreover, optimal etching conditions can be set and implemented using the measured information. By performing etching with the roughness of the wiring pattern below a specified allowable value, etching that ensures wiring resistance can be performed, reducing the number of discarded wafers. Furthermore, optimal etching conditions can be estimated using the measured information to create wiring patterns with low wiring resistance, providing a device with superior performance.

[0061] The present invention has been specifically described above with reference to the embodiments, but the present invention is not limited to the foregoing embodiments, and various modifications can be made without departing from its spirit. For example, the above embodiments are described in detail for ease of understanding of the present invention and are not limited to having all the constituent parts described. Furthermore, other additions, deletions, and substitutions can be made to a part of the constituent parts of each embodiment.

[0062] 1: Semiconductor inspection device 2: Electro-optical system 3: Platform 4: Control Department 5: Electronic source 7: Scanning Control Unit 8: Scanning coil 9: Condensing Lens 10: Objective lens 11: Secondary electronic detector 12: Reflection Electron Detector 13: Enlarged section 14: Transformation Unit 15: Detector Control Unit 16: Monitor 17: Control Panel 18: Preservation Department 19: Arithmetic Department 20: Platform Control Department 21: External Server 30: Plasma treatment device 31: Processing Room 32: Wafer Platform 33: Gas Supply Department 34: Gas for forming protective film 35: Micro-regulation of gas 36: Etching Gas 37: Gas for forming sidewall protective film 38: Post-treatment gas 39: Bias Power Supply 40: High-frequency power supply 41: High-frequency application section 42: Plasma 43: Device Control Unit 44: Gas Control Department 45: Exhaust System Control Unit 46: High-Frequency Control Department 47: Bias Control Section 48: Protective film formation process control department 49: Etching Control Unit 50: Database 51: Memory Department 52: Control Department 53: Arithmetic Department 54: Database Preservation Department 55: Bias voltage 56: High-frequency power 57: Control Signal 100: Wafer 101:Substrate 102: Etched material (metal film) 103: Masking Pattern 104: Protective film 105: Sidewall Protective Film 111: Size of the mask pattern 112: Roughness of the sidewalls of the mask pattern 113: Dimensions of the pattern on the etched material (metal film) 114: Roughness of the sidewalls of the pattern of the etched material (metal film) 115: Grain size of the etched material (metal film) 116: Incident electron beam 117: Secondary Electrons 118: Incident electron beam 119: Reflected Electrons 120: Secondary Electronic Image 121: Reflected Electron Image

Claims

1. A plasma processing method for forming a pattern of a metal film, characterized by comprising: a first step, wherein the roughness and size of the mask pattern are obtained by using an image of the mask pattern obtained by electron lines, i.e., a secondary electron image, and the information of the grains of the metal film is obtained by obtaining a reflected electron image; a third step, wherein the size and roughness of the metal film pattern necessary to maintain the desired wiring resistance within the desired range are calculated based on the allowable roughness value of the pattern of the metal film, and / or, based on a pre-obtained correlation or mathematical formula 1, the etching conditions of the metal film are specified; and a fourth step, wherein the metal film is etched using the specified etching conditions, ρ= ρ0 + ρ0λ * 3(1 - p) / 4d + ρ0λ * 3R / 2D(1 - R)･･･(1) where, ρ0 is the volume resistivity of the wiring metal, λ is the mean free path of electrons in the wiring metal, D is the particle size coefficient, p is the sidewall scattering coefficient, d is the wiring width, and R is the grain boundary scattering coefficient.

2. The plasma treatment method as described in claim 1, wherein, Furthermore, there is a second step in which, based on the roughness and size of the aforementioned masking pattern and the information on the grain size of the metal film, the size and roughness of the aforementioned metal film pattern required for the desired wiring resistance are calculated, and the allowable value of the roughness of the aforementioned metal film pattern corresponding to the desired wiring resistance is obtained by referring to the pre-obtained correlation or mathematical formula 1.

3. The plasma treatment method as described in claim 2, wherein, The aforementioned etching conditions for the metal film are included in the step of forming a protective film on the aforementioned mask pattern.

4. The plasma treatment method as described in claim 2, wherein, The aforementioned etching conditions for the metal film include the step of forming a protective film on the sidewall of the aforementioned metal film.

5. The plasma treatment method as described in claim 2, wherein, The aforementioned metal film is ruthenium (Ru).

6. The plasma treatment method as described in claim 1, wherein, Furthermore, there is a second step in which, based on the measurement results of the roughness and size of the aforementioned mask pattern and the grain size of the metal film, the resistance value of the aforementioned metal film wiring is estimated by applying mathematical formula 1 and substituting the size and roughness of the mask pattern measured from the secondary electron image and the grain size of the etched material (metal film) obtained from the reflected electron image.

7. A method for inspecting the pattern of a metal film, characterized in that: by irradiating electron lines from above a mask pattern used to form the pattern of the aforementioned metal film, a secondary electron image is obtained to measure the roughness and size of the aforementioned mask pattern, and a reflected electron image is obtained to measure the grain size of the aforementioned metal film, and based on the measured results, by applying mathematical formula 1 and substituting the measured roughness and size of the mask pattern and the grain size of the metal film, the resistance value of the wiring of the aforementioned metal film is estimated, ρ= ρ0 + ρ0λ * 3(1 - p) / 4d + ρ0λ* 3R / 2D(1 - R)･･･(1) where, ρ0 is the volume resistivity of the wiring metal, λ is the mean free path of electrons in the wiring metal, D is the particle size coefficient, p is the sidewall scattering coefficient, d is the wiring width, and R is the grain boundary scattering coefficient.

8. A method for inspecting the pattern of a metal film, characterized by comprising: a first step, wherein the roughness and size of the mask pattern are obtained by using an image of the mask pattern obtained by electron lines, i.e., a secondary electron image, and the information of the grains of the metal film is obtained by obtaining a reflected electron image; and a second step, wherein, based on the roughness and size of the mask pattern and the information of the grains of the metal film obtained, the size and roughness of the pattern of the metal film required under the desired wiring resistance are calculated, and the permissible value of the roughness of the pattern of the metal film corresponding to the desired wiring resistance is obtained by referring to a pre-obtained correlation or mathematical formula 1, ρ= ρ0 + ρ0λ * 3(1 - p) / 4d + ρ0λ* 3R / 2D(1 - R)･･･(1) where, ρ0 is the volume resistivity of the wiring metal, λ is the mean free path of electrons in the wiring metal, D is the particle size coefficient, p is the sidewall scattering coefficient, d is the wiring width, and R is the grain boundary scattering coefficient.

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