System and method for testing devices, computer readable medium

Abstract

This invention relates to systems and methods for testing apparatus. In particular, this invention relates to a computer-readable medium. Specifically, this invention discloses a system for testing apparatus, the system comprising: a DUT interface (10) including a plurality of DUT connection ports (1, ..., 8); an allocation matrix unit (20) having an input side configured to be connected to the plurality of DUT connection ports (1, ..., 8), and an output side configured to be connected to one or more measurement units (M1, M2); and a test processor (30). The test processor (30) is configured to: receive test setting data; control the allocation matrix unit (20) such that, according to the test setting data, at least one of the plurality of DUT connection ports (1, ..., 8) is connected to at least one of the measurement units (M1, M2); and control one or more of the test units (M1, M2) to perform individual measurements.

Description

Technical Field

[0001] The present invention relates to a system and method for testing devices, particularly radio frequency devices, particularly high-frequency devices. In particular, the present invention relates to a corresponding computer-readable medium. Prior Art

[0002] In the testing of radio frequency devices, for example as part of quality control, some of the parameters to be tested have very little margin, so high-precision measurement is required. However, even when testing under laboratory conditions, it is usually very difficult to obtain high-precision measurement results. For example, if a single measurement unit is used to test a single device, it is impossible to distinguish between the defects of the signal provided by the device under test (DUT) and the defects caused by the measurement unit.

[0003] In this context, it is known to use an external signal splitter to provide the signal of the device under test to multiple measurement units in parallel. In this way, the measurement accuracy of a single device can be improved, but at the cost of assigning multiple measurement units to a single device under test.

[0004] On the other hand, for other types of radio frequency devices with lower quality standards, it is not necessary to test each device under maximum precision settings. In fact, average accuracy may be sufficient to screen out defective devices. In this case, the efficiency of the test procedure is crucial.

[0005] Against this background, the object of the present invention is to provide an improved system for testing devices and a corresponding method. In particular, the improved system should adapt to different test configurations. In particular, the improved system should provide a simple interface for the user. Summary of the Invention

[0006] The above object is achieved by a system for testing devices as claimed in claim 1 and a method for testing devices as claimed in claim 10. In addition, the object is solved by a computer-readable medium as claimed in claim 16.

[0007] Specifically, the object is solved by a system for testing devices, wherein the system comprises: A DUT interface including a plurality of DUT ports; A distribution matrix unit having an input side configured to be connected to the plurality of DUT ports and an output side configured to be connected to one or more measurement units; and A test processor.

[0008] The test processor is configured to perform the following steps: Receive test setup data; control the allocation matrix unit such that, based on the test setup data, at least one of the plurality of DUT ports is connected to at least one of the measurement units; and control one or more of the test units to perform individual measurements.

[0009] One aspect of the present invention is that measurement units can be allocated to DUTs in a flexible manner. More specifically, through the allocation matrix unit, each DUT port on the input side can be connected to one or more measurement units on the output side, where various mappings can be achieved.

[0010] Specifically, a single DUT port can be connected to a single measurement unit (one-to-one mapping), or a single DUT port can be simultaneously connected to multiple measurement units (one-to-many mapping). Since the DUT ports can be basically independently connected to one or more measurement units, an overall many-to-many mapping can be achieved.

[0011] Due to the multiple DUT ports of the DUT interface, multiple DUTs can be simultaneously connected to the test system, thereby testing the multiple DUTs simultaneously and in parallel.

[0012] To configure the test system according to the desired test setup as described above, the test processor is configured to receive test setup data. The test setup data can be provided to the test system as user input or by an external system.

[0013] Within the scope of the present invention, the test setup specifies the (partial) mapping of the DUT ports to one or more measurement units such that each DUT port is associated with any subset (including the empty set) of one or more measurement units, provided that no measurement unit is associated with more than one DUT port.

[0014] The test setup data received by the test processor can include the test setup itself or can include an identifier of the test setup. In the latter case, the test processor can have an internal database containing the test setup associated with the corresponding identifier. Additionally, the test setup data can include calibration or configuration data of the measurement units and / or at least one criterion for checking test results. Alternatively, the additional information can be only referenced in the test setup data through appropriate keys rather than incorporated into the test setup data.

[0015] After controlling the allocation matrix unit according to the received test setup data (i.e., the corresponding test setup) such that at least one DUT port is connected to at least one measurement unit, the test processor controls one or more designated measurement units to perform corresponding measurements. More precisely, the test processor controls each measurement unit associated with a DUT port according to the test setup to perform the corresponding measurement. The test processor can not only control the measurement unit to initiate the corresponding measurement, but also use calibration or configuration data to set the measurement unit(s).

[0016] Specifically, the measurement units can perform any one of the following measurements: EVM, SNR, phase noise, SFDR, ACLR, background noise, quantization error.

[0017] After performing the measurements, the test processor can provide test results. Specifically, the test results can be a list of individual measurement results provided by the measurement units, or a single value (such as an average value or a cross value) calculated based on the individual measurement results.

[0018] In this way, the test system allows for the flexible use of test resources, thereby improving the utilization rate of the measurement units. In principle, any DUT port can be connected to any subset of the measurement units that are already connected to the output side of the allocation matrix unit, and the test system provides a simple interface for the user.

[0019] In a specific embodiment, the allocation matrix unit includes at least one of the following: a switch, a splitter, a demultiplexer, and a switchable amplifier. Specifically, the allocation matrix unit can include a combination of the aforementioned components.

[0020] Through an N-way switch, a single port on the input side of the switch can be connected to any one of the N output ports of the switch, and vice versa. With the aid of an N-way splitter, the signal provided to the input port of the splitter is replicated and provided to each of the N output ports of the splitter simultaneously. For example, a demultiplexer (as described in U.S. Patent US 9,712,133 B2, the disclosure of which is hereby incorporated by reference in its entirety) provides the functions of both a switch and a splitter. That is to say, through an N-way demultiplexer, a single port on the input side of the demultiplexer can be connected to any subset of the N output ports of the demultiplexer.

[0021] In a specific embodiment, the distribution matrix unit includes a separator and a switchable amplifier configured to provide an amplified signal to the input of the separator. Thus, signal loss at the output side of the separator can be prevented by activating the amplifier on the input side of the separator. In particular, this can be advantageous when dealing with signals close to the thermal background noise.

[0022] In a specific embodiment, the distribution matrix unit includes a separator and, for any output of the separator, a switchable amplifier configured to amplify the signal provided by the output of the separator. In this way, the distribution signal provided at the output side of the separator can be provided to the corresponding measurement unit in an amplified form. This can be advantageously used when performing ultra-low phase noise measurements.

[0023] Compared with the amplifier connected to the input of the separator, the amplifier connected to the output of the separator generates uncorrelated noise, which can be eliminated later in the corresponding measurement unit for measuring the amplified signal. However, signal attenuation may still occur on the path to the amplifier, in which case signal amplification before the separator may result in better overall performance.

[0024] Preferably, a switchable input-side amplifier and a corresponding switchable output-side amplifier are provided around each separator in the distribution matrix unit, such that the (input) signal provided to the separator and / or the (output) signal provided by the separator to the respective measurement units can be amplified independently of each other according to the measurement requirements to be performed.

[0025] In a specific embodiment, the test processor is configured to control the distribution matrix unit according to a first test setting such that at least two of the plurality of DUT ports are connected to at least two measurement units.

[0026] According to the first test setting, the test system is adapted to perform at least two measurements of individual DUTs simultaneously. Specifically, a first DUT can be connected to a first measurement unit via the distribution matrix unit, while a second DUT can be connected to a second measurement unit via the distribution matrix unit.

[0027] In this way, multiple measurement units can be used to sample the waveforms of multiple DUTs or multiple pins of a DUT in parallel. Thus, the test system can operate in a high-throughput mode.

[0028] In a specific embodiment, the test processor is configured to control the distribution matrix unit according to a second test setting such that at least one of the plurality of DUT ports is connected to at least two measurement units.

[0029] According to this second test setting, the test system is adapted to perform at least two measurements of a single DUT connected to the DUT port separately. Specifically, the signals of the DUT can be separated and provided in parallel to one of at least two measurement units. In this way, at least two measurement units can sample the waveforms of a single device. For this purpose, the measurement units can operate in different settings. For example, multiple narrowband measurement units can operate in different frequency ranges.

[0030] Therefore, according to the above specific embodiments, the test system can operate in a high-precision mode, in which one DUT is tested by two or more measurement units. Specifically, in this way, the defects of the measurement units can be distinguished from the defects of the signals provided by the DUT.

[0031] In one specific embodiment, the test processor is arranged to control the measurement units (when present) such that the individual measurements of the measurement units are performed simultaneously.

[0032] Specifically, averaging the continuously performed measurements will eliminate the noise added by the measurement units as well as the noise caused by the DUT. Averaging the simultaneously performed measurements will eliminate the noise added by the measurement units, but will not eliminate the noise caused by the DUT.

[0033] Therefore, performing the measurements simultaneously helps to identify the noise caused by the DUT.

[0034] In one specific embodiment, the test processor is arranged to provide a test result calculated based on the corresponding measurements of the measurement units (when present). Specifically, the test processor can be arranged to calculate the average value and / or cross relationship of the individual measurement results. Here, the term averaging refers to any type of calculating the (convex) combination of the measurement results, especially the weighted combination of the measurement results. For example, the weights can be selected according to the accuracy or other attributes of the corresponding measurement units.

[0035] In one specific embodiment, the test setting data further indicates configuration information related to at least one measurement unit, and the test processor is arranged to control at least one of the measurement units according to the configuration information. Specifically, the configuration information can include calibration data. Such calibration data can be defined to compensate for the influence of any hardware components in the test system (such as the separator in the distribution matrix unit), especially the specific hardware components activated according to the corresponding test setting.

[0036] In this way, the operation of the measurement unit can be further adapted and optimized to suit a specific test setup. As a result, the test procedure can be further improved. Specifically, according to this specific embodiment, the test system itself includes all the necessary data for proper noise compensation, which makes the system significantly easier to use.

[0037] In one specific embodiment, the test processor includes a memory that stores a plurality of test setups, and the received test setup data includes an identification code of one of the plurality of test setups stored in the memory.

[0038] In this way, the size of the test setup data provided as input to the test processor can be further reduced.

[0039] In one specific embodiment, the test processor is configured to perform the following (further) steps: - Receive individual measurement results from the one or more measurement units; - Check whether the test results and / or the individual measurement results comply with at least one standard; - Select a second test setup based on the check result; - Control the allocation matrix unit according to the second test setup; and - Control at least one of the one or more measurement units to perform a corresponding second measurement.

[0040] According to this specific embodiment, the test system is adapted to perform a repeated measurement process, in which after performing a first test on one or more DUTs according to the first test setup, a second test is performed based on a second test setup. Specifically, the second test setup can be selected based on the result of the first test.

[0041] For example, in the case where the measurement results received after the first test indicate that the variation of the measurement results exceeds a critical value, the second test setup can be a test setup that provides higher accuracy (for example, by connecting each DUT to more measurement units, as described above).

[0042] Specifically, the above process can be summarized as an iterative measurement process, in which the test setup is adjusted in each iteration until at least one standard is met.

[0043] In this way, the efficiency of the test system can be further improved.

[0044] This object is further solved by a method for a test device. Specifically, the method can be implemented using the system described above. The method includes the following steps: - Receiving test setting data that indicates a mapping of at least one of a plurality of DUT ports to one or more measurement units; - Controlling a distribution matrix unit according to the test setting data, where the distribution matrix unit has an input side connected to a plurality of DUT ports and an output side that can be connected to the one or more measurement units; and - Providing an output to control the one or more measurement units to perform corresponding measurements.

[0045] For the above method, technical effects and advantages similar to those described in combination with the system are produced.

[0046] In a specific embodiment, controlling the distribution matrix unit includes controlling at least one of the following: a switch, a separator, and a splitter.

[0047] In a specific embodiment, at least two measurement units are controlled such that the individual measurements of the measurement units are performed simultaneously.

[0048] In a specific embodiment, the method further includes the following steps: - Receiving individual measurement results from the one or more measurement units; - Calculating an average value and / or a cross-relationship based on the individual measurement results; - Providing a test result based on the average value and / or the cross-relationship.

[0049] As an alternative or supplement to calculating the average value, any other value derived from the individual measurement results can be calculated and provided as a test result, including the maximum or minimum value, the median, etc.

[0050] In a specific embodiment, the method further includes setting the one or more measurement units according to the configuration information indicated in the test setting data.

[0051] In a specific embodiment, the method further includes the following steps: - Receiving individual measurement results from the one or more measurement units; - Checking whether the test result and / or the individual measurement results meet at least one standard; - Select a second test setting based on the inspection result; - Control the allocation matrix unit according to the second test setting; and - Control one or more measurement units to perform corresponding second measurements.

[0052] This object is further solved by a computer-readable medium. This computer-readable medium stores instructions that, when executed by at least one processor, cause the at least one processor to implement the method as described above.

[0053] The above advantages and preferred specific embodiments of the system will apply mutatis mutandis to the method and the computer-readable medium, and vice versa. Brief Description of the Drawings

[0054] Specific embodiments of the present invention will be described below with reference to the drawings, where FIG. 1 shows a test system according to a first specific embodiment; FIGS. 2a to 2b show the test system from FIG. 1 but with different configurations; FIG. 3 shows a part of the test system from FIGS. 2a to 2b according to a second specific embodiment; FIG. 4 shows a test system according to a third specific embodiment; and FIG. 5 shows a test method according to a first specific embodiment. Embodiments

[0055] FIG. 1 shows a high-level view of a test system according to a first specific embodiment. The system includes a DUT interface 10 having DUT ports 1-8, an allocation matrix unit 20, and a test processor 30. As shown in FIG. 1, the system can be connected to one or more measurement units during use, and FIG. 1 shows the option of there being two measurement units M1 and M2.

[0056] It should be noted that the present invention relates to systems with or without measurement units M1, M2 and is independent of the types of measurement units M1, M2. Although the present invention is described with two measurement units M1, M2, those skilled in the art will appreciate that only one measurement unit or more than two measurement units M1, M2 can be provided. The number and configuration of the connections at the output side of the allocation matrix unit 20 are appropriate.

[0057] The distribution matrix unit 20 is connected to the DUT interface 10 on its input side and is connected or at least connectable to two measurement units M1 and M2 on its output side. Each of the DUT ports 1-8 can be connected to one or both of the measurement units M1 and M2 through the distribution matrix unit 20 according to the test setting. The internal structure of the distribution matrix unit 20 will be further described below in conjunction with FIGS. 2a to 2b.

[0058] The test processor 30 can be connected to the distribution matrix unit 20 and is suitable for controlling the distribution matrix unit 20 (or components thereof) according to the received test setting data, where the test setting determines which of the DUT ports 1-8 is connected to or will be connectable to which of the measurement units M1, M2 or both when present. In addition, the test processor 30 can be connected to the measurement units M1, M2 or at least arranged such that it can be connected to the measurement units M1, M2. The test processor 30 can be suitable for setting the measurement units M1, M2 according to the parameters included in the test setting and controlling the measurement units M1, M2 to perform corresponding measurements.

[0059] FIGS. 2a and 2b show the test system of FIG. 1 in more detail. In this test system design, the DUT interface 10 includes eight DUT ports 1-8, and only eight ports are shown by way of example. Each of the DUT ports 1-4 is connected to a corresponding input of the distribution matrix unit 20, and specifically, to a corresponding input of the first switch SW21. This first switch SW21 is a 4-pole switch that allows selective connection between four inputs and a single output. The single output of the first switch SW21 is connected to the input of the 2-pole second switch SW22; this second switch SW22 allows selective connection between the input and two outputs.

[0060] The first output terminal of the second switch SW22 is directly connected to one of the three input terminals of the third switch SW23, which is a 3-pole switch that allows selective connection between each of the three input terminals and the output terminal. The output of the third switch SW23 is the first output of the distribution matrix 20 and can be connected to the first measurement unit M1.

[0061] The second output of the second switch SW22 is provided to the input of the first splitter SPR27 - this first splitter SPR27 separates any input signal and provides the signal at each of its two outputs. The first output from the first splitter SPR27 is connected to the second input of the third switch SW23.

[0062] Each of the DUT ports 5-8 is connected to a respective input of the distribution matrix unit 20 and, specifically, to a respective input of the fourth switch SW24. This fourth switch SW24 is a 4-pole switch that allows a selective connection between four inputs and a single output. The single output of the fourth switch SW24 is connected to the input of a 2-pole fifth switch SW25; this fifth switch SW25 allows a selective connection between the input and two outputs.

[0063] The first output terminal of the fifth switch SW25 is directly connected to one of the three input terminals of the sixth switch SW26, which is a 3-pole switch that allows a selective connection between each of the three input terminals and the output terminal. The output of the sixth switch SW26 is the first output of the distribution matrix 20 and can be connected to the second measurement unit M2.

[0064] The second output of the fifth switch SW25 is provided to the input of the second separator SPR28 - this second separator SPR28 separates any input signal and provides the signal at each of its two outputs. The first output from the second separator SPR28 is connected to the second input of the sixth switch SW26.

[0065] The second output from the first separator SPR27 is connected to the third input of the sixth switch SW26. The second output from the second separator SPR28 is connected to the third input of the third switch SW23.

[0066] Here, the distribution matrix unit 20 includes switches SW21 - SW26 and the first separator SPR27, the second separator SPR28, and each switch is controlled or controllable by the test processor 30. As described above, the first separator SPR27, the second separator SPR28 are arranged to duplicate and output the signal provided at their input side. The test processor 30 can be arranged to control each element of the distribution matrix unit 20, that is, to control the configuration of the switches SW21 - SW26 and activate the first separator SPR27, the second separator SPR28.

[0067] By appropriately controlling the switches SW21, SW22, SW23, and SW26 and, if necessary, activating the first separator SPR27, any one of the DUT ports 1-4 can be connected to - the measurement unit M1; or - the measurement unit M2; or - both the measurement units M1 and M2.

[0068] Similarly, by appropriately controlling switches SW24, SW25, SW26, and SW23, and activating the second separator SPR28 when necessary, any one of the DUT ports 5-8 can be connected to - measurement unit M1; or - measurement unit M2; or - both measurement units M1 and M2.

[0069] Specifically, in the configuration shown in Figure 2a, the test system is suitable for operating under high-precision test settings, such as specified by the following test settings: [DUT] [Port] 1 2 3 4 5 6 7 8 [Measurement Unit] - M1, M2 - - - - - -

[0070] When receiving the above test settings, the test processor 30 is suitable for controlling switches SW21 and SW22 such that the DUT port 2 is connected to the separator SPR27. Furthermore, the test processor 30 is suitable for controlling switches SW23 and SW26 such that the two signals provided by the first separator SPR27 are provided to the measurement units M1 and M2. This switch configuration is shown in Figure 2a.

[0071] In this way, the signal provided at the DUT port 2 is transmitted through switches SW21 and SW22 to the first separator SPR27, replicated (separated) by the first separator SPR27, and either signal is transmitted through switches SW23 and SW26 to the measurement units M1 and M2, respectively.

[0072] Therefore, in this specific embodiment, the test system is adapted to simultaneously measure the device under test connected to DUT port 2 through two measurement units M1 and M2 to perform high-precision testing.

[0073] Figure 2b shows a second configuration of the test system in Figure 2a. Here, the switches are set such that DUT port 2 is connected to measurement unit M1 via switches SW21, SW22, and SW23, while DUT port 6 is connected to measurement unit M2 via switches SW24, SW25, and SW26. No signals are provided to the first splitter SPR27 and the second splitter SPR28.

[0074] Therefore, the two devices under test connected to DUT ports 2 and 6 can be measured in parallel by measurement units M1 and M2, just like the test system in Figure 2.

[0075] The configuration shown in Figure 2b corresponds to the following test settings: [DUT] [Port] 1 2 3 4 5 6 7 8 [Measurement Unit] - M1 - - - M2 - -

[0076] It should be noted that the test system in Figure 2a can be set according to the high-precision setting (Figure 2a) or the high-throughput setting (Figure 2b) only by changing the component configuration of the allocation matrix unit 20.

[0077] It should be understood that by changing the number of poles of the switches, more or fewer connections can be made through the distribution matrix 20 as needed. For example, if the first switch SW21 and the fourth switch SW24 are 5-pole switches, each of them can selectively connect up to five DUT ports to the output port through the distribution matrix 20 and then to the corresponding measurement units M1, M2. Further, by making each of the first splitter SPR27 and the second splitter SPR28 a 3-way splitter and providing additional switches on the output side of the first splitter SPR27 and the second splitter SPR28, a single DUT port can be connected to three measurement units M1, M2. Additionally, by providing more switches in addition to the third and sixth switches SW23, SW26, more than two DUT ports can be connected to more than two measurement units through the distribution matrix 20, or parallel measurements of more than two measurement units can be provided. For this purpose, the distribution matrix 20 can be fully scaled.

[0078] Figure 3 shows a part of the test system from Figures 2a to 2b according to the second specific embodiment. Specifically, Figure 3 shows the modification of the circuit portion 21 around the first splitter SPR27 and the switch SW22 (see the dashed rectangle in Figures 2a to 2b). Using the modified circuit portion 21 as shown in Figure 3 in the system of Figures 2a to 2b, the system is configured to amplify the signal processed by the first splitter SPR27 before and / or after splitting. For this purpose, at a high level, around the first splitter SPR27 there are: - the amplifier AMP1 at the input side of the first splitter SPR27; and - the amplifiers AMP2 and AMP3 at the output side of the first splitter SPR27, where several additional switches SW31 - SW37 are provided to enable bypass of the amplifiers AMP1 - AMP3.

[0079] Specifically, the switches SW31 and SW32 are arranged to supply the signal provided at the input line l1 to the switch SW33 in the following ways: - bypassing the amplifier AMP1 (i.e., when the switches SW31 and SW32 are in configuration A); or - routing the signal through the amplifier AMP1 (i.e., when the switches SW31 and SW32 are in configuration B).

[0080] From the switch SW33, the signal can be directly supplied to the output line I2 or can be supplied to the input of the first splitter SPR27.

[0081] The first separator SPR27 is arranged to separate the signal into two signals provided at two corresponding outputs of the first separator SPR27. At the first output, a circuit including the following is provided - an amplifier AMP2; - a switch SW34 at the input side of the amplifier AMP2; and - a switch SW35 at the output side of the amplifier AMP2.

[0082] The switches SW34 and SW35 can bypass the amplifier AMP2, similar to that described above in connection with the amplifier AMP1 and the switches SW31, SW32.

[0083] At the second output, a corresponding circuit including an amplifier AMP3 and switches SW36, SW37 for bypassing the amplifier AMP3 is provided.

[0084] Overall, the circuit shown in Figure 3 allows the signal provided at the input line l1 (corresponding to the connection between SW21 and SW22 in Figures 2a to 2b) to be provided at - the output line l2, while bypassing the first separator SPR27 and optionally amplified by AMP1; or - the output lines I3 and I4, where the signal is optionally amplified by the amplifier AMP1 before passing through the first separator SPR27 and / or by the amplifiers AMP2 and / or AMP3 after passing through the first separator SPR27.

[0085] Specifically, similar to that shown in Figures 2a to 2b, any one of the output lines I2, I3, I4 can be connected to the corresponding measurement units M1, M2.

[0086] Figure 4 shows a test system according to a third specific embodiment. The test system shown in Figure 4 provides the same functions as the test system shown in Figures 2a to 2b. However, the structure of the distribution matrix unit 20 is simpler. More precisely, the switches SW21, SW22 and the first separator SPR27 can be replaced by a splitter SPC37, and the switches SW23, SW25 and the splitter SPR28 can be replaced by a separator SPC38. In addition, the use of the splitters SPC37, SPC38 can reduce the number of paths of the switches SW23, SW26.

[0087] As shown in Figure 4, the DUT interface 10 includes eight DUT ports 1-8, and only eight ports are shown by way of example. Each of the DUT ports 1-4 is connected to a corresponding input of the distribution matrix unit 20, and specifically, to a corresponding input of the seventh switch SW31. This seventh switch SW31 is a 4-pole switch that allows for selective connection between four inputs and a single output. The single output of the seventh switch SW31 is connected to the input of a 4-pole first splitter SPC37; this first splitter SPC37 allows for selective connection between the input and any one or more of the four outputs.

[0088] The first output of the first splitter SPC37 is connected to one of the inputs of the 2-pole eighth switch SW32. The output of the eighth switch SW32 is an output of the distribution matrix unit 20 and can be connected to the first measurement unit M1.

[0089] Each of the DUT ports 5-8 is connected to a corresponding input of the distribution matrix unit 20, and specifically, to a corresponding input of the ninth switch SW33. This ninth switch SW33 is a 4-pole switch that allows for selective connection between four inputs and a single output. The single output of the ninth switch SW33 is connected to the input of a 4-pole second splitter SPC38; this second splitter SPC38 allows for selective connection between the input and any one or more of the four outputs.

[0090] The first output of the second splitter SPC38 is connected to one of the inputs of the 2-pole tenth switch SW34. The output of the tenth switch SW34 is an output of the distribution matrix unit 20 and can be connected to the second measurement unit M2.

[0091] The second output from the first splitter SPC37 is connected to the second input of the tenth switch SW34. The second output from the second splitter SPC38 is connected to the second input of the eighth switch SW32. In a manner similar to the connections shown in each of Figures 2a and 2b, appropriate control by the test processor 30 of the seventh to tenth switches SW31 to SW34 and each of the two splitters SPC37, SPC38 will allow multiple DUT ports to be connected to the respective measurement units M1, M2, or to connect from a single DUT port to multiple measurement units M1, M2 simultaneously. This enables higher throughput measurements or highly sensitive measurements of a single part of the DUT.

[0092] As shown in Figure 4, the distribution matrix 20 including splitters SPC37 and SPC38 can be easily expanded to allow parallel monitoring of more than two DUT ports or to allow a single DUT port to be monitored by more than two measurement units M1 and M2. Increasing the number of poles of each of the seventh and ninth switches SW31 and SW33 will allow selection of more DUT ports to supply signals to the distribution matrix 20. Moreover, by adding more switches at the input of the distribution matrix 20, it will be possible to monitor more DUT ports in parallel and pass the signals therefrom to more measurement units by increasing the number of splitters. This will allow more DUT ports to be measured by more measurement units as needed. Additionally, by connecting more switches (other than the eighth and tenth switches SW32 and SW34) on the output side of the distribution matrix 20 to the unused (as shown in Figure 4) outputs of the two splitters SPC37 and SPC38, signals can be separated from a single DUT port to up to four measurement units. If the splitters SPC37 and SPC38 are set to provide more than four parallel and separated outputs, then clearly more than four measurement units can be addressed for each of the splitters SPC37 and SPC38, and thus a single DUT port can be measured in parallel by more than four measurement units.

[0093] Figure 5 shows a flowchart of a test apparatus according to a first specific embodiment. For ease of presentation, in the context of this specific embodiment, it is assumed that the method is implemented in the test system of Figures 2a to 2b, where the method steps are executed by a test processor 30.

[0094] In step S1, the test processor 30 receives test setting data. Specifically, the test setting data may include an identification code of a (first) test setting, where multiple test settings with associated identification codes may be stored in the internal memory of the test processor 30.

[0095] In step S2, the test processor 30 controls the distribution matrix unit 20 such that DUT ports 1 - 8 are connected to the measurement units M1 and M2 according to the test settings. For this purpose, the test processor 30 controls the configuration of one or more of the switches SW21 - SW26 and, if necessary, may activate the first separator SPR27 and the second separator SPR28.

[0096] Assume that after step S2, the distribution matrix unit 20 is set as shown in Figure 2b, the first device under test connected to DUT port 2 is connected to the measurement unit M1, and the second device under test connected to DUT port 6 is connected to the measurement unit M2.

[0097] In step S3, when measurement units M1, M2 are present, the test processor 30 controls these measurement units to perform corresponding measurements. This step may include setting the measurement units M1, M2 according to calibration data or other settings provided by the test processor. Specifically, the calibration data or settings may be associated with the test settings to compensate for the influence of hardware components (e.g., separators) activated in the test settings.

[0098] In step S4, the test processor 30 receives the respective measurement results from the measurement units M1 and M2 and calculates the overall test result. Additionally, the test processor 30 may receive additional information provided by the measurement units M1 and M2, such as error codes associated with the measurements performed. Based on the received information, the test processor 30 may provide an overall result, which may be obtained by calculating the average of the results obtained by the measurement units M1, M2, or may be a list of the individual measurement results.

[0099] In step S5, it is checked whether the test result meets at least one criterion. Specifically, at least one criterion may be defined such that if the test result does not exceed a certain threshold, it meets the criterion. The criterion may be selected according to the test settings.

[0100] If at least one criterion is met in step S5, the method proceeds to step S6, where the test result calculated in step S4 is provided as the final test result.

[0101] If at least one criterion is not met in step S5, the method proceeds to step S7, where a second test setting is determined. Specifically, the second test setting may be determined based on the test result and / or the first test setting. For example, if the first test setting is a high-throughput setting and it is determined from the test result in step S5 that the device under test fails the test, the second test setting may be a high-precision test setting.

[0102] In another example, both the first test setting and the second test setting are (different) high-precision test settings, and according to the second test setting, measurements are performed using additional test resources (i.e., more parallel measurement units) and / or different configurations of the measurement units. Therefore, performing the second test according to the second test setting allows improving the accuracy or quality of the test performed in the first test setting.

[0103] After determining the second test setting in step S7, the method steps S2 to S5 may be performed again for the second test setting.

[0104] However, it is not necessary to perform the standard check and iterate the test process using the second test setting. That is to say, steps S5 and S7 as described above do not necessarily have to exist. In this case, the method goes directly from step S4 to step S6.

[0105] The present invention is not limited to the specific example embodiments within this specification. On the contrary, those skilled in the art can also derive other variations of the present invention therefrom without departing from the purpose of the present invention. In addition, in particular, all the individual features described in connection with the specific example embodiments can also be combined with each other in other ways without departing from the purpose of the present invention.

[0106] For example, although the test system shown in FIGS. 2a and 2b is designed for two measurement units M1 and M2, it should be clear that it can be extended to any number N of measurement units. For this purpose, switches SW22 and SW25 need to be replaced with N-way switches, switches SW23 and SW26 need to be replaced with (N + 1)-way switches, and the first separator SPR27 and the second separator SPR28 need to be replaced with N-way separators. Similarly, by expanding the number of paths of switches SW21 and SW24, the number of DUT ports at the DUT interface can be expanded.

[0107] In addition, for the sake of convenience of description only, in the above description, only the maximum throughput setting and the high-precision setting are discussed as test settings. It should be understood that any individual test setting can be achieved by using the system and method of the present invention described above. For example, given a sufficient number of measurement units, a mixed test setting can be achieved, where a single DUT port is connected to multiple measurement units (to improve accuracy), while other DUT ports are each connected to a separate measurement unit (to improve throughput).

[0108] 1 - 8: DUT ports 10: DUT interface 20: Distribution matrix unit 21: Part of the distribution matrix unit 30: Test processor M1, M2: Measurement units AMP1, AMP2, AMP3: Amplifiers SPC37, SPC38: Splitters SPR27: First separator SPR28: Second separator SW21 - SW26: Switches SW31 - SW34: Switches S1: Receive the (first) test setting S2: Control the distribution matrix unit S3: Control the measurement unit S4: Calculate the test result S5: Check the standard S6: Provide the final test result S7: Determine the second test setting

Claims

1. A system for testing an apparatus, the system comprising: A DUT interface (10) includes a number of DUT connection ports (1, ..., 8); A distribution matrix unit (20) has an input side configured to be connected to a plurality of DUT connection ports (1, ..., 8) and an output side configured to be connected to one or more measurement units (M1, M2); and a test processor (30), wherein the test processor (30) is configured to: receive test setting data; control the distribution matrix unit (20) such that, according to the test setting data, at least one of the plurality of DUT connection ports (1, ..., 8) is connected to at least one of the measurement units (M1, M2); and control one or more of the measurement units (M1, M2) to perform individual measurements, wherein the distribution matrix unit (20) includes a splitter (SPR27, SPR28) and a switchable amplifier (AMP1) configured to provide an amplified signal to the input of the splitter (SPR27, SPR28).

2. The system of claim 1, wherein the allocation matrix unit (20) includes at least one of the following: switches (SW21-SW26, SW31-SW34), splitters (SPR27, SPR28), shunts (SPC37, SPC38), and switchable amplifiers (AMP1, AMP2, AMP3).

3. The system of claim 1, wherein the allocation matrix unit (20) includes a separator (SPR27, SPR28) and a switchable amplifier (AMP2, AMP3) for any output of the separator (SPR27, SPR28), which is configured to amplify the signal provided by the output of the separator (SPR27, SPR28).

4. The system of request item 1, wherein the test processor (30) is configured to control the allocation matrix unit (20) according to a first test setting such that at least two of the plurality of DUT connection ports (1, ..., 8) are connected to one of at least two measurement units (M1, M2).

5. The system of request item 1, wherein the test processor (30) is configured to control the allocation matrix unit (20) according to the second test settings, such that at least one of the plurality of DUT connection ports (1, ..., 8) is simultaneously connected to at least two measurement units (M1, M2).

6. The system of request item 1, wherein the test processor (30) is configured to control the measurement units (M1, M2) (when present) such that individual measurements of the measurement units (M1, M2) are performed simultaneously.

7. The system of claim 1, wherein the test processor (30) is configured to provide test results calculated based on the corresponding measurement results provided by the measurement units (M1, M2) (when present), particularly when presented by calculating average values ​​and / or cross relationships.

8. The system of claim 1, wherein the test setting data indicates configuration information, particularly calibration data, related to at least one measurement unit (M1, M2), and wherein the test processor (30) is used to control the at least one measurement unit (M1, M2) according to the configuration information.

9. The system of claim 1, wherein the test processor (30) includes a memory in which a plurality of test settings are stored, and wherein the received test setting data includes an identification code of one of the plurality of test settings stored in the memory.

10. The system of claim 1, wherein the test processor (30) is configured to: receive individual measurement results from one or more measurement units (M1, M2); check whether the test results and / or the individual measurement results meet at least one criterion; select a second test setting based on the check result; control the allocation matrix unit (20) based on the second test setting; and control at least one of the one or more measurement units (M1, M2) to perform the corresponding second measurement.

11. A system as requested in any of items 1 to 10, wherein the allocation matrix unit (20) may be configured to allow the following connections: a) at least two of the plurality of DUT connection ports (1, ..., 8) are connected on their output side to corresponding and different outputs of the allocation matrix unit (20); b) one of the plurality of DUT connection ports (1, ..., 8) is connected on its output side to at least two outputs of the allocation matrix unit (20).

12. A method for testing an apparatus, specifically using a system as claimed in any of the preceding claims, wherein the method comprises the steps of: receiving test setting data indicating a mapping of at least one of a plurality of DUT connection ports (1, ..., 8) to one or more measurement units (M1, M2); controlling an allocation matrix unit (20) according to the test setting data, wherein the allocation matrix unit (20) has an input side connected to the plurality of DUT connection ports (1, ..., 8) and an output side connectable to the one or more measurement units (M1, M2); and providing an output to control the one or more measurement units (M1, M2) to perform a corresponding measurement, further comprising the steps of: receiving individual measurement results from the one or more measurement units (M1, M2); checking whether the test results and / or the individual measurement results conform to at least one criterion; selecting a second test setting according to the check result; controlling the allocation matrix unit (20) according to the second test setting; and controlling the one or more measurement units (M1, M2) to perform a corresponding second measurement.

13. The method of claim 12, wherein controlling the distribution matrix unit (20) includes controlling at least one of the following: switches (SW21-SW26, SW31-SW34), splitters (SPR27, SPR28), shunts (SPC37, SPC38) and switchable amplifiers (AMP1, AMP2, AMP3).

14. The method of claim 12, wherein at least two measuring units (M1, M2) are controlled such that individual measurements of the measuring units (M1, M2) are performed simultaneously.

15. The method of claim 12 further includes the steps of: receiving individual measurement results from the one or more measurement units (M1, M2); calculating an average value and / or cross-relationship based on the individual measurement results; and providing test results based on the average value and / or cross-relationship.

16. The method of any one of claims 12 to 15 further includes setting up the one or more measurement units (M1, M2) according to the configuration information indicated in the test setup data.

17. A computer-readable medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform the method of any one of claims 12 to 16.

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