Horizontal light emitting diode and manufacturing method thereof
Patent Information
- Application Number
- TW113148848
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2026-10-01
- Estimated Expiration
- 2044-12-15
AI Technical Summary
Commercially available short-wave infrared (SWIR) light-emitting diodes primarily use a vertical chip structure, which fails to meet the diverse requirements of various applications, necessitating a horizontal chip structure with optimized current distribution for enhanced brightness and flexibility in packaging modules.
A horizontal light-emitting diode structure featuring a permanent substrate, epitaxial composite layer, transparent conductive layer, conductive plugs, and electrodes, with optimized current distribution and a horizontal architecture to enhance LED brightness and flexibility in packaging applications.
The horizontal structure improves luminous efficiency and flexibility in downstream applications by ensuring uniform current distribution and increased brightness, expanding the application range of SWIR LEDs.
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Abstract
Description
Technical Field
[0001] This invention relates to a horizontal light-emitting diode and its manufacturing method, and more particularly to a horizontal short-wave infrared light-emitting diode and its manufacturing method. Prior Technology
[0002] Short-wave infrared (SWIR) light-emitting diodes typically have wavelengths ranging from 1100 nanometers (nm) to 2000 nanometers (nm). This wavelength falls outside the visible light range and is highly effective at penetrating smoke, fog, or certain materials, making it primarily used in applications requiring high penetration or the detection of specific substances' absorption spectra. Commonly used SWIR wavelengths include 1050 nm, 1300 nm, and 1550 nm, which can be optimized for different application needs. For example, in medical devices, the ability of SWIR to penetrate human skin is utilized, and various medical detection devices for vascular imaging, biological tissue analysis, and physiological indicators have developed application modules incorporating SWIR light-emitting diodes.
[0003] However, most commercially available SWIR light-emitting diodes currently use a vertical chip structure, and there is no horizontal chip structure. However, the traditional packaging type of vertical SWIR light-emitting diodes cannot meet the various requirements of different applications. Therefore, the industry urgently needs an innovative short-wave infrared horizontal light-emitting diode structure and manufacturing method to meet the development needs of subsequent application modules. Summary of the Invention
[0004] The main objective of this invention is to provide a high-brightness horizontal light-emitting diode (LED) and its manufacturing method, applicable to short-wavelength infrared (SWIR) LEDs in the wavelength range of 1100-2000 nanometers (nm). In addition to providing a horizontal architecture to increase flexibility in subsequent packaging module applications, the LED structure disclosed in this invention also features optimized current distribution to enhance LED brightness, thus expanding the application range of downstream products.
[0005] To achieve the above objectives, the present invention provides a horizontal light-emitting diode, comprising a permanent substrate, an epitaxial composite layer, a transparent conductive layer, a plurality of conductive plugs, a first conductive electrode, and a second conductive electrode. The epitaxial composite layer has a light-emitting layer with a light emission wavelength of 1100-2000 nanometers (nm) and is disposed on the permanent substrate. The transparent conductive layer is sandwiched between the permanent substrate and the epitaxial composite layer. Each conductive plug is disposed between the transparent conductive layer and the epitaxial composite layer and electrically connected to the epitaxial composite layer. The first conductive electrode is disposed on the permanent substrate and electrically connected to the epitaxial composite layer. The second conductive electrode is disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
[0006] In one embodiment of the horizontal light-emitting diode of the present invention, the epitaxial composite layer further includes a first compound semiconductor layer and a second compound semiconductor layer, the first compound semiconductor layer and the second compound semiconductor layer sandwiching the light-emitting layer, and the second compound semiconductor layer being disposed between the light-emitting layer and the second conductive electrode.
[0007] In one embodiment of the horizontal light-emitting diode of the present invention, the first compound semiconductor layer is a first conductivity type indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductivity type indium phosphide (InP) layer.
[0008] In one embodiment of the horizontal light-emitting diode of the present invention, the horizontal light-emitting diode further includes a dielectric layer, and the epitaxial composite layer further includes a highly doped indium gallium arsenide phosphide (InGaAsP) layer, wherein each conductive plug is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
[0009] In one embodiment of the horizontal light-emitting diode of the present invention, each conductive pin is a metal stack, which forms an ohmic contact with a highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0010] In one embodiment of the horizontal light-emitting diode of the present invention, the horizontal light-emitting diode further includes a dielectric layer, and each conductive plug is disposed in the dielectric layer.
[0011] In one embodiment of the horizontal light-emitting diode of the present invention, each conductive plug includes a highly doped compound semiconductor layer and a metal stack. The highly doped compound semiconductor layer is sandwiched between the epitaxial composite layer and the metal stack, and forms an ohmic contact with the metal stack.
[0012] In one embodiment of the horizontal light-emitting diode of the present invention, the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer.
[0013] In one embodiment of the horizontal light-emitting diode of the present invention, the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0014] In one embodiment of the horizontal light-emitting diode of the present invention, the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
[0015] To achieve the above objectives, the present invention provides a method for manufacturing a horizontal light-emitting diode, comprising the following steps: forming an epitaxial composite layer disposed on an epitaxial growth substrate, having a light-emitting layer having a light-emitting wavelength of 1100~2000 nanometers (nm); forming a transparent conductive layer sandwiched between the epitaxial growth substrate and the epitaxial composite layer; forming a plurality of conductive plugs disposed between the transparent conductive layer and the epitaxial composite layer, electrically connected to the epitaxial composite layer; forming a metal layer on the transparent conductive layer, bonding it to a permanent substrate wafer, and then removing the epitaxial growth substrate; forming a first conductive electrode disposed on the permanent substrate, electrically connected to the epitaxial composite layer; and forming a second conductive electrode disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
[0016] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the step of forming an epitaxial composite layer further includes forming a first compound semiconductor layer and a second compound semiconductor layer, wherein the first compound semiconductor layer and the second compound semiconductor layer sandwich the light-emitting layer, and the second compound semiconductor layer is disposed between the light-emitting layer and the second conductive electrode.
[0017] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the first compound semiconductor layer is a first conductive indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductive indium phosphide (InP) layer.
[0018] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the method further includes forming a dielectric layer, and forming an epitaxial composite layer further includes forming a highly doped indium gallium arsenide phosphide (InGaAsP) layer, wherein each conductive plug is disposed in the dielectric layer, and the highly doped indium gallium arsenide phosphide layer is disposed between the first conductive indium phosphide layer and the dielectric layer.
[0019] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, each conductive pin is a metal stack, which forms an ohmic contact with a highly doped indium gallium arsenide phosphide layer, and the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0020] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, a dielectric layer is further formed, and each conductive plug is disposed in the dielectric layer.
[0021] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, each conductive plug includes a highly doped compound semiconductor layer and a metal stack. The highly doped compound semiconductor layer is sandwiched between the epitaxial composite layer and the metal stack, and forms an ohmic contact with the metal stack.
[0022] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer.
[0023] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
[0024] In one embodiment of the horizontal light-emitting diode manufacturing method of the present invention, the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
[0025] Other objects of the present invention, as well as the technical means and embodiments of the present invention, will be understood by those skilled in the art upon referring to the drawings and the embodiments described below. Simple Explanation of the Diagram
[0026] Figures 1A to 1H show schematic diagrams of manufacturing a horizontal light-emitting diode according to an embodiment of the present invention; Figure 2 is a schematic diagram of a horizontal light-emitting diode in another embodiment of the present invention; and Figure 3 is a schematic diagram of the manufacturing process steps of a horizontal light-emitting diode in one embodiment of the present invention. Implementation
[0027] The present invention will be explained below through embodiments. These embodiments are not intended to limit the implementation of the invention to any specific environment, application, or special method as described in the embodiments. Therefore, the descriptions of the embodiments are for illustrative purposes only and are not intended to limit the invention. It should be noted that in the following embodiments and drawings, elements not directly related to the present invention have been omitted and are not shown, and the dimensional relationships between the elements in the drawings are for ease of understanding only and are not intended to limit the actual scale.
[0028] This invention discloses a horizontal light-emitting diode and its manufacturing method. Referring to Figure 1A, it shows a buffer layer (not shown) and an N-type ohmic contact layer 101 epitaxially grown on an epitaxial growth substrate 100 using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) techniques. Specifically, the epitaxial growth substrate 100 is an indium phosphide (InP) substrate, but is not limited to this. Furthermore, the buffer layer is an N-type indium phosphide (InP) epitaxial layer, used to adjust the lattice matching between the epitaxial growth substrate and the epitaxial composite layer during subsequent epitaxial composite layer growth, reducing stress caused by lattice mismatch in subsequent epitaxial processes, thereby improving the film quality of the subsequent epitaxial layer.
[0029] Secondly, the N-type ohmic contact layer 101 is specifically an N-type indium gallium arsenide (InGaAs) epitaxial layer, whose lattice constant is between that of indium phosphide (InP) and multiple quantum well structures. Therefore, the N-type indium gallium arsenide epitaxial layer can also serve as a buffer layer to further adjust the lattice matching of subsequent epitaxial layers. Furthermore, the N-type indium gallium arsenide epitaxial layer can optimize carrier injection efficiency by adjusting its band gap according to the gallium-indium ratio, thereby controlling the transport of electrons and holes and ensuring that more carriers are effectively injected into the light-emitting layer, thus enhancing luminous efficiency. In particular, the N-type ohmic contact layer 101 will serve as the interface for ohmic contact between the device and the N-type electrode. Therefore, the commonly used dopants in the N-type indium gallium arsenide epitaxial layer are sulfur (S), selenium (Se), or silicon (Si), with doping concentrations typically between 10¹⁸ and 10²⁰ cm⁻³. This concentration range helps to reduce the Schottky barrier, thus achieving the purpose of low-resistance ohmic contact.
[0030] Next, an epitaxial composite layer is grown on the N-type ohmic contact layer 101, comprising a first compound semiconductor layer 104, a light-emitting layer 103, and a second compound semiconductor layer 102. The light-emitting layer 103 is a multiple quantum well (MQW) structure formed of indium gallium arsenide phosphide (InGaAsP) quaternary compound semiconductor sandwiched between the first compound semiconductor layer 104 and the second compound semiconductor layer 102. In this embodiment, the multiple quantum well emission wavelength can be 1100~2000 nanometers (nm). Specifically, the first compound semiconductor layer 104 is a first conductivity type (P-type) indium phosphide (InP) epitaxial layer, and the second compound semiconductor layer 102 is a second conductivity type (N-type) indium phosphide (InP) epitaxial layer. It should be noted that the materials described in the above embodiment are merely one example, and the present invention is not limited thereto. In practical applications, the light-emitting layer can be a multiple quantum well (MQW) or a double heterojunction (DH) structure, and its materials and composition can be adjusted according to the emission wavelength. For example, the epitaxial layer can be indium aluminum gallium arsenide (InAlGaAs), indium gallium arsenide (InGaAs), indium gallium arsenide phosphide (InGaAsP), aluminum gallium phosphide (AlGaP), aluminum gallium indium phosphide (AlGaInP), indium antimonide arsenide (InAsSb), aluminum indium antimonide (InAlSb), indium antimonide arsenide (InAsSbP), etc.
[0031] As shown in Figure 1A, a compound semiconductor layer is further epitaxially grown on the epitaxial composite layer. In a specific embodiment, this compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 used as an ohmic contact layer, for example, but not limited to, a zinc-doped indium gallium arsenide phosphide (Zn-doped InGaAsP) epitaxial layer, with a thickness preferably of 500 to 5000 Å. In particular, the doping concentration of this zinc-doped indium gallium arsenide phosphide (Zn-doped InGaAsP) epitaxial layer is between 10¹⁸ and 10²⁰ cm⁻³, and such a concentration range helps to reduce the contact resistance to form an ohmic contact with the interface of the subsequent metal layer.
[0032] Secondly, please refer to Figure 1B. Next, a dielectric layer 106 is deposited to cover the entire wafer surface, and then a patterning process is performed using photolithography to remove part of the dielectric layer 106. Specifically, the dielectric layer 106 can be made of silicon dioxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON), etc. The pattern of the dielectric layer 106 is determined according to the layout of the conductive plugs to be formed later. As shown in Figure 1C, a metal stack 107 is deposited between the patterned dielectric layers 106 by means of evaporation or sputtering to form a plurality of conductive plugs on the upper surface of the highly doped indium gallium arsenide phosphide (InGaAsP) layer 105, and an ohmic contact is formed between the two interfaces. The metal stack 107 can specifically be selected from one or a combination of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc-gold (ZnAu), with a thickness of less than 1 micrometer, preferably 2000~5000 angstroms (Å). The pattern design of these conductive plugs is mainly to guide the longitudinal current of the light-emitting diode chip to be uniformly distributed between the crystal structures, reducing current congestion and thereby improving luminous efficiency.
[0033] Next, referring to Figure 1D, a transparent conductive layer 108 is formed on the wafer surface by vapor deposition or sputtering, covering the dielectric layer 106 and the metal stack 107 distributed in the dielectric layer 106, and electrically connected to the metal stack 107 of the conductive plug. The transparent conductive layer 108 is made of indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc tin oxide (IZO), nickel oxide, cadmium tin oxide, antimony tin oxide, or a combination thereof. Next, a reflective metal layer 109 is formed on the transparent conductive layer 108 by vapor deposition, and then wafer-bonded to another permanent substrate 110. The transparent conductive layer 108 and the reflective metal layer 109 can serve as a mirror system of a reflective layer in the light-emitting diode structure of this invention, used to reflect the light emitted from the light-emitting layer upwards to increase the light extraction efficiency. The material of the reflective metal layer is selected from one or a combination of the group consisting of silver (Ag), titanium (Ti), platinum (Pt), gold (Au), and indium (In). The permanent substrate 110 may be, but is not limited to, a silicon substrate or an aluminum nitride (AlN) substrate.
[0034] Referring to Figure 1E, the epitaxial growth substrate 100 and the buffer layer are then removed from the other side of the permanent substrate 110 to expose the N-type ohmic contact layer 101. A wafer flip is then performed so that the permanent substrate 110 is located at the bottom of the horizontal light-emitting diode structure. Next, a patterned etching process is performed on the N-type ohmic contact layer 101 to remove a portion of the N-type ohmic contact layer 101, retaining only the portion of the N-type ohmic contact layer 101 intended to form the upper electrode region. Then, the exposed upper surface of the second compound semiconductor layer 102 is roughened, that is, the N-type indium phosphide (InP) epitaxial layer is roughened, as shown in Figure 1F.
[0035] Next, referring to Figure 1G, a meta-electrode etching (MESA) process is performed to etch portions of the epitaxial composite layer, dielectric layer 106, and transparent conductive layer 108. That is, portions of the second compound semiconductor layer 102, light-emitting layer 103, first compound semiconductor layer 104, dielectric layer 106, and transparent conductive layer 108 are etched, exposing a flat surface of the reflective metal layer 109 for subsequent placement of the lower electrode.
[0036] Referring to Figure 1H, a metal evaporation process is performed to form a first conductive electrode 111 on the permanent substrate 110 and electrically connect it to the reflective metal layer 109. On the other hand, a second conductive electrode 112 is formed on the N-type ohmic contact layer 101. The second conductive electrode 112 forms an ohmic contact with the N-type ohmic contact layer 101 and is electrically connected to the epitaxial composite layer. The first conductive electrode 111 and the second conductive electrode 112 can be, for example, but not limited to, a metal stack of germanium-titanium (GeTi) alloy, platinum (Pt), and gold (Au). Finally, after forming a protective layer on the surface of the element in addition to the upper and lower electrode surfaces, the final structure of the horizontal SWIR light-emitting diode of this invention is completed. This element is characterized by the upper and lower electrodes being located on the same side, providing a wider design margin for the back-end application module. Furthermore, the horizontal SWIR light-emitting diode of this invention has a conductive pin layout design, which can increase the uniformity of the longitudinal current distribution inside the element and improve the luminous efficiency of the element.
[0037] Figure 2 shows a cross-sectional schematic diagram of a horizontal SWIR light-emitting diode according to another embodiment of the present invention. Unlike the previous embodiment, the conductive plugs in this embodiment have a double-layer structure, that is, they contain a patterned highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 and a metal stack 107. Compared to the light-emitting diode shown in Figure 1H, which has a single, complete highly doped indium gallium arsenide phosphide (InGaAsP) layer 105, the highly doped indium gallium arsenide phosphide (InGaAsP) layer 105 in the light-emitting diode of Figure 2 is not a single layer but is patterned and integrated into each conductive plug. Since the highly doped indium gallium arsenide phosphide (InGaAsP) layer has absorption characteristics relative to short-wave infrared light with a emission wavelength range of 1100~2000 nanometers (nm), the light-emitting diode in the embodiment shown in Figure 2 is specially patterned to integrate the entire layer structure into the structure of the conductive plug, thereby reducing its overall area and taking into account both ohmic contact and light absorption, further improving the luminous efficiency of the device.
[0038] Please refer to Figure 3, which shows a schematic flowchart of the manufacturing process of the horizontal light-emitting diode of the present invention. First, in step S01, an epitaxial composite layer is formed and disposed on an epitaxial growth substrate, having a light-emitting wavelength of 1100-2000 nanometers (nm). In step S02, a transparent conductive layer is formed and sandwiched between the epitaxial growth substrate and the epitaxial composite layer. Next, in step S03, a plurality of conductive pins are formed and disposed between the transparent conductive layer and the epitaxial composite layer, electrically connected to the epitaxial composite layer. In step S04, a metal layer is formed on the transparent conductive layer and bonded to a permanent substrate wafer, after which the epitaxial growth substrate is removed. In step S05, a first conductive electrode is formed and disposed on the permanent substrate, electrically connected to the epitaxial composite layer. Finally, in step S06, a second conductive electrode is formed and disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode. The descriptions of the relevant components in the aforementioned process steps can be found above and will not be repeated here.
[0039] The above embodiments are merely illustrative of the implementation of the present invention and to explain its technical features, and are not intended to limit the scope of protection of the present invention. Any changes or equivalent arrangements that can be easily made by those skilled in the art are within the scope of the present invention, and the scope of protection of the present invention shall be determined by the scope of the patent application.
[0040] 100: Epitaxial Growth Substrate 101: N-type ohmic contact layer 102: Second compound semiconductor layer 103: Emissive Layer 104: First compound semiconductor layer 105: Highly doped indium gallium arsenide phosphide layer 106: Dielectric layer 107: Metal Stack 108: Transparent conductive layer 109: Reflective metal layer 110:Permanent substrate 111: First conductive electrode 112: Second conductive electrode
Claims
1. A horizontal light-emitting diode, comprising: a permanent substrate; a reflective metal layer disposed on and bonded to the permanent substrate; an epitaxial composite layer having a light-emitting layer having an emission wavelength of 1100-2000 nanometers (nm) disposed on the permanent substrate; a patterned dielectric layer disposed between the epitaxial composite layer and the permanent substrate; a plurality of conductive plugs, each penetrating the patterned dielectric layer and electrically connected to the epitaxial composite layer, wherein each conductive plug comprises a highly doped compound semiconductor layer and a metal stack, the highly doped compound semiconductor layer being sandwiched between the epitaxial composite layer and the metal stack and forming an ohmic contact with the metal stack, wherein the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer; and a transparent conductive layer covering the patterned dielectric layer and the conductive plugs, electrically connected to the conductive plugs, and sandwiched between the reflective metal layer and the patterned dielectric layer. A first conductive electrode is disposed on the reflective metal layer and electrically connected to the epitaxial composite layer; and a second conductive electrode is disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
2. The horizontal light-emitting diode as described in claim 1, wherein the epitaxial composite layer further comprises a first compound semiconductor layer and a second compound semiconductor layer, the first compound semiconductor layer and the second compound semiconductor layer sandwiching the light-emitting layer, and the second compound semiconductor layer being disposed between the light-emitting layer and the second conductive electrode.
3. The horizontal light-emitting diode as described in claim 2, wherein the first compound semiconductor layer is a first conductivity type indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductivity type indium phosphide (InP) layer.
4. The horizontal light-emitting diode as described in claim 1, wherein the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
5. The horizontal light-emitting diode as described in claim 1, wherein the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
6. A method for manufacturing a horizontal light-emitting diode, comprising: forming an epitaxial composite layer disposed on an epitaxial growth substrate, having a light-emitting layer having a light-emitting wavelength of 1100~2000 nanometers (nm); forming a patterned dielectric layer disposed on the epitaxial composite layer; forming a plurality of conductive plugs, each penetrating the patterned dielectric layer and electrically connected to the epitaxial composite layer, wherein each conductive plug comprises a highly doped compound semiconductor layer and a metal stack, the highly doped compound semiconductor layer being sandwiched between the epitaxial composite layer and the metal stack and forming an ohmic contact with the metal stack, wherein the highly doped compound semiconductor layer is a highly doped indium gallium arsenide phosphide (InGaAsP) layer; forming a transparent conductive layer covering the patterned dielectric layer and the conductive plugs, and electrically connected to the conductive plugs; forming a reflective metal layer on the transparent conductive layer, bonding it to a permanent substrate wafer, and then removing the epitaxial growth substrate; A first conductive electrode is formed and disposed on the reflective metal layer, electrically connected to the epitaxial composite layer; and a second conductive electrode is formed and disposed on the epitaxial composite layer, electrically connected to the epitaxial composite layer, and located on the same side of the permanent substrate as the first conductive electrode.
7. The method for manufacturing a horizontal light-emitting diode as described in claim 6, wherein the step of forming the epitaxial composite layer further includes forming a first compound semiconductor layer and a second compound semiconductor layer, wherein the first compound semiconductor layer and the second compound semiconductor layer sandwich the light-emitting layer, and the second compound semiconductor layer is disposed between the light-emitting layer and the second conductive electrode.
8. The method for manufacturing a horizontal light-emitting diode as claimed in claim 7, wherein the first compound semiconductor layer is a first conductivity type indium phosphide (InP) layer, and the second compound semiconductor layer is a second conductivity type indium phosphide (InP) layer.
9. The method for manufacturing a horizontal light-emitting diode as described in claim 6, wherein the material of the metal stack is selected from one or a combination of the group consisting of titanium (Ti), platinum (Pt), gold (Au), palladium (Pd), germanium (Ge), and zinc gold (ZnAu).
10. The method for manufacturing a horizontal light-emitting diode as described in claim 6, wherein the permanent substrate is one of a silicon substrate and an aluminum nitride substrate.
Citation Information
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