Semiconductor carrier

Abstract

This disclosure provides a semiconductor carrier. The semiconductor carrier includes a substrate, a carrier structure, and a first semiconductor element. The carrier structure is disposed on the substrate, wherein the carrier structure has a plurality of contact protrusions arranged periodically. The first semiconductor element is disposed on the carrier structure and contacts the contact protrusions, wherein a first surface of the first semiconductor element has a first surface area SA1, and the first surface of the first semiconductor element and the contact protrusions have a first contact area CA1. Wherein, 0.1 ≤ CA1 / SA1 < 1.

Description

Technical Field

[0001] This invention relates to semiconductor technology, and in particular to semiconductor carriers. Prior Technology

[0002] In existing mass transfer processes for semiconductor structures, the following steps are typically involved: First, semiconductor stacks are stacked on a growth substrate, and the semiconductor stacks are bonded to a temporary substrate using components such as scaffold structures (or weakening structures, support structures). Next, the growth substrate is removed to transfer the semiconductor stacks onto the temporary substrate. Finally, the scaffold structure is broken to detach the semiconductor stacks from the temporary substrate and transfer them to the target substrate. In these steps, the fineness of the scaffold structure significantly affects the process yield. For example, if the scaffold structure strength is too low, it may be difficult to stably support the semiconductor stacks. Conversely, if the scaffold structure strength is too high, it may be difficult to break down. Therefore, while existing mass transfer processes have gradually met their intended uses, they are not perfect in every aspect. Several issues regarding mass transfer processes still need to be overcome. Summary of the Invention

[0003] In some embodiments, a semiconductor carrier is provided, comprising a substrate, a carrier structure, and a first semiconductor element. The carrier structure is disposed on the substrate, wherein the carrier structure has a plurality of periodically arranged contact protrusions. The first semiconductor element is disposed on the carrier structure and contacts the contact protrusions, wherein a first surface of the first semiconductor element has a first surface area SA1, and the first surface of the first semiconductor element and the contact protrusions have a first contact area CA1. Wherein, 0.1 ≤ CA1 / SA1 < 1.

[0004] The semiconductor carrier disclosed herein can be applied to a variety of types of electronic devices. To make the features and advantages of this disclosure more apparent and understandable, various embodiments are described below in detail with reference to the accompanying drawings. Simple Explanation of the Diagram

[0005] The following detailed description, in conjunction with the accompanying drawings, will provide a better understanding of the views expressed in the disclosed embodiments. It is worth noting that, according to industry standard practice, some features may not be drawn to scale. In fact, for clarity of description, the dimensions of different features may be increased or decreased. Figures 1 through 9 are schematic diagrams showing different stages of a semiconductor carrier in a mass transfer process, according to some embodiments disclosed herein. Figure 10A is a perspective view showing the contact protrusion according to some embodiments of the present disclosure. Figure 10B is a top view schematic diagram showing the contact protrusion according to some embodiments of the present disclosure. Figure 11A is a top view schematic diagram showing the contact protrusion and the first semiconductor element according to some embodiments of the present disclosure. Figure 11B is a top view schematic diagram showing the contact protrusion and the second semiconductor element according to some embodiments of the present disclosure. Figure 11C is a top view schematic diagram showing the contact protrusion and the first semiconductor element and the second semiconductor element according to some embodiments of the present disclosure. Figures 12 through 14 are schematic diagrams showing different stages of a semiconductor carrier in a mass transfer process, according to other embodiments disclosed herein. Figure 15 illustrates possible arrangements of semiconductor elements according to some embodiments of this disclosure. Implementation

[0006] The following disclosure provides many different embodiments or examples for implementing the provided apparatus. Specific examples of the components and their configurations are described below to simplify the embodiments disclosed herein, and are not intended to limit the scope of the disclosure. For example, if the description mentions that a first component is formed on a second component, it may include embodiments where the first and second components are in direct contact, or embodiments where an additional component is formed between the first and second components, so that the first and second components are not in direct contact. Furthermore, this disclosure may repeat element symbols and / or characters in different embodiments or examples. Such repetition is for brevity and clarity, and is not intended to indicate a relationship between the different embodiments and / or examples discussed.

[0007] In some embodiments disclosed herein, terms such as "setup," "connection," and similar terms, unless specifically defined, may refer to two components in direct contact, or to two components not in direct contact, wherein an additional connecting component is located between the two structures. Terms such as "setup" and "connection" may also include cases where both structures are movable or both structures are fixed.

[0008] Furthermore, the terms "first," "second," and similar terms used in this specification or the claims are used to name different components or to distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of components, nor to limit the manufacturing order or installation order of the components.

[0009] In this text, the terms "approximately," "about," and "substantially" generally indicate that a given value or range is within 10%, 5%, 3%, 2%, 1%, or 0.5%. The given quantities are approximate; that is, without specific mention of "approximately," "about," or "substantially," their meanings are implied. The phrase "the range is between the first value and the second value" indicates that the range includes the first value, the second value, and other values ​​in between. Furthermore, any two values ​​or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10%, 5%, 3%, 2%, 1%, or 0.5% between the first and second values. If the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees. If the first direction is parallel to the second direction, then the angle between the first direction and the second direction can be between 0 degrees and 10 degrees.

[0010] It should be understood that, for clarity, some components of the apparatus are omitted in the drawings, and only some components are schematically shown. In some embodiments, additional components may be added to the apparatus described below. In other embodiments, some components of the apparatus described below may be replaced or omitted. It should be understood that, in some embodiments, additional operating steps may be provided before, during, and / or after the method of manufacturing the apparatus. In some embodiments, some operating steps may be replaced or omitted, and the order of some operating steps is interchangeable.

[0011] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It is understood that these terms, for example, as defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the relevant art and the background or context of this disclosure, and should not be interpreted in an idealized or overly formal manner, unless specifically defined in the embodiments of this disclosure.

[0012] In existing mass transfer processes for semiconductor structures, scaffold structures are typically used to bond semiconductor stacks to temporary substrates. However, manufacturing these scaffold structures not only increases process complexity but also significantly impacts process yield due to the high precision of the scaffold structures. To address this, this disclosure provides a semiconductor carrier comprising a substrate, a carrier structure, and semiconductor devices. Specifically, the substrate and carrier structure together form a temporary substrate, which not only temporarily holds semiconductor devices but also facilitates easy pickup of semiconductor devices. This effectively solves some of the problems of existing technologies, such as high process complexity or low process yield.

[0013] Referring to Figures 1 through 9, which are schematic diagrams illustrating different stages of a semiconductor carrier in a mass transfer process according to some embodiments disclosed herein, the semiconductor carrier includes a substrate, a carrier structure, and semiconductor elements. Figures 1 through 6 relate to a method for manufacturing the carrier structure, while Figures 7 through 9 relate to steps for transferring semiconductor elements from the substrate to a target substrate using the carrier structure.

[0014] As shown in Figure 1, a substrate 10 is provided. In some embodiments, the material of the substrate 10 may be or may include: group IV elements or group IV compounds, such as silicon (Si), diamond (C), or silicon carbide (SiC); group III-V compounds, such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium phosphide (GaP), gallium arsenide (GaAs), or aluminum gallium arsenide (AlGaAs); other suitable materials; or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the substrate 10 may be or may include glass, quartz, sapphire, ceramic, other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the substrate 10 may be or may include polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), polypropylene (PP), other suitable materials, or combinations thereof, but this disclosure is not limited thereto.

[0015] Following the steps described above, a photoresist material 11 is disposed on the substrate 10. In some embodiments, the photoresist material 11 may be a positive photoresist or a negative photoresist. In some embodiments, the photoresist material 11 may completely cover the entire upper surface of the substrate 10. However, this disclosure is not limited thereto. In other embodiments, the photoresist material 11 may selectively cover a portion of the upper surface of the substrate 10 and expose another portion of the substrate 10.

[0016] As shown in Figures 2 and 3, following the steps described above, a patterning process (PP) is performed to remove a portion of the photoresist material 11 to form a plurality of protrusions 110. For example, the photoresist material 11 can be formed and patterned by photoresist coating (e.g., spin-on coating), soft baking, mask aligning, exposure, post-exposure baking, photoresist developing, rinsing, drying (e.g., spin-drying and / or hard baking), other suitable steps, or combinations thereof, thereby forming the protrusions 110. In some embodiments, the protrusions 110 may be shaped protrusions.

[0017] In some embodiments, a plurality of protrusions 110 collectively form a plurality of through vias 111, which expose the substrate 10. However, this disclosure is not limited thereto. In other embodiments, the plurality of protrusions 110 may also collectively form a plurality of blind vias, which do not expose the substrate 10. In some embodiments, the plurality of protrusions 110 have the same dimensions and the same pitch, such that the formed through vias or blind vias also have the same dimensions and the same pitch, but this disclosure is not limited thereto.

[0018] As shown in Figure 4, following the steps described above, a dielectric material 12 is disposed on the photoresist material 11. Specifically, the dielectric material 12 is blanket-ly disposed on the photoresist material 11 and fills the through-holes 111 (or blind vias) between adjacent protrusions 110. For example, the dielectric material 12 can be disposed on the photoresist material 11 by a coating process, other suitable processes, or a combination thereof, but this disclosure is not limited thereto.

[0019] In some embodiments, the dielectric material 12 may be or may include polydimethylsiloxane (PDMS), other suitable materials, its precursors, or combinations thereof, but this disclosure is not limited thereto. For example, the dielectric material 12 may include a main agent A and a coagulant B, wherein the main agent A may be poly(dimethyl-methylvinylsiloxane) and the coagulant B may be poly(dimethyl-methylhydrogenosiloxane) . In some embodiments, the ratio between the main agent A and the coagulant B may be between 10:1 and 30:1, but this disclosure is not limited thereto. For example, the ratio between the main agent A and the coagulant B may be 10:1, 15:1, 20:1, 30:1, or any value or range between the above values. By adjusting the ratio between the main agent A and the coagulant B, the properties of the support structure 13 formed by the dielectric material 12 can be changed.

[0020] As shown in Figures 4 and 5, following the above steps, the dielectric material 12 is cured to obtain the carrier structure 13, wherein the carrier structure 13 has a first surface 13A (i.e., the bottom surface 12A of the original dielectric material) and a second surface 13B (i.e., the top surface 12B of the original dielectric material). Following the above steps, the substrate 10 is removed, and the carrier structure 13 is flipped. The first surface 13A of the carrier structure 13 has a plurality of contact protrusions 130 corresponding to the protrusions 110.

[0021] It is worth noting that in this disclosure, the contact protrusion 130 is used to receive and adsorb semiconductor devices in a mass transfer process. Therefore, it is necessary to control the material and structure of the contact protrusion 130 to give it specific physical properties. For example, in some embodiments, the carrier structure 13 may be or may include polydimethylsiloxane (PDMS). Therefore, the resilience or surface adhesion of the contact protrusion 130 can be changed by adjusting the ratio of the main agent A and the crosslinking agent B of the dielectric material 12.

[0022] In some embodiments, the contact protrusion 130 is an elastomer, and the rebound rate of the contact protrusion 130 is between 5% and 50%. For example, the rebound rate of the contact protrusion 130 may be 5%, 10%, 15%, 20%, 25%, 35%, 45%, 50%, or any value or range between the above values, but this disclosure is not limited thereto. In this disclosure, the term "recovery rate" refers to the ratio of the amount of height recovery of the contact protrusion 130 to the amount of compression of the height of the contact protrusion 130 after it receives a semiconductor device (the amount of height recovery of the contact protrusion 130 / the amount of compression of the height of the contact protrusion 130). For example, the amount of compression of the contact protrusion 130 when it receives a semiconductor device is x, and the amount of compression of the contact protrusion 130 after a period of time is y, where the contact protrusion 130 will rebound such that x > y. Here, the amount of compression represents the change in height of the contact protrusion 130 from its initial height to the amount of height after compression. As described above, the recovery amount of the contact protrusion 130 is defined as (xy), and the springback rate is (xy) / x. When the springback rate of the contact protrusion 130 is too small (e.g., less than 5%), the support structure 13 may have difficulty releasing the absorbed kinetic energy. Conversely, when the springback rate of the contact protrusion 130 is too large (e.g., greater than 50%), the support structure 13 may bounce the semiconductor element away.

[0023] In some embodiments, the surface adhesion of the contact protrusion 130 is greater than 6 grams-force (gf), but this disclosure is not limited thereto. For example, the surface adhesion of the contact protrusion 130 may be 6.5 gf, 10.0 gf, 15.0 gf, 25.0 gf, 35.0 gf, 45.0 gf, 50.0 gf, 60.0 gf, or any value or range between the above. When the surface adhesion of the contact protrusion 130 is too small (e.g., less than 6.0 gf), the support structure 13 may have difficulty stably adsorbing the semiconductor device. Conversely, when the surface adhesion of the contact protrusion 130 is too large (e.g., greater than 60.0 gf), the semiconductor device may have difficulty detaching from the support structure 13.

[0024] In addition, the shape and size of the contact protrusion 130 are similar to or the same as the shape and size of the through hole 111. Therefore, the shape and size of the contact protrusion 130 can be adjusted by adjusting the protrusion 110 or the through hole 111. Referring also to Figures 10A and 10B, which are perspective and top views of the contact protrusion according to some embodiments of the present disclosure, respectively. As shown in Figure 10A, in some embodiments, the contact protrusion 130 may be a columnar structure, but the present disclosure is not limited thereto. For example, the contact protrusion 130 may be a cylindrical structure, a triangular prism structure, a rectangular prism structure, a polygonal prism structure, or other suitable shape structures. In some embodiments, the diameter D of the contact protrusion 130 is between 0.5µm and 10µm, but the present disclosure is not limited thereto. For example, the diameter D of the contact protrusion 130 can be 0.5µm, 1µm, 2µm, 3µm, 4µm, 5µm, 6µm, 7µm, 8µm, 9µm, 10µm, or any value or range between the above. In some embodiments, the height H of the contact protrusion 130 is between 1µm and 10µm, but this disclosure is not limited thereto. For example, the height H of the contact protrusion 130 can be 1µm, 2µm, 3µm, 4µm, 5µm, 6µm, 7µm, 8µm, 9µm, 10µm, or any value or range between the above. In some embodiments, the aspect ratio (i.e., height H / diameter D) of the contact protrusion 130 can be between 0.5 and 1.5. For example, the aspect ratio of the contact protrusion 130 may be 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5 or any value or range between the above values.

[0025] In some embodiments, the top surface of the contact protrusion 130 is a flat surface, but this disclosure is not limited thereto. In some embodiments, the width of the contact protrusion 130 may vary from one side of the top surface toward one side of the bottom surface. For example, the contact protrusion 130 may be a columnar structure that is wider at the bottom and narrower at the top, a columnar structure that is narrower at the bottom and wider at the top, a columnar structure with a stepped cross-section, a columnar structure that is wider at the top and bottom and narrower in the middle, or a columnar structure that is narrower at the top and bottom and wider in the middle. In some embodiments, the size, shape, or spacing of the plurality of contact protrusions 130 may be different. For example, the contact protrusions 130 adjacent to the side of the support structure 13 may have a larger size (e.g., a larger diameter), and the contact protrusions 130 adjacent to the center of the support structure 13 may have a smaller size (e.g., a smaller diameter). Alternatively, the contact protrusions 130 may be arranged sequentially or arbitrarily in the order of cylindrical structure, rectangular column structure, cylindrical structure, and rectangular column structure. In some embodiments, the contact protrusions 130 adjacent to the side of the support structure 13 may have a smaller size (e.g., a smaller diameter), and the contact protrusions 130 adjacent to the center of the support structure 13 may have a larger size (e.g., a larger diameter).

[0026] As shown in Figure 10B, in some embodiments, a plurality of contact protrusions 130 are periodically arranged in a hexagonal closest packed configuration, but this disclosure is not limited thereto. In some embodiments, the pitch P between the geometric centers of two adjacent contact protrusions 130 is between 8 µm and 17.5 µm, but this disclosure is not limited thereto. For example, the pitch P between the geometric centers of two adjacent contact protrusions 130 can be 8 µm, 9 µm, 10 µm, 11 µm, 12 µm, 13 µm, 14 µm, 15 µm, 16 µm, 17 µm, or any value or range between the above values. When the pitch P is too small (e.g., less than 0.5 µm), the number of contact protrusions 130 may be too large, making it difficult for the semiconductor element to detach from the carrier structure 13. Conversely, when the pitch P is too large (e.g., greater than 18 µm), the number of contact protrusions 130 may be too small, making it difficult for the carrier structure 13 to stably hold the semiconductor element.

[0027] As shown in Figure 6, following the steps described above, a substrate 14 is provided. In some embodiments, the material of the substrate 14 may be or may include: group IV elements or group IV compounds, such as silicon (Si), diamond (C), or silicon carbide (SiC); group III-V compounds, such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium phosphide (GaP), gallium arsenide (GaAs), or aluminum gallium arsenide (AlGaAs); other suitable materials; or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the substrate 14 may be or may include glass, quartz, sapphire, ceramic, other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the substrate 14 may be or may include polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), polypropylene (PP), other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the substrate 14 may be similar to or the same as the material of the substrate 10, but this disclosure is not limited thereto.

[0028] As shown in Figure 6, following the steps described above, the second surface 13B of the support structure 13 is attached to the substrate 14, and the periodically arranged plurality of contact protrusions 130 of the support structure 13 are moved away from the substrate 14. In this manner, a temporary substrate (i.e., the combination of the support structure 13 and the substrate 14) is obtained, which is used to temporarily support semiconductor devices and to facilitate the desorption of semiconductor devices in subsequent laser transfer processes.

[0029] As shown in Figure 7, following the steps described above, a first semiconductor element 15 is disposed on the support structure 13, and the first semiconductor element 15 contacts the contact protrusion 130. For example, the first semiconductor element 15 can be disposed on the support structure 13 by a laser transfer process (LP), but this disclosure is not limited thereto. During the transfer process, the first semiconductor element 15 impacts the contact protrusion 130, causing the contact protrusion 130 to compress. Therefore, as described above, the contact protrusion 130 must meet some of the conditions mentioned above (e.g., specific adhesion, resilience, arrangement, arrangement density, etc., but not limited thereto) to more stably support the first semiconductor element 15. In some embodiments, the first semiconductor element 15 directly contacts the contact protrusion 130.

[0030] In some embodiments, the first semiconductor element 15 has a first electrode 150 and a first semiconductor stack 151, wherein the first semiconductor stack 151 is located between the first electrode 150 and the contact protrusion 130. In other words, the first electrode 150 of the first semiconductor element 15 faces away from the contact protrusion 130, i.e., upwards. Furthermore, an adhesive layer 171 may be attached to the first semiconductor element 15, and the adhesive layer 171 is located on the side of the first semiconductor element 15 away from the carrier structure 13. Specifically, the adhesive layer 171 is disposed on the first electrode 150. In some embodiments, the adhesive layer 171 may be or may include laser transfer adhesive, which is used to temporarily connect the first semiconductor element 15 to a growth substrate (not shown) or a temporary substrate (not shown). In this case, the adhesive layer 171 can lose its adhesiveness by heating, irradiation with ultraviolet light, other suitable methods, or combinations thereof, thereby transferring the first semiconductor element 15 from the growth substrate (not shown) or the temporary substrate (not shown) to the carrier structure 13.

[0031] In some embodiments, the first semiconductor element 15 may include a light-emitting diode, such as a sub-millimeter light-emitting diode (mini LED), a micro light-emitting diode (micro LED), or a quantum dot light-emitting diode (quantum dot LED), but this disclosure is not limited thereto. In some embodiments, the first semiconductor element 15 may include an integrated circuit, such as a micro integrated circuit (µ-IC), but this disclosure is not limited thereto.

[0032] Referring also to Figure 11A, which is a top view schematic diagram showing the contact protrusions and the first semiconductor element according to some embodiments of the present disclosure. As shown, in some embodiments, the first semiconductor element 15 contacts at least two of the contact protrusions 130. For example, the first semiconductor element 15 contacts two, three, four or more of the contact protrusions 130 to better distribute impacts across the respective contact protrusions 130.

[0033] As shown in Figures 7 and 11A, in some embodiments, the first surface 15A of the first semiconductor element 15 has a first surface area SA1, and the first surface 15A of the first semiconductor element 15 has a first contact area CA1 with the contact protrusions 130. In this disclosure, "first contact area CA1" refers to the sum of the contact areas between the first surface 15A of the first semiconductor element 15 and each contact protrusion 130. For example, as shown in Figure 11A, the first semiconductor element 15 contacts 12 contact protrusions 130, and the first contact area CA1 is the sum of the contact areas between the first semiconductor element 15 and these 12 contact protrusions 130. In some embodiments, 0.1 ≤ CA1 / SA1 < 1. For example, CA1 / SA1 can be 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, or any value or range between the above values, but this disclosure is not limited thereto. In other words, the first surface 15A of the first semiconductor element 15 is not completely covered by the contact protrusion 130, and at least 10% of its area is in contact with the contact protrusion 130. As mentioned above, when the contact area between the first semiconductor element 15 and the contact protrusion 130 is too small, the support structure 13 may have difficulty stably adsorbing the semiconductor element. Conversely, when the contact area between the first semiconductor element 15 and the contact protrusion 130 is too large, the semiconductor element may have difficulty detaching from the support structure 13.

[0034] Returning to Figure 7, in some embodiments, a second semiconductor element 16, different from the first semiconductor element 15, may be optionally disposed on the carrier structure 13 by a laser transfer process LP, and the second semiconductor element 16 may contact the contact protrusion 130. In other words, the temporary substrate of this invention (i.e., the combination of substrate 14 and carrier structure 13) can be used to simultaneously carry different semiconductor elements to improve the applicability of the temporary substrate. In some embodiments, the second semiconductor element 16 directly contacts the contact protrusion 130.

[0035] In some embodiments, the second semiconductor element 16 has a second electrode 160 and a second semiconductor stack 161, wherein the second semiconductor stack 161 is located between the second electrode 160 and the contact protrusion 130. In other words, the second electrode 160 of the second semiconductor element 16 faces away from the contact protrusion 130, i.e., upwards. Similarly, the second semiconductor element 16 may also have an adhesive layer 172 attached. Specifically, the adhesive layer 172 is disposed on the second electrode 160. In some embodiments, the adhesive layer 172 may be or may include laser transfer adhesive, which is used to temporarily connect the second semiconductor stack 161 to a growth substrate (not shown) or a temporary substrate (not shown). In this case, the adhesive layer 172 may lose its adhesiveness by heating, irradiation with ultraviolet light, other suitable methods, or combinations thereof, thereby transferring the second semiconductor element 16 from the growth substrate (not shown) or the temporary substrate (not shown) to the carrier structure 13. In some embodiments, the adhesive layer 172 may be similar to or the same as the adhesive layer 171, but this disclosure is not limited thereto.

[0036] In some embodiments, the second semiconductor element 16 may include a light-emitting diode, such as a sub-millimeter light-emitting diode (mini LED), a micro light-emitting diode (µLED), or a quantum dot light-emitting diode (QDLED), but this disclosure is not limited thereto. In some embodiments, the second semiconductor element 16 may include an integrated circuit, such as a micro-integrated circuit (µ-IC), but this disclosure is not limited thereto.

[0037] Referring also to Figure 11B, which is a top view schematic diagram showing the contact protrusions and the second semiconductor element according to some embodiments of the present disclosure. As shown, in some embodiments, the second semiconductor element 16 contacts at least two of the contact protrusions 130. For example, the second semiconductor element 16 contacts two, three, four or more of the contact protrusions 130 to better distribute impacts across the respective contact protrusions 130.

[0038] As shown in Figures 7 and 11B, similar to the first semiconductor element 15, the second surface 16A of the second semiconductor element 16 has a second surface area SA2, and the second surface 16A of the second semiconductor element 16 has a second contact area CA2 with the contact protrusion 130, wherein 0.1 ≤ CA2 / SA2 < 1. For example, CA2 / SA2 can be 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, or any value or range between the above values, but this disclosure is not limited thereto. In other words, the second surface 16A of the second semiconductor element 16 is not completely covered by the contact protrusion 130, and at least 10% of its area is in contact with the contact protrusion 130.

[0039] Referring also to Figure 11C, which is a top view schematically showing contact protrusions and a first semiconductor element and a second semiconductor element according to some embodiments of the present disclosure. As shown, in some embodiments, the size of the first semiconductor element 15 may be different from the size of the second semiconductor element 16. In this case, the number of contact protrusions 130 contacting the first semiconductor element 15 may be different from the number of contact protrusions 130 contacting the second semiconductor element 16. In some embodiments, the carrier structure 13 may also carry a third semiconductor element 18 and a fourth semiconductor element 19, and both the third semiconductor element 18 and the fourth semiconductor element 19 may be different from the first semiconductor element 15 and the second semiconductor element 16. In other words, the carrier structure 13 of the present disclosure can be used to carry various different semiconductor elements, without being limited by the size or shape of the semiconductor elements.

[0040] As described above, this invention provides a semiconductor carrier comprising a substrate 14, a carrier structure 13, and a first semiconductor element 15. The semiconductor carrier may optionally include a second semiconductor element 16, a third semiconductor element 18, and a fourth semiconductor element 19, which are different from the first semiconductor element 15. Compared to existing mass transfer technologies, using the contact protrusions 130 of the carrier structure 13 to temporarily hold the semiconductor element can significantly reduce process complexity and product precision requirements, thereby solving some problems of the prior art. Next, the application of the semiconductor carrier in the mass transfer process will be further described with reference to Figures 8 and 9.

[0041] As shown in Figure 8, following the steps described above, the first semiconductor element 15 located on the carrier structure 13 is picked up. For example, the first semiconductor element 15 can be picked up from the carrier structure 13 by a stamp transfer process, but this disclosure is not limited thereto. Similarly, the second semiconductor element 16 located on the carrier structure 13 is picked up. For example, the second semiconductor element 16 can be picked up from the carrier structure 13 by a stamp transfer process, but this disclosure is not limited thereto. In some embodiments, the first semiconductor element 15 and the second semiconductor element 16 can be picked up sequentially, but this disclosure is not limited thereto. In other embodiments, the first semiconductor element 15 and the second semiconductor element 16 can be picked up simultaneously in the same process. It is worth mentioning that the adhesion of the contact protrusion 130 needs to be less than the adhesion of the device in the stamp transfer process to facilitate the picking process of the stamp transfer process.

[0042] As shown in Figure 9, following the steps described above, the first semiconductor element 15 is disposed on the target substrate 20. For example, the first semiconductor element 15 can be disposed on the target substrate 20 by a stamp transfer process. Similarly, the second semiconductor element 16 located on the carrier structure 13 is picked up. For example, the second semiconductor element 16 can be disposed on the target substrate 20 by a stamp transfer process, but this disclosure is not limited thereto. In some embodiments, the first semiconductor element 15 and the second semiconductor element 16 can be disposed sequentially, but this disclosure is not limited thereto. In other embodiments, the first semiconductor element 15 and the second semiconductor element 16 can be disposed simultaneously in the same process.

[0043] In some embodiments, the target substrate 20 may be or may include a circuit board. For example, the circuit board may be a rigid circuit board, a flexible circuit board, a printed circuit board, a combination thereof, or other suitable circuit boards.

[0044] It is worth noting that although the transfer method of semiconductor elements (e.g., the first semiconductor element 15 and the second semiconductor element 16) is mentioned above as pad-up, this disclosure is not limited to this. In other embodiments, the transfer method of semiconductor elements (e.g., the first semiconductor element 15 and the second semiconductor element 16) can also be pad-down. Referring to Figures 12 to 14, which are schematic diagrams showing different stages of the semiconductor carrier in the mass transfer process according to other embodiments of this disclosure, Figure 12 shows the steps following Figure 6.

[0045] As shown in Figure 12, continuing from the steps in Figure 6, a first semiconductor element 15 and a second semiconductor element 16 are disposed on the support structure 13, and the first semiconductor element 15 and the second semiconductor element 16 are brought into contact with the contact protrusion 130. The first electrode 150 is located between the first semiconductor stack 151 and the contact protrusion 130, and the second electrode 160 is located between the second semiconductor stack 161 and the contact protrusion 130. In other words, the first electrode 150 of the first semiconductor element 15 and the second electrode 160 of the second semiconductor element 16 can face the contact protrusion 130, i.e., downwards. On the other hand, the adhesive layer 171 is still located on the side of the first semiconductor element 15 away from the support structure 13, and the adhesive layer 172 is still located on the side of the second semiconductor element 16 away from the support structure 13. Specifically, the adhesive layer 171 is disposed on the first semiconductor stack 151, and the adhesive layer 172 is disposed on the second semiconductor stack 161. In some embodiments, the first semiconductor element 15 and the second semiconductor element 16 directly contact the contact protrusion 130.

[0046] As shown in Figure 13, following the above steps, the first semiconductor element 15 and the second semiconductor element 16 located on the support structure 13 are picked up. As shown in Figure 14, following the above steps, the first semiconductor element 15 and the second semiconductor element 16 are disposed on the target substrate 20. In other words, the laser transfer process disclosed herein can be applied to both pad-down and pad-up scenarios.

[0047] Referring also to Figure 15, which illustrates possible arrangements of semiconductor elements according to some embodiments of this disclosure. As shown, in some embodiments, the first semiconductor element 15 may be a micro LED (µLED) and may form periodic light-emitting units. Each light-emitting unit includes three first semiconductor elements 15, which emit red visible light, blue visible light, and green visible light, respectively. Of course, this disclosure is not limited to this. In other embodiments, the first semiconductor elements 15 may also be arranged in other ways, not limited to the specific arrangement shown in Figure 12.

[0048] In summary, this disclosure provides a semiconductor carrier comprising a substrate, a carrier structure, and a semiconductor element. Specifically, the substrate and the carrier structure together form a temporary substrate, which not only temporarily holds the semiconductor element but also facilitates easy pickup of the semiconductor element. This effectively solves some problems of the prior art, such as high process complexity or low process yield.

[0049] Components in the embodiments disclosed herein can be freely mixed and matched as long as they do not violate the spirit of the invention or conflict with it. Furthermore, the scope of protection of this disclosure is not limited to the processes, machines, manufacturing methods, material compositions, apparatuses, methods, and steps described in the specific embodiments of the specification. Any process, machine, manufacturing method, material composition, apparatus, method, and step that is currently or will be developed can be understood from the content of this disclosure, and can be used according to this disclosure as long as it can perform substantially the same function or obtain substantially the same result in the embodiments described herein. Therefore, the scope of protection of this disclosure includes the aforementioned processes, machines, manufacturing methods, material compositions, apparatuses, methods, and steps. No embodiment or claim of this disclosure needs to achieve all the purposes, advantages, and / or features disclosed herein.

[0050] The above outlines several embodiments to enable those skilled in the art to better understand the viewpoints of the disclosed embodiments. Those skilled in the art should understand that other processes and structures can be designed or modified based on the disclosed embodiments to achieve the same purpose and / or advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent processes and structures do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and replacements can be made without departing from the spirit and scope of this disclosure.

[0051] 10:Substrate 11: Photoresist materials 110:convex part 111: Through hole 12: Dielectric materials 12A: Bottom surface 12B: Top surface 13: Load-bearing structure 13A: First surface 13B: Second surface 130: Contact convex part 14: Substrate 15: First semiconductor element 15A: First Surface 150: First electrode 151: First semiconductor stack 16: Second semiconductor element 16A: Second Surface 160: Second electrode 161: Second semiconductor stack 171: Adhesive layer 172: Adhesive layer 18: Third semiconductor element 19: Fourth Semiconductor Component 20: Target substrate CA1: First contact area CA2: Second contact area D: Diameter H: Height LP: Laser Transfer Process P: Pitch SA1: First area SA2: Second area

Claims

1. A semiconductor carrier, comprising: One substrate; A support structure is disposed on the substrate, wherein the support structure has a portion that directly contacts the substrate and a plurality of periodically arranged contact protrusions, and the portion and the contact protrusions have the same material; and a first semiconductor element is disposed on the support structure and contacts the contact protrusions, wherein a first surface of the first semiconductor element has a first surface area SA1, and the first surface of the first semiconductor element and the contact protrusions have a first contact area CA1, wherein 0.1 ≦ CA1 / SA1 < 1.

2. The semiconductor carrier as claimed in claim 1, wherein the carrier structure comprises polydimethylsiloxane (PDMS).

3. The semiconductor carrier as claimed in claim 1, wherein the contact bumps are periodically arranged in a hexagonal closest packed manner.

4. The semiconductor carrier as claimed in claim 1, wherein the contact protrusions are cylindrical and have an aspect ratio between 0.5 and 1.

5.

5. The semiconductor carrier as claimed in claim 1, wherein the springback rate of the contact protrusions is between 5% and 50%.

6. The semiconductor carrier as claimed in claim 1, wherein the surface adhesion of the contact protrusions is greater than 6 gram-force (gf).

7. The semiconductor carrier as claimed in claim 1, wherein the first semiconductor element contacts at least two of the contact protrusions.

8. The semiconductor carrier as claimed in claim 1, wherein the first semiconductor element has a first electrode and a first semiconductor stack, wherein, The first electrode is located between the first semiconductor stack and the contact protrusions, or the first semiconductor stack is located between the first electrode and the contact protrusions.

9. The semiconductor carrier as described in claim 1, further comprising: A second semiconductor element is disposed on the support structure and contacts the contact protrusions, wherein a second surface of the second semiconductor element has a second surface area SA2, and the second surface of the second semiconductor element and the contact protrusions have a second contact area CA2, wherein 0.1 ≦ CA2 / SA2 < 1, and wherein the second semiconductor element is different from the first semiconductor element.

10. The semiconductor carrier as claimed in claim 9, wherein the second semiconductor element has a second electrode and a second semiconductor stack, wherein, The second electrode is located between the second semiconductor stack and the contact protrusions, or the second semiconductor stack is located between the second electrode and the contact protrusions.

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