Contact structures for submounts in light-emitting diode devices

Abstract

This invention discloses a light-emitting device, and more particularly a contact structure for a sub-substrate in a light-emitting diode (LED) device. An exemplary device includes an LED chip having an active LED structure bonded to a carrier sub-substrate. The contact structure includes an arrangement of mounting pads of the carrier sub-substrate relative to contacts of the active LED structure, said arrangement improving bonding integrity and / or mitigating stress-related deformation in the active LED structure after removal of the growth substrate. An exemplary contact structure includes different heights between an anode mounting pad and a cathode mounting pad, particularly with a larger height for the mounting pad having a smaller surface area to ensure suitable bonding contact. Additional contact structures include arrangements of contacts and corresponding mounting pads positioning bonding interfaces around various regions of the LED chip, said arrangements mitigating and / or balancing certain areas susceptible to stress-related deformation.

Description

[Technical Field]

[0001] The present invention relates to a light-emitting device, and more particularly to a contact structure for a sub-base in a light-emitting diode device. [Previous Technology]

[0002] Solid-state lighting devices, such as light-emitting diodes (LEDs), are increasingly used in both consumer and commercial applications. Advances in LED technology have resulted in highly efficient and mechanically robust light sources with long lifespans. As a result, modern LEDs have enabled a wide range of new LED displays and general lighting applications.

[0003] An LED is a solid-state device that converts electrical energy into light, and typically includes one or more active layers of semiconductor material (or active regions) disposed between relatively doped n-type and p-type layers. When a bias voltage is applied across the doped layers, holes and electrons are injected into the one or more active layers, whereby the holes and electrons recombine to produce emission, such as visible light or ultraviolet light emission. LED chips typically include active regions made of, for example, silicon carbide, gallium nitride, gallium phosphide, indium phosphide, aluminum nitride, gallium arsenide-based materials, and / or organic semiconductor materials.

[0004] LED packages have been developed that provide mechanical support, electrical connections, and encapsulation for LED emitters. LED chips and LED packages have been developed for LED arrays of closely spaced LED chips or packages. LED chips and LED packages are further developed to have reduced sizes for use in many applications. Challenges remain in providing suitable mechanical support, electrical connections, and package configurations while generating high-quality light with the desired emission characteristics.

[0005] The art continues to seek improved LED and solid-state lighting devices with desirable illumination characteristics that can overcome the challenges associated with conventional lighting devices. [Summary of the Invention]

[0006] This invention relates to light-emitting devices, and more particularly to contact structures for sub-substrates in light-emitting diode (LED) devices. An exemplary device includes an LED chip having an active LED structure bonded to a carrier sub-substrate. The contact structure includes a configuration of mounting pads of the carrier sub-substrate relative to contacts of the active LED structure, said configuration improving bonding integrity and / or mitigating stress-related deformation in the active LED structure after removal of the growth substrate. An exemplary contact structure includes different heights between anode and cathode mounting pads, particularly with a larger height for mounting pads having a smaller surface area to ensure suitable bonding contact. Additional contact structures include configurations of contacts and corresponding mounting pads positioning bonding interfaces around various regions of the LED chip, said configuration mitigating and / or balancing certain areas susceptible to stress-related deformation.

[0007] In one embodiment, an LED chip includes: a carrier sub-base comprising a first mounting pad and a second mounting pad, the first mounting pad being at a greater height above the carrier sub-base than the second mounting pad being above the carrier sub-base; an active LED structure bonded to the carrier sub-base, the active LED structure comprising an n-type layer, a p-type layer, and an active layer between the n-type and p-type layers; a first contact electrically coupled to either the p-type or n-type layer, the first contact being bonded to the first mounting pad at a location between the active LED structure and the carrier sub-base; and a second contact electrically coupled to either the p-type or n-type layer, different from the first contact, the second contact being bonded to the second mounting pad at a location between the active LED structure and the carrier sub-base. In some embodiments, the thickness of the first contact and the thickness of the second contact are the same or differ by no more than 0.5 percent relative to the active LED structure. In some embodiments, the first contact is an anode contact electrically coupled to the p-type layer, and the second contact is a cathode contact electrically coupled to the n-type layer. The LED chip may further include an anode bonding pad and a cathode bonding pad located on the side of the carrier sub-base opposite to the active LED structure, wherein the anode bonding pad forms a shape symmetrical to the cathode bonding pad. In some embodiments, the first mounting pad and the second mounting pad each include a base layer and a protective layer on the base layer. In some embodiments: the protective layer of the first mounting pad forms a first bonding interface with the first contact; the protective layer of the second mounting pad forms a second bonding interface with the second contact; and the position of the first bonding interface above the carrier sub-base is greater than the position of the second bonding interface above the carrier sub-base. The LED chip may further include an insulating support layer located between the carrier sub-base and the active LED structure, the insulating support layer being positioned between the first contact and the second contact.

[0008] In another embodiment, an LED chip includes: a carrier sub-base including a first mounting pad and a second mounting pad; an active LED structure bonded to the carrier sub-base, the active LED structure including an n-type layer, a p-type layer, and an active layer between the n-type and p-type layers; a first contact electrically coupled to the active LED structure, the first contact being bonded to the first mounting pad; and a second contact electrically coupled to the active LED structure, the second contact being bonded to the second mounting pad; the first contact and the second contact form a nonlinear gap therebetween, the nonlinear gap continuously extending to separate the first contact and the second contact. In some embodiments, the first contact and the second contact form forked fingers, and the nonlinear gap extends along the forked fingers from one peripheral edge of the first contact to the opposite peripheral edge of the first contact. In some embodiments, the first mounting pad and the second mounting pad form corresponding forked fingers. In some embodiments, the nonlinear gap continuously bends between the opposite peripheral edges of the first contact. In some embodiments, the first contact is positioned near a corner of the active LED structure, and the second contact extends near a large portion of the three peripheral edges of the active LED structure. In some embodiments, the nonlinear gap is radially curved around the center of the active LED structure. In some embodiments, the nonlinear gap is radially curved to form a circular shape. The LED chip may further include a first bonding pad and a second bonding pad located on the side of the carrier sub-base opposite the active LED structure, wherein the first bonding pad forms a shape symmetrical to the second bonding pad.

[0009] In another embodiment, the LED chip includes: a carrier sub-base comprising a plurality of layers, the plurality of layers including: a first layer having at least one anode mounting pad and at least one cathode mounting pad; a second layer having at least one anode interconnect electrically coupled to at least one anode mounting pad and at least one cathode interconnect electrically coupled to at least one cathode mounting pad; and a third layer having an anode bonding pad electrically coupled to at least one anode interconnect and a cathode bonding pad electrically coupled to the at least one cathode interconnect; an active LED structure coupled to the carrier sub-base; at least one anode contact electrically coupled between the active LED structure and at least one anode mounting pad; and at least one cathode contact electrically coupled between the active LED structure and at least one cathode mounting pad. In some embodiments: at least one anode mounting pad includes a plurality of anode mounting pads forming a first array throughout the first layer; at least one anode contact includes a plurality of anode contacts engaged to the plurality of anode mounting pads; the at least one cathode mounting pad includes a plurality of cathode mounting pads forming a second array throughout the first layer; and at least one cathode contact includes a plurality of cathode contacts engaged to the plurality of cathode mounting pads. In some embodiments: at least one anode interconnect forms a continuous structure electrically coupled to each of the anode mounting pads in the plurality of anode mounting pads; and at least one cathode interconnect forms a continuous structure electrically coupled to each of the cathode mounting pads in the plurality of cathode mounting pads. In some embodiments: at least one anode interconnect forms a first plurality of finger extensions; and at least one cathode interconnect forms a second plurality of finger extensions intersecting the first plurality of finger extensions. In some embodiments, the anode bonding pad forms a shape symmetrical to the cathode bonding pad.

[0010] In another configuration, any of the foregoing configurations and / or the various independent configurations and features described herein may be combined individually or together for additional advantages. Unless otherwise indicated herein, any of the various features and elements disclosed herein may be combined with one or more other disclosed features and elements.

[0011] Those skilled in the art will understand the scope of the invention and will recognize additional features of the invention after reading the following detailed description of preferred embodiments in conjunction with the accompanying drawings.

Implementation Method

[0013] The embodiments described below illustrate the means by which those skilled in the art can practice the embodiments, and explain the necessary information for the best mode of practicing the embodiments. Upon reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of the invention and recognize the application of such concepts not specifically stated herein. It should be understood that such concepts and applications fall within the scope of the invention and the appended claims.

[0014] It will be understood that although the terms first, second, etc., may be used herein to describe various elements, such elements should not be limited by such terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element without departing from the scope of the invention, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0015] It should be understood that when an element such as a layer, region, or substrate is referred to as "on another element" or "extending to another element," it may be directly on or directly extending to the other element, or an intervening element may also be present. In contrast, when an element is referred to as "directly on" or "directly onto" another element, no intervening element is present. Similarly, it should be understood that when an element such as a layer, region, or substrate is referred to as "above" or "over" another element, it may be directly above or directly over the other element, or an intervening element may also be present. In contrast, when an element is referred to as "directly on" or "directly on" another element, no intermediary element is present. It should also be understood that when an element is referred to as "connected" or "coupled" to another element, the element may be directly connected or coupled to the other element, or an intervening element may be present. In contrast, when a component is referred to as "directly connected" or "directly coupled" to another component, there is no intervening component.

[0016] Relative terms, such as “below” or “above” or “over” or “below” or “horizontal” or “vertical”, are used herein to describe the relationship between an element, layer or area shown in the figures and another element, layer or area. It should be understood that these terms and the terms discussed above are intended to cover different orientations of the device other than those depicted in the figures.

[0017] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the embodiments. As used herein, unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" are intended to include the plural forms as well. It should be further understood that the terms "comprises," "comprising," "includes," and / or "including," when used herein, specify the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0018] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that the terms used herein shall be interpreted as having the same meaning as in the context of this specification and related art, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0019] Embodiments are described herein with reference to illustrative examples of embodiments of the invention. Therefore, the actual dimensions of layers and elements may differ, and variations in the shown shape are anticipated due to factors such as manufacturing techniques and / or tolerances. For example, areas illustrated or described as squares or rectangles may have circular or curved features, and areas shown as straight lines may have some irregularity. Therefore, the areas illustrated in the figures are illustrative, and their shapes are not intended to illustrate the precise shape of areas of the device, nor are they intended to limit the scope of the invention. Furthermore, for illustrative purposes, the dimensions of structures or areas may be enlarged relative to other structures or areas, and are therefore provided to illustrate the general structure of the subject matter of the invention and may or may not be drawn to scale. Common elements between figures may be shown herein with common element symbols and may not be described again subsequently.

[0020] This invention relates to light-emitting devices, and more particularly to contact structures for sub-substrates in light-emitting diode (LED) devices. An exemplary device includes an LED chip having an active LED structure bonded to a carrier sub-substrate. The contact structure includes a configuration of mounting pads of the carrier sub-substrate relative to contacts of the active LED structure, said configuration improving bonding integrity and / or mitigating stress-related deformation in the active LED structure after removal of the growth substrate. An exemplary contact structure includes different heights between an anode mounting pad and a cathode mounting pad, particularly with a larger height for the mounting pad having a smaller surface area to ensure suitable bonding contact. Additional contact structures include configurations of contacts and corresponding mounting pads positioning bonding interfaces around various regions of the LED chip, said configuration mitigating and / or balancing certain areas susceptible to stress-related deformation.

[0021] Before delving into the specific details of the various forms of the present invention, an overview of various elements that may be included in the exemplary light-emitting devices of the present invention is provided for context. An LED chip typically includes an active LED structure or region having various semiconductor layers configured in a variety of different ways. The manufacture and operation of LEDs and their active structures are generally known in the art and are only briefly discussed herein. The layers of the active LED structure can be manufactured using known processes, among which metal-organic chemical vapor deposition is a suitable process. The layers of an active LED structure typically include many different layers and generally include an active layer sandwiched between n-type and p-type relatively doped epitaxial layers, all of which are sequentially formed on a growth substrate. It should be understood that additional layers and elements may also be included in the active LED structure, including but not limited to buffer layers, nucleation layers, superlattice structures, undoped layers, cladding layers, contact layers, current dispersing layers, and light extraction layers and elements. The active layer may include single quantum wells, multiple quantum wells, dual heterostructures, or superlattice structures.

[0022] Active LED structures can be manufactured from various material systems, some of which are based on Group III nitrides. Group III nitrides refer to semiconductor compounds formed between nitrogen (N) and elements in Group III of the periodic table, typically aluminum (Al), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group III nitrides also refer to ternary and quaternary compounds, such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). For Group III nitrides, silicon (Si) is a common n-type dopant and magnesium (Mg) is a common p-type dopant. Therefore, for Group III nitride-based material systems, the active layer, n-type layer, and p-type layer may include one or more layers of GaN, AlGaN, InGaN, and AlInGaN, which may be undoped or doped with Si or Mg. Other material systems include silicon carbide (SiC), organic semiconductor materials, and other group III to V systems and related compounds such as gallium phosphide (GaP) and gallium arsenide (GaAs). Active LED structures can be grown on a growth substrate, which may include many materials such as sapphire, silicon carbide (SiC), aluminum nitride (AlN), and GaN.

[0023] Different embodiments of the active LED structure may emit light of different wavelengths depending on the composition of the active layer and the n-type and p-type layers. In some embodiments, the active LED structure may emit blue light with a peak wavelength range of approximately 430 nanometers (nm) to 480 nm. In other embodiments, the active LED structure may emit green light with a peak wavelength range of 500 nm to 570 nm. In other embodiments, the active LED structure may emit red light with a peak wavelength range of 600 nm to 650 nm. In some embodiments, the active LED structure may emit light with a peak wavelength in any visible spectrum region, for example, with a peak wavelength primarily in the range of 400 nm to 700 nm. In some embodiments, the LED chip may be covered with one or more lumiphoric materials, such as phosphors, such that at least some of the light from the active LED structure is absorbed by one or more phosphors, and the emission is converted into one or more different wavelength spectra according to the characteristics of the one or more phosphors.

[0024] In some embodiments, the active LED structure may be arranged to emit light beyond the visible spectrum, including one or more portions of the ultraviolet (UV) spectrum, infrared (IR) spectrum, or near-IR spectrum. The UV spectrum is typically divided into three wavelength range categories denoted by the letters A, B, and C. In this manner, UV-A light is typically defined as having a peak wavelength in the range of 315 nm to 400 nm, UV-B is typically defined as having a peak wavelength in the range of 280 nm to 315 nm, and UV-C is typically defined as having a peak wavelength in the range of 100 nm to 280 nm. UV LEDs are particularly suitable for applications related to the disinfection of microorganisms in air, water, and surfaces, as well as other applications. In other applications, UV LEDs may also incorporate one or more luminescent phosphorescent materials to provide focused emission with a broad spectrum and improved color quality for visible light applications within the LED package. The near-IR and / or IR wavelengths of the LED structures used in this invention may have wavelengths higher than 700 nm (e.g., in the range of 750 nm to 1100 nm or greater).

[0025] This invention is applicable to LED chips having various geometries, including flip-chip geometries. A flip-chip structure for an LED chip typically includes an anode and cathode connection formed on the same side or face of the LED chip. The anode and cathode sides are typically structured as mounting surfaces for flip-chip mounting of the LED chip to another surface, such as a printed circuit board. In this regard, the anode and cathode connections on the mounting surface are used to mechanically bond and electrically couple the LED chip to the other surface. When flip-chip mounted, the opposite side or face of the LED chip coincides with a light-emitting surface oriented toward a desired emission direction. In some embodiments, during flip-chip mounting, a growth substrate for the LED chip may be formed and / or adjacent to the light-emitting surface. During chip manufacturing, an active LED structure may be epitaxially grown on the growth substrate. In some embodiments, the LED chip may be flip-chip mounted to a carrier sub-substrate and then the growth substrate may be removed.

[0026] According to an embodiment of the present invention, an LED chip is formed by flip-chip mounting an active LED structure to a carrier sub-subbase using wafer-level fabrication. By connecting the bulk active LED structure to the carrier sub-subbase including wafer-level electrical connections, individual LED chips and / or groups thereof can be unified together with integrated electrical connections. Integrated electrical connections can provide more suitable bonding surfaces, such as bonding pads of generally symmetrical shapes, for mounting LED chips in other LED packages and / or LED jigs. Wafer-level fabrication may include bonding LED wafers to sub-subbase wafers before the various light-emitting devices are unified. As used herein, an LED wafer may include a growth substrate covered with an epitaxial LED structure deposition. Individual LED chips along the growth substrate may be formed by post-epitaxy fabrication, which may include removing portions of the epitaxial LED structure along cleavage to define the boundaries of the LED chips. The LED wafer may include other post-epitaxy fabrication, such as forming reflective structures, anode and cathode electrical contacts for each LED chip, and / or passivation layers, etc. As used herein, the sub-base wafer may comprise ceramic materials such as alumina or aluminum, AlN, or organic insulators such as PI and PPA, or PCB, sapphire, Si, or any other suitable material. As described in more detail below, metal trace patterns may be disposed on one or more sides of the sub-base for receiving one or more LED chips of the LED wafer and / or electrically connecting to one or more LED chips of the LED wafer. The sub-base wafer may form a precursor structure that, when subdivided together with the LED wafer, provides a separate carrier sub-base for each LED chip.

[0027] The various configurations described herein are provided in the context of the anode and cathode structures. It should be understood that the same principle applies to reversed arrangements by reversing the order of the anode and cathode structures as described herein. Therefore, the anode contacts, anode mounting pads, and anode bonding pads described in more detail below may generally be referred to as first contacts, first mounting pads, and first bonding pads for polarity-unknown disclosures. Similarly, the cathode contacts, cathode mounting pads, and cathode bonding pads described in more detail below may generally be referred to as second contacts, second mounting pads, and second bonding pads according to the principles of the present invention.

[0028] FIG1A is a cross-sectional view of the manufacturing steps for forming LED wafers 10 at the wafer level. In FIG1A, LED wafer 12 is positioned for mounting to sub-base wafer 14. For illustrative purposes, the view provided in FIG1A only shows two LED wafers 10 before unification, and the superimposed vertical dashed line 16 indicates the location where the individual LED wafers 10 will be separated later. In practice, the number of LED wafers 10 formed can be much higher.

[0029] The LED wafer 12 includes an active LED structure 18 on a growth substrate 20. The active LED structure 18 generally refers to a portion of the LED chip 10 including a semiconductor layer (such as an epitaxial semiconductor layer) that forms a structure that generates light upon electrical excitation. The active LED structure 18 may typically include a p-type layer 22, an n-type layer 24, and an active layer 26 disposed between the p-type layer 22 and the n-type layer 24. The active LED structure 18 may include a number of additional layers, such as, but not limited to, buffer layers, nucleation layers, superlattice structures, undoped layers, cladding layers, contact layers, current diffusion layers, and light extraction layers and elements. In various embodiments, the active layer 26 may include a single quantum well, multiple quantum well, double heterostructure, or superlattice structure. The active LED structure 18 may initially be formed by sequentially epitaxially growing or depositing the n-type layer 24, the active layer 26, and the p-type layer 22 on the growth substrate 20.

[0030] The LED chip 10 may further include an anode contact 28 and a cathode contact 30 for mounting to a sub-substrate wafer 14. The anode contact 28 is electrically coupled to the p-type layer 22 via a via 32 extending through the passivation layer 34, and the cathode contact 30 is electrically coupled to the n-type layer 24 via a via 36 also extending through the passivation layer 34. Some chip structures include an anode contact 28 with a different shape than the cathode contact 30. As shown in FIG1A, the cathode contact 30 is substantially larger than the anode contact 28. In other embodiments, the order may be reversed such that the anode contact 28 is substantially larger than the cathode contact 30. Although having different shapes of anode and cathode contacts 28, 30 may be advantageous in some LED chip structures, some LED applications may prefer a more symmetrical shape of anode and cathode contacts 28, 30.

[0031] The sub-base wafer 14 includes a carrier sub-base 38, wherein anode and cathode mounting pads 40 and 42 are located on a first side 38' or the front side of the carrier sub-base 38. Anode bonding pads 44 and cathode bonding pads 46 for each LED chip 10 are disposed on a second side 38'' or the back side of the carrier sub-base 38. Corresponding through holes 48 in the carrier sub-base 38 electrically couple the anode mounting pad 40 to the anode bonding pad 44, and other through holes 50 in the carrier sub-base 38 electrically couple the cathode mounting pad 42 to the cathode bonding pad 46. The anode and cathode mounting pads 40 and 42 can embody patterned metal traces on the first side 38', and the anode and cathode bonding pads 44 and 46 can embody patterned metal traces on the second side 38''. As shown, the sub-base wafer 14 is configured to provide anode and cathode mounting pads 40 and 42 corresponding to the shapes of the anode and cathode contacts 28 and 30 of the LED chip 10, and anode and cathode bonding pads 44 and 46 with different and more symmetrical shapes to improve bonding to other surfaces in various applications.

[0032] Figure 1B is a cross-sectional view of the subsequent manufacturing steps of Figure 1A, wherein the LED wafer 12 is bonded to the sub-base wafer 14. A wafer aligner can be used to correctly position the LED wafer 12 relative to the sub-base wafer 14, so that the anode contact 28 can be aligned with and mounted to the anode mounting pad 40, and the cathode contact 30 can be aligned with and mounted to the cathode mounting pad 42. This wafer bonding can be provided by various techniques of mechanically and electrically bonding the metals of the anode contacts 28 and cathode contacts 30 to the metals of the corresponding anode and cathode mounting pads 40, 42. For example, bonding may include thermoforming certain identical metals such as gold (Au), copper (Cu), or aluminum (Al), which are present at the interface formed between the anode contact 28 or cathode contact 30 and the corresponding anode mounting pad 40 and cathode mounting pad 42. Other bonding methods may involve grain-attached metal stacks formed at the interface, such as eutectic metal stacks, including gold-tin (Au-Sn), gold-silicon (Au-Si), gold-germanium (Au-Ge), aluminum-germanium (Al-Ge), or gold-indium (Au-In). Other bonding methods may involve transient liquid phase bonding via copper-tin (Cu-Sn), Au-In, or silver-tin (Ag-Sn). Additional bonding methods may involve bump bonding using patterns of solder bumps or using solder paste.

[0033] Figure 1C is a cross-sectional view of the subsequent manufacturing steps of Figure 1B, wherein the growth substrate 20 of Figure 1B is removed from the LED wafer 12. The growth substrate 20 of Figure 1B can be removed by various subtractive processes, such as laser lift-off or mechanical polishing. Although not drawn to scale, it should be understood that after the removal of the growth substrate 20 of Figure 1B, the remaining portion of the active LED structure 18 and the LED wafer 12 can be substantially thinner than the sub-substrate wafer 14. In this regard, the active LED structure 18 in Figure 1C is mechanically supported by the underlying carrier sub-substrate 38 by means of metal bonding of the anode and cathode contacts 28, 30 to the corresponding anode and cathode mounting pads 40, 42.

[0034] FIG1D is a cross-sectional view of the subsequent manufacturing steps of FIG1C, wherein the top surface 24' of the n-type layer 24 forms the primary light extraction surface for each LED chip 10. In some embodiments, the top surface 24' may include a textured or patterned surface for improving light extraction. Textured or patterned surfaces may be provided by etching, imprinting, or associated features from the embodiments, wherein the growth substrate 20 of FIG1B is patterned prior to epitaxial growth.

[0035] FIG1E is a cross-sectional view of the subsequent manufacturing steps of FIG1D, wherein the individual LED chips 10 are separated from each other. As shown, each individual LED chip 10 includes an active LED structure 18 flip-chip mounted to a corresponding carrier sub-substrate 38. The LED chips 10 can be separated by various individualization techniques, including laser individualization and / or mechanical sawing, and then the LED chips 10 are stretched apart with tape.

[0036] Figure 1F is a bottom view of one of the LED chips 10 from Figure 1E. As shown, compared to the asymmetry between the anode and cathode contacts 28, 30 in Figure 1E, the anode and cathode bonding pads 44, 46 are shaped to improve mounting to other surfaces. The anode and cathode bonding pads 44, 46 may generally be symmetrical to each other. In other embodiments, one of the anode and cathode bonding pads 44, 46 may have a slightly different shape, such as a notch or cutout for polarity indication.

[0037] Figure 2 is a cross-sectional view of one of the exemplary LED wafers 10 of Figures 1A to 1F, showing stress-related deformation. For illustrative purposes, the various elements of the LED wafers 10 described above for Figures 1A to 1F are omitted. As described above, the thickness of the active LED structure 18 relative to the carrier sub-substrate 38 is not drawn to scale. In practice, the active LED structure 18 is substantially thinner than the carrier sub-substrate 38. For example, compared to the three-dimensional bulk structure of the carrier sub-substrate 38, the active LED structure 18 can be considered a substantially two-dimensional structure. After removing the growth substrate 20 described above from Figures 1B to 1C, stress and / or strain within the epitaxial layer of the active LED structure 18 can cause deformation. For example, the active LED structure 18 may tend to bend from the central portion of the carrier sub-substrate 38, causing the peripheral edges of the active LED structure 18 to deform away from the carrier sub-substrate 38. In some cases, the active LED structure 18 may even delaminate along one or more of its peripheral edges, thereby interfering with the integrity of the electrical connection between the anode and cathode contacts 28, 30 and the anode and cathode mounting pads 40, 42. As shown in Figure 2, the narrow shape of the anode contacts 28 and the corresponding anode mounting pads 40 can provide complete separation during deformation. In other applications, deformation of the active LED structure 18 can occur in different directions, such as the reverse bending depicted in Figure 2, where the central portion of the active LED structure 18 can deform away from the carrier sub-base 38.

[0038] According to the present invention, various contact structures for a carrier sub-subbase are described, which mitigate deformation of the active LED structure after the growth substrate is removed. In some embodiments, the contact structure includes an anode mounting pad that is higher than the cathode mounting pad. In this way, the smaller anode contact of the LED wafer can contact the corresponding anode mounting pad first before the cathode contact contacts the corresponding cathode mounting pad to ensure adequate engagement. In other embodiments, the anode and cathode contacts of the LED wafer and the corresponding mounting pads of the sub-subbase wafer may have different shapes that break up the gap between the anode and cathode contacts near the center region to more uniformly balance stress and reduce deformation.

[0039] FIG3A is a cross-sectional view of an LED wafer 52 similar to the LED wafer 10 of FIG1A to FIG1F, except that the anode mounting pad 40 is formed to have an increased thickness relative to the cathode mounting pad 42. FIG3A corresponds to a manufacturing step similar to FIG1A before the active LED structure 12 is bonded to the carrier sub-substrate 38. FIG3B is a cross-sectional view of subsequent manufacturing steps for the LED wafer 52 after bonding to the carrier sub-substrate 38 and removing the growth substrate 20. FIG3B corresponds to a manufacturing step similar to FIG1C. For illustrative purposes, an LED wafer 52 is shown. In practice, any number of LED wafers 52 can be formed at the wafer level in the same manner as described above for FIG1A to FIG1E. As shown, the anode contact 28 and the cathode contact 30 are formed to have substantially the same thickness relative to the active LED structure 18. In some embodiments, the passivation layer 34 forms a generally planar surface for the anode and cathode contacts 28, 30, such that it is formed in the same deposition step and has substantially the same thickness within a 0.5% error margin. However, the height H1 of the anode mounting pad 40 is greater than the corresponding height H2 of the cathode mounting pad 42 above the carrier sub-base 38. Therefore, when the active LED structure 18 moves closer to the carrier sub-base 38 for bonding, the anode contact 28 will contact the anode mounting pad 40 before the cathode contact 30 contacts the cathode mounting pad 42. In this way, sufficient bonding can occur between the smaller area anode contact 28 and the anode mounting pad 40, which can reduce deformation of the active LED structure 18 after the growth substrate 20 is removed.

[0040] FIG4A is a simplified cross-sectional view of the LED chip 52 of FIG3A and FIG3B, showing additional details of the anode and cathode mounting pads 40, 42. FIG4A corresponds to a manufacturing step similar to FIG3A before the active LED structure 18 is bonded to the carrier sub-subbase 38. In some embodiments, each of the anode mounting pad 40 and cathode mounting pad 42 may include a base layer 54 having a protective layer 56. The base layer 54 may comprise various materials, such as Cu. As shown, the base layer 54 is responsible for most of the heights H1 and H2 of the anode and cathode mounting pads 40, 42. In this way, the difference between heights H1 and H2 can be controlled by the relative difference in height of the base layer 54. In one example, the height difference between H1 and H2 may be such that the base layer 54 of the anode mounting pad 40 is at least 2% thicker than the base layer 54 of the cathode mounting pad 42. Using an example, the height H2 can be approximately 50 micrometers (µm), while the height H1 can be approximately 51 to 52 µm. The protective layer 56 may comprise a metal that provides environmental protection for the underlying substrate layer 54 and promotes eutectic bonding with the anode and cathode contacts 28, 30. For example, the protective layer 56 may embody a protective plating, such as electroless nickel electroless palladium immersion gold (ENEPIG), electroless nickel immersion gold (ENIG), or a titanium layer.

[0041] FIG4B is a cross-sectional view of the subsequent manufacturing steps for the LED wafer 52 of FIG4A after bonding to the carrier sub-subbase 38 and removal of the growth substrate 20. In some embodiments, bonding interfaces 58-1 and 58-2 are formed between the protective layer 56 and the corresponding anode and cathode contacts 28, 30. For example, bonding interfaces 58-1 and 58-2 may embody eutectic bonding interfaces identified by the presence of the material of the protective layer 56. As shown, the location of bonding interface 58-1 may be defined by the height H1 of the anode mounting pad 40, and the location of bonding interface 58-2 may be defined by the height H2 of the cathode bonding pad 42. By forming a height H1 greater than a height H2, physical contact between the anode contact 28 and the anode mounting pad 40 can occur first during bonding to ensure that bonding interface 58-1 has improved mechanical integrity.

[0042] FIG. 5A is a cross-sectional view of an LED wafer 60 similar to that of FIG. 1A to FIG. 1F, and further including one or more support layers 62-1, 62-2 according to the principles of the present invention. FIG. 5A corresponds to a manufacturing step similar to that of FIG. 1A before the active LED structure 18 is bonded to the carrier sub-substrate 38. FIG. 5B is a cross-sectional view of subsequent manufacturing steps for the LED wafer 60 after bonding to the carrier sub-substrate 38 and removing the growth substrate 20. FIG. 5B corresponds to a manufacturing step similar to that of FIG. 1C. For illustrative purposes, an LED wafer 60 is shown. In practice, any number of LED wafers 60 can be formed at the wafer level in the same manner described above for FIG. 1A to FIG. 1E. One or more support layers 62-1, 62-2 may embody a conformal insulating material that effectively fills the morphological differences near the anode and cathode contacts 28, 30 and the anode and cathode mounting pads 40, 42. Support layers 62-1 and 62-2 may be individually disposed on the active LED structure 18 and the carrier sub-base 38 prior to the bonding shown in FIG. 5A. Once bonding is completed as shown in FIG. 5B, support layers 62-1 and 62-2 can be effectively joined together to fill the gap between the active LED structure 18 and the carrier sub-base 38. In this way, support layers 62-1 and 62-2 can be used to uniformly distribute mechanical stress during bonding and / or provide additional anchoring to provide improved bonding strength and reduced deformation of the active LED structure 18. Support layers 62-1 and 62-2 may comprise polymer-based materials, such as epoxy-based negative photoresist (e.g., SU-8), benzocyclobutene (BCB), polysiloxane, and other dielectrics such as SiO2, Al2O3, and TiO2. In some embodiments, one or more support layers 62-1 and 62-1 as described above with respect to FIG. 5A and FIG. 5B may be combined with the embodiments of LED chip 52 of FIG. 3A to FIG. 4B.

[0043] In addition to the above-described embodiments of LED chip 52 in Figures 3A to 4B and LED chip 60 in Figures 5A to 5B, another principle of the present invention includes a contact structure layout that reduces and / or prevents deformation of the active LED structure as shown in Figure 2. The bonding interfaces between the anode contact and the anode mounting pad, and between the cathode contact and the cathode mounting pad, effectively represent the anchoring position. As will be described in more detail below, the contact structure layout includes the shapes for the anode and cathode contacts and the corresponding shapes for the anode and cathode mounting pads, balancing the stress of the active LED structure away from the common bending region.

[0044] Figure 6 is a view of the LED chip 64 before the active LED structure 18 is bonded to the carrier sub-base 38, showing the shapes of the anode and cathode contacts 28, 30 and the corresponding shapes of the anode and cathode mounting pads 40, 42, which reduce stress after bonding. Figure 6 provides a bottom view of the active LED structure 18 and a top view of the carrier sub-base 38. Overlaid dashed arrows indicate the direction in which the active LED structure 18 is flipped toward the carrier sub-base 38 for bonding. In this manner, the anode contact 28 will bond to the anode mounting pad 40, and the cathode contact 30 will bond to the cathode mounting pad 42, as described above.

[0045] In Figure 6, the anode and cathode contacts 28 and 30 each cover a relatively large area of ​​the active LED structure 18 with a gap 66 therebetween, and the anode and cathode mounting pads 28 and 30 each cover a corresponding area of ​​the carrier sub-base 38 with a gap 68 therebetween. Gap 66 and 68 correspond to areas without metallization bonding and associated anchoring after the active LED structure 18 is bonded to the carrier sub-base 38. As shown, the anode and cathode contacts 28 and 30 are formed with a shape including forked fingers with gaps 66 and 68. In this way, gap 66 forms a nonlinear gap that extends from one peripheral edge of the anode and cathode contacts 28 and 30 to the opposite peripheral edges of the anode and cathode contacts 28 and 30. Gap 68 is formed correspondingly on the carrier sub-base 38. By forming gaps 66 and 68 on the LED chip 64 in a nonlinear manner, the areas not anchored by bonding (i.e., gaps 66 and 68) are effectively distributed in a nonlinear manner to balance the stress of the active LED structure 18 after bonding.

[0046] Figure 7 is a view of an LED chip 70 similar to the LED chip 64 of Figure 6, showing additional shapes for the anode and cathode contacts 28, 30 and the anode and cathode mounting pads 40, 42, which reduce stress after bonding. Instead of the forked finger structure of Figure 6, the anode and cathode contacts 28, 30 have nonlinear shapes with wavy edges forming a gap 66. In some embodiments, the gap 66 is continuously curved between the opposing peripheral edges of the anode and cathode contacts 28, 30. The anode and cathode mounting pads 40, 42 and the gap 68 are formed correspondingly on the carrier sub-base 38.

[0047] Figure 8 is a view of LED chip 72 similar to LED chip 64 in Figure 6, showing additional shapes for anode and cathode contacts 28, 30 and anode and cathode mounting pads 40, 42, which reduce stress after bonding. In Figure 8, anode contact 28 forms a small square near the corner of active LED structure 18, and cathode contact 30 covers a substantial portion extending along most of the three edges of LED chip 72. Gap 66 thus extends nonlinearly adjacent to the bonding periphery edge of LED chip 72. In some embodiments, gap 66 may be formed as two bonding line sub-portions after anode contact 28, such that the entire gap 66 is nonlinear. Anode and cathode mounting pads 40, 42 and gap 68 are formed correspondingly on carrier sub-base 38. In this way, it is anchored over the majority of LED chip 72 between cathode contact 30 and cathode mounting pad 42.

[0048] FIG9A is a view of LED chip 74 similar to LED chip 64 of FIG6, showing additional shapes for anode and cathode contacts 28, 30 and anode and cathode mounting pads 40, 42, which reduce stress after bonding. FIG9B is a cross-sectional view of a portion of LED chip 74 taken from section line 9B through the carrier sub-base 38 of FIG9A. As shown, anode contacts 28 and anode mounting pads 40 are formed in a circular shape having a radial curvature around the center of LED chip 74. Cathode contacts 30 and cathode mounting pads 42 extend to surround the peripheral edges of anode contacts 28 and anode mounting pads 40. In this way, cathode contacts 30 extend between all peripheral edges of anode contacts 28 and active LED structure 18, and cathode mounting pads 42 extend relative to carrier sub-base 38 in a similar manner. Therefore, gaps 66, 68 are nonlinear gaps that are curved in positions laterally spaced from the center of LED chip 74. In this way, the radial properties of gaps 66 and 68 can reduce stress effects that could otherwise promote warping or bending around the center of the active LED structure 18 as shown in Figure 2. The locations of through-holes 48 and 50 are further shown in Figures 9A and 9B.

[0049] In some embodiments, the shapes of the anode and cathode contacts 28, 30 and the anode and cathode mounting pads 40, 42 for reducing stress in the active LED structure 18 may be combined with the embodiments described above for the LED chip 52 of Figures 3A to 4B and / or the LED chip 60 of Figures 5A and 5B.

[0050] FIG10 is a cross-sectional view of an LED wafer 76 similar to the LED wafer 64 of FIG6, showing additional shapes for the anode and cathode contacts 28, 30, anode and cathode mounting pads 40, 42, and a multilayer structure for the carrier sub-base 38, which reduce stress after bonding. FIG10 corresponds to a manufacturing step similar to FIG1A before the active LED structure 18 is bonded to the carrier sub-base 38. As shown, the LED wafer 76 includes a plurality of anode and cathode contacts 28, 30 distributed on the LED wafer 76. In this way, multiple bonding areas can be arrayed throughout the LED wafer 76 to balance the stress in the active LED structure 18. As further shown in FIG10, the carrier sub-base 38 can be subdivided into multiple layers 38-1 to 38-3. The first layer 38-1 includes anode and cathode mounting pads 40, 42 for mounting together with the anode and cathode contacts 28, 30. In some embodiments, the anode and cathode mounting pads 40, 42 extend entirely through the first layer 38-1. The second layer 38-2 includes at least one anode interconnect 78 of an electrically interconnected anode mounting pad 40 and at least one cathode interconnect 80 of an electrically interconnected cathode mounting pad 42 at the interface between the first layer 38-1 and the second layer 38-2. As understood in FIG. 10, at least one anode interconnect 78 and at least one cathode interconnect 80 may each form a single structure that extends continuously beyond the plane of view relative to the cross-section of FIG. 10. This will be described and illustrated in more detail below with reference to FIG. 11B. The third layer 38-3 includes through-holes 48, 50 that electrically connect the anode and cathode interconnects 78, 80 to the anode and cathode bonding pads 44, 46 on the bottom of the LED chip 76. In this way, the carrier sub-base 38 forms a structure that effectively forms an array of anode and cathode mounting positions for the active LED structure 18, which are wired to the generally symmetrical anode and cathode bonding pads 44, 46.

[0051] Figures 11A to 11C together show an exemplary layout and structure of the various layers 38-1 to 38-3 of the carrier subbase of Figure 10.

[0052] FIG11A is a top view of a portion of the carrier sub-base 38 of FIG10, viewed from the first layer 38-1 of the exemplary layout of the carrier sub-base 38. As shown, anode and cathode mounting pads 40, 42 may be arrayed across the area of ​​the carrier sub-base 38 (and the LED chip 76 of FIG10). In some embodiments, the anode and cathode mounting pads 40, 42 may be formed alternately. Similarly, the anode and cathode contacts 28, 30 for the active LED structure 18 of FIG10 may have corresponding shapes.

[0053] FIG11B is a top view of a portion of the carrier subbase 38 of FIG10, viewed from the second layer 38-2 of the carrier subbase 38. As shown, the anode interconnect 78 may form a continuous structure having various finger extensions throughout the second layer 38-2, and the cathode interconnect 80 may also form a continuous structure having various finger extensions throughout the second layer 38-2. In some embodiments, the finger extensions of the anode interconnect 78 may be configured in a forked arrangement with the finger extensions of the cathode interconnect 80 to make alternating contact with the anode and cathode mounting pads 40, 42 of FIG11A.

[0054] Figure 11C is a view of a portion of the carrier sub-base 38 of Figure 10, viewed from a bottom view of the third layer 38-3 of the carrier sub-base 38. In some embodiments, the anode and cathode bonding pads 44, 46 are formed in a generally symmetrical shape to provide a more secure mounting of the corresponding LED chip to other surfaces.

[0055] In some embodiments, the principles described above for the anode and cathode contacts 28, 30 and the multilayer structure of the carrier sub-base 38 of FIG10 to FIG11C can be combined with the embodiments of LED chip 52 of FIG3A to FIG4B, LED chip 60 of FIG5A and FIG5B, LED chip 64 of FIG6, LED chip 70 of FIG7, LED chip 72 of FIG8 and LED chip 74 of FIG9A to FIG9B.

[0056] Upon further consideration, any of the aforementioned states and / or various individual states and features described herein may be combined to achieve additional advantages. Unless otherwise indicated herein, any of the various embodiments disclosed herein may be combined with one or more other disclosed embodiments.

[0057] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present invention. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the following claims. [Simplified Explanation of the Diagram]

[0012] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of the invention and, together with the embodiments, explain the principles of the invention. [Fig. 1A] is a cross-sectional view of a manufacturing step for forming a light-emitting diode (LED) wafer at the wafer level according to an aspect of the invention. [Fig. 1B] is a cross-sectional view of a subsequent manufacturing step of Fig. 1A, wherein the LED wafer is bonded to a sub-substrate wafer. [Fig. 1C] is a cross-sectional view of a subsequent manufacturing step of Fig. 1B, wherein the growth substrate of Fig. 1B is removed from the LED wafer. [Fig. 1D] is a cross-sectional view of a subsequent manufacturing step of Fig. 1C, wherein the top surface of the n-type layer forms the main light extraction surface for each LED wafer. [Fig. 1E] is a cross-sectional view of a subsequent manufacturing step of Fig. 1D, wherein the individual LED wafers are separated from each other. [Fig. 1F] is a bottom view of one of the LED wafers from Fig. 1E. [Fig. 2] is a cross-sectional view of an exemplary LED wafer of Figs. 1A to 1F showing stress-related deformation. [Figure 3A] is a cross-sectional view of an LED wafer similar to the LED wafers of Figures 1A to 1F, except that the anode mounting pad is formed with an increased thickness relative to the cathode mounting pad. [Figure 3B] is a cross-sectional view for subsequent manufacturing steps of the LED wafer after bonding to a carrier sub-subbase and removal of the growth substrate. [Figure 4A] is a simplified cross-sectional view of the LED wafers of Figures 3A and 3B, showing additional details of the anode and cathode mounting pads. [Figure 4B] is a cross-sectional view for subsequent manufacturing steps of the LED wafer of Figure 4A after bonding to a carrier sub-subbase and removal of the growth substrate. [Figure 5A] is a cross-sectional view of an LED wafer similar to the LED wafers of Figures 1A to 1F according to the principles of the present invention, further including one or more support layers. [Figure 5B] is a cross-sectional view for subsequent manufacturing steps of the LED wafer of Figure 5A after bonding to a carrier sub-subbase and removal of the growth substrate. [Figure 6] is a bottom view of an LED chip before the active LED structure is bonded to the carrier sub-base, showing the shapes of the anode and cathode contacts and the corresponding shapes of the anode and cathode mounting pads, which reduce stress after bonding. [Figure 7] is a view of an LED chip similar to the one in Figure 6, showing additional shapes of the anode and cathode contacts and anode and cathode mounting pads, which reduce stress after bonding. [Figure 8] is a view of an LED chip similar to the one in Figure 6, showing additional shapes of the anode and cathode contacts and anode and cathode mounting pads, which reduce stress after bonding. [Figure 9A] is a view of an LED chip similar to the one in Figure 6, showing additional shapes of the anode and cathode contacts and anode and cathode mounting pads, which reduce stress after bonding.[Figure 9B] is a cross-sectional view of a portion of the LED chip taken from section line 9B through the carrier sub-base of Figure 9A. [Figure 10] is a cross-sectional view of an LED chip similar to the LED chip of Figure 6, showing the additional shapes of the anode and cathode contacts, anode and cathode mounting pads, and the multilayer structure for the carrier sub-base, which reduce stress after bonding. [Figure 11A] is a top view of a portion of the carrier sub-base of Figure 10, viewed from the first layer of the carrier sub-base. [Figure 11B] is a top view of a portion of the carrier sub-base of Figure 10, viewed from the second layer of the carrier sub-base. [Figure 11C] is a bottom view of a portion of the carrier sub-base of Figure 10, viewed from the third layer of the carrier sub-base.

Claims

1. A light-emitting diode (LED) chip, comprising: a carrier sub-base including a first mounting pad and a second mounting pad, the first mounting pad having a height above the carrier sub-base greater than the height of the second mounting pad above the carrier sub-base; an active light-emitting diode (LED) structure bonded to the carrier sub-base, the LED structure including an n-type layer, a p-type layer, and an active layer between the n-type layer and the p-type layer; a passivation layer on the LED structure; a first contact on a planar portion of the passivation layer and electrically coupled to the p-type layer or the n-type layer, the first contact being bonded to the first mounting pad at a position between the LED structure and the carrier sub-base; and a second contact on the planar portion of the passivation layer and electrically coupled to one of the p-type layer and the n-type layer other than the first contact, the second contact being bonded to the second mounting pad at a position between the LED structure and the carrier sub-base; Measured from the planar portion of the passivation layer, the thickness of the first contact is the same as or differs from the thickness of the second contact by no more than 0.5 percent.

2. The light-emitting diode chip of claim 1, wherein the first contact is an anode contact electrically coupled to the p-type layer, and the second contact is a cathode contact electrically coupled to the n-type layer.

3. The light-emitting diode chip of claim 2, further comprising an anode bonding pad and a cathode bonding pad located on the side of the carrier sub-base opposite to the active light-emitting diode structure, wherein the anode bonding pad is formed in a shape symmetrical to the cathode bonding pad.

4. The light-emitting diode chip of claim 1, wherein the first mounting pad and the second mounting pad each include a substrate layer and a protective layer located on the substrate layer.

5. The light-emitting diode chip as described in claim 4, wherein: The protective layer of the first mounting pad forms a first bonding interface with the first contact member; the protective layer of the second mounting pad forms a second bonding interface with the second contact member; and the position of the first bonding interface above the carrier sub-base is greater than the position of the second bonding interface above the carrier sub-base.

6. The light-emitting diode chip of claim 1, further comprising an insulating support layer located between the carrier sub-base and the active light-emitting diode structure, the insulating support layer being positioned between the first contact and the second contact.

7. The light-emitting diode chip of claim 1, wherein the first contact and the second contact form a nonlinear gap therebetween, the nonlinear gap extending continuously to separate the first contact from the second contact.

8. The light-emitting diode chip of claim 7, wherein the first contact and the second contact form a forked finger, and the nonlinear gap extends along the forked finger from one peripheral edge of the first contact to the opposite peripheral edge of the first contact.

9. The light-emitting diode chip of claim 8, wherein the first mounting pad and the second mounting pad form corresponding fork-shaped fingers.

10. The light-emitting diode wafer of claim 7, wherein the nonlinear gap is continuously curved between the opposing peripheral edges of the first contact.

11. The light-emitting diode chip of claim 7, wherein the first contact is positioned close to a corner of the active light-emitting diode structure, and the second contact extends close to most of the three peripheral edges of the active light-emitting diode structure.

12. The light-emitting diode chip of claim 7, wherein the nonlinear gap is radially curved around the center of the active light-emitting diode structure.

13. The light-emitting diode wafer of claim 12, wherein the nonlinear gap is radially bent to form a circular shape.

14. The light-emitting diode chip of claim 7, further comprising a first bonding pad and a second bonding pad located on the side of the carrier sub-base opposite to the active light-emitting diode structure, wherein the first bonding pad is formed in a shape symmetrical to the second bonding pad.

15. The light-emitting diode wafer of claim 1, wherein the carrier sub-subbase comprises a plurality of layers, the plurality of layers comprising: a first layer having the first mounting pad and the second mounting pad, the first mounting pad forming at least one anode mounting pad and the second mounting pad forming at least one cathode mounting pad; The second layer has at least one anode interconnect electrically coupled to the at least one anode mounting pad and at least one cathode interconnect electrically coupled to the at least one cathode mounting pad; and a third layer having an anode bonding pad electrically coupled to the at least one anode interconnect and a cathode bonding pad electrically coupled to the at least one cathode interconnect; The first contact includes at least one anode contact electrically coupled between the active light-emitting diode structure and the at least one anode mounting pad; and the second contact includes at least one cathode contact electrically coupled between the active light-emitting diode structure and the at least one cathode mounting pad.

16. The light-emitting diode chip as claimed in claim 15, wherein: The at least one anode mounting pad includes a plurality of anode mounting pads forming a first array throughout the first layer; the at least one anode contact includes a plurality of anode contacts bonded to the plurality of anode mounting pads; the at least one cathode mounting pad includes a plurality of cathode mounting pads forming a second array throughout the first layer; and the at least one cathode contact includes a plurality of cathode contacts bonded to the plurality of cathode mounting pads.

17. The light-emitting diode chip of claim 16, wherein: The at least one anode interconnect forms a continuous structure electrically coupled to each of the plurality of anode mounting pads; and the at least one cathode interconnect forms a continuous structure electrically coupled to each of the plurality of cathode mounting pads.

18. The light-emitting diode chip as claimed in claim 17, wherein: The at least one anode interconnect forms a first plurality of finger extensions; and the at least one cathode interconnect forms a second plurality of finger extensions that intersect with the first plurality of finger extensions.

19. The light-emitting diode wafer of claim 15, wherein the anode bonding pad is formed in a shape symmetrical to the cathode bonding pad.

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