Etching method and plasma processing apparatus
Patent Information
- Application Number
- TW114119470
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-09-03
- Filing Date
- 2020-11-04
- Publication Date
- 2026-10-01
- Estimated Expiration
- 2040-11-03
AI Technical Summary
During plasma etching of silicon-containing films, the mask used to protect the substrate deteriorates, leading to shape degradation due to uneven etching rates in sparse and dense regions.
Forming carbon-phosphorus bonds on the mask surface during plasma etching using a process gas containing halogen elements and phosphorus, which enhances the mask's bonding energy and protects it from deterioration, thereby stabilizing the etching process.
The method effectively protects the mask during plasma etching, reducing the difference in etching amounts between sparse and dense regions, thus preserving the mask's shape and preventing substrate damage.
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Abstract
Description
Technical Field
[0001] The embodiments illustrated in this invention relate to an etching method and a plasma treatment apparatus. Prior Technology
[0002] In the manufacture of electronic devices, plasma etching is performed on a silicon-containing film on a substrate. During the plasma etching of the silicon-containing film, a processing gas containing fluorocarbon gas is used. This type of plasma etching is described in U.S. Patent Application Publication No. 2016 / 0343580. Summary of the Invention
[0003] This invention provides a technique for protecting a substrate during plasma etching containing a silicon film.
[0004] An illustrative embodiment provides an etching method. The etching method includes step (a), namely, preparing a substrate in a chamber of a plasma processing apparatus. The substrate includes a silicon-containing film and a mask. The mask contains carbon. The etching method further includes step (b), namely, etching the silicon-containing film using chemical species derived from plasma generated in the chamber by a process gas. The process gas contains halogen elements and phosphorus. In step (b), carbon-phosphorus bonds are formed on the surface of the mask.
[0005] According to one exemplary embodiment, the substrate can be protected during plasma etching containing a silicon film. Simple Explanation of the Diagram
[0006] Figure 1 is a flowchart of an illustrative embodiment of an etching method. Figure 2 is a partially enlarged cross-sectional view of a substrate to which the etching method shown in Figure 1 can be applied. Figure 3 is a schematic diagram of a plasma processing apparatus according to an exemplary embodiment. Figure 4(a) is a partially enlarged cross-sectional view of a substrate using the etching method shown in Figure 1, and Figure 4(b) is a partially enlarged cross-sectional view of a substrate using plasma generated from phosphorus-free processing gas for etching. Figure 5 is a timing diagram related to an example of an etching method in an exemplary embodiment. Figures 6(a) and 6(b) show the results of XPS (X-ray photoelectron spectroscopy) analysis of the protective film PF, which was formed in an experimental example of etching silicon oxide film and silicon nitride film in step STP. Figure 7 is a timing diagram of another example related to the etching method of one exemplary embodiment. Figure 8 is a top view of another example of a substrate. Figure 9(a) is a cross-sectional view obtained along line IXA-IXA in Figure 8, and Figure 9(b) is a cross-sectional view obtained along line IXB-IXB in Figure 8. Figure 10 is a graph showing the relationship between the flow rate of PF3 gas in the treatment gas and the etching rate of the silicon oxide film, as determined in Experiment 1. Figure 11 is a graph showing the relationship between the flow rate of PF3 gas in the treated gas and the maximum width of the opening formed on the silicon oxide film in the first experiment. Figure 12 is a graph showing the relationship between the flow rate of PF3 gas in the treated gas and the selectivity ratio, as determined in Experiment 1. Figure 13 is a graph showing the relationship between the flow rate of PF3 gas in the treated gas and LER and LWR, as determined in Experiment 2. Figure 14 is a flowchart of another exemplary embodiment of the etching method (method MT2). Figures 15(a), 15(b), and 15(c) are partial enlarged cross-sectional views of the substrates in the state during step ST22 of the application method MT2, the state during step ST23 of the application method MT2, and the state after the application method MT2, respectively. Figure 16 is a flowchart of another exemplary embodiment of the etching method (method MT3). Figures 17(a) and 17(b) are enlarged cross-sectional views of the substrates in the state during step STP3 of the MT3 application method and in the state after the MT3 application method, respectively. Implementation
[0007] The following describes various exemplary embodiments.
[0008] An illustrative embodiment provides an etching method. The etching method includes step (a), namely, preparing a substrate in a chamber of a plasma processing apparatus. The substrate includes a silicon-containing film and a mask. The mask contains carbon. The etching method further includes step (b), namely, etching the silicon-containing film using chemical species derived from plasma generated in the chamber by a process gas. The process gas contains a halogen and phosphorus. In step (b), carbon-phosphorus bonds are formed on the surface of the mask. The halogen may be fluorine.
[0009] In the etching method of the above embodiments, the carbon-phosphorus bonds formed on the mask surface have a higher bonding energy than the carbon-to-carbon bonds in the mask. Therefore, according to the etching method of the above embodiments, the mask is protected during plasma etching of the silicon film. Thus, according to the above embodiments, the substrate can be protected during plasma etching of the silicon film. Furthermore, according to the etching method of the above embodiments, the deterioration of the mask shape during plasma etching of the silicon film is suppressed.
[0010] In one exemplary embodiment, the silicon-containing film may comprise a silicon oxide film. The silicon-containing film may further comprise at least one of a silicon nitride film, a polycrystalline silicon film, a carbon-containing silicon film, and a low dielectric constant film.
[0011] In one exemplary embodiment, the mask may include a portion with a higher proportion of the mask relative to an opening formed by the mask on a silicon-containing film. The portion with a higher proportion of the mask relative to the opening is the densely formed portion of the mask (hereinafter referred to as the "dense region"). The portion with a lower proportion of the mask relative to the opening is the sparsely formed portion of the mask (hereinafter referred to as the "sparse region"). Generally, by plasma etching of the silicon-containing film, the etching amount of the mask in the sparse region is greater than that in the dense region. However, in this embodiment, the mask is protected by carbon and phosphorus bonds formed on its surface. Therefore, the etching amount of the mask in the sparse region is reduced. As a result, the difference between the etching amount of the mask in the sparse region and the etching amount of the mask in the dense region is reduced. Consequently, the degradation of the mask shape having both sparse and dense regions is suppressed.
[0012] In one exemplary embodiment, the etching method may further include step (c), namely, forming a protective film on the sidewall surface that divides the opening, which is formed by etching in step (b). The protective film contains phosphorus contained in the process gas. Steps (b) and (c) may be performed simultaneously. The protective film may also contain phosphorus-oxygen bonds and / or phosphorus-silicon bonds.
[0013] In one exemplary embodiment, the processing gas may include fluorine-containing gas and phosphorus-containing gas.
[0014] In one exemplary embodiment, the processed gas may contain at least one of PF3, PCl3, PF5, PCl5, POCl3, PH3, PBr3 and PBr5 as phosphorus-containing molecules.
[0015] In one exemplary embodiment, the processed gas may further comprise hydrocarbons, hydrofluorocarbons, or fluorocarbons.
[0016] In one exemplary embodiment, a pulse wave including a bias voltage pulse can be periodically applied to the lower electrode within the substrate support of the substrate in step (b). The frequency defining the pulse wave period can be 1 Hz or more and 100 kHz or less. The ratio of the duration of the bias voltage pulse applied to the lower electrode to the duration of the pulse wave period can be 50% or more and 99% or less. The bias voltage can be high-frequency power, and the level of the high-frequency power in the bias voltage pulse can be 2 kW or more.
[0017] In one exemplary embodiment, the substrate temperature may be set to a temperature below 0°C at the beginning of step (b).
[0018] Another exemplary embodiment provides a plasma processing apparatus. The plasma processing apparatus includes a chamber, a substrate support, a gas supply unit, and a plasma generation unit. The substrate support is configured to support a substrate within the chamber. The substrate includes a silicon-containing film and a mask. The mask contains carbon. The gas supply unit is configured to supply a processing gas for etching the silicon-containing film into the chamber. The processing gas contains a halogen element and phosphorus. The plasma generation unit is configured to generate plasma from the processing gas within the chamber, thereby etching the silicon-containing film and forming carbon-phosphorus bonds on the surface of the mask. The halogen element may be fluorine.
[0019] Another exemplary embodiment provides an etching method. The etching method includes step (a1), namely, preparing a substrate. The substrate includes a silicon-containing film and a mask disposed on the silicon-containing film. The etching method further includes step (b1), namely, deactivating the sidewalls in the silicon-containing film that form openings by supplying a phosphorus chemical species to the substrate. The etching method further includes step (c1), namely, etching the silicon-containing film by supplying a halogen chemical species to the substrate.
[0020] In the etching method of the above embodiments, the sidewalls containing the silicon film are deactivated (or passivated) due to phosphorus. That is, the sidewalls are passivated. Therefore, according to the etching method of the above embodiments, the sidewalls are protected during plasma etching of the silicon film to suppress lateral etching of the silicon film. Thus, according to the etching method of the above embodiments, the substrate can be protected during plasma etching of the silicon film.
[0021] In one exemplary embodiment, the mask may contain carbon. In step (b1), carbon-phosphorus bonds may be formed on the surface of the mask.
[0022] In one exemplary embodiment, the silicon-containing film may comprise a silicon oxide film, and in step (b1), phosphorus-oxygen bonds may be formed on the sidewall surface.
[0023] In one exemplary embodiment, steps (b1) and (c1) can be performed simultaneously.
[0024] In one exemplary embodiment, steps (b1) and (c1) may be performed repeatedly.
[0025] In one exemplary embodiment, steps (b1) and (c1) can be performed with the substrate housed in the chamber of the plasma processing apparatus.
[0026] In one exemplary embodiment, phosphorus chemical species can be generated by plasma generating phosphorus-containing gas, and halogen chemical species can be generated by plasma generating halogen-containing gas.
[0027] In one exemplary embodiment, the halogen-containing gas may include a fluorine-containing gas. In one exemplary embodiment, the fluorine-containing gas may include at least one of hydrogen fluoride, iodine fluoride, and fluorocarbon.
[0028] In one exemplary embodiment, the phosphorus-containing gas may also be fluorine-free. In one exemplary embodiment, the phosphorus-containing gas may also contain PCl3 or POCl3.
[0029] Another exemplary embodiment provides a plasma processing apparatus. The plasma processing apparatus includes a chamber, a substrate support, a gas supply unit, a plasma generation unit, and a control unit. The substrate support is configured to support a substrate within the chamber. The substrate includes a silicon-containing film and a mask disposed on the silicon-containing film. The gas supply unit is configured to supply phosphorus-containing gas and halogen-containing gas into the chamber. The plasma generation unit is configured to generate plasma from the gas within the chamber. The control unit is configured to control the gas supply unit and the plasma generation unit. The control unit controls the gas supply unit and the plasma generation unit in such a way that phosphorus-containing gas is supplied to the chamber and plasma is generated from the phosphorus-containing gas, thereby generating phosphorus chemical species that deactivate the sidewalls of the silicon-containing film that form openings. The control unit also controls the gas supply unit and the plasma generation unit in such a way that halogen-containing gas is supplied to the chamber and plasma is generated from the halogen-containing gas, thereby generating halogen chemical species that etch the silicon-containing film.
[0030] Another exemplary embodiment provides an etching method. The etching method includes step (a2), namely, preparing a substrate in a chamber of a plasma processing apparatus. The substrate includes a silicon-containing film. The etching method further includes step (b2), namely, etching the silicon-containing film by means of chemical species derived from plasma generated in the chamber by a process gas. The process gas contains halogen elements and phosphorus.
[0031] According to the above embodiment, a protective film containing silicon and phosphorus contained in the processing gas is formed on the sidewall surface that divides the opening. The opening is formed on the silicon-containing film by etching. The sidewall surface is protected by the protective film while the silicon-containing film is etched. Therefore, lateral etching can be suppressed during plasma etching of the silicon-containing film.
[0032] In one exemplary embodiment, the etching method may further include step (c2), namely, forming a protective film on the sidewall surface that divides the opening, which is formed by etching in step (b2). The protective film contains phosphorus contained in the processing gas. Steps (b2) and (c2) may be performed simultaneously.
[0033] In one exemplary embodiment, the processed gas may contain at least one of PF3, PCl3, PF5, PCl5, POCl3, PH3, PBr3 and PBr5 as phosphorus-containing molecules.
[0034] In one exemplary embodiment, the processing gas may further contain carbon and hydrogen.
[0035] In one exemplary embodiment, the processing gas may contain at least one of H2, HF, CxHy, CsHtFu, and NH3 as hydrogen-containing molecules. Here, x, y, s, t, and u are natural numbers.
[0036] In one exemplary embodiment, the halogen element may be fluorine.
[0037] In one exemplary embodiment, the processing gas may further contain oxygen.
[0038] In one exemplary embodiment, the silicon-containing film may be a silicon-containing dielectric film.
[0039] In one exemplary embodiment, the silicon film may also include at least one of silicon oxide film, silicon nitride film, and silicon film.
[0040] In one exemplary embodiment, the silicon-containing film may also comprise two or more silicon-containing films having different types of films.
[0041] In one exemplary embodiment, two or more silicon-containing films may comprise a silicon oxide film and a silicon nitride film. Alternatively, two or more silicon-containing films may also comprise a silicon oxide film and a silicon film. Alternatively, two or more silicon-containing films may also comprise a silicon oxide film, a silicon nitride film, and a silicon film.
[0042] In one exemplary embodiment, the substrate may further have a mask disposed on a silicon-containing film.
[0043] In one exemplary embodiment, at the start of step (b2), the substrate temperature can be set to a temperature below 0°C.
[0044] Another exemplary embodiment provides a plasma processing apparatus. The plasma processing apparatus includes a chamber, a substrate support, a gas supply unit, and a high-frequency power supply. The substrate support is configured to support a substrate within the chamber. The gas supply unit is configured to supply processing gas for etching a silicon-containing film into the chamber. The processing gas contains halogen elements and phosphorus. The high-frequency power supply is configured to generate high-frequency electricity to generate plasma from the processing gas within the chamber.
[0045] Hereinafter, various exemplary embodiments will be described in detail with reference to the drawings. Furthermore, the same or equivalent parts are labeled with the same symbols in each drawing.
[0046] Figure 1 is a flowchart of an illustrative embodiment of an etching method. The etching method shown in Figure 1 (hereinafter referred to as "Method MT") is applicable to a substrate having a silicon-containing film. Method MT is used to etch a silicon-containing film.
[0047] Figure 2 is a partially enlarged cross-sectional view of a substrate to which the etching method shown in Figure 1 can be applied. The substrate W shown in Figure 2 can be used to manufacture devices such as DRAM (Dynamic Random Access Memory) and 3D (three-dimensional)-NAND (Not AND) devices. The substrate W has a silicon-containing film SF. The substrate W may further have a substrate region UR. The silicon-containing film SF may be disposed on the substrate region UR. The silicon-containing film SF may be a silicon-containing dielectric film. The silicon-containing dielectric film may include a silicon oxide film or a silicon nitride film. As long as the silicon-containing dielectric film is a silicon-containing film, it may also be a film with other film types. Furthermore, the silicon-containing film SF may also contain a silicon film (e.g., a polycrystalline silicon film). Furthermore, the silicon-containing film SF may also contain at least one of a silicon nitride film, a polycrystalline silicon film, a carbon-containing silicon film, and a low dielectric constant film. Carbon-containing silicon films may include SiC films and / or SiOC films. Low-dielectric-constant films contain silicon and can be used as interlayer insulating films. Furthermore, silicon-containing films (SF) may also include two or more silicon-containing films with different film types. The two or more silicon-containing films may include silicon oxide films and silicon nitride films. For example, a silicon-containing film (SF) may also be a multilayer film comprising one or more alternating layers of silicon oxide films and one or more alternating layers of silicon nitride films. Alternatively, two or more silicon-containing films may also include silicon oxide films and silicon films. For example, a silicon-containing film (SF) may also be a multilayer film comprising one or more alternating layers of silicon oxide films and one or more alternating layers of silicon films. The silicon-containing film SF can also be a multilayer film comprising alternating layers of a plurality of silicon oxide films and a plurality of polycrystalline silicon films. Alternatively, two or more silicon-containing films may also comprise silicon oxide films, silicon nitride films, and silicon films.
[0048] The substrate W may further have a mask MK. The mask MK is disposed on a silicon-containing film SF. The mask MK is formed of a material having an etching rate lower than that of the silicon-containing film SF in step ST2. The mask MK may be formed of an organic material. That is, the mask MK may contain carbon. The mask MK may be formed, for example, of an amorphous carbon film, a photoresist film, or a spin-coated carbon film (SOC film). Alternatively, the mask MK may also be formed of a silicon-containing film such as a silicon-containing anti-reflective film. Alternatively, the mask MK may also be a metal-containing mask formed of a metal-containing material such as titanium nitride, tungsten, or tungsten carbide. The mask MK may have a thickness of 3 μm or more.
[0049] The mask MK is patterned. That is, the mask MK has the pattern transferred to the silicon-containing film SF in step ST2. When the pattern of the mask MK is transferred to the silicon-containing film SF, openings (recesses) such as holes or grooves are formed on the silicon-containing film SF. The aspect ratio of the openings formed on the silicon-containing film SF in step ST2 can be 20 or more, or it can be 30 or more, 40 or more, or 50 or more. Furthermore, the mask MK can also have line and gap patterns.
[0050] Method MT uses a plasma treatment apparatus to etch silicon-containing films (SF). Figure 3 is a schematic diagram illustrating an exemplary embodiment of the plasma treatment apparatus. The plasma treatment apparatus 1 shown in Figure 3 includes a chamber 10. An internal space 10s is provided in the chamber 10. The chamber 10 includes a chamber body 12. The chamber body 12 has a generally cylindrical shape. The chamber body 12 is formed, for example, of aluminum. A corrosion-resistant film is provided on the inner wall surface of the chamber body 12. The corrosion-resistant film can be formed of ceramics such as alumina or yttrium oxide.
[0051] A passage 12p is formed on the side wall of the chamber body 12. The substrate W is transported between the internal space 10s and the outside of the chamber 10 through the passage 12p. The passage 12p is opened and closed by a gate valve 12g. The gate valve 12g is disposed along the side wall of the chamber body 12.
[0052] A support portion 13 is provided on the bottom of the chamber body 12. The support portion 13 is formed of an insulating material. The support portion 13 has a generally cylindrical shape. The support portion 13 extends upward from the bottom of the chamber body 12 within the internal space for 10 seconds. The support portion 13 supports a substrate support 14. The substrate support 14 is configured to support the substrate W within the internal space for 10 seconds.
[0053] The substrate support 14 has a lower electrode 18 and an electrostatic chuck 20. The substrate support 14 may further have an electrode plate 16. The electrode plate 16 is formed of a conductor such as aluminum and has a generally disc-shaped form. The lower electrode 18 is disposed on the electrode plate 16. The lower electrode 18 is formed of a conductor such as aluminum and has a generally disc-shaped form. The lower electrode 18 is electrically connected to the electrode plate 16.
[0054] An electrostatic chuck 20 is disposed on the lower electrode 18. A substrate W is placed on the upper surface of the electrostatic chuck 20. The electrostatic chuck 20 has a body and electrodes. The body of the electrostatic chuck 20 has a generally disc-shaped shape and is formed of a dielectric material. The electrodes of the electrostatic chuck 20 are film electrodes disposed within the body of the electrostatic chuck 20. The electrodes of the electrostatic chuck 20 are connected to a DC power supply 20p via a switch 20s. When a voltage from the DC power supply 20p is applied to the electrodes of the electrostatic chuck 20, an electrostatic attraction is generated between the electrostatic chuck 20 and the substrate W. The substrate W is attracted by the electrostatic chuck 20 and held by it by this electrostatic attraction.
[0055] An edge ring 25 is disposed on the substrate support 14. The edge ring 25 is a ring-shaped member. The edge ring 25 may be formed of silicon, silicon carbide, or quartz, etc. The substrate W is disposed on the electrostatic chuck 20 and within the area surrounded by the edge ring 25.
[0056] A flow path 18f is provided inside the lower electrode 18. A heat exchange medium (e.g., refrigerant) is supplied to the flow path 18f from a cooler unit located outside the chamber 10 via piping 22a. The heat exchange medium supplied to the flow path 18f returns to the cooler unit via piping 22b. In the plasma processing apparatus 1, the temperature of the substrate W placed on the electrostatic chuck 20 is adjusted by heat exchange between the heat exchange medium and the lower electrode 18.
[0057] A gas supply line 24 is provided in the plasma processing apparatus 1. The gas supply line 24 supplies heat transfer gas (e.g., He gas) from the heat transfer gas supply mechanism to the gap between the upper surface of the electrostatic chuck 20 and the back surface of the substrate W.
[0058] The plasma processing apparatus 1 further includes an upper electrode 30. The upper electrode 30 is disposed above the substrate support 14. The upper electrode 30 is supported on the upper part of the chamber body 12 via a member 32. The member 32 is formed of an insulating material. The upper electrode 30 and the member 32 close the upper opening of the chamber body 12.
[0059] The upper electrode 30 may include a top plate 34 and a support 36. The lower surface of the top plate 34 is the lower surface of one side of the internal space 10s, dividing and forming the internal space 10s. The top plate 34 may be formed of a low-resistance conductor or semiconductor that generates less Joule heating. The top plate 34 has a plurality of gas ejection holes 34a extending through the top plate 34 in the thickness direction of the top plate 34.
[0060] The support body 36 detachably supports the top plate 34. The support body 36 is formed of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support body 36. The support body 36 has a plurality of gas holes 36b extending downward from the gas diffusion chamber 36a. The plurality of gas holes 36b are respectively connected to a plurality of gas ejection holes 34a. A gas inlet 36c is formed in the support body 36. The gas inlet 36c is connected to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas inlet 36c.
[0061] A gas source group 40 is connected to the gas supply pipe 38 via a flow controller group 41 and a valve group 42. The flow controller group 41 and the valve group 42 constitute a gas supply unit. The gas supply unit may further include the gas source group 40. The gas source group 40 includes a plurality of gas sources. The plurality of gas sources include the supply source of the process gas used in method MT. The flow controller group 41 includes a plurality of flow controllers. The plurality of flow controllers in the flow controller group 41 are either mass flow controllers or pressure-controlled flow controllers. The valve group 42 includes a plurality of on / off valves. The plurality of gas sources in the gas source group 40 are respectively connected to the gas supply pipe 38 via the corresponding flow controllers of the flow controller group 41 and the corresponding on / off valves of the valve group 42.
[0062] In the plasma treatment apparatus 1, a protective cover 46 is detachably mounted along the inner wall of the chamber body 12 and the outer periphery of the support portion 13. The protective cover 46 prevents reaction byproducts from adhering to the chamber body 12. The protective cover 46 is constructed, for example, by forming a corrosion-resistant film on the surface of a base material formed of aluminum. The corrosion-resistant film can be formed of ceramics such as yttrium oxide.
[0063] A partition 48 is provided between the support section 13 and the side wall of the chamber body 12. The partition 48 is constructed, for example, by forming a corrosion-resistant film (such as yttrium oxide) on the surface of a component made of aluminum. A plurality of through holes are formed in the partition 48. An exhaust port 12e is provided below the partition 48 and at the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 includes a pressure regulating valve and a vacuum pump such as a turbomolecular pump.
[0064] The plasma processing apparatus 1 includes a high-frequency power supply 62 and a bias power supply 64. The high-frequency power supply 62 generates high-frequency electricity (HF). The high-frequency electricity (HF) has a first frequency suitable for plasma generation. The first frequency is, for example, a frequency in the range of 27 MHz to 100 MHz. The high-frequency power supply 62 is connected to the lower electrode 18 via a matching device 66 and an electrode plate 16. The matching device 66 has a circuit for matching the impedance of the load side (lower electrode 18 side) of the high-frequency power supply 62 with the output impedance of the high-frequency power supply 62. Furthermore, the high-frequency power supply 62 can also be connected to the upper electrode 30 via the matching device 66. The high-frequency power supply 62 constitutes an example of a plasma generation unit.
[0065] The bias power supply 64 is a power supply that generates an electrical bias voltage. The bias power supply 64 is electrically connected to the lower electrode 18. The electrical bias voltage has a second frequency. The second frequency is lower than the first frequency. The second frequency is, for example, a frequency in the range of 400 kHz to 13.56 MHz. When used in conjunction with high-frequency power (HF), the electrical bias voltage is applied to the lower electrode 18 to feed ions into the substrate W. When an electrical bias voltage is applied to the lower electrode 18, the potential of the substrate W placed on the substrate support 14 varies within a period defined by the second frequency.
[0066] In one embodiment, the electrical bias can also be a high-frequency power LF having a second frequency. When the high-frequency power LF is used together with the high-frequency power HF, it is used as a high-frequency bias power for feeding ions into the substrate W. The bias power supply 64 configured to generate the high-frequency power LF is connected to the lower electrode 18 via a matching device 68 and an electrode plate 16. The matching device 68 has circuitry for matching the impedance of the load side (lower electrode 18 side) of the bias power supply 64 with the output impedance of the bias power supply 64.
[0067] Furthermore, plasma can also be generated using high-frequency power LF instead of high-frequency power HF, that is, plasma can be generated using only a single high-frequency power source. In this case, the frequency of the high-frequency power LF can also be greater than 13.56 MHz, for example, 40 MHz. Also, in this case, the plasma processing apparatus 1 may not include the high-frequency power supply 62 and the matching device 66. In this case, the bias power supply 64 constitutes one example of the plasma generation unit.
[0068] In another embodiment, the bias voltage can also be a pulse wave of DC voltage. The DC voltage pulse wave is generated periodically and applied to the lower electrode 18. The period of the DC voltage pulse wave is defined by a second frequency. The period of the DC voltage pulse wave includes two periods. The DC voltage in one of the two periods is a negative DC voltage. The level (i.e., absolute value) of the DC voltage in one of the two periods is higher than the level (i.e., absolute value) of the DC voltage in the other period. The DC voltage in the other period can be either negative or positive. The level of the DC voltage in the other period can also be zero. In this embodiment, the bias power supply 64 is connected to the lower electrode 18 via a low-pass filter and electrode plate 16.
[0069] In one embodiment, the bias power supply 64 can also apply a continuous wave of electrical bias to the lower electrode 18. That is, the bias power supply 64 can also continuously apply electrical bias to the lower electrode 18. The continuous wave of electrical bias can be applied to the lower electrode 18 during step STP or steps ST2 and ST3 of the execution method MT.
[0070] In another embodiment, the bias power supply 64 may also apply a bias voltage pulse wave to the lower electrode 18. The bias voltage pulse wave may be applied to the lower electrode 18 periodically. The period of the bias voltage pulse wave is defined by a third frequency. The third frequency is lower than the second frequency. The third frequency is, for example, 1 Hz to 200 kHz. In another example, the third frequency may also be 5 Hz to 100 kHz.
[0071] The period of the bias voltage pulse wave includes two periods: the H period and the L period. The bias voltage level during the H period (i.e., the level of the bias voltage pulse) is higher than the bias voltage level during the L period. That is, the bias voltage pulse wave can be applied to the lower electrode 18 by increasing or decreasing the bias voltage level. The bias voltage level during the L period can also be greater than zero. Alternatively, the bias voltage level during the L period can be zero. That is, the bias voltage pulse wave can be applied to the lower electrode 18 by alternately switching the supply of bias voltage to and from the supply of bias voltage. Here, when the bias voltage is a high-frequency power LF, the bias voltage level is the power level of the high-frequency power LF. When the bias voltage is a high-frequency power LF, the high-frequency power LF level in the bias voltage pulse can be 2 kW or higher. When the bias voltage is a pulse wave of a negative DC voltage, the bias voltage level is the effective value of the absolute value of the negative DC voltage. The duty cycle of the bias voltage pulse wave, i.e., the ratio of period H to the period of the bias voltage pulse wave, is, for example, 1% to 80%. In another example, the duty cycle of the bias voltage pulse wave may be 5% to 50%. Alternatively, the duty cycle of the bias voltage pulse wave may be 50% to 99%. The bias voltage pulse wave can be applied to the lower electrode 18 to execute steps ST2 and ST3 of method MT.
[0072] In one embodiment, the high-frequency power supply 62 can also supply a continuous wave of high-frequency power HF. That is, the high-frequency power supply 62 can also continuously supply high-frequency power HF. The continuous wave of high-frequency power HF can be supplied during step STP or steps ST2 and ST3 of the execution method MT.
[0073] In another embodiment, the high-frequency power supply 62 can also supply a pulse wave of high-frequency power (HF). The pulse wave of high-frequency power (HF) can be supplied periodically. The period of the pulse wave of high-frequency power (HF) is defined by a fourth frequency. The fourth frequency is lower than the second frequency. In one embodiment, the fourth frequency is the same as the third frequency. The period of the pulse wave of high-frequency power (HF) includes two periods, namely the H period and the L period. The power level of high-frequency power (HF) during the H period is higher than the power level of high-frequency power (HF) during the L period. The power level of high-frequency power (HF) during the L period can be greater than zero or zero.
[0074] Furthermore, the period of the high-frequency (HF) power pulse wave can be synchronized with the period of the bias voltage pulse wave. The H-period within the period of the HF power pulse wave can also be synchronized with the H-period within the period of the bias voltage pulse wave. Alternatively, the H-period within the period of the HF power pulse wave may not be synchronized with the H-period within the period of the bias voltage pulse wave. The duration of the H-period within the period of the HF power pulse wave can be the same as or different from the duration of the H-period within the period of the bias voltage pulse wave.
[0075] During plasma treatment in the plasma treatment apparatus 1, gas is supplied from the gas supply unit to the internal space for 10 seconds. Furthermore, a high-frequency electric field is generated between the upper electrode 30 and the lower electrode 18 by supplying high-frequency power HF and / or a bias voltage. The generated high-frequency electric field causes the gas in the internal space to generate plasma within 10 seconds.
[0076] The plasma processing apparatus 1 may further include a control unit 80. The control unit 80 may be a computer equipped with a processor, memory, an input device, a display device, and a signal input / output interface. The control unit 80 controls each component of the plasma processing apparatus 1. Within the control unit 80, the operator can use the input device to input commands and manage the plasma processing apparatus 1. Furthermore, the control unit 80 can visualize the operating status of the plasma processing apparatus 1 via the display device. The memory unit stores control programs and process recipe data. The processor executes the control program to perform various processes within the plasma processing apparatus 1. The processor executes the control program to control each component of the plasma processing apparatus 1 according to the process recipe data.
[0077] Referring again to Figure 1. Hereinafter, the method MT will be described using an example of applying the method MT to the substrate W shown in Figure 2 using a plasma processing apparatus 1. When using the plasma processing apparatus 1, the method MT can be executed within the plasma processing apparatus 1 by controlling each part of the plasma processing apparatus 1 through the control unit 80. In the following description, the control unit 80's control over each part of the plasma processing apparatus 1 for executing the method MT will also be explained.
[0078] In the following description, in addition to referring to FIG1, FIG4(a), FIG4(b) and FIG5 are also referred to. FIG4(a) is a partially enlarged cross-sectional view of a substrate using an example of the etching method shown in FIG1, and FIG4(b) is a partially enlarged cross-sectional view of a substrate using an example of etching with plasma generated from phosphorus-free processing gas. FIG5 is a timing diagram related to an example of the etching method of an exemplary embodiment. In FIG5, the horizontal axis represents time. In FIG5, the vertical axis represents the power level of high-frequency power HF, the level of bias voltage, and the supply status of processing gas. The "L" level of high-frequency power HF indicates that high-frequency power HF is not supplied, or the power level of high-frequency power HF is lower than the power level shown in "H". The "L" level of bias voltage indicates that no bias voltage is applied to the lower electrode 18, or the level of bias voltage is lower than the level shown in "H". Furthermore, the "ON" state of the processing gas supply status indicates that processing gas is being supplied to chamber 10, while the "OFF" state of the processing gas supply status indicates that the supply of processing gas to chamber 10 has stopped.
[0079] As shown in Figure 1, method MT begins with step ST1. Step ST1 involves preparing the substrate W within chamber 10. The substrate W is placed on and held by the electrostatic chuck 20 within chamber 10. Furthermore, the substrate W may have a diameter of 300 mm.
[0080] In method MT, step STP is then performed. Step STP involves performing plasma treatment on the substrate W. In step STP, plasma is generated from processing gas within chamber 10. Method MT includes step ST2. Step ST2 is performed during the execution of step STP. Method MT may further include step ST3. Step ST3 is performed during the execution of step STP. Steps ST2 and ST3 may be performed simultaneously or independently.
[0081] Step ST2 involves etching the silicon-containing film SF using chemical species derived from the plasma generated by the processing gas within chamber 10 in step STP. Step ST3 involves forming a protective film PF on the substrate W using chemical species derived from the plasma generated by the processing gas within chamber 10 in step STP. The protective film PF is formed on the sidewall surface with a defined opening in the silicon-containing film SF.
[0082] The processing gas used in step STP contains halogens and phosphorus. The halogen in the processing gas may be fluorine. That is, the processing gas may contain fluorine-containing gases. The processing gas may contain at least one halogen-containing molecule. The processing gas may contain at least one of fluorocarbons and hydrofluorocarbons as at least one halogen-containing molecule. Fluorocarbons are, for example, at least one of CF4, C2F6, C3F6, C3F8, C4F6, C4F8, C5F8, etc. Hydrofluorocarbons are, for example, at least one of CH2F2, CHF3, CH3F, etc.
[0083] The process gas may contain at least one phosphorus-containing molecule. That is, the process gas may contain at least one phosphorus-containing gas. The phosphorus-containing gas may also be a gas containing both phosphorus and a halogen. The phosphorus-containing molecule may be an oxide such as tetraphosphorus decaoxide (P4O10), tetraphosphorus octaoxide (P4O8), or tetraphosphorus hexaoxide (P4O6). Tetraphosphorus decaoxide is sometimes called phosphorus pentoxide (P2O5). The phosphorus-containing molecule may also be a molecule containing both phosphorus and a halogen. The phosphorus-containing molecule may be a halide such as phosphorus trifluoride (PF3), phosphorus pentafluoride (PF5), phosphorus trichloride (PCl3), phosphorus pentachloride (PCl5), phosphorus tribromide (PBr3), phosphorus pentabromide (PBr5), or phosphorus iodide (PI3). The phosphorus-containing molecule may also be a phosphatidylhalogen such as phosphatidylfluoride (POF3), phosphatidylchloride (POCl3), or phosphatidylbromine (POBr3). Phosphorus-containing molecules can also be phosphine (PH3), calcium phosphide (Ca3P2, etc.), phosphoric acid (H3PO4), sodium phosphate (Na3PO4), hexafluorophosphate (HPF6), etc. Phosphorus-containing molecules can also be fluorinated phosphine (HxPFy). Here, the sum of x and y is 3 or 5. Examples of fluorinated phosphine include HPF2 and H2PF3. The processing gas can contain one or more of the above-mentioned phosphorus-containing molecules as at least one phosphorus-containing molecule. For example, the processing gas can contain at least one of PF3, PCl3, PF5, PCl5, POCl3, PH3, PBr3, and PBr5 as at least one phosphorus-containing molecule. Furthermore, when the phosphorus-containing molecules contained in the processing gas are liquid or solid, they can be vaporized by heating or the like and then supplied to chamber 10.
[0084] The processing gas used in step ST2 may further contain carbon and hydrogen. The processing gas may contain at least one of H2, hydrogen fluoride (HF), hydrocarbons (CxHy), hydrofluorocarbons (CsHtFu), and NH3 as hydrogen-containing molecules. Hydrocarbons may be, for example, CH4 or C3H6. The processing gas may contain at least one of the above-mentioned hydrocarbons, the above-mentioned hydrofluorocarbons, and fluorocarbons (CvFw) as carbon-containing molecules. Here, x, y, s, t, u, v, and w are natural numbers. The processing gas may further contain oxygen. The processing gas may also contain oxygen-containing gases, such as O2. Alternatively, the processing gas may not contain oxygen.
[0085] In one embodiment, the processing gas may comprise a first gas and a second gas. The first gas system is a phosphorus-free gas. The first gas may contain halogen elements. The first gas may contain at least one of the aforementioned halogen-containing molecules. The first gas may further contain carbon and hydrogen. The first gas may further contain the aforementioned hydrogen-containing molecules and / or carbon-containing molecules. The first gas may further contain oxygen. The first gas may also contain O2 gas. Alternatively, the first gas may not contain oxygen. The second gas system contains phosphorus. The second gas may also contain at least one of the aforementioned phosphorus-containing molecules.
[0086] In the process gas used in step STP, the flow rate ratio of the second gas to the first gas can be set to be greater than 0 and less than 0.5. The flow rate ratio can be set to be between 0.075 and 0.3. Alternatively, the flow rate ratio can be set to between 0.1 and 0.25.
[0087] In step STP, the gas pressure inside chamber 10 is set to a specified pressure. In step STP, the gas pressure inside chamber 10 can be set to a pressure between 10 mTorr (1.3 Pa) and 100 mTorr (13.3 Pa). Furthermore, in step STP, high-frequency power (HF) is supplied to generate plasma from the processing gas inside chamber 10. As shown by the solid line in Figure 5, a continuous wave of high-frequency power (HF) can also be supplied in step STP. In step STP, high-frequency power (LF) can also be used instead of high-frequency power (HF). In step STP, both high-frequency power (HF) and a bias voltage can be supplied. As shown by the solid line in Figure 5, a continuous wave of bias voltage can also be applied to the lower electrode 18 in step STP. The power level of high-frequency power (HF) can be set to a level between 2 kW and 10 kW. The level of high-frequency power (LF) can be set to a level of 2 kW or higher (the power level per unit area of substrate W is 2.83 W / cm²). The level of the high-frequency power LF can also be set to a level of 10 kW or higher (the power level per unit area of the substrate W is 14.2 W / cm2).
[0088] The control unit 80 controls the gas supply unit to supply processing gas into the chamber 10, thereby executing step STP. Furthermore, the control unit 80 controls the exhaust device 50 to set the gas pressure within the chamber 10 to a specified pressure. Also, the control unit 80 controls the plasma generation unit to generate plasma from the processing gas. In the plasma processing apparatus 1, the control unit 80 controls the high-frequency power supply 62 and the bias power supply 64 to supply high-frequency power HF, high-frequency power LF, or high-frequency power HF and a bias voltage.
[0089] In one embodiment of the method MT, the temperature of the substrate W at the start of step ST2 (or step STP) can be set to a temperature below 0°C. If the temperature of the substrate W is set to this temperature, the etching rate of the silicon-containing film SF in step ST2 becomes higher. The control unit 80 can control the cooler unit to set the temperature of the substrate W at the start of step ST2. Furthermore, the temperature of the substrate W during the execution of step ST2 (or step STP) can be a temperature below 200°C.
[0090] In one embodiment, method MT may further include step STT. Step STT is performed before step ST2 (or step STP). The temperature of substrate W is set to a temperature below 0°C in step STT. The temperature of substrate W at the start of step ST2 is set in step STT. Control unit 80 can control the cooler unit to set the temperature of substrate W in step STT.
[0091] Step ST2 involves etching the silicon-containing film SF using halogenated chemical species from the plasma generated from the process gas. In one embodiment, the portion of the entire region of the silicon-containing film SF exposed from the mask MK is etched (see Figure 4(a)).
[0092] When the processing gas contains phosphorus-containing molecules such as PF3 containing phosphorus and halogens, the halogen chemical species derived from these molecules are beneficial to the etching of silicon-containing SF films. Therefore, phosphorus-containing molecules such as PF3 containing phosphorus and halogens can increase the etching rate of silicon-containing SF films in step ST2.
[0093] Furthermore, when the mask MK contains carbon, carbon-phosphorus bonds are formed on the mask surface in step ST2. The carbon-phosphorus bonds formed on the mask MK surface have a higher bonding energy than the carbon-to-carbon bonds in the mask MK. Therefore, according to method MT, the mask MK is protected during plasma etching of the silicon film SF. Furthermore, during plasma etching of the silicon film SF, the deterioration of the mask MK shape is suppressed. Thus, according to method MT, the substrate can be protected during plasma etching of the film.
[0094] In one embodiment, as shown in FIG1, method MT may further include step ST3. Step ST3 involves forming a protective film PF on the sidewall surface that divides the opening, which is formed in the silicon-containing film SF by etching in step ST2 (see FIG4(a)). The protective film PF is formed by chemical species derived from the plasma generated by the processing gas in chamber 10 during step STP. In one embodiment, step ST3 may be performed simultaneously with step ST2. As shown in FIG4(a), in one embodiment, the protective film PF may also be formed such that its thickness decreases along the depth direction of the opening formed in the silicon-containing film SF.
[0095] The protective film PF contains silicon and phosphorus contained in the processing gas used in step STP. In one embodiment, the protective film PF may further contain carbon and / or hydrogen contained in the processing gas. In another embodiment, the protective film PF may further contain oxygen contained in the processing gas or in the silicon-containing film SF. In yet another embodiment, the protective film PF may also contain phosphorus-oxygen bonds.
[0096] Figures 6(a) and 6(b) show the results of XPS analysis of the protective film PF, which was formed in an experimental example where silicon oxide and silicon nitride films were etched in step STP. The P2p spectra are shown in Figures 6(a) and 6(b). The conditions for step STP in the experimental example are as follows. <Conditions for Step STP> Gas pressure in chamber 10: 100 mTorr (13.33 Pa) Gases processed: PF3 gas at 50 sccm and Ar gas at 150 sccm High-frequency power HF (continuous wave): 40 MHz, 4500 W High-frequency power LF (continuous wave): 400 kHz, 7000 W Substrate temperature (temperature of the substrate support before etching begins): -70℃ Execution time of step STP: 30 seconds
[0097] Based on the experimental example of etching the silicon oxide film in step STP, the XPS analysis results of the protective film PF are shown in Figure 6(a), where Si-O bond peaks and PO bond peaks are observed. Also, based on the experimental example of etching the silicon nitride film in step STP, the XPS analysis results of the protective film PF are shown in Figure 6(b), where Si-P bond peaks and PN bond peaks are observed.
[0098] If the processing gas does not contain phosphorus, then as shown in Figure 4(b), the silicon-containing film SF is also etched laterally. As a result, the width of the opening formed in the silicon-containing film SF becomes locally wider. For example, the width of the opening formed in the silicon-containing film SF becomes locally wider near the mask MK.
[0099] On the other hand, in method MT, a protective film PF is formed on the sidewall surface that divides the opening, and the opening is formed on the silicon-containing film SF by etching. The sidewall surface is protected by the protective film PF while the silicon-containing film SF is etched. Therefore, according to method MT, lateral etching can be suppressed during plasma etching of the silicon-containing film SF.
[0100] In one embodiment, during the continued execution of step STP, i.e., during the generation of plasma from the processing gas in step STP, one or more cycles comprising steps ST2 and ST3 may be executed sequentially. Two or more cycles may also be executed sequentially during step STP.
[0101] In one embodiment, as shown by the dashed line in FIG5, the aforementioned electrical bias pulse wave can be applied from the bias power supply 64 to the lower electrode 18 in step STP. That is, when plasma generated by the processing gas is present in the chamber 10, the electrical bias pulse wave can be applied from the bias power supply 64 to the lower electrode 18. In this embodiment, the etching of the silicon-containing film SF in step ST2 is mainly performed during the H period within the period of the electrical bias pulse wave. Furthermore, the formation of the protective film PF in step ST3 is mainly performed during the L period within the period of the electrical bias pulse wave.
[0102] Furthermore, when the bias voltage is a high-frequency power LF, the power level of the high-frequency power LF can be set to a level of 2 kW or higher during the H period of the bias voltage pulse wave. During the H period of the bias voltage pulse wave, the power level of the high-frequency power LF can be set to a level of 10 kW or higher.
[0103] In one embodiment, as shown by the dashed line in FIG5, the aforementioned high-frequency power HF pulse wave can also be supplied in step STP. During the H period within the period of the high-frequency power HF pulse wave, the power level of the high-frequency power HF can be set to a level between 1 kW and 10 kW. As shown in FIG5, the period of the high-frequency power HF pulse wave can be synchronized with the period of the bias voltage pulse wave. As shown in FIG5, the H period within the period of the high-frequency power HF pulse wave can be synchronized with the H period within the period of the bias voltage pulse wave. Alternatively, the H period within the period of the high-frequency power HF pulse wave may not be synchronized with the H period within the period of the bias voltage pulse wave. The duration of the H period within the period of the high-frequency power HF pulse wave and the duration of the H period within the period of the bias voltage pulse wave can be the same or different.
[0104] Figure 7 is a timing diagram of another example related to the etching method of an exemplary embodiment. In Figure 7, the horizontal axis represents time. In Figure 7, the vertical axis represents the power level of the high-frequency power HF, the level of the bias voltage, the supply state of the first gas, and the supply state of the second gas. The "L" level of the high-frequency power HF indicates that the high-frequency power HF is not supplied, or the power level of the high-frequency power HF is lower than the power level shown in "H". The "L" level of the bias voltage indicates that the bias voltage is not applied to the lower electrode 18, or the level of the bias voltage is lower than the level shown in "H". Furthermore, the "ON" state of the first gas supply indicates that the first gas is being supplied to the chamber 10, and the "OFF" state of the first gas supply indicates that the first gas has been stopped from being supplied to the chamber 10. Similarly, the "ON" state of the second gas supply indicates that the second gas is being supplied to the chamber 10, and the "OFF" state of the second gas supply indicates that the second gas has been stopped from being supplied to the chamber 10.
[0105] As shown in Figure 7, in step STP, the first gas and the second gas can be supplied to the chamber 10 alternately. The etching of the silicon-containing film SF in step ST2 is mainly carried out during the supply of the first gas to the chamber 10. Furthermore, the formation of the protective film PF in step ST3 is mainly carried out during the supply of the second gas to the chamber 10.
[0106] As shown by the solid line in Figure 7, a continuous wave of high-frequency power (HF) can also be supplied in step STP. Alternatively, a pulse wave of high-frequency power (HF) can be supplied in step STP in the same manner as the pulse wave of high-frequency power (HF) shown in Figure 5. The pulse wave of high-frequency power (HF) is represented by the dashed line in Figure 7. The H period within the period of the pulse wave of high-frequency power (HF) is synchronized with or partially repeats the period of supplying the first gas into chamber 10. Furthermore, the L period within the period of the pulse wave of high-frequency power (HF) is synchronized with or partially repeats the period of supplying the second gas into chamber 10.
[0107] Furthermore, as shown by the solid line in Figure 7, a continuous bias voltage wave can also be applied to the lower electrode 18 in step STP. Alternatively, a bias voltage pulse wave can be applied to the lower electrode 18 in step STP in the same manner as the bias voltage pulse wave shown in Figure 5. The bias voltage pulse wave is represented by the dashed line in Figure 7. The H period within the period of the bias voltage pulse wave is synchronized with or partially repeats the period of supplying the first gas into the chamber 10. Furthermore, the L period within the period of the bias voltage pulse wave is synchronized with or partially repeats the period of supplying the second gas into the chamber 10.
[0108] Hereinafter, refer to Figures 8, 9(a), and 9(b). Figure 8 is a top view of a substrate of another example. Figure 9(a) is a cross-sectional view taken along line IXA-IXA of Figure 8, and Figure 9(b) is a cross-sectional view taken along line IXB-IXB of Figure 8. The substrate of the application method MT may have a mask MK of substrate W as shown in Figures 8, 9(a), and 9(b). That is, the mask of the substrate of the application method MT may include a portion with a higher ratio relative to the opening and a portion with a lower ratio, the opening being formed by the mask on the silicon-containing film SF.
[0109] The substrate W shown in Figures 8, 9(a), and 9(b) contains a carbon mask MK. The mask MK is formed, for example, from an amorphous carbon film, a photoresist film, or a spin-coated carbon film (SOC film).
[0110] In the substrate W shown in Figures 8, 9(a), and 9(b), a mask MK is divided to form a plurality of openings OP. The mask MK includes a portion MKA with a higher percentage relative to the openings OP and a portion MKB with a lower percentage. These openings are formed on the silicon-containing film SF by the mask MK. The portion MKA with a higher percentage relative to the openings OP is the densely formed portion of the mask MK, i.e., the dense region. The portion MKB with a lower percentage relative to the openings OP is the sparsely formed portion of the mask MK, i.e., the sparse region. Furthermore, this "percentage" refers to the area ratio of the mask MK per unit area within the plane of the silicon-containing film SF, or the length ratio of the mask MK per unit length within the plane of the silicon-containing film SF.
[0111] As shown in Figure 8, the plurality of openings OP can each have a rectangular planar shape. Alternatively, the plurality of openings OP can also each have other planar shapes such as circles or ellipses. As shown in Figure 8, the plurality of openings OP can also be arranged in a two-dimensional manner, providing a plurality of column openings OP and a plurality of row openings OP. In the substrate W shown in Figures 8, 9(a), and 9(b), part of MKA contains a mask MK pattern in one of the column and row directions of the above arrangement, and part of MKB contains a mask MK pattern in the other direction.
[0112] Generally, by plasma etching with a silicon-containing film SF, the etching amount of the mask MK in the sparse region is greater than that in the dense region. In the substrate W shown in Figures 8, 9(a), and 9(b), if the etching amount of the mask MK in the sparse region is greater than that in the dense region, the shape of the line LN will be deformed due to the internal stress of the mask MK. If the shape of the line LN is deformed, the LER (Line Edge Roughness) and LWR (Line Width Roughness) of the line LN will increase. However, in method MT, a bond is formed between the carbon of the mask MK and the phosphorus derived from the plasma generated in step STP on the surface of the mask MK. The carbon-phosphorus bond formed on the surface of the mask MK has a higher bonding energy than the carbon-to-carbon bond in the mask MK. Therefore, in method MT, the carbon and phosphorus bonds formed on the surface of the mask MK protect the mask MK during the etching of the silicon-containing film SF in step ST2. Thus, according to method MT, the substrate W can be protected during plasma etching of the silicon-containing film SF. Furthermore, the carbon and phosphorus bonds formed on the surface of the mask MK reduce the etching amount of the mask MK in sparse regions. As a result, the difference between the etching amount of the mask MK in sparse regions and the etching amount of the mask MK in dense regions is reduced. Consequently, the deterioration of the shape of the mask MK having both sparse and dense regions is suppressed.
[0113] The first experiment used to evaluate method MT will be described below. In the first experiment, a plurality of sample substrates having the same structure as the substrate W shown in FIG2 were prepared. Each of the plurality of sample substrates has a silicon oxide film and a mask disposed on the silicon oxide film. The mask is a mask formed of an amorphous carbon film. In the first experiment, step STP of method MT was applied to the plurality of sample substrates. The processing gas used for each of the plurality of sample substrates contained PF3 gas with different flow rates. Other conditions in step STP are as follows. Furthermore, the flow rates of PF3 gas are 0 sccm, 15 sccm, 30 sccm, 50 sccm, and 100 sccm, respectively. That is, in the first experiment, the flow rate ratio of the second gas to the flow rate of the first gas, i.e., the flow rate ratio, is 0, 0.075, 0.15, 0.25, and 0.5, respectively. <Conditions for Step STP> Gas pressure within chamber 10: 25 mTorr (3.3 Pa) Gases processed: CH4 at 50 sccm, CF4 at 100 sccm, and O2 at 50 sccm High-frequency power HF (continuous wave): 40 MHz, 4500 W High-frequency power LF (continuous wave): 400 kHz, 7000 W Sample substrate temperature (substrate support temperature before etching begins): -30℃ Execution time of step STP: 600 seconds
[0114] In Experiment 1, for each of several sample substrates, the etching rate of the silicon oxide film, the maximum width of the opening formed in the silicon oxide film, and the selectivity were determined. The selectivity is the value obtained by dividing the etching rate of the silicon oxide film by the etching rate of the mask. In Experiment 1, the relationship between the flow rate of PF3 gas in the processing gas used in the STP step and the etching rate of the silicon oxide film was determined. Furthermore, the relationship between the flow rate of PF3 gas in the processing gas used in the STP step and the maximum width of the opening formed in the silicon oxide film was determined. Furthermore, the relationship between the flow rate of PF3 gas in the processing gas used in the STP step and the selectivity was determined. Figure 10 shows the relationship between the flow rate of PF3 gas in the processing gas and the etching rate of the silicon oxide film. Figure 11 shows the relationship between the flow rate of PF3 gas in the processing gas and the maximum width of the opening formed in the silicon oxide film. Figure 12 shows the relationship between the flow rate of PF3 gas in the processing gas and the selectivity.
[0115] As shown in Figures 10 and 12, it can be confirmed that when the processing gas contains phosphorus, i.e., when the flow rate ratio of the second gas to the first gas is greater than 0, the etching rate and selectivity of the silicon oxide film become higher. Furthermore, as shown in Figure 12, it can be confirmed that a considerably high selectivity can be obtained when the flow rate of PF3 gas in the processing gas is 15 sccm or more, 60 sccm or less, or 50 sccm or less. That is, it can be confirmed that a considerably high selectivity can be obtained when the flow rate ratio is 0.075 or more and 0.3 or less or 0.25 or less. Also, as shown in Figure 10, it can be confirmed that when the flow rate of PF3 gas in the processing gas is 20 sccm or more, i.e., when the flow rate ratio is 0.1 or more, the etching rate is approximately 1.5 times higher than that without PF3.
[0116] Furthermore, as shown in Figure 11, it can be confirmed that when the processed gas contains phosphorus, the maximum width of the opening of the silicon oxide film decreases, that is, the local widening of the opening width of the silicon oxide film can be suppressed. It can be confirmed that, especially when the flow rate of PF3 gas in the processed gas is 50 sccm or more, the local widening of the opening width of the silicon oxide film can be suppressed more significantly.
[0117] The second experiment used to evaluate method MT will now be described. In the second experiment, a plurality of sample substrates with the same structure as the substrate W shown in Figures 8, 9(a), and 9(b) were prepared. Each sample substrate had a silicon oxide film and a mask disposed on the silicon oxide film. The mask was formed of an amorphous carbon film. In the second experiment, step STP of method MT was applied to the plurality of sample substrates. The processing gas used for each of the plurality of sample substrates contained PF3 gas with different flow rates. The other conditions of step STP in the second experiment were the same as those of step STP in the first experiment.
[0118] In Experiment 2, the LER and LWR of the line LN of the mask MK on the substrate W after applying the STP step were determined. Figure 13 shows the relationship between the flow rate of PF3 gas in the processing gas and LER and LWR, which were determined in Experiment 2. As shown in Figure 13, it can be confirmed that as the flow rate of PF3 gas in the processing gas increases, LER and LWR decrease. That is, it can be confirmed that as the flow rate of PF3 gas in the processing gas increases, the deterioration of the mask MK shape is reduced.
[0119] The etching method of another exemplary embodiment will now be described. Referring to Figures 14, 15(a), 15(b), and 15(c), Figure 14 is a flowchart of the etching method of another exemplary embodiment (hereinafter referred to as "method MT2"). Figures 15(a), 15(b), and 15(c) are partially enlarged cross-sectional views of a substrate in the state when applying step ST22 of method MT2, in the state when applying step ST23 of method MT2, and in the state after applying method MT2. Hereinafter, the case where method MT2 is performed using plasma processing apparatus 1 will be described as an example.
[0120] The method MT2 shown in Figure 14 can be applied to a substrate W having a silicon film SF and a mask MK, as shown in Figure 2. Method MT2 begins with step ST21. Step ST21 is the same as step ST1 of method MT1. Step ST21 involves preparing the substrate W in chamber 10. The substrate W is placed on an electrostatic chuck 20 in chamber 10 and held by the electrostatic chuck 20. Steps ST22, ST23, and ST24 of method MT2 can be performed while the substrate W is contained in chamber 10.
[0121] In method MT2, step ST22 is performed after step ST21. Step ST22 involves etching the silicon-containing film SF. As shown in Figure 15(a), step ST22 involves supplying halogen chemical species to the substrate W and partially etching the silicon-containing film SF. The halogen chemical species are, for example, ions, which are represented by circles surrounding "+" in Figure 15(a).
[0122] The halogenated chemical species used in step ST22 are supplied from the plasma generated by the etching gas. The etching gas contains halogenated gases. The halogenated gases may contain fluorine-containing gases. The fluorine-containing gases may contain at least one of hydrogen fluoride, nitrogen trifluoride (NF3), sulfur hexafluoride (SF6), the aforementioned fluorocarbons, and the aforementioned hydrofluorocarbons. Fluorocarbon-containing etching gases can be used when the silicon-containing SF film contains a silicon oxide film. Hydrofluorocarbon-containing etching gases can be used when the silicon-containing SF film contains a silicon nitride film. In cases where the silicon-containing SF film contains polycrystalline silicon, the halogenated gases may contain halogenated gases such as Cl2. The etching gas may also contain carbon and hydrogen, as described in the first gas above. The etching gas may also contain the aforementioned hydrogen-containing gases and / or carbon-containing gases. The etching gas may also contain oxygen. The etching gas may also contain O2 gas.
[0123] The control unit 80 controls the gas supply unit to supply etching gas into the chamber 10, thereby executing step ST22. Furthermore, the control unit 80 controls the exhaust device 50 to set the gas pressure within the chamber 10 to a specified pressure. Also, the control unit 80 controls the plasma generation unit to generate plasma from the etching gas within the chamber 10. In the plasma processing apparatus 1, the control unit 80 controls the high-frequency power supply 62 and the bias power supply 64 to supply high-frequency power HF, high-frequency power LF, or high-frequency power HF and a bias voltage.
[0124] In method MT2, steps ST23 and ST24 are performed sequentially after step ST22. As shown in Figure 15(b), step ST23 involves supplying phosphorus chemical species to the substrate W. The phosphorus chemical species are, for example, phosphorus-active species such as ions and / or free radicals, represented by a circle surrounding "P" in Figure 15(b). As shown in Figure 15(b), step ST23 involves forming bonds between the elements contained in the silicon-containing film SF and phosphorus on the sidewalls where openings are formed in the silicon-containing film SF. When the silicon-containing film SF contains a silicon oxide film, phosphorus-oxygen bonds are formed on the sidewalls of the silicon-containing film SF. Step ST23 deactivates (or passivates) the sidewalls of the silicon-containing film SF by using phosphorus chemical species. That is, it passivates the sidewalls of the silicon-containing film SF. Furthermore, when the mask MK contains carbon, carbon-phosphorus bonds can also be formed on the surface of the mask MK in step ST23.
[0125] The phosphorus chemical species used in step ST23 are supplied from plasma generated by the passivation gas. The passivation gas used in step ST23 comprises a phosphorus-containing gas. The phosphorus-containing gas contains at least one of the phosphorus-containing molecules described above. In one embodiment, the phosphorus-containing gas may be fluorine-free. This phosphorus-containing gas may contain PCl3 or POCl3.
[0126] The control unit 80 controls the gas supply unit to supply passivating gas into the chamber 10, thereby executing step ST23. Furthermore, the control unit 80 controls the exhaust device 50 to set the gas pressure within the chamber 10 to a specified pressure. Also, the control unit 80 controls the plasma generation unit to generate plasma from the passivating gas within the chamber 10. In the plasma processing apparatus 1, the control unit 80 controls the high-frequency power supply 62 and the bias power supply 64 to supply high-frequency power HF, high-frequency power LF, or high-frequency power HF and a bias voltage.
[0127] Step ST24 further etches the silicon-containing SF film. Step ST24 is the same as step ST22. That is, step ST24 etches the silicon-containing SF film using halogen chemical species supplied from plasma generated by the etching gas.
[0128] In one embodiment, steps ST23 and ST24 can be performed alternately. In this case, method MT2 may further include step ST25. Step ST25 determines whether a stopping condition is met. Step ST25 determines that, for example, the stopping condition is met when the number of times the loop including steps ST23 and ST24 is repeated reaches a certain number. If step ST25 determines that the stopping condition is not met, the loop is executed again. On the other hand, if step ST25 determines that the stopping condition has been met, method MT2 ends. After method MT2 ends, as shown in FIG15(c), the base region UR is exposed.
[0129] Furthermore, the phosphorus chemical species used in step ST23 can also be supplied by plasma generated at a location far from the chamber, in which the substrate W is housed. Also, the plasma processing apparatus used in step ST23 and the plasma processing apparatus used in step ST24 can be different. In this case, the substrate W can be transported between the plasma processing apparatus used in step ST23 and the plasma processing apparatus used in step ST24 only through a depressurized space (i.e., without disrupting the vacuum).
[0130] The following describes another exemplary embodiment of the etching method. Referring to Figures 16, 17(a), and 17(b), Figure 16 is a flowchart of another exemplary embodiment of the etching method (hereinafter referred to as "method MT3"). Figures 17(a) and 17(b) are partially enlarged cross-sectional views of a substrate, showing the state during step STP3 of method MT3 and the state after applying method MT3, respectively. Hereinafter, the case where method MT3 is performed using plasma processing apparatus 1 will be described as an example.
[0131] The method MT3 shown in Figure 16 can be applied to a substrate W having a silicon film SF and a mask MK, as shown in Figure 2. Method MT3 begins with step ST31. Step ST31 is the same as step ST1 of method MT1. Step ST31 involves preparing the substrate W in chamber 10. The substrate W is placed on an electrostatic chuck 20 in chamber 10 and held by the electrostatic chuck 20. Step STP3 of method MT3 is performed while the substrate W is housed in chamber 10.
[0132] Step STP3 includes steps ST33 and ST34 performed simultaneously. Step ST33 is the same as step ST23 of method MT2. As shown in Figure 17(a), step ST33 involves supplying phosphorus chemical species to the substrate W to passivate the sidewalls of the silicon-containing film SF. In Figure 17(a), phosphorus chemical species are represented by circles surrounding "P". Step ST34 is the same as step ST24 of method MT2. As shown in Figure 17(a), step ST34 involves supplying halogen chemical species to the substrate W to etch the silicon-containing film SF. In Figure 17(a), halogen chemical species are represented by circles surrounding "+".
[0133] In step STP3, since steps ST33 and ST34 are performed simultaneously, a plasma of processing gas is generated in chamber 10. The processing gas includes the passivation gas described above in relation to step ST23 and the etching gas described above in relation to step ST22.
[0134] The control unit 80 controls the gas supply unit to supply processing gas into the chamber 10, thereby executing step STP3. Furthermore, the control unit 80 controls the exhaust device 50 to set the gas pressure within the chamber 10 to a specified pressure. Also, the control unit 80 controls the plasma generation unit to generate plasma from the processing gas within the chamber 10. In the plasma processing apparatus 1, the control unit 80 controls the high-frequency power supply 62 and the bias power supply 64 to supply high-frequency power HF, high-frequency power LF, or high-frequency power HF and a bias voltage.
[0135] In methods MT2 and MT3, the sidewalls of the silicon-film-containing SF are deactivated (or passivated) due to phosphorus. That is, the sidewalls are passivated. Therefore, according to methods MT2 and MT3, the sidewalls are protected during plasma etching of the silicon-film-containing SF to suppress lateral etching of the silicon-film-containing SF. Thus, according to methods MT2 and MT3, the substrate W can be protected during plasma etching of the silicon-film-containing SF.
[0136] The above descriptions illustrate various exemplary embodiments, but the embodiments are not limited to those described above. Various additions, omissions, substitutions, and modifications can be made. Furthermore, elements from different embodiments can be combined to form other embodiments.
[0137] For example, the plasma processing apparatus used in methods MT, MT2, and MT3 may be capacitively coupled plasma processing apparatuses other than plasma processing apparatus 1. Alternatively, the plasma processing apparatus used in methods MT, MT2, and MT3 may be of a type other than capacitively coupled plasma processing apparatus. Such plasma processing apparatuses may be inductively coupled plasma processing apparatuses, ECR (electron cyclotron resonance) plasma processing apparatuses, or plasma processing apparatuses that use surface waves such as microwaves to generate plasma, etc.
[0138] Furthermore, the plasma processing apparatus may also have, in addition to the bias power supply 64 that supplies high-frequency power LF to the lower electrode 18, other bias power supplies configured to apply pulses of negative DC voltage intermittently or periodically to the lower electrode 18.
[0139] Based on the above description, it should be understood that the various embodiments of the present invention are described in this specification for illustrative purposes only, and various modifications can be made without departing from the scope and spirit of the invention. Therefore, the various embodiments disclosed in this specification are not intended to be limiting, and the true scope and spirit are indicated by the appended claims.
[0140] 1: Plasma treatment device 10: Chamber 10s: Interior space 12: Chamber body 12e: Exhaust port 12g: Gate valve 12p: Pathway 13: Support Department 14: Substrate support 16: Electrode plate 18: Lower electrode 18f:Flow path 20: Electrostatic chuck 20p: DC power supply 20s: Switch 22a:Piping 22b:Piping 24: Gas supply pipeline 25: Edge ring 30: Upper electrode 32: Components 34: Top plate 34a: Multiple gas ejection holes 36: Support body 36a: Gas diffusion chamber 36b: Multiple gas pores 36c: Gas inlet 38: Gas supply pipe 40: Gas source group 41: Flow controller group 42: Valve Group 46: Protective shield 48: partition 50: Exhaust device 52: Exhaust pipe 62: High-frequency power supply 64: Bias Power Supply 66: Matcher 68: Matcher 80: Control Department LN: Line MK: Mask MKA: Part MKB: Part OP: Open PF: Protective film SF: Contains silicon film UR: Basement region W: substrate
Claims
1. A plasma processing apparatus comprising: a chamber; a substrate support configured to support a substrate in the chamber, the substrate including a silicon-containing film and a mask disposed on the silicon-containing film; a gas supply unit configured to supply processing gas for etching the silicon-containing film to form a recess in the silicon-containing film into the chamber, the processing gas containing a halogen element and phosphorus; and a plasma generation unit configured to generate plasma in the chamber from the processing gas, thereby etching the silicon-containing film to form a phosphorus-containing protective film on the sidewall of the recess.
2. The plasma processing apparatus of claim 1, wherein the substrate support includes a lower electrode, and the plasma processing apparatus further includes a bias power supply for supplying an electrical bias to the lower electrode during etching of the silicon-containing film.
3. The plasma processing apparatus of claim 2, wherein the aforementioned bias voltage is a continuous wave.
4. The plasma processing apparatus of claim 2, wherein the aforementioned bias voltage is a pulse wave.
5. The plasma processing apparatus of claim 2, wherein the bias voltage is a pulse wave of DC voltage.
6. The plasma treatment apparatus of claim 1, wherein the treatment gas includes fluorine-containing gas and phosphorus-containing gas.
7. The plasma treatment apparatus of claim 6, wherein the phosphorus-containing gas comprises at least one of PF3, PCl3, PF5, PCl5, POCl3, PH3, PBr3 and PBr5.
8. The plasma treatment apparatus of claim 6 or 7, wherein the treatment gas further comprises hydrocarbons, hydrofluorocarbons or fluorocarbons.
9. The plasma processing apparatus of any one of claims 1 to 7, wherein the processing gas further comprises carbon and hydrogen.
10. The plasma treatment apparatus of claim 9, wherein the treatment gas comprises at least one of H2, hydrogen fluoride, hydrocarbon, hydrofluorocarbon and NH3 as hydrogen-containing molecules.
11. The plasma treatment apparatus of claim 9, wherein the treatment gas contains at least one of hydrocarbons, hydrofluorocarbons and fluorocarbons as carbon-containing molecules.
12. The plasma processing apparatus of any one of claims 1 to 7, wherein the processing gas further comprises an oxygen-containing gas.
13. The plasma treatment apparatus of any one of claims 1 to 7, wherein the protective film is formed such that its thickness decreases along the depth direction of the recess.
14. The plasma treatment apparatus of any one of claims 1 to 7, wherein the protective film comprises phosphorus-oxygen bonds and / or phosphorus-silicon bonds.
15. The plasma processing apparatus of any one of claims 1 to 7, wherein the silicon-containing film comprises a silicon oxide film.
16. The plasma processing apparatus of claim 15, wherein the silicon-containing film further comprises at least one of silicon nitride film, polycrystalline silicon film, carbon-containing silicon film, and low dielectric constant film.
17. The plasma processing apparatus of any one of claims 1 to 7, wherein the mask contains carbon, and carbon-phosphorus bonds are formed on the surface of the mask during etching of the silicon-containing film.
18. The plasma processing apparatus of any one of claims 1 to 7, wherein the shield contains metal.
19. The plasma processing apparatus of claim 18, wherein the shield comprises at least one selected from the group consisting of titanium nitride, tungsten and tungsten carbide.
20. An etching method comprising the steps of: (a) preparing a substrate in a chamber of a plasma processing apparatus, the substrate comprising a silicon-containing film and a mask disposed on the silicon-containing film; and (b) etching the silicon-containing film by means of chemical species derived from plasma generated in the chamber by a processing gas containing a halogen element and phosphorus; wherein in (b), a protective film comprising the phosphorus is formed on the sidewall of a recess formed by the etching of the silicon-containing film.
Citation Information
Patent Citations
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