Semiconductor device and methods of manufacturing semiconductor devices
Patent Information
- Application Number
- TW114130524
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-02-27
- Filing Date
- 2021-01-12
- Publication Date
- 2026-10-01
- Estimated Expiration
- 2041-01-11
AI Technical Summary
Existing semiconductor packaging methods result in excessive cost, reduced reliability, and relatively low performance due to inappropriate design, leading to excessively large package sizes.
A semiconductor device design featuring a clamping structure with exposed clamping and component port facets, encapsulated by a coplanar encapsulation, allowing for electrical interconnections and protection against environmental exposure.
The design enhances reliability and performance while reducing package size, providing efficient electrical coupling and protection for semiconductor components.
Smart Images

Figure TWG2TB001913989_001 
Figure TWG2TB001913989_002 
Figure TWG2TB001913989_003
Abstract
Description
[Technical Field]
[0001] This disclosure generally relates to electronic devices, and more specifically to semiconductor devices and methods of manufacturing semiconductor devices. [Previous Technology]
[0002] Existing semiconductor packaging and methods for forming semiconductor packages are inappropriate, for example, resulting in excessive cost, reduced reliability, relatively low performance, or excessively large package size. Other limitations and disadvantages of conventional and traditional methods will become apparent to those skilled in the art by comparing such methods with this disclosure and referring to the figures. [Summary of the Invention]
[0003] One embodiment of the present invention is a semiconductor device comprising: an electronic component, the electronic component including: a component facet side; a component substrate side; a component lateral side, the component lateral side connecting the component facet side to the component substrate side; and a component port adjacent to the component facet side; a clamping structure coupled to the electronic component; and an encapsulation covering the electronic component and the clamping structure; wherein: the component port includes a component port facet; the encapsulation includes an encapsulation facet; the clamping structure includes a first clamping facet; and the component port facet and the first clamping facet are exposed from the encapsulation facet.
[0004] In the semiconductor device according to this embodiment of the present invention, the encapsulation surface, the first clamping surface, and the component port surface are coplanar.
[0005] According to this embodiment of the semiconductor device, the clamping structure includes: a first clamping pad; a second clamping pad; and a first clamping leg, the first clamping leg connecting the first clamping pad and the second clamping pad together.
[0006] According to this embodiment of the semiconductor device, the first clip is connected to the component substrate side of the electronic component; the second clip includes the first clip surface; the component port includes a component terminal; and the component terminal includes the component port surface.
[0007] According to this embodiment of the semiconductor device, the encapsulation includes a second encapsulation surface different from the encapsulation surface; the first clip is exposed from the second encapsulation surface; and the semiconductor device further includes a plate coupled to the first clip.
[0008] According to this embodiment of the semiconductor device, the first clamping pad is connected to the component face side of the electronic component; the first clamping pad includes the first clamping surface; the component port includes a component terminal and a component interconnect coupled to the component terminal; and the component interconnect includes the component port face.
[0009] The semiconductor device according to this embodiment of the invention further includes: a plate, the plate being connected to the component substrate side of the electronic component and connected to the second clip pad to electrically couple the component substrate side of the electronic component to the clip structure.
[0010] According to this embodiment of the semiconductor device, the clamping structure includes: a clamping bridge connected to the substrate side of the component; a first clamping pad; a second clamping pad; a first clamping leg connecting the first clamping pad to the clamping bridge; and a second clamping leg connecting the second clamping pad to the clamping bridge; the first clamping pad includes a first clamping surface; and the second clamping pad includes a second clamping surface exposed from the encapsulation surface.
[0011] According to this embodiment of the semiconductor device, the clamping structure includes: a first clamping pad coupled to the electronic component; a second clamping pad; a first clamping leg connecting the first clamp and the second clamping pad together; a third clamping pad coupled to the electronic component; a fourth clamping pad; and a second clamping leg connecting the third clamping pad and the fourth clamping pad together.
[0012] According to this embodiment of the semiconductor device, the first clip is coupled to the component face at a first peripheral edge of the electronic component; the third clip is coupled to the component face at a second peripheral edge of the electronic component; the component port includes a component interconnect inserted between the first clip and the third clip; the first clip includes a first clamping surface; the third clip includes a second clamping surface exposed from the encapsulation surface; the component interconnect includes the component port surface; and the encapsulation is inserted between the component interconnect, the first clip, and the third clip.
[0013] The semiconductor device according to this embodiment of the present invention further includes: a plate coupled to the component substrate side of the electronic component, the second clip and the fourth clip.
[0014] According to this embodiment of the semiconductor device, the first clip is coupled to the component substrate side at a first peripheral edge of the electronic component; the third clip is coupled to the component substrate side at a second peripheral edge of the electronic component; the component port includes a component terminal; the second clip includes the first clip surface; the fourth clip includes a second clip surface exposed from the encapsulation surface; the component terminal includes the component port surface; and the encapsulation is inserted between the component lateral side, the second clip, and the fourth clip.
[0015] The semiconductor device according to this embodiment of the invention further includes: a dielectric layer having an opening above the encapsulation surface that exposes the first clamping surface and the component port surface; and an external interconnection electrically coupled to the clamping structure and the electronic component through the opening.
[0016] Another aspect of the present invention is a semiconductor device comprising: an electronic component including: a component facet side; a component substrate side; a component lateral side connecting the component facet side to the component substrate side; and a component port adjacent to the component facet side, wherein the component port includes a component port facet side; a clamping structure including: a first clamping pad; a second clamping pad; a first clamping leg connecting the first clamping pad to the second clamping pad; and a first clamping surface; and an encapsulation covering the electronic component and the clamping structure; wherein: the encapsulation includes an encapsulation surface; the first clamping pad is coupled to the electronic component; and the component port facet and the first clamping surface are exposed from the encapsulation surface.
[0017] According to another embodiment of the semiconductor device, the first clamping pad is coupled to the component facet side of the electronic component; the first clamping pad includes the first clamping surface; the component port includes a component terminal and a component interconnect; the component interconnect includes the component port facet; the component port facet and the first clamping surface are coplanar; and the semiconductor device further includes a plate that couples the component substrate side of the electronic component to the second clamping pad.
[0018] According to another aspect of the semiconductor device of the present invention, the first clamping pad is coupled to the component substrate side of the electronic component; the second clamping pad includes the first clamping surface; the component port includes a component terminal; the component terminal includes the component port surface; and the component port surface and the first clamping surface are coplanar.
[0019] The semiconductor device according to another embodiment of the present invention further includes: a plate coupled to the first clip pad.
[0020] Another aspect of the present invention is a method of forming a semiconductor device, comprising: providing an electronic component, the electronic component including: a component facet side; a component substrate side; a component lateral side, the component lateral side connecting the component facet side to the component substrate side; and a component port adjacent to the component facet side, wherein the component port includes a component port facet; providing a clamping structure having a first clamping surface; coupling the clamping structure to the electronic component; and providing an encapsulation covering the electronic component and the clamping structure; wherein: the encapsulation includes an encapsulation facet; and the component port facet and the first clamping surface are exposed from the encapsulation facet.
[0021] According to another embodiment of the present invention, the method further includes: providing a board; wherein: providing the electronic component includes: connecting the component base side of the electronic component to the board; and providing the component port, the component port including a component terminal and a component interconnect; wherein the component interconnect includes the component port face; providing the clamping structure includes: providing a first clamping pad, a second clamping pad, and a first clamping leg connecting the first clamping pad to the second clamping pad; wherein the first clamping pad includes the first clamping face; coupling the clamping structure includes: connecting the first clamping pad to the component face side of the electronic component; and connecting the second clamping pad to the board; providing the encapsulation includes: forming the encapsulation covering the board, the electronic component, the component interconnect, and the clamping structure; and removing a portion of the encapsulation to provide the encapsulation face; and the method further includes: providing an external interconnect coupled to the component port face and the first clamping face.
[0022] According to another embodiment of the present invention, the method further includes: providing a carrier; wherein: providing the electronic component includes: connecting the component facet side of the electronic component to the carrier; and providing the component port including a component terminal; wherein the component terminal includes the component port facet; providing the clamping structure includes: providing a first clamping pad, a second clamping pad, and a first clamping leg connecting the first clamping pad to the second clamping pad; wherein the second clamping pad includes the first clamping facet; coupling the clamping structure includes: connecting the first clamping pad to the component base side of the electronic component; and connecting the second clamping pad to the carrier; providing the encapsulation includes: forming the encapsulation covering the carrier, the electronic component, and the clamping structure; and the method further includes: removing the carrier to provide the encapsulation facet; providing an external interconnect coupled to the component port facet and the first clamping facet; and providing a plate coupled to the first clamping pad.
Implementation Method
[0029] The following discussion presents various examples of providing semiconductor devices and methods of manufacturing semiconductor devices. Such examples are not limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are not limiting.
[0030] The figures illustrate general construction methods, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the invention. Furthermore, elements in the figures are not necessarily drawn to scale. For example, the dimensions of some elements in each figure may be enlarged relative to other elements to aid in understanding the examples discussed in this disclosure. The same reference numerals in different figures denote the same elements.
[0031] The term "or" refers to any one or more items in a list connected by "or". As an example, "x or y" refers to any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y or z" refers to any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.
[0032] The terms “including” and / or “include” are “open” terms and specify the presence of the stated feature, but do not exclude the presence or addition of one or more other features.
[0033] Various elements may be described herein using terms such as “first,” “second,” etc., and these elements shall not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, without departing from the teachings of this disclosure, the first element discussed in this disclosure may be referred to as the second element.
[0034] Unless otherwise specified, the term “coupled” can be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected through one or more other elements. For example, if element A is coupled to element B, then element A can be in direct contact with element B or indirectly connected to element B through intervening element C. Similarly, the terms “above” or “on” can be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected through one or more other elements.
[0035] This specification includes, among other features, an electronic device and a related method, the method comprising a clamping structure connected to an electronic component. The electronic component includes a port having a component face, and the clamping structure includes a clamping face. An encapsulation covers the electronic component, the component port, and the clamping structure. The encapsulation includes an encapsulation face; and the clamping face and the component port face are exposed from the encapsulation face. In some instances, the component port includes a component terminal. In other instances, the component port includes a component terminal and a component interconnect. In some instances, the clamping structure includes a first clamping pad and a second clamping pad interconnected to the first clamping pad. In some instances, the first clamping pad is connected to the electronic component. In one instance, the first clamping pad includes a first clamping face. In other instances, the second clamping pad includes the first clamping face. Furthermore, the device and method implement electrical interconnections on one side of the electronic device.
[0036] In one example, a semiconductor device includes an electronic component, the electronic component including: a component facet side, a component substrate side, a component lateral side connecting the component facet side to the component substrate side, and a component port adjacent to the component facet side. A clamp structure is coupled to the electronic component, and an encapsulation covers a portion of the electronic component and the clamp structure. The component port includes a component port facet, the encapsulation includes an encapsulation facet, the clamp structure includes a first clamp facet, and the component port facet and the first clamp facet are exposed from the encapsulation facet.
[0037] In one example, a semiconductor device includes an electronic component, the electronic component including: a component facet side, a component substrate side, a component lateral side connecting the component facet side to the component substrate side, and a component port adjacent to the component facet side, wherein the component port includes a component port facet. A clamping structure includes a first clamping pad, a second clamping pad, a first clamping leg connecting the first clamping pad to the second clamping pad, and a first clamping facet. An encapsulation covers portions of the electronic component and the clamping structure. The encapsulation includes an encapsulation facet, the first clamping pad is coupled to the electronic component, and the component port facet and the first clamping facet are exposed from the encapsulation facet.
[0038] In one example, a method for forming a semiconductor device includes providing an electronic component, the electronic component including: a component facet side, a component substrate side, a component lateral side connecting the component facet side to the component substrate side, and a component port adjacent to the component facet side, wherein the component port includes a component port facet. The method includes providing a clamping structure having a first clamping surface, and coupling the clamping structure to the electronic component. The method includes providing an encapsulation covering portions of the electronic component and the clamping structure, wherein the encapsulation includes an encapsulation facet, and the component port facet and the first clamping surface are exposed from the encapsulation facet.
[0039] Other examples are included in this disclosure. Such examples can be found in the figures, the claims, and / or the description of this disclosure.
[0040] FIG1 shows a cross-sectional view of an example semiconductor device 100. In the example shown in FIG1, the semiconductor device 100 may include a plate 110, electronic components 120, a clamping structure 130, an encapsulation 140, a dielectric 150, and external interconnects 160.
[0041] Electronic component 120 may include a component base side 120a and a component surface side 120b. Electronic component 120 may include component terminals 121a, 121b, 121c and component interconnects 122. In some embodiments, component terminals 121a, 121b, 121c together with the corresponding component interconnects 122 may be referred to as component ports. In some embodiments, component interconnects 122 may be referred to as component ports.
[0042] The plate 110, clamping structure 130, encapsulation 140, dielectric 150, and external interconnect 160 may include, or be referred to as, a semiconductor package 101, and may provide protection for the electronic component 120 against external components and / or environmental exposure. The semiconductor package 101 may provide electrical coupling between the external component and the electronic component 120.
[0043] Figures 2A, 2B, 2C, 2D, 2E, 2F and 2G show cross-sectional views of an example method for manufacturing an example semiconductor device 100.
[0044] Figure 2A shows a cross-sectional view during an early manufacturing stage of the semiconductor device 100. In the example shown in Figure 2A, plate 110 may be substantially flat and may include, or be referred to as, a conductive plate or a heat sink. In some instances, plate 110 may be made of a material such as copper (copper or an alloy having copper and another element such as nickel (Ni), silicon (Si), phosphorus (P), or titanium (Ti), an iron-nickel alloy, or a copper / stainless steel / copper cladding metal). To prevent corrosion of plate 110, gold (Au), silver (Ag), tin (Sn), nickel (Ni), or palladium (Pd) may be partially or completely electroplated on the sides of plate 110. In some instances, the thickness of plate 110 may range from about 3 μm to about 2000 μm, or the width of plate 110 may range from about 0.5 mm to about 10 mm.
[0045] FIG2B shows a cross-sectional view of a later manufacturing stage of the semiconductor device 100. In the example shown in FIG2B, an electronic component 120 including component interconnect 122 may be attached to the top side 110b of the board 110.
[0046] In some instances, electronic component 120 may include, or be referred to as, a semiconductor die, a semiconductor wafer, or a semiconductor package. In some instances, electronic component 120 may include a power device or transistor device, such as a field-effect transistor (FET) device. In some instances, electronic component 120 may include active or passive circuitry. In some instances, electronic component 120 may include one or more transistors, a digital signal processor (DSP), a microprocessor, a network processor, a power management processor, an audio processor, RF circuitry, a wireless baseband system-on-a-chip (SoC) processor, a sensor, an optical or photosensitive sensor, a transmitter, a wireless, optical, or photoelectric transmitter, or an application-specific integrated circuit (ASIC). In some instances, electronic component 120 may include a silicon substrate or a glass substrate. In some instances, the thickness of electronic component 120 may range from about 30 μm to about 780 μm, or the width of electronic component 120 may range from about 0.5 mm to about 10 mm. Electronic component 120 may have a component substrate side 120a and a component face side 120b opposite to each other.
[0047] Electronic component 120 may include component terminal 121c at the component substrate side 120a. In some instances, component terminal 121c may be configured to receive or transmit signals or power. In some instances, component terminal 121c may include, or be referred to as, a source terminal or drain terminal of electronic component 120. In some instances, component terminal 121c may include the component substrate or surface of electronic component 120 at the component substrate side 120a.
[0048] Electronic component 120 may include component terminals 121a, 121b provided on component face side 120b. Component terminals 121a, 121b may include signal or power terminals of electronic component 120, and may include, or be referred to as, component face terminals, pads, under-bump metallization (UBM), or bumps. Component terminals 121a, 121b may include one or more layers of conductive material such as aluminum, copper, or tin. In some instances, component terminal 121b may include, or be referred to as, a drain terminal or source terminal of electronic component 120. In some instances, component terminal 121a may include, or be referred to as, a gate or control terminal of electronic component 120. In some instances, the width of component terminal 121 may range from about 0.01 mm to about 1 mm.
[0049] Component interconnect 122 may be provided on or coupled to component terminal 121. Component interconnect 122 may extend upward from component terminal 121. In some instances, the height of component interconnect 122 may range from about 0.05 mm to about 2 mm. In some instances, component interconnect 122 may be provided by electroplating, electroless plating, sputtering, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal-organic CVD (MOCVD), atomic layer deposition (ALD), low-pressure CVD (LPCVD), or plasma-enhanced CVD (PECVD). In some instances, component interconnect 122 may include substantially vertically extending wire-bonded conductors. In some instances, component interconnect 122 may include one or more materials selected from copper, gold, silver, palladium, tungsten, or nickel. Component interconnect 122 may include, or be referred to as, bumps, pillars, vertical conductors, rods, or conductive paths. In some instances, component interconnect 122 can electrically and mechanically connect external interconnect 160 to electronic component 120.
[0050] The component base side 120a of the electronic component 120 can be bonded to the top side 110b of the board 110 via an interface material 111. In some instances, the electronic component 120 can be picked up by a pick-and-place device and placed on the interface material 111 positioned on the board 110. In some instances, the interface material 111 can be applied to the electronic component 120 first, and then the electronic component 120 can be coupled to the board 110 via the interface material 111. In some instances, a large-scale reflow process, a hot pressing process, or a laser-assisted bonding process can be used to electrically or thermally couple the electronic component 120 to the board 110 via the interface material 111.
[0051] In some instances, using coating processes such as spin coating, blade coating, spray coating; printing processes such as screen printing, jet printing; or direct attachment of films or strips, the interface material 111 may be provided on the top side 110b of the board 110 or on the component substrate side 120a. The interface material 111 may include, or be referred to as, an adhesive, paste, solder; an electrical conductor or thermal conductor material. In some instances, the interface material 111 may include copper, iron, nickel, gold, silver, palladium, or tin. The interface material 111 may electrically or thermally connect the component substrate side 120a of the electronic component 120 to the board 110.
[0052] FIG2C shows a cross-sectional view of the semiconductor device 100 at a later manufacturing stage. In the example shown in FIG2C, the plate 110 and the component terminal 121c at the component face side 120b of the electronic component 120 can be connected by a clamping structure 130.
[0053] In some embodiments, clamping structure 130 may include clamp 130a or clamp 130b. Clamping structure 130a may include clamping pad 131a coupled to the component face side 120b of electronic component 120, and clamping leg 132a coupled to and extending between clamping pad 131a and top side 110b of plate 110. In some embodiments, clamping leg 132a may include or may be coupled to clamping pad 133a coupled to the top side 110b of plate 110. In some embodiments, the surface of clamping pad 131a coupled to component face side 120b may be substantially parallel to component face side 120b. In some embodiments, the surface of clamping pad 133a coupled to plate 110 may be substantially parallel to the top side 110b of plate 110. In some instances, the clamping leg 132a may extend diagonally from the clamping pad 133a toward the plate 110 or the clamping pad 133a. In some instances, the clamp 130b may include a corresponding clamping pad 131b, clamping leg 132b, or clamping pad 133b.
[0054] In some instances, the clamp structure 130 can be provided by bending or etching one or more conductive plates. In some instances, the clamp structure 130 may include a portion of a lead frame. In some instances, the clamp structure 130 may be made of a copper material (copper or an alloy having copper and another element such as Ni, Si, P or T), an iron-nickel alloy material, or a Cu / SUS / Cu cladding metal. In some instances, the thickness of the clamp structure 130 may range from about 0.05 mm to about 2 mm.
[0055] In some embodiments, an interface material 111 may be applied to the top side 110b of the plate 110, and a bonding material 123 may be applied to the component side 120b of the electronic component 120. Clamps 130a, 130b of the clamping structure 130 may be positioned such that clamping pads 131a, 131b are coupled to the bonding material 123 to engage with the component side 120b of the electronic component 120, and clamping legs 132a, 132b or clamping pads 133a, 133b are coupled to the interface material 111 to engage with the plate 110. In some embodiments, clamping pads 131a, 131b may be attached to the periphery or edge of the component side 120b. In some embodiments, clamping legs 132a, 132b may be coupled to the top side 110b of the plate 110 adjacent to the lateral side of the electronic component 120.
[0056] In some instances, the bonding material 123 may include, or be referred to as, an electrically insulating material. In some instances, the bonding material 123 may include, or be referred to as, a thermally conductive material. In some instances, the bonding material 123 may include, or be referred to as, an adhesive, paste, or solder. The clamping structure 130 may be electrically, thermally, or mechanically connected to the board 110 via the interface material 111. The clamping structure 130 may be mechanically or thermally connected to the component face 120b of the electronic component 120 via the bonding material 123. In some embodiments, the clamping structure 130 may be electrically isolated from the component face 120b of the electronic component 120. For example, the bonding material 123 may include an electrically insulating material between the clamping pads 131a, 131b and the component face 120b of the electronic component 120. As another example, the bonding material 123 may include a conductive material but not contact any exposed terminals of the semiconductor device 120 between the clamping pads 131a, 131b and the component face 120b of the electronic component 120.
[0057] FIG. 2D shows a cross-sectional view of the semiconductor device 100 at a later manufacturing stage. In the example shown in FIG. 2D, the encapsulation 140 may cover the plate 110, the electronic component 120, and the clamping structure 130. In some examples, the encapsulation 140 may contact the top side 110b of the plate 110. In some examples, the encapsulation 140 may contact the component face side 120b or the lateral side of the electronic component 120. In some examples, the encapsulation 140 may contact the top side or the lateral side of the component interconnect 122. In some examples, the encapsulation 140 may contact the top or the lateral side of the clamping structure 130. In some examples, the encapsulation 140 may extend between the clamping structure 130 and the lateral side of the electronic component 120.
[0058] In some instances, the encapsulant 140 may include, or be referred to as, an epoxy molding compound, an epoxy molding resin, or a sealant. In some instances, the encapsulant 140 may include, or be referred to as, a molding portion, a sealing portion, an encapsulating portion, a protective portion, or an encapsulation. In some instances, the encapsulant 140 may include organic resins, inorganic fillers, curing agents, catalysts, coupling agents, colorants, and flame retardants. The encapsulant 140 can be provided through a variety of processes. In some instances, the encapsulant 140 may be provided through a compression molding process, a liquid phase encapsulant molding process, a vacuum lamination process, a paste printing process, or a film-assisted molding process. The thickness of the encapsulant 140 may range from approximately 0.08 mm to approximately 3 mm. The encapsulant 140 may cover the plate 110, electronic components 120, and clamping structure 130 to protect the plate 110, electronic components 120, and clamping structure 130 from external components and / or environmental exposure.
[0059] FIG. 2E shows a cross-sectional view of the semiconductor device 100 at a later manufacturing stage. In the example shown in FIG. 2E, a portion of the encapsulation 140 is removable to expose the face 122z of the component interconnect 122 and the face 131z of the clamping pads 131a, 131b of the clamping structure 130. The encapsulation 140 can be removed by grinding or chemical etching. In some examples, the side 140z of the encapsulation 140 may be coplanar with the face 122z of the component interconnect 122 and the face 131z of the clamping pads 131a, 131b. In some examples, the thickness of the top portion of the encapsulation 140 removed may range from about 0.08 mm to about 3 mm.
[0060] FIG2F shows a cross-sectional view of a later manufacturing stage of the semiconductor device 100. In the example shown in FIG2F, a dielectric 150 may be provided to cover the top side 140z of the encapsulation 140, the surface 122z of the component interconnect 122, and the surface 131z of the clamping pads 131a, 131b of the clamping structure 130.
[0061] Dielectric 150 may include, or be referred to as, a dielectric layer, a passivation layer, an insulating layer, or a protective layer. In some instances, dielectric 150 may include an electrically insulating material, such as a polymer, polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), bismaleimide triazine (BT), molding material, phenolic resin, epoxy resin, silicone, or acrylate polymer. In some instances, dielectric 150 may be provided by any of a variety of processes. For example, dielectric 150 may be provided by spin coating, spraying, printing, PVD, CVD, MOCVD, ALD, LPCVD, or PECVD. The thickness of dielectric 150 may range from about 2 μm to about 30 μm.
[0062] Vias 151 and 152 may be provided on the dielectric 150 to expose the face 122z of the component interconnect 122 and the face 131z of the pads 131a and 131b. In some embodiments, the vias 151 and 152 may be formed by patterning a mask on the top side of the dielectric 150, and the exposed dielectric 150 may then be removed by etching to expose the face 122z of the component interconnect 122 and the face 131z of the pads 131a and 131b. In some embodiments, the face 122z of the component interconnect 122 or the face 131z of the pads 131a and 131b exposed by the vias 151 and 152 may be circular, rectangular, or polygonal.
[0063] FIG2G shows a cross-sectional view of the semiconductor device 100 at a later manufacturing stage. In the example shown in FIG2G, an external interconnect 160 may be provided on the surface 122z of the component interconnect 122 or the surface 131z of the clamping pads 131a, 131b. The external interconnect 160 may be electrically connected to the surface 122z of the component interconnect 122 or the surface 131z of the clamping pads 131a, 131b. The external interconnect 160 may be electrically connected to the component terminal 121c at the component substrate side 120a of the electronic component 120 via the clamping structure 130 and the plate 110, or may be electrically connected to the component terminals 121a, 121b of the electronic component 120 via the component interconnect 122.
[0064] In some instances, the external interconnect 160 may include tin (Sn), silver (Ag), lead (Pb), copper (Cu), Sn-Pb, Sn37-Pb, Sn95-Pb, Sn-Pb-Ag, Sn-Cu, Sn-Ag, Sn-Au, Sn-Bi, or Sn-Ag-Cu. For example, the external interconnect 160 may be provided by a droplet process, a screen printing process, or an electroplating process. For example, the external interconnect 160 may be provided by applying a conductive material containing solder to the surface 122z of the component interconnect 122 and the surface 131z of the pad 131 via a droplet process, followed by a reflow process. The external interconnect 160 may be referred to as a conductive ball (e.g., a solder ball), a conductive pillar (e.g., a copper pillar), or a conductive rod having a solder cap on a copper pillar. The size of the external interconnect 160 may range from about 50 mm to about 700 mm. Alternatively, the completed semiconductor device 100 can be flipped over, thus positioning the external interconnect 160 on the bottom side of the semiconductor device 100. In some instances, the external interconnect 160 may be referred to as an external input / output terminal of the semiconductor device 100.
[0065] FIG3 shows a cross-sectional view of an example semiconductor device 200. In the example shown in FIG3, the semiconductor device 200 may include electronic components 220, a clip structure 230, an encapsulation 240, a dielectric 250, and external interconnects 260.
[0066] The electronic component 220 may include a component base side 220a and a component surface side 220b. The electronic component 220 may include component ports, which include component terminals 221a, 221b, and 220c.
[0067] The clamping structure 230, encapsulation 240, dielectric 250, and external interconnect 260 may include, or be referred to as, a semiconductor package 201 or package 201, and may provide protection for the electronic component 220 against external components and / or environmental exposure. The semiconductor package 201 may provide electrical coupling between the external component and the electronic component 220. The semiconductor device 200 is an example of a device in which the encapsulation 240 is inserted between the component lateral side of the electronic component 220, between the clamping pads 233a or 233b.
[0068] Figures 4A, 4B, 4C, 4D, 4E and 4F show cross-sectional views of an example method for manufacturing an example semiconductor device 200.
[0069] FIG4A shows a cross-sectional view of the semiconductor device 200 in an early manufacturing stage. In the example shown in FIG4A, the electronic component 220 may be attached to the carrier 10.
[0070] Electronic component 220 may include a component base side 220a and a component face side 220b opposite to the component base side 220a. Component base side 220a may include component terminals 221c, and component face side 220b may include component terminals 221a, 221b. Electronic component 220 and its features or elements are similar to electronic component 120 and its corresponding features or elements. Electronic component 220 may be positioned such that component face side 220b and component terminals 221 are coupled to carrier 10.
[0071] The carrier 10 may be a substantially flat plate. For example, the carrier 10 may include or be referred to as a plate, wafer, panel, or strip. In some instances, the carrier 10 may include steel, stainless steel, aluminum, copper, ceramic, silicon, or glass. The thickness of the carrier 10 may range from 100 mm to 780 mm, and the width of the carrier 10 may range from 200 mm to 300 mm. The carrier 10 can be used for attaching electronic components 220 and clamping structures 230, and can simultaneously handle the formation of multiple semiconductor devices in an array configuration.
[0072] The carrier 10 may include an adhesive 11 applied prior to the attachment of the electronic component 220. The adhesive 11 may include, or be referred to as, a temporary adhesive film or temporary adhesive tape. In some instances, the adhesive 11 may include a heat-release strip (film) or a light-release strip (film). In some instances, the adhesiveness may be weakened or removed by heat or light. In some instances, the adhesiveness of the adhesive 11 may be weakened or removed by physical and / or chemical external forces. The thickness of the adhesive 11 may range from about 5 μm to about 100 μm.
[0073] FIG4B shows a cross-sectional view of the semiconductor device 200 at a later manufacturing stage. In the example shown in FIG4C, the clamp structure 230 may be configured to be coupled between the electronic component 220 and the carrier 10.
[0074] The clamping structure 230 may be similar to the clamping structure 130 and its corresponding features or elements described in this disclosure. The clamping structure 230 may include a clamp 230a having a clamping pad 231a coupled to a component base side 220a of the electronic component 220, and a clamping leg 232a coupled to and extending between the clamping pad 231a and the carrier 10. In some instances, the clamping leg 232a may include or be coupled to the clamping pad 233a, which is coupled to the carrier 10. In some instances, the surface of the clamping pad 231a coupled to the component base side 220a may be substantially parallel to the component base side 220a. In some instances, the surface of the clamping pad 233a coupled to the carrier 10 may be substantially parallel to the carrier 10. In some instances, the clamping leg 232a may extend diagonally from the clamping pad 231a toward the carrier 10 or the clamping pad 233a. In some instances, the clamp structure 230 may include a clamp 230b having a corresponding clamp pad 231b, clamp leg 232b, or clamp pad 233b.
[0075] In some instances, an interface material 211 may be applied to the component substrate side 220a of the electronic component 220. In some instances, the interface material 211 may be similar to, or similarly formed or applied to, the interface material 111 previously described with respect to Figures 1-2. The interface material may electrically or thermally couple the clamping structure 230 to the component terminal 221c at the component substrate side 220a of the electronic component 220. The clamps 230a, 230b of the clamping structure 230 may be positioned such that clamp pads 231a, 231b are coupled to the interface material 211 to engage with the component substrate side 220a of the electronic component 220, and such that clamp legs 232a, 232b or clamp pads 233a, 233b are coupled to the adhesive 11 to engage with the carrier 10. In some instances, clamp pads 231a, 231b may be attached to the periphery or edge of the component substrate side 220a. In some instances, the clamping legs 232a and 232b may be coupled to the carrier 10 on the lateral side adjacent to the electronic component 220.
[0076] FIG4C shows a cross-sectional view of the semiconductor device 200 at a later manufacturing stage. In the example shown in FIG4C, encapsulation 240 may cover electronic component 220 and clamping structure 230. In some examples, encapsulation 240 may contact the component substrate side 220a or the lateral side of electronic component 220. In some examples, encapsulation 240 may contact the top or lateral side of clamping structure 230, or may be positioned between clamping structure 230 and the lateral side of electronic component 220. Encapsulation 240 may be similar to encapsulation 140 or may be similarly formed or applied.
[0077] FIG4D shows a cross-sectional view of the semiconductor device 200 at a later manufacturing stage. In the example shown in FIG4D, the carrier 10 is removable. The adhesive 11 can be released from the electronic component 220, the clamping structure 230, and the encapsulation 240 while it remains bonded to the carrier 10. In some instances, heat, light, chemical solutions, and / or physical forces can be applied to remove or reduce the adhesiveness of the adhesive 11. With the carrier 10 removed, the component face 220b of the electronic component 220, the component terminals 221a and 221b of the electronic component 220, the clamping pads 233a and 233b of the clamping structure 230, or the side 240z of the encapsulation 240 can be exposed.
[0078] FIG4E shows a cross-sectional view of a later manufacturing stage of the semiconductor device 200. In the example shown in FIG4E, a dielectric 250 may be provided to cover the component facet 220b of the electronic component 220, the facet 233z of the clamping pads 233a and 233b of the clamping structure 230, and the side 240z of the encapsulation 240. The facet 221z of the component terminals 221a and 221b and the facet 233z of the clamping pads 233a and 233b may be exposed through the apertures 251 and 252 of the dielectric 250. The dielectric 250 may be similar to and may be formed similarly to the dielectric 150.
[0079] FIG4F shows a cross-sectional view of the semiconductor device 200 at a later manufacturing stage. In the example shown in FIG4F, external interconnects 260 are provided on surfaces 221z of component terminals 221a, 221b and on surfaces 233z of clamping pads 233a, 233b. External interconnects 260 can be electrically connected to the component substrate side 220a of electronic component 220 via clamping structure 230. External interconnects 260 may be similar to external interconnects 160 and may be formed similarly.
[0080] FIG5 shows a cross-sectional view of an example semiconductor device 300. In the example shown in FIG5, the semiconductor device 300 may include a plate 310, an electronic component 220, a clamping structure 230, an encapsulation 240, a dielectric 250, and an external interconnect 260.
[0081] Semiconductor device 300 may be structurally or in formation similar to other semiconductor devices described in this disclosure, such as semiconductor device 200 described in Figures 3-4. Semiconductor device 300 includes a plate 310 coupled to the clamping structure 230 at the surface 231z of the clamping pads 231a, 231b. In some instances, plate 310 may be similar to plate 110 described with respect to Figures 1-2. In some instances, a portion of the encapsulation 240 may be removed to expose the surface 231z of the clamping pads 231a, 231b prior to coupling of plate 310, similar to that described with respect to Figure 2E. In some instances, plate 310 may be formed directly on or coupled to the clamping pads 231a, 231b of clamping structure 30 or to the encapsulation 240. In some instances, plate 310 may be coupled to the clamping pads 231a, 231b of clamping structure 30 via interface material 111.
[0082] FIG6 shows a cross-sectional view of an example semiconductor device 400. In the example shown in FIG6, the semiconductor device 400 may include electronic components 220, a clip structure 430, an encapsulation 240, a dielectric 250, and external interconnects 260.
[0083] Semiconductor device 400 may be similar in structure or formation to other semiconductor devices described in this disclosure, such as semiconductor device 200 described in Figures 3-4 or semiconductor device 300 described in Figure 5.
[0084] The clamping structure 430 may be structurally or structurally similar to the clamping structure 230 described in Figures 3-5, and includes a clamping bridge 430z extending between clamping legs 232a and 232b above the component base side 220a. In some instances, the clamping structure 430 may span the entire width of the electronic component 220. In some instances, an interface material 211 may couple the clamping structure 430 to the component terminal 221c at the component base side 220a of the electronic component 220. In some instances, the interface material 211 may cover a large portion of the width or area of the component base side 220a.
[0085] This disclosure contains references to certain examples; however, those skilled in the art will understand that various changes and equivalents can be made without departing from the scope of this disclosure. Furthermore, modifications can be made to the examples disclosed without departing from the scope of this disclosure. Therefore, it is intended that this disclosure is not limited to the disclosed examples, but rather that it will encompass all examples falling within the scope of the appended claims. [Simplified Explanation of the Diagram]
[0023] [Figure 1] shows a cross-sectional view of an example semiconductor device.
[0024] [Figures 2A, 2B, 2C, 2D, 2E, 2F and 2G] show cross-sectional views of an example method for manufacturing an example semiconductor device.
[0025] [Figure 3] shows a cross-sectional view of an example semiconductor device.
[0026] [Figures 4A, 4B, 4C, 4D, 4E and 4F] show cross-sectional views of an example method for manufacturing an example semiconductor device.
[0027] [Figure 5] shows a cross-sectional view of an example semiconductor device.
[0028] [Figure 6] shows a cross-sectional view of an example semiconductor device.
Claims
1. A semiconductor device comprising: A semiconductor component, the semiconductor component comprising: a component facet side; a component substrate side; a component lateral side connecting the component facet side to the component substrate side; a component port adjacent to the component facet side, wherein the component port includes a component port facet side; and a first component terminal on the component substrate side; a clamping structure comprising: a first clamping pad having a first clamping pad facet side; a second clamping pad having a second clamping pad facet side; and a first clamping leg connecting the first clamping pad to the second clamping pad; an encapsulation covering a portion of the semiconductor component and a portion of the clamping structure; wherein: the encapsulation includes an encapsulation first facet side and an encapsulation second facet side opposite to the encapsulation first facet side; the first clamping pad is coupled to the component facet side through a first interface material; the first interface material is electrically insulating; the component port facet side and the first clamping pad facet side are exposed from the encapsulation first facet side; and the second clamping pad facet side is exposed from the encapsulation second facet side. A dielectric material adjacent to a first surface of the encapsulation, a first padding surface, and a component port surface, wherein the dielectric material includes: a first aperture extending through the dielectric material, wherein the first padding surface is exposed within the first aperture; and a second aperture extending through the dielectric material, wherein the component port surface is exposed within the second aperture; a first external interconnect fixed to the first padding surface through the first aperture in the dielectric material; a second external interconnect fixed to the component port surface through the second aperture in the dielectric material; and a conductive plate coupling the second padding surface to the first component terminal.
2. The semiconductor device according to claim 1, wherein: The component port includes a second component terminal and a component interconnect; the component interconnect includes the component port surface; and the component port surface and the first liner surface are substantially coplanar.
3. The semiconductor device according to claim 2, wherein: The encapsulation material contacts the surface side of the component and the lateral side of the component interconnect.
4. The semiconductor device according to claim 1, further comprising: A second interface material, wherein the conductive plate is connected to the second interlayer surface and the first component terminal through the second interface material.
5. The semiconductor device according to claim 4, wherein: The second interface material includes a conductive material.
6. The semiconductor device according to claim 4, wherein: The conductive plate is made of copper.
7. The semiconductor device according to claim 1, wherein: The first component terminal is either a drain terminal or a source terminal.
8. The semiconductor device according to claim 1, wherein the clip structure further comprises: A third clip, the third clip being coupled to the semiconductor component and including a third clip surface; The fourth clip includes a fourth clip surface; and a second clamping leg, the second clamping leg connecting the third clamping pad and the fourth clamping pad together; wherein: the third clamping pad is coupled to the component surface through the first interface material; the surface of the third clamping pad is exposed from the first surface of the encapsulation; the surface of the fourth clamping pad is exposed from the second surface of the encapsulation; and the conductive plate couples the surface of the fourth clamping pad to the first component terminal.
9. The semiconductor device according to claim 4, wherein: The second interface material includes thermally conductive and electrically conductive materials.
10. The semiconductor device according to claim 1, wherein the first external interconnect and the second external interconnect include pillar structures.
11. The semiconductor device according to claim 1, wherein: The component port includes a second component terminal and a component interconnect; and the component interconnect includes the component port surface.
12. The semiconductor device according to claim 11, wherein: The interconnecting components include a plated structure with a thickness ranging from 0.05 mm to 2.0 mm.
13. The semiconductor device according to claim 11, wherein: The interconnecting element comprises a deposited pillar; and the deposited pillar comprises copper.
14. The semiconductor device according to claim 11, wherein: The interconnecting elements of the components include vertical conductors.
15. A method of forming a semiconductor device, comprising: Provide conductive plates; A semiconductor component is provided, the semiconductor component comprising: a component facet side; a component substrate side; a component lateral side, the component lateral side connecting the component facet side to the component substrate side; a component port adjacent to the component facet side, wherein the component port includes a component port facet; and a first component terminal located on the component substrate side; a clamping structure is provided, the clamping structure comprising: a first clamping pad, the first clamping pad including a first clamping pad facet side; a second clamping pad, the second clamping pad including a second clamping pad facet side; and a first clamping leg, the first clamping leg connecting the first clamping pad to the second clamping pad; a first interface material is provided on a conductive plate, the first interface material comprising a conductive material; the component substrate side and the second clamping pad facet side are coupled to the first interface material on the conductive plate; the first clamping pad is coupled to the component facet side using a second interface material, the second interface material comprising an electrically insulating material; and an encapsulation is provided, the encapsulation covering a portion of the semiconductor component and a portion of the clamping structure; wherein: The encapsulation includes a first encapsulation surface and a second encapsulation surface opposite to the first encapsulation surface; and the component port surface and the first clamping pad surface are exposed from the first encapsulation surface; a dielectric material is provided adjacent to the first encapsulation surface, the first clamping pad surface, and the component port surface, wherein the dielectric material includes: a first aperture extending through the dielectric material, wherein the first clamping pad surface is exposed within the first aperture; and a second aperture extending through the dielectric material, wherein the component port surface is exposed within the second aperture; a first external interconnect is provided fixed to the first clamping pad surface through the first aperture in the dielectric material; and a second external interconnect is provided fixed to the component port surface through the second aperture in the dielectric material.
16. The method according to request item 15, wherein: Providing the semiconductor component includes providing the component port, which includes a second component terminal and a component interconnect; the component interconnect includes the component port surface; and the component port surface and the first pad surface are substantially coplanar.
17. The method according to request item 16, wherein: Providing the encapsulation includes providing the encapsulation in contact with the face side of the component and the lateral side of the component interconnect.
18. The method according to request item 15, wherein: The clamping structure includes: providing a third clamping pad coupled to the semiconductor component and including a third clamping pad surface; providing a fourth clamping pad including a fourth clamping pad surface; and providing a second clamping leg connecting the third clamping pad and the fourth clamping pad together; the method further includes: coupling the third clamping pad to the component surface side through the first interface material; providing the third clamping pad surface exposed from a first surface of the encapsulation; providing the fourth clamping pad surface exposed from a second surface of the encapsulation; and providing the conductive plate coupling the fourth clamping pad surface to the first component terminal.
19. The method according to claim 15, wherein: Providing the dielectric includes providing the dielectric comprising a polymer.
20. The method according to request item 15, wherein: Providing the conductive plate includes providing the conductive plate containing copper.
Citation Information
Patent Citations
Method of forming molded resin semiconductor device
US20070134845A1
Stackable integrated circuit package system with multiple interconnect interface
US20070200257A1
Electronic Component and Switch Circuit
US20170207306A1
Re-Routable Clip for Leadframe Based Product
US20190259689A1
