Array substrate

Abstract

The array substrate includes a substrate, M scan lines, N data lines, M×N pixel units, and multiple masking units. The M scan lines and N data lines are disposed on the substrate and are staggered to define the M×N pixel units. Each pixel unit includes a switching element with an active layer, and the vertical projection of the active layer of each pixel unit onto the substrate completely falls within the vertical projection of a masking unit onto the substrate. The first to sixth pixel units arranged sequentially in the same column are respectively provided with a first to a sixth masking unit. The first masking unit is electrically connected to the fourth masking unit, the second masking unit is electrically connected to the fifth masking unit, and the third masking unit is electrically connected to the sixth masking unit.

Claims

1. An array substrate, comprising: One substrate; M scan lines are disposed on the substrate; N data lines are disposed on the substrate; M×N pixel units are defined by the M scan lines and the N data lines being arranged alternately, wherein each of the M×N pixel units includes a switching element having an active layer; and a plurality of masking units, each of the masking units being disposed corresponding to one of the M×N pixel units, wherein the vertical projection of the active layer of each of the M×N pixel units onto the substrate completely falls within the vertical projection of a corresponding masking unit onto the substrate; wherein a first pixel unit, a second pixel unit, a third pixel unit, a fourth pixel unit, a fifth pixel unit, and a sixth pixel unit arranged sequentially in the same column are respectively provided with a first masking unit, a second masking unit, a third masking unit, a fourth masking unit, a fifth masking unit, and a sixth masking unit, wherein the first masking unit is electrically connected to the fourth masking unit, the second masking unit is electrically connected to the fifth masking unit, and the third masking unit is electrically connected to the sixth masking unit.

2. The array substrate as claimed in claim 1, wherein the first shielding unit, the second shielding unit, and the third shielding unit are electrically isolated from each other.

3. The array substrate as claimed in claim 1, wherein the first shielding unit, the second shielding unit, the third shielding unit, the fourth shielding unit, the fifth shielding unit, and the sixth shielding unit are electrically connected.

4. The array substrate as claimed in claim 3, wherein a seventh pixel unit, an eighth pixel unit, a ninth pixel unit, a tenth pixel unit, an eleventh pixel unit, and a twelfth pixel unit arranged sequentially on the side opposite to the fifth pixel unit in the same column of pixel units are respectively provided with a seventh masking unit, an eighth masking unit, a ninth masking unit, a tenth masking unit, an eleventh masking unit, and a twelfth masking unit, wherein the seventh masking unit, the eighth masking unit, the ninth masking unit, the tenth masking unit, the eleventh masking unit, and the twelfth masking unit are electrically connected, and the first masking unit and the seventh masking unit are electrically isolated.

5. The array substrate as claimed in claim 1, wherein each of the switching elements includes a first electrode electrically connected to a counterpart of the N data lines, wherein the vertical projection portion of each of the masking units on the substrate overlaps the vertical projection of the data line electrically connected to the switching element corresponding to the M×N pixel units on the substrate.

6. The array substrate as claimed in claim 1, wherein each of the M×N pixel units includes a pixel electrode, and each of the switching elements further includes a second electrode electrically connected to the pixel electrode, wherein the vertical projection portion of each of the masking units on the substrate overlaps the vertical projection of the second electrode of the corresponding switching element of the M×N pixel unit on the substrate.

7. The array substrate as claimed in claim 6, wherein the vertical projection of each of the shielding units onto the substrate and the vertical projection of the pixel electrode electrically connected to the switching element of the corresponding M×N pixel unit onto the substrate are offset.

8. The array substrate as claimed in claim 1, wherein each of the masking units is disposed between the substrate and the active layer of the switching element corresponding to the M×N pixel units.

9. The array substrate as claimed in claim 1 further includes a first multiplexing unit and a second multiplexing unit, the first multiplexing unit being electrically connected to a first data line, a second data line and a third data line, and the second multiplexing unit being electrically connected to a fourth data line, a fifth data line and a sixth data line, wherein the first data line, the second data line, the third data line, the fourth data line, the fifth data line and the sixth data line are respectively electrically connected to the first pixel unit, the second pixel unit, the third pixel unit, the fourth pixel unit, the fifth pixel unit and the sixth pixel unit.

10. The array substrate of claim 9, wherein the first data line is also electrically connected to a pixel unit in the same row as and adjacent to the second pixel unit, the second data line is also electrically connected to a pixel unit in the same row as and adjacent to the third pixel unit, the third data line is also electrically connected to a pixel unit in the same row as and adjacent to the fourth pixel unit, and the fifth data line is also electrically connected to a pixel unit in the same row as and adjacent to the sixth pixel unit.

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