Display device

Abstract

The present invention discloses a display device, comprising: a substrate including a display area and a non-display area surrounding the display area; a sensor portion disposed in the display area; a plurality of first transistors disposed in the display area on the substrate and configured to include an oxide semiconductor layer; and a hydrogen capture pattern located in the sensor portion and disposed adjacent to the oxide semiconductor layer of the first transistors.

Description

Technical Field

[0001] This invention relates to a display device, and more specifically, to a light-emitting display device capable of improving the sensitivity of the sensor section and the reliability of its internal components. Prior Technology

[0002] Display devices, such as televisions, monitors, smartphones, tablets, and laptops, are used in various ways and forms to display images.

[0003] The display device includes a plurality of pixels for displaying images and has transistors for controlling the operation of each pixel.

[0004] In display devices, light-emitting display devices that incorporate light-emitting elements within the display panel without requiring a separate light source are considered competitive applications due to considerations of device compactness and clear color display.

[0005] The light-emitting device includes an anode and a cathode facing each other as electrodes, and an emitting layer located between the anode and the cathode, and may include a common layer for transferring holes and electrons to the emitting layer.

[0006] Meanwhile, recent display devices are considering structures that include sensor sections for various purposes, and various research and developments are underway in this regard. Summary of the Invention

[0007] The object of the present invention is to provide a light-emitting display device with improved sensitivity of the sensor section.

[0008] Another object of the present invention is to provide a light-emitting display device that can improve the reliability of transistors.

[0009] Another object of the present invention is to provide a display device that further includes a structure capable of preventing the effects of hydrogen gas or the like generated from an array structure (such as adjacent thin-film transistors) that does not have a metal wiring configuration in the transmission region, thereby improving the reliability of the transmission region and increasing the transmittance of the transmission region.

[0010] Another object of the present invention is to provide a display device with improved reliability by further providing a hydrogen trapping pattern that can prevent the operation of the component from being degraded due to the movement between the insulating films caused by hydrogen generated during the process.

[0011] Another object of the present invention is to provide a display device in which a hydrogen trapping pattern can be formed without the provision of an additional layer, which can reduce the component failure rate due to hydrogen flow that may affect the operation of the component, thereby reducing the amount of materials (such as gases, etchants, etc.) used to manufacture the display device throughout the manufacturing process, thereby reducing the generation of greenhouse gases during the manufacturing process.

[0012] An embodiment of the present invention provides a display device, comprising: a substrate including a display area and a non-display area surrounding the display area; a sensor portion disposed in the display area; a plurality of first transistors disposed in the display area on the substrate and configured to include an oxide semiconductor layer; and a hydrogen capture pattern located in the sensor portion and disposed adjacent to the oxide semiconductor layer of the first transistors. [Simplified Explanation with Diagram]

[0013] The accompanying drawings, which illustrate embodiments of the invention and are incorporated in and form part of this application, together with the description, serve to explain the principles of the invention. In the drawings: Figure 1 is a plan view of a display device according to an embodiment of the present invention; Figure 2 is an enlarged view of the sensor section A1 in Figure 1; Figure 3 is the circuit diagram of the first and second sub-pixels in Figure 1; Figure 4 is a cross-sectional view taken along line II' of region MA in Figure 2; Figure 5 is a graph showing the wavelength-dependent transmittance of the hydrogen capture pattern included in the embodiments of the present invention; Figure 6 is a cross-sectional view of a transistor and a hydrogen trapping pattern disposed in the region of an infrared sensor according to an embodiment of the present invention; Figure 7 is a graph showing the IV characteristics of transistors in the display areas of the sensor section and non-sensor section in a display device without a hydrogen capture pattern; Figure 8 is a graph showing the IV characteristics of a transistor in the transmission region of a display device having a hydrogen trapping pattern according to an embodiment of the present invention; Figure 9 is a cross-sectional view of a display device according to an embodiment of the present invention; and Figures 10 to 12 are cross-sectional views of the transmission region according to various embodiments of the present invention. Implementation

[0014] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0015] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings. The same element symbols are used wherever possible in all drawings to denote the same or similar parts. In the following description of the invention, detailed descriptions of known functions and configurations incorporated herein will be omitted where such descriptions might obscure the subject matter. Furthermore, the element names used in the following description have been chosen for clarity of description and may differ from the element names in actual products.

[0016] The shapes, sizes, proportions, angles, numbers, and similarities shown in the drawings to illustrate various exemplary embodiments of the invention are given by way of example only. The invention is not limited to the descriptions in the drawings.

[0017] In this specification, unless a term such as "only" is used, one or more components may be added when terms such as "comprising," "having," "including," and the like are used. As used herein, the term "and / or" includes a single associated listed item and any and all combinations of two or more of the associated listed items.

[0018] When appearing before a list of components, expressions such as "at least one of" can modify the entire list of components, but not individual components within the list. The term "at least one" should be understood to include any and all combinations of one or more of the associated listed items. For example, "at least one of the first, second, and third components" means all combinations of the three listed components, combinations of any two of the three components, and each individual component: the first, second, and third components.

[0019] The terminology used herein is for the purpose of describing a particular style only and is not intended to limit the invention. As used herein, the terms "a" and "an" used to describe elements in the singular are intended to include a plurality of elements. Unless the context clearly indicates otherwise, elements described in the singular are intended to include a plurality of elements, and vice versa.

[0020] When interpreting components or values, even if no explicit description of the error or tolerance range is provided, the component or value should be interpreted as including the error or tolerance range.

[0021] In describing the various exemplary embodiments of the present invention, terms such as "on," "above," "below," and "next to" are used to describe the positional relationship between two elements. Unless "adjacent," "direct," or "close" is used, at least one intermediate element may exist between two elements. It will also be understood that when an element or layer is referred to as "connected" or "coupled" to another element or layer, it may be directly connected or coupled to the other element or layer, or there may be one or more intervening elements or layers.

[0022] In describing various exemplary embodiments of the invention, when using terms such as "after," "following," "next," and "before" to describe the temporal relationship between two events, another event may occur in between, unless more restrictive terms such as "just," "immediately," or "directly" are used.

[0023] In describing various exemplary embodiments of the present invention, terms such as "first" and "second" may be used to describe various components. These terms are intended to distinguish identical or similar components and do not limit the components. Therefore, throughout this specification, unless expressly stated otherwise, a "first" component may be the same as a "second" component within the technical concept of the present invention.

[0024] Features of the various embodiments of the present invention may be partially or wholly coupled or combined with each other, and may operate in various ways and be technology-driven, as will be fully understood by those skilled in the art. Embodiments of the present invention may be practiced independently of each other, or may be practiced together in an interdependent relationship.

[0025] Figure 1 is a plan view of a display device 1000 according to an embodiment of the present invention. Figure 2 is an enlarged view of the sensor section A1 of Figure 1. Figure 3 is a circuit diagram of the first sub-pixel SP1 and the second sub-pixel SP2 of Figures 1 and 2. Figure 4 is a cross-sectional view taken along line I-I' of the marked area MA in Figure 2. Figure 5 is a graph showing the wavelength-dependent transmittance of the hydrogen trapping pattern 280 included in an embodiment of the present invention.

[0026] As shown in FIG1, the display device 1000 according to an embodiment of the present invention includes a display panel DP, and the display panel DP may include a substrate 110 (FIG. 4) and a driving unit connected to the substrate 110. The substrate includes a display area AA and a non-display area NA surrounding the display area AA. The driving unit may be integrally integrated with an array configuration disposed in the display area AA on the substrate 110, or may be connected to the substrate 110 using a COG (Chip on Glass) method, or may include a printed circuit board connected to the substrate 110 via a film or connector using a COF (Chip on Film) method.

[0027] The display area AA can be the area for displaying an image. A plurality of subpixels SP are arranged in the display area AA of the display panel DP, and the subpixels SP can be used to display an image. In this specification, the display area AA may be referred to as the "active area," and the non-display area NA may be referred to as the "non-active area."

[0028] The display device 1000 may include a display panel DP and a housing (not shown) housing the sides and bottom of the display panel DP. The non-display area NA of the display panel DP may be hidden by the housing or covered by a separate printed film. A printed circuit film and / or a battery may be included between the bottom of the display panel DP and the housing.

[0029] The display panel DP includes a substrate 110 and an array configuration on the substrate 110. The substrate 110 may be formed of a flexible plastic material and therefore may have flexible properties. For example, the substrate 110 may include a first organic film and a second organic film overlapping each other, with an inorganic interlayer insulating film between them. The first organic film and the second organic film may include, for example, polyimide. In addition to polyimide, the first organic film and the second organic film may also include different organic films. As another example, the substrate 110 may include a thin glass material with flexibility.

[0030] The substrate 110 may include a first organic film and a second organic film, either of which is a PET (polyethylene terephthalate) film and the other is a polyimide film. When the first organic film and the second organic film of the substrate 110 are made of different organic materials, an adhesive film such as a pressure-sensitive adhesive (PSA) film may be included therebetween.

[0031] The substrate 110 is used to support and protect the components of the display device 1000 disposed thereon. The substrate 110 may include a display area AA for displaying images and a non-display area NA other than the display area AA.

[0032] The area where sub-pixels SP, such as first sub-pixel SP1 and second sub-pixel SP2, are arranged can be the display area AA (active area), while the area other than the display area AA can be the non-display area NA.

[0033] A non-display area NA can be located in the edge region of the display area AA surrounding the displayed image. At least one driving unit configured to drive the sub-pixel SP can be located in the non-display area NA. The driving unit may include a gate-in-panel (GIP). The gate-in-panel (GIP) can be connected to a plurality of gate lines GL of the display area AA and can be configured to sequentially provide gate voltage signals to the gate lines GL. The gate-in-panel (GIP) may further include transistors stacked in the same manner as those disposed in the sub-pixel SP.

[0034] In the non-display area NA, various additional components can be further configured to drive the sub-pixels SP, such as the first sub-pixel SP1 and the second sub-pixel SP2 in the display area AA.

[0035] As shown in FIG1, the display device 1000 according to an embodiment of the present invention may include a display area AA, which includes a first area AA1 and a second area AA2. The first area includes a plurality of sensor units A1 and A2, and the second area does not have sensor units. Therefore, the display area AA can be used to sense various functions and display functions.

[0036] The second region AA2, which does not have a sensor unit, includes a plurality of first sub-pixels SP1. The first region AA1, which has a sensor unit, includes a plurality of second sub-pixels SP2 and a transmissive region TA. In the first region AA1 with the transmissive region TA, no light-shielding wiring or the like is provided in the area where the transmissive region TA is located. The arrangement density of the first sub-pixels SP1 in the second region AA2, which does not have a sensor unit, can be greater than the arrangement density of the second sub-pixels SP2 in the first region AA1, which includes sensor units A1 and A2. The resolution of the first region AA1, which includes sensor units A1 and A2, can be lower than the resolution of the second region AA2.

[0037] Each of sensor units A1 and A2 may include a transmission region TA to increase sensitivity to light at various wavelengths. Sensor units A1 and A2 are provided for various purposes and may include, for example, infrared sensors, ambient light detection sensors, fingerprint recognition sensors, cameras, biometric sensors, etc. Although two sensor units are illustrated in FIG1, embodiments of the present invention are not limited thereto. In modifications to embodiments of the present invention, three or more sensor units may be provided.

[0038] Sensor units A1 and A2 are used to sense light from the top of substrate 110, and the sensing accuracy may vary depending on the amount of light received. Therefore, the areas where sensor units A1 and A2 are located do not overlap with the light-shielding metal, so that external light can be collected by each sensor without obstruction. Sensor units A1 and A2 are located within display area AA and have display functions in addition to sensing operations, so they can contain a plurality of second sub-pixels SP2, as shown in FIG2. Wires such as gate lines, data lines, and power supply voltage lines used to drive the second sub-pixels SP2 contained in sensor units A1 and A2 can be arranged by bypassing the periphery of sensor units A1 and A2. In order for sensor units A1 and A2 to obtain a sufficient amount of received light using external light sensing, the area where no second sub-pixels SP2 are located can be designated as a transmissive area TA. The transmissive area TA may not have a light-shielding metal. Thus, the second sub-pixel SP2 contained in the sensor sections A1 and A2 is partially arranged in the sensor sections A1 and A2, and the second sub-pixel SP2 can be directly connected to the gate line, data line, power supply voltage line, etc. in the area other than the transmission area TA.

[0039] In sensor units A1 and A2, a plurality of second sub-pixels SP2 may be locally arranged to form a group. The group of second sub-pixels SP2 in sensor units A1 and A2 serves as the emitter placement area PG in sensor units A1 and A2. The emitter placement area PG may be configured so as not to overlap with the transmission area TA.

[0040] Multiple emitter placement areas PG can be spaced apart from each other in sensor sections A1 and A2. As shown in FIG2, a transmission area TA can be disposed between emitter placement areas PG. In some cases, when the emitter placement area PG is located outside the four sides of a square at the center, an alignment key can be disposed in a square inside the emitter placement area PG to align the position of sensor sections A1 and A2 in a portion of the display area AA of the display panel DP. In embodiments of the present invention, the shape of the emitter placement area PG or the arrangement shape of the hydrogen capture pattern 280 can be other shapes besides rectangles, such as circles, semicircles, polygons, or other shapes, but is not limited thereto.

[0041] The display device 1000 according to an embodiment of the present invention further includes a hydrogen trapping pattern 280 in a transmission region TA. The hydrogen trapping pattern 280 disposed in the transmission region TA of the sensor units A1 and A2 may have a transmittance depending on the wavelength of the light detected by the sensor units A1 and A2. For example, when the first sensor unit A1 is provided with an infrared sensor, the hydrogen trapping pattern 280 may be made of a material with high transmittance in the infrared wavelength range. For example, when the second sensor unit A2 is provided with a camera, the hydrogen trapping pattern 280 may be made of a material with high transmittance in the visible spectrum. In some cases, an ultraviolet sensor configured to sense ultraviolet light in the display region AA may be additionally provided as a configuration different from that of the first sensor unit A1 and the second sensor unit A2. The sensor units A1 and A2 may be disposed below the substrate 110, but the present invention is not limited thereto. Sensor units A1 and A2 can be formed by inserting these sensor units into substrate 110, and the configuration of the second sub-pixel SP2 formed on substrate 110 further includes the functions of sensor units A1 and A2.

[0042] A plurality of hydrogen trapping patterns 280 may be disposed in the transmission region TA. The hydrogen trapping patterns 280 are used to block hydrogen generated or flowing in the lower insulating film, and the hydrogen blocking function can be enhanced by making the width a of each hydrogen trapping pattern 280 greater than the spacing s between the hydrogen trapping patterns 280.

[0043] The inventors of this invention have determined that when the hydrogen trapping pattern 280 is made of indium zinc oxide in indium oxide, the transmittance in the infrared wavelength range (i.e., at a wavelength of approximately 900 nm) is 99% or higher, as shown in FIG5. The hydrogen trapping pattern 280 can be used to trap hydrogen generated in the array to stabilize the function of the transistors of adjacent sub-pixels and maintain the light transmittance in the sensor sections A1, A2 or the transmission region TA.

[0044] Meanwhile, as shown in FIG4, hydrogen gas may be generated during the formation of insulating films 120 (such as the first to tenth insulating films 122, 123, 124, 125, 126, 127, 128, 129, 130, 131) on the substrate 110, or during the hydrogenation process of the first active layer 151, or during the heat treatment process after film formation. Since the formation of insulating films 120 (such as the first to tenth insulating films 122, 123, 124, 125, 126, 127, 128, 129, 130, 131) is carried out separately, when hydrogen gas is contained in the insulating film in the deposition chamber during the formation of each insulating film, the residual hydrogen gas in the insulating film does not flow significantly. The first active layer 151 can be hydrogenated by filling the pores in the first active layer 151 with hydrogen gas remaining in the third to fifth insulating films 124, 125, 126 adjacent to the upper side of the first active layer 151 and the second insulating film 123 adjacent to the lower side of the first active layer 151 through heat treatment, so as to increase the carrier mobility of the polycrystalline silicon semiconductor layer. For this purpose, the second to fifth insulating films 123, 124, 125, 126 may contain silicon nitride films with high hydrogen content.

[0045] Silicon nitride films possess excellent barrier properties, but contain more hydrogen than silicon oxide films. Therefore, during the heat treatment process required to manufacture the first oxide transistor OT1 and the second oxide transistor OT2, hydrogen remaining in the second to fifth insulating films 123, 124, 125, and 126 located below the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2 may flow upward and escape.

[0046] The flow of hydrogen is random. Specifically, there is no light-shielding metal in the transmission region TA. Since no light-shielding metal is provided on each of the first to tenth insulating films 122, 123, 124, 125, 126, 127, 128, 129, 130, 131 on the substrate 110, hydrogen passing through the second to fifth insulating films 123, 124, 125, 126 of the polycrystalline transistor LT can flow radially and can be concentratedly applied to the transmission region TA.

[0047] According to an embodiment of the present invention, the display device 1000 is configured such that, based on a second active layer 182 and a third active layer 181 made of oxide semiconductor layers, an insulating film 120 disposed on a substrate 110 is divided into a first insulating film group 120A located at a lower position and a second insulating film group 120B located at an upper position, and a hydrogen capture pattern 280 is disposed between the first insulating film group 120A and the second insulating film group 120B in the transmission region TA. When the hydrogen capture pattern 280 is located on the first insulating film group 120A, hydrogen gas remaining in the first insulating film group 120A and flowing upward can be captured by the hydrogen capture pattern 280, which has good hydrogen capture capability, and abnormal operation of the first oxide transistor OT1 and the second oxide transistor OT2 with hydrogen gas can be prevented.

[0048] Furthermore, the second light-shielding pattern 162 of the first oxide transistor OT1 and the third light-shielding pattern 173 of the second oxide transistor OT2 may contain a metal such as titanium, which has hydrogen-capturing properties, thereby blocking the transfer of hydrogen from the first insulating film group 120A to the second active layer 182 and the third active layer 181 in the vertical direction.

[0049] The seventh insulating film 128 or the sixth insulating film 127, which are in direct contact with the lower side of the second active layer 182 of the first oxide transistor OT1 and the third active layer 181 of the second oxide transistor OT2, may contain a silicon oxide film having a lower hydrogen content than the silicon nitride film, thereby enabling interlayer blocking of hydrogen gas generated from the first to fifth insulating films 122, 123, 124, 125, 126 of the polycrystalline transistor LT.

[0050] Because the transistor arrangement density in the transmission region TA is low or zero, a large number of channels for hydrogen movement can be formed. In an embodiment of the present invention, a hydrogen trapping pattern 280 can be disposed in the transmission region TA, so that hydrogen generated from the polycrystalline transistor LT can be trapped by the hydrogen trapping pattern 280 in the transmission region TA, thereby blocking the flow of hydrogen and preventing hydrogen from transferring to the oxide transistors OT1 and OT2.

[0051] The first region AA1, where the sensor units A1 and A2 are located, includes a transmissive region TA that does not have a light-shielding metal or a second sub-pixel SP2, and therefore has a lower transistor arrangement density than the second region AA2, which is densely arranged with the first sub-pixel SP1.

[0052] The second sub-pixel SP2 of the first region AA1 containing sensor sections A1 and A2 and the first sub-pixel SP1 of the second region AA2 without sensor sections may contain the same circuit configuration, for example, as shown in FIG3. In some cases, the brightness of the region in the transmission region TA containing a small number of transistors in the sensor sections A1 and A2 may be compensated with a relatively low arrangement density depending on the difference in transistor arrangement density. For example, the size of the light-emitting device or the size of the transistor in at least one of the second sub-pixels SP2 in the first region AA1 may be increased. Alternatively, even if the transistors of the second sub-pixel SP2 of the first region AA1 containing sensor sections A1 and A2 and the first sub-pixel SP1 of the second region AA2 without sensor sections have the same layer structure, the width / length or carrier mobility of at least one active layer may be changed. However, embodiments of the present invention are not limited thereto.

[0053] The hydrogen trapping pattern 280 contained in the transmission region TA can be arranged adjacent to the second sub-pixel SP2 in the sensor sections A1 and A2 with a low arrangement density, thereby preventing hydrogen from flowing from the side of the second sub-pixel SP2 into the second active layer 182 of the first oxide transistor OT1 and the third active layer 181 of the second oxide transistor OT2. When the hydrogen trapping pattern 280 has a higher hydrogen trapping capability than the second active layer 182 and the third active layer 181, the hydrogen blocking effect of the hydrogen trapping pattern 280 on the second active layer 182 and the third active layer 181 is further enhanced.

[0054] Embodiments of the present invention are not limited to the configuration where the transmission region TA is disposed in the sensor sections A1 and A2. For example, the transmission region TA may be disposed in a second region AA2 without a sensor section, and the hydrogen trapping pattern 280 may also be disposed in the transmission region TA. In short, the hydrogen trapping pattern 280 with high transmittance can be disposed in the transmission region TA of the transparent display device. Thus, the hydrogen trapping pattern 280 disposed in the transmission region TA of the transparent display device can be made of a material with high transmittance in the visible spectrum (e.g., at wavelengths of 400 nm to 700 nm). For example, when the hydrogen trapping pattern 280 is made of indium oxide, as shown in FIG. 5, the hydrogen trapping pattern 280 can have a transmittance of about 85% or higher.

[0055] Examples of indium oxide used for the hydrogen capture pattern 280 include indium oxide, indium zinc oxide, indium gallium oxide, and indium gallium zinc oxide. However, in embodiments of the present invention, the material for the hydrogen capture pattern 280 is not limited to indium oxide. The material for the hydrogen capture pattern 280 may vary depending on the wavelength of the light received or sensed by the sensor units A1 and A2. When the sensor unit has photoreceiving properties for any wavelength of infrared light, visible light, and ultraviolet light, a material that selectively transmits light at the corresponding wavelength can be used.

[0056] Simultaneously, the hydrogen capture pattern 280 disposed in the transmission region TA can be disposed in a planar manner adjacent to the second active layer 182 of the first oxide transistor OT1 or the third active layer 181 of the second oxide transistor OT2 disposed in the second sub-pixel SP2 in the transmission region TA of the sensor units A1 and A2. In embodiments of the present invention, the hydrogen capture pattern 280 may be located on the same layer as the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2 or be coplanar with them.

[0057] The sub-pixel SP of the first sub-pixel SP1 and the second sub-pixel SP2 contained in the display area AA may include, for example, a first transistor T1, a second transistor T2, a storage capacitor Cst, a compensation circuit CC, and a light-emitting device ED, as shown in Figure 3.

[0058] For example, the first transistor T1 can be a switching transistor, while the second transistor T2 can be a driving transistor.

[0059] The first electrode (e.g., drain electrode) of the first transistor T1 is electrically connected to the data line DL, and its second electrode (e.g., source electrode) is electrically connected to the first node N1. The gate electrode of the first transistor T1 is electrically connected to the gate line GL. The first transistor T1 is used to transmit a data signal supplied through the data line DL to the first node N1 in response to a scan signal supplied through the gate line GL.

[0060] The storage capacitor Cst is electrically connected to the first node N1 and is charged by the voltage applied to the first node N1.

[0061] The first electrode (e.g., drain electrode) of the second transistor T2 receives a high-potential drive voltage EVDD, and its second electrode (e.g., source electrode) is electrically connected to the first electrode (e.g., anode) of the light-emitting device ED. The second transistor T2 can be used to control the amount of drive current flowing to the light-emitting device ED in response to a voltage applied to the gate electrode.

[0062] The semiconductor layer of the first transistor T1 and / or the second transistor T2 may comprise silicon, such as amorphous silicon (a-Si), polycrystalline silicon (poly-Si), or low-temperature polycrystalline silicon (poly-Si), or may comprise oxides, such as IGZO (indium gallium zinc oxide), but the invention is not limited thereto. At least one of the first transistor T1 or the second transistor T2 may comprise an oxide semiconductor layer, which can be formed at low temperatures compared to using other materials, maintains amorphous properties, and exhibits high carrier mobility.

[0063] The light-emitting device (ED) is used to output light corresponding to the driving current. The light-emitting device (ED) can output light corresponding to any color selected from red, green, blue, and white.

[0064] The light-emitting device (ED) may include an anode, an emitting layer disposed on the anode, and a cathode configured to be connected to a low-potential driving voltage (EVSS) or a common voltage. The emitting layer may be provided to emit light of the same color, such as white light, for each sub-pixel (SP), or to emit light of different colors, such as red, green, or blue light, for each sub-pixel (SP).

[0065] The light-emitting device (ED) can be a top-emitting diode or a bottom-emitting diode.

[0066] A compensation circuit CC can be disposed in sub-pixel SP to compensate for the threshold voltage of the second transistor T2, etc. The compensation circuit CC can consist of one or more transistors. The compensation circuit CC can include one or more transistors and capacitors, and can be configured in various ways depending on the compensation method. A sub-pixel containing the compensation circuit CC can contain circuits with various structures having different numbers of transistors and / or capacitors (such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, 7T2C, etc.).

[0067] Figure 4 shows the second sub-pixel SP2, which includes both polycrystalline transistor LT and oxide transistors OT1 and OT2. The sub-pixel in Figure 4 represents the second sub-pixel SP2 adjacent to the transmission region TA. The first sub-pixel SP1 in the second region AA2, where sensor sections A1 and A2 are not provided, may also have the same configuration as the second sub-pixel SP2 in Figure 4.

[0068] As shown in Figure 4, the polycrystalline transistor LT may include: a first active layer 151 made of polycrystalline silicon on a substrate 110; a first gate electrode 161 overlapping the first active layer 151; and a first source-drain electrode 171 spaced apart from the first gate electrode 161 and disposed above the first active layer 151.

[0069] The first light-shielding pattern 141 may be disposed below the first active layer 151 of the polycrystalline transistor LT to prevent light caused by light on the lower side of the substrate 110 from incident on the first active layer 151.

[0070] Figure 4 shows a polycrystalline transistor LT in a state where, for example, the first gate electrode 161 is electrically connected to the first light-shielding pattern 141 via the first connection electrode 172. When the first light-shielding pattern 141 is electrically connected to the first gate electrode 161, rapid operation and increased conduction current can be easily achieved by dual-gate drive. However, the shape of the polycrystalline transistor LT in the display device 1000 according to an embodiment of the present invention is not limited to this. Another source-drain electrode may be connected to the first active layer 151. The first source-drain electrode 171 and the other source-drain electrode may be arranged symmetrically with respect to the first active layer 151.

[0071] The first insulating film 122, which serves as a buffer layer, can be disposed between the substrate 110 and the first light-shielding pattern 141, thereby preventing impurities contained in the substrate 110 or impurities introduced from the lower side through the substrate 110 from being transferred to the upper array.

[0072] The first oxide transistor OT1 and the second oxide transistor OT2 may be located at least above the first active layer 151 of the polycrystalline transistor LT. This is to prevent the oxide transistors OT1 and OT2 from being affected by the heat generated during crystallization when a thermal process is performed at a crystallization temperature higher than or equal to a certain crystallization temperature after the first active layer 151 of the polycrystalline transistor LT is formed in an amorphous state on the substrate 110.

[0073] The first oxide transistor OT1 and the second oxide transistor OT2 disposed in the second sub-pixel SP2 may have different structures depending on their characteristics. The first oxide transistor OT1 may include: a second active layer 182 made of oxide semiconductor; a second gate electrode 191 overlapping the second active layer 182; and a second source-drain electrode 202 and a third source-drain electrode 203 spaced apart from the second gate electrode 191 and disposed on both sides of the second active layer 182. The second oxide transistor OT2 may include: a third active layer 181 made of oxide semiconductor; a third gate electrode 192 overlapping the third active layer 181; and a fourth source-drain electrode 204 and a fifth source-drain electrode 205 spaced apart from the third gate electrode 192 and disposed on both sides of the third active layer 181. By adjusting the distance between the second light-shielding pattern 162 and the third light-shielding pattern 173 located below the second active layer 182 and the third active layer 181 and / or the connection between the third light-shielding pattern 173 and the fifth source-drain electrode 205, the first oxide transistor OT1 and the second oxide transistor OT2 can have different characteristics.

[0074] In some cases, the first oxide transistor OT1 can be used to increase the conduction current by connecting the second gate electrode 191 and the second light-shielding pattern 162, and can have high speed characteristics.

[0075] The second light-shielding pattern 162 of the first oxide transistor OT1 can be located on the same layer as the first gate electrode 161 of the polycrystalline transistor LT, and the third light-shielding pattern 173 of the second oxide transistor OT2 can be located on the same layer as the first source-drain electrode 171 and the first connection electrode 172 of the polycrystalline transistor LT.

[0076] According to embodiments of the present invention, the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2 may have different carrier mobilities. For example, the second active layer 182 may have a higher carrier mobility than the third active layer 181. To change the carrier mobility, the second active layer 182 may further include an oxide semiconductor layer compared to the third active layer 181.

[0077] Referring to Figure 2, the first sensor unit A1 may include a transmission region TA and an emission region PG. In embodiments of the present invention, the size of the area of ​​the transmission region TA may differ from the size of the area of ​​the emission region PG. For example, the size of the area of ​​the transmission region TA may be larger than the size of the area of ​​the emission region PG, but is not limited thereto. Furthermore, the size of the area of ​​the transmission region TA may differ from the size of the area of ​​the hydrogen capture pattern 280. For example, the size of the area of ​​the transmission region TA may be larger than the size of the area of ​​the hydrogen capture pattern 280, but is not limited thereto. That is, the combined size of the areas of the hydrogen capture pattern 280 may be smaller than the size of the area of ​​the transmission region TA. Additionally, the combined size of the areas of the hydrogen capture pattern 280 may be larger than the size of the emission region PG.

[0078] In embodiments of the present invention, the size of the sheet portion of the hydrogen capture pattern 280 may differ from the area of ​​at least one of the first active layer 151, the second active layer 182, and the third active layer 181. For example, some or all of the sheet portion of the hydrogen capture pattern 280 may be larger than, or smaller than, the area of ​​at least one of the first active layer 151, the second active layer 182, and the third active layer 181. In other embodiments of the present invention, some of the sheet portion of the hydrogen capture pattern 280 may be larger than the area of ​​at least one of the first active layer 151, the second active layer 182, and the third active layer 181, and some of the sheet portion of the hydrogen capture pattern 280 may be smaller than the area of ​​at least one of the first active layer 151, the second active layer 182, and the third active layer 181.

[0079] In embodiments of the present invention, the sizes or areas of the portions of the hydrogen capture pattern 280 may differ from one another. For example, some portions of the hydrogen capture pattern 280 may be larger or smaller than other portions of the hydrogen capture pattern 280. In embodiments of the present invention, portions of different sizes of the hydrogen capture pattern 280 may be arranged based on a specific pattern in the transmission region TA. For example, larger portions of the hydrogen capture pattern 280 may be arranged closer to the emitter placement region PG or the second sub-pixel SP2, or vice versa. In other embodiments of the present invention, smaller portions of the hydrogen capture pattern 280 may be located between adjacent larger portions of the hydrogen capture pattern 280, but are not limited thereto. Additionally, the second sub-pixel SP2 may be located in the emitter placement region PG. In embodiments of the present invention, the hydrogen capture pattern 280 may surround the emitter placement region PG in the first sensor portion A1, or the emitter placement region PG may surround the hydrogen capture pattern 280, or both.

[0080] Additionally, the sheet portions of the hydrogen capture pattern 280 may have different thicknesses, or the thickness within a sheet portion may vary to have different thicknesses. For example, a smaller sheet portion of the hydrogen capture pattern 280 may have a greater thickness than a larger sheet portion of the hydrogen capture pattern 280, or vice versa. When the sheet portions of the hydrogen capture pattern 280 have different thicknesses, the thicker portions may be located at the periphery, while the thinner portions may be located in the middle of the sheet portion, or vice versa, but are not limited thereto.

[0081] In embodiments of the present invention, for example, each piece of the hydrogen capture pattern 280 may have different hydrogen capture capabilities based on different densities or constituent materials, but is not limited thereto.

[0082] In embodiments of the present invention, the pattern or arrangement of the sheet portion of the hydrogen capture pattern 280 may be changed. For example, the sheet portion of the hydrogen capture pattern 280 does not need to be arranged in a matrix pattern, but may be arranged in a circular pattern or other patterns, but is not limited thereto.

[0083] The polycrystalline transistor LT and the first oxide transistor OT1 can be the first transistor T1 shown in Figure 3 or a switching transistor capable of fast operation. The polycrystalline transistor LT and the first oxide transistor OT1 can receive an EM signal from the transmit control line or a scan signal from the gate line GL. The second oxide transistor OT2, having a third active layer 181 with a carrier mobility lower than that of the second active layer 182, can obtain a certain range of gate voltage (Vgs) variation from the off state to the on state in the IV curve, which is beneficial for grayscale expression, and therefore can be used as a driving transistor configured to supply drive current to the light-emitting device ED. In the sub-pixel SP of Figure 3, the second oxide transistor OT2 can be used as the second transistor T2.

[0084] In Figure 4, the fifth source-drain electrode 205, connected to the third active layer 181 of the second oxide transistor OT2, is shown connected to a third light-shielding pattern 173 that extends further from one side than the third active layer 181 and is located below the third active layer 181. This stabilizes the potential of the third light-shielding pattern 173 and prevents the effects of parasitic capacitance in the third active layer 181. This configuration can be exemplary, and in some cases, the third active layer 181 and the third light-shielding pattern 173 can be electrically isolated from each other.

[0085] As shown in Figure 4, the hydrogen trapping pattern 280 in the transmission region TA may be located on the same layer as the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2, but embodiments of the present invention are not limited thereto. For example, the hydrogen trapping pattern 280 in the transmission region TA may be located on a different layer than the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2, such as on a layer above or below one or more layers having the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2.

[0086] Thus, the hydrogen trapping pattern 280 may contain the same material as the oxide semiconductor layers of the second active layer 182 and the third active layer 181. However, the display device according to embodiments of the present invention is not limited thereto. The material for the hydrogen trapping pattern 280 may be replaced by any material that has hydrogen trapping function but does not impair the light receiving sensitivity of the sensor portions A1 and A2 or the transmittance of the transmission region TA. In some cases, the hydrogen trapping pattern 280 may contain a material with a higher hydrogen trapping capability than the second active layer 182 and the third active layer 181. The hydrogen trapping pattern 280 can be formed by changing the composition ratio of the oxide semiconductor or adjusting the thickness when forming the second active layer 182 and the third active layer 181, thereby increasing the transmittance of light at a specific wavelength.

[0087] The transmission region TA where the hydrogen capture pattern 280 is located is a region without light-shielding metal. When hydrogen generated from the array in the adjacent first sub-pixel SP1 flows upward, the hydrogen is captured by the hydrogen capture pattern 280, which has excellent hydrogen capture capability, thereby preventing the operation of oxide transistors OT1 and OT2 containing oxide semiconductors around or on the hydrogen capture pattern 280 from deteriorating.

[0088] The polycrystalline transistor LT, the first oxide transistor OT1, and the second oxide transistor OT2 include an insulating film to insulate the first to third light-shielding patterns 141, 162, 173 from the first to third active layers 151, 182, 181; the first to third active layers 151, 182, 181 from the first to third gate electrodes 161, 191, 192; and the first to third gate electrodes 161, 191, 192 from the first source-drain electrode 171 and the second to fifth source-drain electrodes 202, 203, 204, 205.

[0089] Referring to Figure 4, the layer structure of the display device is as follows.

[0090] A plurality of insulating films 120 (such as the first to tenth insulating films 122, 123, 124, 125, 126, 127, 128, 129, 130, 131) can be stacked on the display area AA and the non-display area NA of the substrate 110, such that the active layers 151, 182, 181 and the electrodes 161, 191, 192, 171, 172, 202, 203, 204, 205 constituting the transistors LT, OT1, OT2 can be insulated from each other.

[0091] A first insulating film 122 is disposed on the display area AA and the non-display area NA on the substrate 110. The first insulating film 122 may be referred to as a buffer film and may have the same function as buffer films known in the art. The first insulating film 122 may be disposed on the substrate 110 to protect the structure located on the substrate 110 from the influence of moisture penetration into the substrate 110 and to planarize the surface of the substrate 110.

[0092] The first insulating film 122 may be disposed upward to the edge of the substrate 110 to prevent moisture from penetrating from the edge of the substrate 110. The first insulating film 122 may be a single inorganic film or may be composed of multiple inorganic films stacked alternately.

[0093] For example, the first insulating film 122 may comprise at least one inorganic film selected from silicon oxide film (SiOx), silicon nitride film (SiNx), or silicon oxynitride film (SiOxNy), or may comprise a multilayer film on which the above inorganic films are stacked.

[0094] The first light-shielding pattern 141 may be disposed on the first insulating film 122. For example, the first light-shielding pattern 141 may be made of a conductive metal material, and the conductive metal material may include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The conductive metal material may be provided in a single-layer or multi-layer structure.

[0095] The second insulating film 123 may be disposed on the first insulating film 122 and the first light-shielding pattern 141. The second insulating film 123 may be used as, for example, a second buffer layer. The second insulating film 123 may comprise an inorganic film, such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multilayer film thereof.

[0096] A first active layer 151 made of polycrystalline silicon may be disposed on the second insulating film 123. The first active layer 151 may be polycrystalline by depositing amorphous silicon on the second insulating film 123 and subsequently crystallizing it.

[0097] A third insulating film 124 may be disposed on the second insulating film 123 and the first active layer 151. The third insulating film 124 may be used as the gate insulating film of a polycrystalline transistor LT. The third insulating film 124 may contain inorganic materials. The inorganic materials may include, for example, silicon nitride (SiNx) films.

[0098] The first gate electrode 161 and the second light-shielding pattern 162 may be disposed on the third insulating film 124. The first gate electrode 161 and the second light-shielding pattern 162 may be formed of, for example, a conductive metal material, and specifically, the conductive metal material may include at least one selected from: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The conductive metal material may be provided in a single-layer or multi-layer structure.

[0099] The fourth insulating film 125 and the fifth insulating film 126 may be disposed on the third insulating film 124. The fourth insulating film 125 and the fifth insulating film 126 may be made of inorganic insulating materials. For example, the fourth insulating film 125 may be a silicon nitride film, and the fifth insulating film 126 may be a silicon oxide film. The fourth insulating film 125 and the fifth insulating film 126 may also be used as interlayer insulating films for polycrystalline transistors (LTs).

[0100] A first source / drain electrode 171 and a first connection electrode 172 may be formed on a fifth insulating film 126 using a conductive metal material. Specifically, the conductive metal material may comprise at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The conductive metal material may be provided in a single-layer or multi-layer structure.

[0101] The first source-drain electrode 171 can be connected to the first active layer 151 through contact holes 171a formed in the fifth insulating film 126, the fourth insulating film 125 and the third insulating film 124.

[0102] For example, the first connecting electrode 172 can be connected to the first gate electrode 161 through contact holes 172a formed in the fifth insulating film 126 and the fourth insulating film 125, and can be connected to the first light-shielding pattern 141 through contact holes 172b formed in the fifth insulating film 126, the fourth insulating film 125, the third insulating film 124 and the second insulating film 123.

[0103] The third light-shielding pattern 173 can be disposed on the fifth insulating film 126 using the same material as the first source-drain electrode 171 and the first connecting electrode 172.

[0104] A sixth insulating film 127 and a seventh insulating film 128 may be disposed on the fifth insulating film 126. The sixth insulating film 127 and the seventh insulating film 128, containing inorganic insulating materials, can be used to protect the polycrystalline transistor LT and achieve surface planarization of the first oxide transistor OT1 and the second oxide transistor OT2, and can also serve as buffer films. For example, to prevent the influence of hydrogen flow attributable to the insulating film contained in the polycrystalline transistor LT on the first oxide transistor OT1 and the second oxide transistor OT2, the seventh insulating film 128, which is in contact at least with the lower surfaces of the second active layer 182 and the third active layer 181 of the first oxide transistor OT1 and the second oxide transistor OT2, may be a silicon oxide film. The sixth insulating film 127 may be a silicon oxide film or a silicon nitride film.

[0105] The second active layer 182 and the third active layer 181 are formed on the seventh insulating film 128 using an oxide semiconductor. The oxide semiconductor may be formed by a combination of at least one metal selected from the group consisting of zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti) with an oxide. In some cases, the oxide semiconductor material may further contain a metal with high conductivity, such as iron (Fe), to improve carrier mobility.

[0106] More specifically, examples of oxide semiconductor materials constituting the second active layer 182 and the third active layer 181 include zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), iron indium zinc oxide (FIZO), etc.

[0107] Additionally, a hydrogen trapping pattern 280 is disposed on a seventh insulating film 128 corresponding to the transmission region TA. The hydrogen trapping pattern 280 selectively transmits light received or sensed by the transmission region TA or sensor portions A1, A2, and may be made of, for example, indium oxide. The hydrogen trapping pattern 280 may contain a material with a higher hydrogen trapping capability than the oxide semiconductor forming the second active layer 182 and the third active layer 181, in order to further prevent hydrogen from migrating to the second active layer 182 and the third active layer 181 disposed at the second sub-pixel SP2 adjacent to the transmission region TA.

[0108] An eighth insulating film 129 is disposed on the hydrogen trapping pattern 280, the second active layer 182, and the third active layer 181. The eighth insulating film 129 can serve as the gate insulating film for the first oxide transistor OT1 and the second oxide transistor OT2. The eighth insulating film 129 comprises an inorganic insulating material. The eighth insulating film 129 can be a silicon oxide film to minimize the impact of hydrogen on the second active layer 182 and the third active layer 181.

[0109] As shown, an eighth insulating film 129 can be formed to cover the upper and side surfaces of the hydrogen capture pattern 280, as well as the second active layer 182 and the third active layer 181 made of oxide semiconductor. The eighth insulating film 129 can be formed by extending to the sides and penetrating the entirety of the display area AA and the non-display area NA. In some cases, the eighth insulating film 129 may be disposed only between the channel regions of the second active layer 182 and the third active layer 181 and the subsequently formed second gate electrode 191 and third gate electrode 192.

[0110] The eighth insulating film 129 can be provided in a multilayer structure. When the eighth insulating film 129 has a multilayer structure, the insulating film in contact with the second active layer 182 and the third active layer 181 can be an inorganic insulating film with a low hydrogen content.

[0111] The second gate electrode 191 and the third gate electrode 192, which overlap with the corresponding portions of the second active layer 182 and the third active layer 181, may be disposed on the eighth insulating film 129.

[0112] The second gate electrode 191 and the third gate electrode 192 may be formed of a conductive metal material. Specifically, the conductive metal material may include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The second gate electrode 191 and the third gate electrode 192 may have a multilayer film structure comprising at least two conductive metal materials. The conductive metal materials may be provided in a single-layer or multilayer structure.

[0113] When the second gate electrode 191 and the third gate electrode 192 are used as a mask to dope the second active layer 182 and the third active layer 181, the channels of the second gate electrode 191 and the third gate electrode 192 can be the regions overlapping with the second gate electrode 191 and the third gate electrode 192. The regions of the second active layer 182 and the third active layer 181 that overlap with the second gate electrode 191 and the third gate electrode 192 are not doped with impurities and are used as channels for the oxide semiconductor layer.

[0114] Then, the regions in the second active layer 182 and the third active layer 181 that are doped with impurities can be connected to the second source-drain electrode 202 and the third source-drain electrode 203 and the fourth source-drain electrode 204 and the fifth source-drain electrode 205 that are spaced apart from each other, and can be used as conductive source-drain regions.

[0115] The ninth insulating film 130 and the tenth insulating film 131 may be formed sequentially on the eighth insulating film 129, the second gate electrode 191, and the third gate electrode 192.

[0116] The ninth insulating film 130 and the tenth insulating film 131 may be inorganic insulating films. For example, the ninth insulating film 130 and the tenth insulating film 131 may contain at least one inorganic material selected from silicon oxide film (SiOx), silicon nitride film (SiNx), and silicon oxynitride film (SiOxNy).

[0117] A second connection electrode 201 may be formed on the tenth insulating film 131 to protect and cover the first source-drain electrode 171 using a conductive metal material. Specifically, the conductive metal material may comprise at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The conductive metal material may be provided in a single-layer or multi-layer structure.

[0118] The second connecting electrode 201 can be connected to the first source-drain electrode 171 through contact holes formed in the tenth insulating film 131, the ninth insulating film 130, the eighth insulating film 129, the seventh insulating film 128, and the sixth insulating film 127, and has both conductive function and function of protecting the first source-drain electrode 171. In addition, the second connecting electrode 201 can be located around the transmission region TA, and can be used to prevent impurities such as hydrogen gas remaining in the sixth to tenth insulating films 127, 128, 129, 130, and 131 at the second sub-pixel SP2 from transferring to the insulating film on the adjacent side.

[0119] The second source-drain electrode 202 and the third source-drain electrode 203 are connected to the second active layer 182 through contact holes formed in the tenth insulating film 131, the ninth insulating film 130 and the eighth insulating film 129.

[0120] The fourth source-drain electrode 204 and the fifth source-drain electrode 205 are connected to the third active layer 181 through contact holes formed in the tenth insulating film 131, the ninth insulating film 130, and the eighth insulating film 129. The fifth source-drain electrode 205 may extend further outward than the third active layer 181 and can be connected to the third light-shielding pattern 173 located below the third active layer 181 through contact holes formed in the tenth insulating film 131, the ninth insulating film 130, the eighth insulating film 129, the seventh insulating film 128, and the sixth insulating film 127.

[0121] Referring to the diagrams and experiments, the principle of the hydrogen capture pattern 280 in the transmission region TA is described as follows.

[0122] Figure 6 is a cross-sectional view showing a transistor and hydrogen capture pattern disposed in the region of the infrared sensor IRS according to an embodiment of the present invention.

[0123] Figure 6 shows the sensor portion of the infrared sensor IRS disposed below the substrate 110. A first insulating film group 120A is disposed between the substrate 110 and the second active layer 182 made of oxide semiconductor material, and a second insulating film group 120B is disposed on the second active layer 182. The first insulating film group 120A may include a lower insulating film 1200A located below the first source-drain electrode 171 of the polycrystalline transistor LT (Figure 4) and an upper insulating film 1200B located on the first source-drain electrode 171.

[0124] The lower insulating film 1200A contains a silicon nitride film and is made of polycrystalline silicon through a heat treatment process of hydrogenation. The pores in the first active layer 151 can be filled with hydrogen gas H contained in the lower insulating film 1200A.

[0125] Meanwhile, unlike polycrystalline silicon, the second active layer 182 or the third active layer 181, which controls the carrier mobility through the pores in the oxide semiconductor, can be used to prevent the influence of hydrogen H from the contacting insulating film by forming the upper insulating film 1200B of the first insulating film group 120A into a silicon oxide film, maintain the internal pores, and prevent changes in electrical properties.

[0126] Furthermore, the second insulating film group 120B may include an interlayer insulating film 1200C and an eighth insulating film 129 closest to the second active layer 182 made of oxide semiconductor material. The eighth insulating film 129 is in direct contact with the second active layer 182 and can be used as a gate insulating film, and may be made of a silicon oxide film having low hydrogen transfer capability to the second active layer 182.

[0127] As shown in Figure 6, a hydrogen trapping pattern 280 made of indium oxide or the like, which has excellent infrared transmittance, is disposed around the second active layer 182 of the oxide transistor OT. When hydrogen H remaining in the first insulating film group 120A between the substrate 110 and the second active layer 182 flows upward during a manufacturing process such as heat treatment of the oxide transistor OT, the hydrogen H can be trapped by the hydrogen trapping pattern 280 around the oxide transistor OT. Additionally, when the hydrogen trapping pattern 280 has a higher hydrogen trapping capability than the second active layer 182, changes in the characteristics of the oxide transistor OT containing the second active layer 182 due to concentrated application of hydrogen to the second active layer 182 can be prevented.

[0128] Additionally, the hydrogen capture pattern 280 has approximately 99% infrared (IR) transmittance and is responsible for hydrogen capture without reducing the infrared sensitivity of the infrared sensor (IRS).

[0129] Figure 7 is a graph showing the IV characteristics of transistors in the active regions of the sensor section and non-sensor section in a display device without a hydrogen trapping pattern. Figure 8 is a graph showing the IV characteristics of transistors in the transmission region of a display device with a hydrogen trapping pattern in the transmission region according to an embodiment of the present invention.

[0130] As shown in Figure 7, in the display device of Figure 1, when there is no hydrogen capture pattern in the sensor section, the active area outside the sensor section contains densely arranged first sub-pixels SP1, but no transmission area. In the active area outside the sensor section, the oxide transistor in the transistor (SP1 TR) contains an active layer made of oxide semiconductor material. This active layer blocks hydrogen from the interlayer insulating film of the lower polycrystalline transistor to a certain extent, so that the current change depending on the gate voltage has conduction and turn-off characteristics.

[0131] On the other hand, in the display device shown in FIG1, when the sensor section does not have a hydrogen capture pattern, the active area in the sensor section does not include the second sub-pixel SP2 provided in the transmission area, and therefore the arrangement density of the transistors (SP2 TR) in the sensor section is low, and the active layer made of oxide semiconductor material of oxide transistors in the sensor section is sparsely provided, so that hydrogen passing through the first insulating film group 120A is concentratedly applied to the transistors (SP2 TR) in the sensor section, thereby causing the active layer made of oxide semiconductor material to lose its internal channel characteristics and become conductive, just like the transistors (SP2 TR) in the sensor section of FIG7.

[0132] The display device according to an embodiment of the present invention includes a hydrogen trapping pattern 280 disposed in the transmission region, as shown in Figures 1 to 4, thereby preventing hydrogen from flowing into the oxide semiconductor layer of the transistor disposed in the sensor section around the transmission region with a low arrangement density, so that the transistor in the sensor section can stably maintain the on-off characteristics depending on the gate voltage, as shown in Figure 8.

[0133] Figure 9 is a cross-sectional view of a display device 1000 according to an embodiment of the present invention.

[0134] As shown in FIG9, compared with the structure of the display device described in FIG4, the display device 1000 according to an embodiment of the present invention is configured to further include a light-emitting device 300 (ED in FIG3) connected to the second oxide transistor OT2.

[0135] Describe any additional configurations besides the same configurations described above.

[0136] As shown in Figure 9, a planarization film 135 can be disposed on transistors LT, OT1, and OT2. The planarization film 135 can be located on the second connecting electrode 201 and the second to fifth source and drain electrodes 202, 203, 204, and 205 to achieve surface planarization.

[0137] The planarization film 135 may contain an organic material. The organic material may contain at least one selected from acrylic resin, phenolic resin, polyimide resin, unsaturated polyester resin, polyamide resin, benzocyclobutene resin, polystyrene resin, and polyphenylene sulfide resin.

[0138] The planarization film 135 may have a single-layer or multi-layer structure. When the planarization film 135 has a multi-layer structure, some layers of the planarization film are further provided with connecting electrodes, which can be connected to the fourth source-drain electrode 204 and the first electrode 310 of the light-emitting device 300 at the lower position.

[0139] The light-emitting device 300 can be disposed on the planarization film 135.

[0140] The first electrode 310 is further disposed on the planarization film 135 and can be connected to one of the second to fifth source and drain electrodes 202, 203, 204, and 205 through the contact holes in the planarization film 135.

[0141] The first electrode 310 may include, for example, a reflective electrode, and may be used to block light incident on transistors LT, OT1, and OT2 below the light-emitting device 300. The first electrode 310 may have, for example, a stacked structure of a first transparent electrode, a reflective electrode, and a second transparent electrode. The second transparent electrode, serving as the uppermost electrode of the first electrode 310, may be used to lower the hole injection barrier at the interface with the intermediate layer 320, which is a dielectric. Here, the first and second transparent electrodes may be transparent oxide electrodes made of ITO, IZO, etc. The reflective electrode may contain silver, a silver alloy (such as APC (Ag-Pd-Cu)), aluminum, or an aluminum alloy.

[0142] The embankment 350 is disposed at the edge of the first electrode 310, and the open areas of the embankment 350 in at least the second sub-pixel SP2 and the first sub-pixel SP1 can be used as emitters.

[0143] Furthermore, the barrier 350 may include a light-shielding barrier, or may include a transparent barrier and a light-shielding barrier, thereby blocking light passing through the second sub-pixel SP2 in the sensor section from entering the transmission area of ​​the adjacent sensor section through the light-shielding barrier.

[0144] The light-emitting device 300 includes a first electrode 310, an intermediate layer 320, and a second electrode 330. After the embankment 350 of the open emitting part is provided at the edge of the first electrode 310, the intermediate layer 320 and the second electrode 330 can be provided sequentially.

[0145] For process integrity, the intermediate layer 320 and the second electrode 330 can be disposed not only in the second sub-pixel SP2 and the first sub-pixel SP1, but also in the transmissive region TA. However, the display device according to embodiments of the present invention is not limited thereto. Other configurations of the transmissive region TA will be described later.

[0146] The intermediate layer 320 may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. The intermediate layer 320 may be provided in the form of a plurality of stacks comprising hole transport layers, light-emitting layers, and electron transport layers, and may also be formed as a series structure including charge generation layers between the stacks. The charge generation layers may include, for example, n-type charge generation layers and p-type charge generation layers.

[0147] The second electrode 330 can be provided with a small thickness by forming a transparent electrode made of ITO, IZO, etc., or a reflective transparent electrode made of silver, silver alloy, magnesium, magnesium alloy, ytterbium (Yb), or ytterbium alloy. In another embodiment, the second electrode 330 can be formed with a small thickness or by partially removing it in the transmission region TA to increase the transmittance of the transmission region TA.

[0148] One of the first electrode 310 and the second electrode 330 can be an anode, and the other can be a cathode.

[0149] A covering layer (not shown) can be further formed on the second electrode 330 to protect the second electrode 330 of the light-emitting device 300 and improve the light extraction efficiency.

[0150] The encapsulation layer 400 may be disposed on the second electrode 330 to prevent moisture from penetrating into the internal structure and to protect the internal structure from the influence of external air.

[0151] For example, the encapsulation layer 400 may be configured such that inorganic and organic films are stacked. However, the invention is not limited thereto, and the encapsulation layer 400 may include an encapsulation substrate made of glass or the like. The encapsulation substrate may further include an adhesive layer disposed therebetween and facing the light-emitting device 300.

[0152] In the display device shown in FIG9, the intermediate layer 320 and the second electrode 330 provided in the adjacent second sub-pixel SP2 are shown extending to the transmission region TA. In this way, the manufacturing process of the other first sub-pixel SP1 and second sub-pixel SP2 as well as the intermediate layer 320 and the second electrode 330 of the transmission region TA can be integrated, thereby achieving process optimization.

[0153] The different configurations of the transmission region (TA) are described below.

[0154] Figures 10 to 12 are cross-sectional views of the transmission region TA according to various embodiments of the present invention.

[0155] As shown in FIG10, in the display device according to an embodiment of the present invention, the transmissive region TA can be configured such that the planarization film 135 is disposed on the insulating film 120 made of inorganic insulating film material, and the encapsulation layer 400 is directly disposed on the planarization film 135 without the light-emitting device 300.

[0156] As shown in Figure 11, in order to further improve the transmittance of the transmission region TA in the display device according to the embodiment of the present invention, in the absence of a planarization film 135 and a light-emitting device 300 on the insulating film 120 made of inorganic insulating film material, the encapsulation layer 400 can be directly disposed on the insulating film 120.

[0157] As shown in FIG. 12, compared with the display device described in FIG. 9, the display device according to the embodiment of the present invention has partial overlap between the hydrogen capture pattern 280 and the first active layer 151 made of polycrystalline silicon. When there is overlap between the first active layer 151 and the hydrogen capture pattern 280, hydrogen flowing upward through the first active layer 151 or the first insulating film group 120A adjacent to the first active layer 151 can be more easily captured by the hydrogen capture pattern 280.

[0158] Meanwhile, although the stability of the oxide transistor located at the upper position among the transistors mainly disposed in the sub-pixels in the display device according to the present invention has been described above, the embodiments of the present invention are not limited thereto.

[0159] For example, for transistors located in the non-display area NA, such as gate transistors in a panel, when a polycrystalline transistor LT is arranged together with a first oxide transistor OT1 and a second oxide transistor OT2 as shown in FIG4, a hydrogen trapping pattern can be further provided around the oxide semiconductor layer of the first oxide transistor OT1 and the second oxide transistor OT2 to prevent hydrogen flowing into the first insulating film group 120A contained in the polycrystalline transistor LT at the lower position from affecting the characteristics of the first oxide transistor OT1 and the second oxide transistor OT2 at the upper position.

[0160] The display device according to an embodiment of the present invention may have a hydrogen capture pattern corresponding to the sensor section, thereby blocking the influence of hydrogen generated below or around the transistors in areas where transistors are arranged in low density. Therefore, the transistors located in the sensor section can be prevented from deteriorating due to hydrogen, thereby stably maintaining IV characteristics and preventing changes in turn-off characteristics and threshold voltage.

[0161] Furthermore, in the display device according to an embodiment of the present invention, the hydrogen trapping pattern is located on the same layer as the active layer containing the oxide semiconductor layer, such that the hydrogen trapping pattern can prevent the formation of gases such as hydrogen during thermal processes around the active layer at low configuration densities in the array structure containing the polycrystalline silicon layer located at the lower position.

[0162] In the display device according to an embodiment of the present invention, the hydrogen trapping pattern is formed of an indium-containing oxide material to increase infrared transmittance and hydrogen trapping function, thereby improving the infrared sensitivity of the sensor section and enhancing the sensing function. Additionally, the hydrogen trapping pattern is disposed at a position higher than the active layer containing the polycrystalline silicon layer with a high hydrogen content and at least one insulating layer on the active layer containing the polycrystalline silicon layer, thereby preventing hydrogen generated from the transistor containing the polycrystalline silicon layer from affecting the transistor containing the oxide semiconductor layer.

[0163] A display device according to an embodiment of the present invention may include: a substrate having a display area and a non-display area surrounding the display area; a sensor portion having a transmissive area at the display area; a plurality of first transistors disposed in the display area on the substrate and including an oxide semiconductor layer; and a hydrogen trapping pattern located in the transmissive area and disposed planarly adjacent to the oxide semiconductor layer of at least one of the plurality of first transistors.

[0164] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may include a conductive oxide.

[0165] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may include an indium-containing conductive oxide.

[0166] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may comprise a material having transmittance in the infrared wavelength range.

[0167] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may be located on the same layer as the oxide semiconductor layers of a plurality of first transistors.

[0168] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may have a higher hydrogen capture capability than the oxide semiconductor layer of a plurality of first transistors.

[0169] In a display device according to an embodiment of the present invention, the sensor portion may be located below the substrate, and the hydrogen capture pattern overlaps with the sensor portion.

[0170] The display device according to one embodiment of the present invention may further include a polycrystalline silicon layer located between the substrate and the oxide semiconductor layer. At least one inorganic insulating film may be disposed between the oxide semiconductor layer and the polycrystalline silicon layer.

[0171] In a display device according to an embodiment of the present invention, at least a portion of the polycrystalline silicon layer may overlap with a hydrogen capture pattern.

[0172] In a display device according to an embodiment of the present invention, the oxide semiconductor layers of a plurality of first transistors may be included in a first active layer and a second active layer having different carrier mobilities in different regions.

[0173] A display device according to an embodiment of the present invention may further include a second transistor comprising a polycrystalline silicon layer located between a substrate and an oxide semiconductor layer of a plurality of first transistors corresponding to a display area.

[0174] In a display device according to an embodiment of the present invention, the display area may include a first area where a sensor portion is disposed and a second area where no sensor portion is disposed. The first area of ​​the substrate may include a transmissive area and a plurality of first emitting portions, and the second area of ​​the substrate may include a plurality of second emitting portions. Furthermore, in the first area, the electrodes of the first transistor and the second transistor may not overlap with the transmissive area.

[0175] In a display device according to an embodiment of the present invention, in a first region, a hydrogen capture pattern may be disposed between oxide semiconductor layers of adjacent first transistors.

[0176] In a display device according to an embodiment of the present invention, the density of the first transistor in the first region may be less than the density of the transistor containing the oxide semiconductor layer in the second region.

[0177] In a display device according to an embodiment of the present invention, each of the first transmitting unit and the second transmitting unit may be connected to either of the first transistors.

[0178] In a display device according to an embodiment of the present invention, the hydrogen capture pattern may be divided into multiple segments in the transmissive area, and the width of each of the divided hydrogen capture pattern segments is greater than the spacing between adjacent hydrogen capture pattern segments.

[0179] A display device according to an embodiment of the present invention may further include: a second transistor comprising a polysilicon layer located between the substrate and the oxide semiconductor layer of the first transistor in a non-display area of ​​the substrate; and a third transistor comprising an active layer disposed on the same layer as the oxide semiconductor layer of the first transistor.

[0180] In a display device according to an embodiment of the present invention, the carrier mobility of the oxide semiconductor layer of the first transistor may be different from the carrier mobility of the active layer of the third transistor.

[0181] The display device according to one embodiment of the present invention may further include a planarization film located above the first transistor and the hydrogen capture pattern. Each of the first emitting portion and the second emitting portion may include a light-emitting device on the planarization film, the light-emitting device including an anode, an intermediate layer and a cathode. Any of the first transistors may be connected to the anode through a contact hole in the planarization film.

[0182] A display device according to an embodiment of the present invention may include: a display area and a non-display area outside the display area; a sensor portion located in the display area and having a transmissive area and an emitting area; at least one transistor disposed in the emitting area and comprising an oxide semiconductor layer; and a hydrogen trapping pattern located in the transmissive area and configured not to overlap with the oxide semiconductor layer.

[0183] As can be clearly seen from the above, the display device according to the embodiments of the present invention has the following effects.

[0184] First, the display device according to an embodiment of the present invention has a hydrogen capture pattern corresponding to the sensor section, thereby blocking the influence of hydrogen generated below or around the transistors in areas where transistors are arranged in low density. Therefore, the transistors located in the sensor section can be prevented from deteriorating due to hydrogen, thereby stably maintaining IV characteristics and preventing changes in turn-on / turn-off characteristics and threshold voltage.

[0185] Secondly, the hydrogen trapping pattern is located on the same layer as the active layer containing the oxide semiconductor layer, which enables the hydrogen trapping pattern to prevent the formation of gases such as hydrogen during thermal processes around the active layer at low density in the array structure containing the polysilicon layer located at the bottom.

[0186] Third, the hydrogen capture pattern is formed by an indium-containing oxide material, thereby increasing the infrared transmittance and hydrogen capture function, thus improving the infrared sensitivity of the sensor and enhancing the sensing function.

[0187] Fourth, the hydrogen trapping pattern is positioned above the active layer containing the polycrystalline silicon layer with a high hydrogen content and at least one insulating layer on the active layer containing the polycrystalline silicon layer, thereby preventing hydrogen generated from the transistor containing the polycrystalline silicon layer from affecting the transistor containing the oxide semiconductor layer.

[0188] Fifth, by setting hydrogen capture patterns on the same layer as oxide semiconductors in regions with different arrangement densities of transistors, the influence of the lower array in regions with different arrangement densities of transistors can be made uniform, thereby controlling the abnormal characteristics of transistors in each region.

[0189] Sixth, the display device according to the embodiments of the present invention can be formed using the same process as the formation of oxide semiconductors, without the need to add additional materials, thereby realizing the implementation of a single material.

[0190] Additionally, in the display device according to embodiments of the present invention, by optimizing the manufacturing process, the number of processes required for additional materials can be reduced, the energy consumed in producing the display device can be reduced, and the generation of greenhouse gases during the manufacturing process can be reduced, thereby achieving ESG (Environmental, Social, and Governance) objectives.

[0191] From the foregoing description, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. Therefore, the scope of the invention should not be limited to the detailed description above, but rather defined by the scope of the claims.

[0192] This application claims the benefit of Korean Patent Application No. 10-2024-0159598, filed on November 11, 2024, which is incorporated herein by reference as if fully set forth herein.

[0193] 110:Substrate 120: Insulating film 120A: First insulating film group 120B: Second insulating film group 122: First insulating film 123: Second insulating film 124: Third insulating film 125: Fourth insulating film 126: Fifth insulating film 127: Sixth insulating film 128: Seventh Insulating Film 129: Eighth insulating film 130: Ninth Insulating Film 131: Tenth insulating film 135: Planarization film 141: First light-blocking pattern 151: First Active Layer 161: First gate electrode 162: Second shading pattern 171: First source / drain electrode 171a: Contact hole 172: First connecting electrode 172a: Contact hole 172b: Contact hole 173: Third light-blocking pattern 181: Third Active Layer 182: Second Active Layer 191: Second gate electrode 192: Third gate electrode 201: Second connecting electrode 202: Second source / drain electrode 203: Third source and drain electrode 204: Fourth source / drain electrode 205: Fifth source / drain electrode 280: Hydrogen capture pattern 300: Light-emitting device 310: First electrode 320: Intermediate layer 330: Second electrode 350: Embankment 400: Encapsulation layer 1000: Display device 1200A: Lower insulating film 1200B: Upper insulating film 1200C: Interlayer insulating film A1, A2: Sensor section AA: Display area AA1: First Area AA2: Second Region a: width CC: Compensation circuit Cst: Storage capacitor DL: Data Line DP: Display Panel ED: Light-emitting device EVDD: High-potential drive voltage EVSS: Low-potential drive voltage GL: Gate line H: Hydrogen IR: Infrared IRS: Infrared Sensor LT: Polycrystalline Transistor MA: Marker area NA: Non-display area N1: First node OT: Oxide Transistor OT1: Oxide transistor, first oxide transistor OT2: Oxide transistor, second oxide transistor PG: Launcher placement area s: Spacing SP: Subpixel SP1: First sub-pixel SP2: Second subpixel TA: Transmission area T1: First transistor T2: Second transistor Vgs: Gate voltage

Claims

1. A display device, comprising: A substrate includes a display area and a non-display area outside the display area; A sensor portion having a transmissive region in the display area; a plurality of first transistors disposed in the display area on the substrate, each of the plurality of first transistors comprising an oxide semiconductor layer; and a hydrogen trapping pattern located in the transmissive region and disposed planarly adjacent to the oxide semiconductor layer of at least one of the plurality of first transistors.

2. The display device as described in claim 1, wherein, The hydrogen capture pattern includes a conductive oxide.

3. The display device as described in claim 1, wherein, The hydrogen capture pattern includes a conductive oxide containing indium.

4. The display device as described in claim 1, wherein, The hydrogen capture pattern comprises a material having light transmittance in an infrared wavelength range.

5. The display device as described in claim 1, wherein, The hydrogen capture pattern is located on the same layer as the oxide semiconductor layer of the plurality of first transistors.

6. The display device as described in claim 1, wherein, The hydrogen capture pattern has a higher hydrogen capture capability than the oxide semiconductor layer of the plurality of first transistors.

7. The display device as described in claim 1, further comprising: A sensor is located below the substrate, wherein the hydrogen capture pattern overlaps with the sensor.

8. The display device as described in claim 1, further comprising: A polycrystalline silicon layer is located between the substrate and the oxide semiconductor layer, wherein at least one inorganic insulating film is disposed between the oxide semiconductor layer and the polycrystalline silicon layer.

9. The display device as described in claim 8, wherein, At least a portion of the polycrystalline silicon layer overlaps with the hydrogen capture pattern.

10. The display device as claimed in claim 1, wherein, The oxide semiconductor layer of at least one of the plurality of first transistors includes a first active layer and a second active layer having different carrier mobilities in different regions.

11. The display device as described in claim 1, further comprising: A second transistor includes a polysilicon layer located between the substrate and the oxide semiconductor layer of the plurality of first transistors corresponding to the display area.

12. The display device as claimed in claim 11, wherein: The display area includes a first region where the sensor portion is disposed and a second region where the sensor portion is not disposed. The first region of the substrate includes the transmission region and a plurality of first emitting portions. The second region of the substrate includes a plurality of second emitting portions. In the first region, the electrodes of the plurality of first transistors and the second transistors do not overlap with the transmission region.

13. The display device as described in claim 12, wherein, In the first region, the hydrogen capture pattern is disposed between the oxide semiconductor layers of adjacent first transistors in the plurality of first transistors.

14. The display device as described in claim 12, wherein, The density of the plurality of first transistors in the first region is less than the density of transistors including an oxide semiconductor layer in the second region.

15. The display device as claimed in claim 12, wherein, Each of the plurality of first transmitters and the plurality of second transmitters is connected to any one of the first transistors.

16. The display device as claimed in claim 1, wherein, The hydrogen capture pattern is divided into multiple segments in the transmission area, and the width of each of these divided hydrogen capture pattern segments is greater than the spacing between adjacent hydrogen capture pattern segments.

17. The display device as claimed in claim 1, further comprising: A second transistor comprising a polysilicon layer located between the substrate and the oxide semiconductor layer of at least one of the plurality of first transistors in the non-display area of ​​the substrate; and a third transistor comprising an active layer disposed on the same layer as the oxide semiconductor layer of the at least one of the plurality of first transistors.

18. The display device as claimed in claim 17, wherein, The carrier mobility of the oxide semiconductor layer of at least one of the plurality of first transistors is different from the carrier mobility of the active layer of the third transistor.

19. The display device as claimed in claim 12, further comprising: A planarization film is located above the plurality of first transistors and the hydrogen capture pattern, wherein each of the first emitting portions and the second emitting portions includes a light-emitting device on the planarization film, the light-emitting device comprising an anode, an intermediate layer and a cathode, and wherein any of the plurality of first transistors is connected to the anode through a contact hole in the planarization film.

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