Semiconductor device and method for manufacturing the same

Abstract

A semiconductor device and a method for manufacturing the same are disclosed herein. The manufacturing method includes the following steps: forming an oxide semiconductor layer on a substrate; forming a first insulating layer having a first through-hole on the oxide semiconductor layer; forming a conductive layer on the first insulating layer; patterning the conductive layer to form a gate electrode and a first electrode, wherein the first electrode is electrically connected to the oxide semiconductor layer via the first through-hole; forming a protective layer on the sidewalls of the gate electrode and the sidewalls of the first electrode; and forming a second insulating layer on the first insulating layer including the gate electrode with the protective layer and the first electrode with the protective layer.

Claims

1. A semiconductor element, comprising: One substrate; An oxide semiconductor layer is disposed on the substrate; A first insulating layer is disposed on the oxide semiconductor layer, and the first insulating layer has a first through-hole; a gate electrode is disposed on the first insulating layer, and the gate electrode has a sidewall and a top surface; a first electrode is disposed on the first insulating layer, and the first electrode has a sidewall and a top surface, wherein the first electrode is electrically connected to the oxide semiconductor layer via the first through-hole; a protective layer is disposed on the sidewall of the gate electrode and the sidewall of the first electrode, wherein the vertical projection of the protective layer onto the substrate is offset from the vertical projection of the top surface of the gate electrode onto the substrate and the vertical projection of the top surface of the first electrode onto the substrate; and a second insulating layer is disposed on the first insulating layer and covers the gate electrode, the first electrode and the protective layer.

2. The semiconductor device as claimed in claim 1, further comprising: A second electrode is disposed on the first insulating layer, wherein the first insulating layer further has a second through-hole, and the second electrode is electrically connected to the oxide semiconductor layer through the second through-hole, wherein the second electrode has a sidewall, the protective layer is disposed on the sidewall of the second electrode, and the second insulating layer further covers the second electrode; a first transparent electrode is disposed on the second insulating layer; a planarization layer is disposed on the second insulating layer including the first transparent electrode, wherein the planarization layer and the second insulating layer have a third through-hole; and a second transparent electrode is disposed on the planarization layer, and the second transparent electrode is electrically connected to the second electrode through the third through-hole.

3. The semiconductor device as claimed in claim 1, further comprising: A first transparent electrode is disposed on the second insulating layer; A planarization layer is disposed on the second insulating layer including the first transparent electrode, wherein the planarization layer, the second insulating layer and the first insulating layer have a fourth through hole; and a second transparent electrode is disposed on the planarization layer, and the second transparent electrode is electrically connected to the oxide semiconductor layer through the fourth through hole.

4. The semiconductor element as claimed in claim 1, wherein the sidewall of the gate electrode has a first angle with the first insulating layer, wherein the first angle is greater than or equal to 65 degrees and less than or equal to 90 degrees.

5. The semiconductor element as claimed in claim 1, further comprising: A patterned metal layer is disposed on the substrate; A third insulating layer is disposed on the substrate including the patterned metal layer; wherein the oxide semiconductor layer is disposed on the third insulating layer.

6. The semiconductor device of claim 5, wherein the sidewall of the gate electrode has a first angle with the first insulating layer, and a sidewall of the patterned metal layer has a second angle with the substrate, wherein the first angle is greater than the second angle.

7. The semiconductor device of claim 5, wherein the first insulating layer and the third insulating layer have a fifth through-hole, and the gate electrode or the first electrode is electrically connected to the patterned metal layer via the fifth through-hole.

8. A method for manufacturing a semiconductor device, comprising: An oxide semiconductor layer is formed on a substrate; A first insulating layer having a first through-hole is formed on the oxide semiconductor layer; A conductive layer is formed on the first insulating layer; the conductive layer is patterned to form a gate electrode and a first electrode, wherein the first electrode is electrically connected to the oxide semiconductor layer via the first through-hole; a protective layer is formed on one sidewall of the gate electrode and one sidewall of the first electrode, wherein the vertical projection of the protective layer onto the substrate is offset from the vertical projection of the top surface of the gate electrode onto the substrate and the vertical projection of the top surface of the first electrode onto the substrate; and a second insulating layer is formed on the first insulating layer and the second insulating layer covers the gate electrode, the first electrode and the protective layer.

9. A method for manufacturing a semiconductor device as claimed in claim 8, wherein the step of forming the protective layer on the sidewall of the gate electrode and the sidewall of the first electrode includes: A sacrificial layer is formed on the first insulating layer and the sacrificial layer covers the gate electrode and the first electrode; And remove part of the sacrificial layer and retain the sacrificial layer on the sidewall of the gate electrode and the sidewall of the first electrode to form the protective layer.

10. A method for manufacturing a semiconductor element as claimed in claim 8, wherein the step of patterning the conductive layer to form the gate electrode and the first electrode further includes patterning the conductive layer to simultaneously form a second electrode, wherein the first insulating layer further forms a second via, and the second electrode is electrically connected to the oxide semiconductor layer via the second via, wherein the step of forming the protective layer on the sidewall of the gate electrode and the sidewall of the first electrode further includes simultaneously forming the protective layer on one sidewall of the second electrode, wherein the step of forming the second insulating layer on the first insulating layer further includes forming the second insulating layer to simultaneously cover the second electrode, wherein the method for manufacturing the semiconductor element further includes: A first transparent electrode is formed on the second insulating layer; A planarization layer is formed on the second insulating layer on which the first transparent electrode is formed; A third perforation is formed in the planarization layer and the second insulating layer; and a second transparent electrode is formed on the planarization layer, wherein the second transparent electrode is electrically connected to the second electrode through the third perforation.

11. The method for manufacturing a semiconductor device as described in claim 8, further comprising: A first transparent electrode is formed on the second insulating layer; A planarization layer is formed on the second insulating layer on which the first transparent electrode is formed; A fourth through-hole is formed in the planarization layer, the second insulating layer and the first insulating layer; and a second transparent electrode is formed on the planarization layer, wherein the second transparent electrode is electrically connected to the oxide semiconductor layer through the fourth through-hole.

12. A method for manufacturing a semiconductor device as claimed in claim 8, wherein the step of forming the oxide semiconductor layer on the substrate includes: A patterned metal layer is formed on the substrate; A third insulating layer is formed on the substrate on which the patterned metal layer is formed; And the oxide semiconductor layer is formed on the third insulating layer.

13. A method of manufacturing a semiconductor device as claimed in claim 12, wherein the first insulating layer and the third insulating layer have a fifth through-hole, wherein the step of patterning the conductive layer to form the gate electrode and the first electrode includes: The gate electrode or the first electrode is formed to be electrically connected to the patterned metal layer via the fifth through-hole.

Images