A wafer with a micro-LED structure, a method for manufacturing a wafer with a micro-LED structure, and a method for manufacturing a bonding semiconductor wafer with a micro-LED structure.

Abstract

This invention relates to a wafer having a micro-LED structure, characterized by comprising: a starting substrate; a mask formed on the starting substrate having a mask pattern including openings; and a plurality of epitaxial layer structures selectively grown on portions of the starting substrate corresponding to the openings of the mask pattern; each of the plurality of epitaxial layer structures is a pyramidal or frustum-shaped form surrounded by {111} planes; each of the plurality of epitaxial layer structures includes a first structure serving as a light-emitting element and a second structure connected to the first structure; the first structure and the second structure each have electrodes of different polarities, and constitute a micro-LED structure capable of operating as a single micro-LED. This provides a wafer with a micro-LED structure that suppresses the occurrence of brightness degradation.

Description

Technical Field

[0001] This invention relates to a wafer having a micro-LED structure, a method for manufacturing the wafer having a micro-LED structure, and a method for manufacturing a bonding semiconductor wafer having a micro-LED structure. Prior Technology

[0002] The technique of separating and transferring the part (hereinafter referred to as the functional layer) required to function as a light-emitting element in a multilayer structure (hereinafter referred to as the epitaxial layer structure) grown on a starting substrate from the starting substrate to another substrate is an important technique that can alleviate the limitations caused by the physical properties of the starting substrate and improve the design freedom of the device system.

[0003] In micro-LED devices, the starting substrate is difficult to directly transfer to the driving circuit, and a transfer technique is required to transfer the functional layer to a suitable substrate. In order to fabricate an adoptive substrate that can be transferred to a driving circuit suitable for a micro-LED device, the following transfer techniques are required: bonding the functional layer to a permanent substrate to obtain a bonding substrate, and then removing the starting substrate from the bonding substrate; or, removing the starting substrate while holding the functional layer using a temporary support substrate, and then bonding the functional layer to a permanent substrate, etc.

[0004] Furthermore, when growing a functional layer on the entire wafer using epitaxial growth and then isolating the resulting epitaxial layer to achieve the desired microLED size through etching, etching damage occurs at the processing interface, which is a cause of luminance reduction. In microLEDs with smaller element sizes, the luminance reduction caused by this etching damage becomes significant.

[0005] Patent Document 1 discloses a technique for thermo-press bonding a semiconductor epitaxial substrate and a temporary support substrate through a dielectric layer, and a technique for separating the temporary support substrate and the epitaxial functional layer using wet etching. Patent Document 2 discloses a technique in which a sacrificial layer and a semiconductor crystal layer are sequentially formed on a single crystal layer of a starting substrate. After forming an isolation trench in the semiconductor crystal layer to expose the sacrificial layer, bonding is performed to a transfer substrate, and the sacrificial layer is etched through the isolation trench to separate the starting substrate.

[0006] While these technologies can be used to manufacture microLEDs by miniaturizing the light-emitting element, no solutions have been revealed to address the decrease in luminance. [Preliminary Technology Documents] (Patent Documents)

[0007] Patent Document 1: Japanese Patent Application Publication No. 2021-27301 Patent Document 2: International Publication No. WO2014 / 020906 Summary of the Invention

[0008] [The problem the invention aims to solve]

[0009] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a wafer of a micro LED structure with suppressed luminance degradation, a method for manufacturing a wafer of a micro LED structure with suppressed luminance degradation, and a method for manufacturing a bonding semiconductor wafer of a micro LED structure with suppressed luminance degradation. [Technical means to solve the problem]

[0010] To address the above problems, the present invention provides a wafer with a micro-LED structure, characterized in that it has: Starting substrate; A mask, formed on the starting substrate, having a mask pattern including openings; and, A plurality of epitaxial layer structures are selectively grown on the portion of the aforementioned starting substrate corresponding to the aforementioned opening of the aforementioned masking pattern; Each of the aforementioned multiple epitaxial layer structures is a pyramidal or frustum-shaped structure surrounded by {111} planes; The aforementioned plurality of epitaxial layer structures include a first structure serving as a light-emitting element and a second structure connected to the first structure; The aforementioned first structure and the aforementioned second structure each have electrodes with different polarities, and together they constitute a micro-LED structure capable of operating as a micro-LED.

[0011] The wafer with a micro-LED structure of the present invention comprises a first structure and a second structure of an epitaxial layer structure selectively grown in a state of pre-isolation using a mask. Therefore, element isolation processing is unnecessary. Furthermore, the first and second structures each have electrodes of different polarities, allowing contact with an N-type electrode from one side and a P-type electrode from the other. This eliminates the need for dry etching or other processing to form electrodes on the epitaxial layer structure. Thus, the wafer with a micro-LED structure of the present invention provides a micro-LED structure whose brightness reduction caused by damage from element isolation processing and electrode formation processing is suppressed. By transferring the micro-LED structure from such a wafer with a micro-LED structure of the present invention to a substrate suitable for a micro-LED device, a micro-LED device with a micro-LED structure exhibiting excellent brightness can be manufactured.

[0012] Preferably, the {111} plane direction of the aforementioned plurality of epitaxial layer structures is a thin film serving as a completely depleted layer.

[0013] By including such a plurality of epitaxial layer structures, insulation between electrodes can be ensured.

[0014] Preferably, the aforementioned first structure is a light-emitting element portion having an AlGaInP-based light-emitting layer, and when the width of the shortest part at the bottom is set to Lws, and the total thickness of the aforementioned first structure in the direction perpendicular to the surface of the aforementioned starting substrate is set to Lh, Lh≦0.707×Lws.

[0015] A first structure having such a configuration can be manufactured such that all the epitaxial layers required to function as light-emitting elements are grown in a

[0001] direction perpendicular to the surface of the starting substrate to a designed thickness.

[0016] The width Lws of the shortest part at the bottom of the aforementioned first structure can be more than 10 μm and less than 100 μm.

[0017] If the wafer of the present invention has a micro-LED structure, even if the width Lws of the shortest part at the bottom of the first structure is more than 10 μm and less than 100 μm, the occurrence of brightness reduction can still be sufficiently suppressed.

[0018] Preferably, the epitaxial layer structure includes an active layer, the second structure is a non-light-emitting element portion and includes a pyramidal bridging portion at least in part. When the width of the shortest portion of the bridging portion is set to W [μm], and the total thickness of the epitaxial layer structure up to the active layer in the direction perpendicular to the surface of the starting substrate is set to T [μm], 1.5 μm < W < T / 0.707.

[0019] When the layer below the active layer is of the first conductivity type and the layer above the active layer is of the second conductivity type, W < T / 0.707 is satisfied. Thereby, the bridging portion of the second structure can be formed into a conical shape without a flat portion until the layer of the second conductivity type. Also, if W > 1.5 μm, the thickness of the coating layer of the first conductivity type required for contact with the electrode of the first conductivity type can be ensured.

[0020] Furthermore, the present invention provides a wafer having a micro-LED structure, characterized by having: a starting substrate; and, a plurality of epitaxial layer structures selectively grown on a part of the starting substrate; each of the plurality of epitaxial layer structures is in a pyramidal or truncated pyramidal shape surrounded by {111} planes; the plurality of epitaxial layer structures include a first structure as a light-emitting element portion and a second structure connected to the first structure; the first structure and the second structure each have electrodes of different polarities and constitute a micro-LED structure capable of operating as one micro-LED.

[0021] Another embodiment of the present invention provides a wafer with a micro-LED structure that does not require a mask. In this embodiment, the micro-LED structure is composed of a first structure and a second structure of selectively grown epitaxial layers, eliminating the need for element isolation processing. Furthermore, the first and second structures each have electrodes of different polarities, allowing contact with an N-type electrode from one side and a P-type electrode from the other. Therefore, dry etching or other processing of the epitaxial layers is unnecessary for electrode formation. Consequently, this embodiment of the wafer provides a micro-LED structure whose brightness reduction caused by damage from element isolation processing and electrode formation is suppressed. By transferring the micro-LED structure from this wafer to a substrate suitable for a micro-LED device, a micro-LED device with a micro-LED structure exhibiting excellent brightness can be manufactured.

[0022] Furthermore, the present invention provides a method for manufacturing a wafer with a micro-LED structure, characterized in that the wafer with the micro-LED structure is manufactured by means of the following: Prepare the starting substrate; A mask is formed on the starting substrate, the mask having a mask pattern including openings; On the portion of the aforementioned starting substrate exposed through the aforementioned opening of the aforementioned masking pattern, a plurality of epitaxial layer structures are selectively grown in such a manner that each of the plurality of epitaxial layer structures is a pyramidal or frustum-shaped structure surrounded by {111} planes. The plurality of epitaxial layer structures include a first structure serving as a light-emitting element portion and a second structure connected to the first structure. Electrodes of different polarities are formed on the aforementioned first structure and the aforementioned second structure, thereby manufacturing a wafer having a microLED structure capable of operating as a microLED, the microLED structure being composed of the aforementioned first structure and the aforementioned second structure.

[0023] The wafer with a micro-LED structure obtained by this manufacturing method has a micro-LED structure composed of a first structure and a second structure, which are selectively grown epitaxial layer structures in a state of pre-isolation using a mask. Such a micro-LED structure does not require element isolation processing. Furthermore, the first and second structures each have electrodes of different polarities, thereby allowing contact with an N-type electrode from one side and a P-type electrode from the other, thus eliminating the need for electrode formation processing. Therefore, according to the manufacturing method of the wafer with a micro-LED structure according to the present invention, a wafer with a micro-LED structure can be manufactured, and the brightness reduction caused by damage to the micro-LED structure due to processing such as element isolation processing and electrode formation processing is suppressed.

[0024] Furthermore, the present invention provides a method for manufacturing a bonding semiconductor wafer with a micro-LED structure, characterized in that the aforementioned bonding semiconductor wafer with a micro-LED structure is manufactured by means of the following: The aforementioned wafer having the micro-LED structure is manufactured using the wafer manufacturing method of the present invention. The wafer on which the aforementioned micro-LED structure is formed is bonded to one of the main surfaces of a support substrate through a bonding material to obtain a bonded substrate; Remove the aforementioned starting substrate from the aforementioned bonding substrate.

[0025] If the present invention is a method for manufacturing a bonding semiconductor wafer with a micro-LED structure, then by manufacturing a wafer with a micro-LED structure using the method of the present invention, and using the wafer, a bonding semiconductor wafer with a micro-LED structure can be manufactured, and the brightness reduction caused by damage to the micro-LED structure due to processing such as element isolation processing and electrode formation processing is suppressed. [Effects of the invention]

[0026] As described above, if the wafer of the present invention has a micro-LED structure, it can have a micro-LED structure in which the decrease in brightness caused by damage during processing such as element isolation processing and electrode formation processing is suppressed. Moreover, by transferring the micro-LED structure from such a wafer of the present invention to a substrate suitable for a micro-LED device, a micro-LED device can be manufactured that has a micro-LED structure with excellent brightness.

[0027] Furthermore, according to the method for manufacturing a wafer with a micro-LED structure according to the present invention, a wafer with a micro-LED structure can be manufactured, and the brightness reduction caused by damage to the micro-LED structure due to processing such as element isolation processing and electrode formation processing is suppressed.

[0028] Furthermore, if the present invention is a method for manufacturing a bonding semiconductor wafer with a micro-LED structure, it is possible to manufacture a bonding semiconductor wafer with a micro-LED structure, wherein the brightness reduction caused by damage to the micro-LED structure due to processing such as element isolation processing and electrode formation processing is suppressed. Simple Explanation of the Diagram

[0029] Figure 1 is a schematic plan view showing an example of a wafer with a micro-LED structure according to the present invention. Figure 2 is a projection view of the wafer with the micro-LED structure shown in Figure 1, viewed from direction II. Figure 3 is a schematic plan view showing another example of a wafer with a micro-LED structure according to the present invention. Figure 4 is a projection view of the wafer with the micro-LED structure shown in Figure 3, viewed from the IV direction. Figure 5 is a schematic plan view showing another example of a wafer with a micro-LED structure according to the present invention. Figure 6 is a projection view of the wafer with the micro-LED structure shown in Figure 5, viewed from the VI direction. Figure 7 is a schematic plan view showing another example of a wafer with a micro-LED structure according to the present invention. Figure 8 is a projection view of the wafer with the micro-LED structure shown in Figure 7, viewed from the VIII direction. Figure 9 is a schematic plan view showing another example of a wafer with a micro-LED structure according to the present invention. Figure 10 is a projection view of the wafer with the micro-LED structure shown in Figure 9, viewed from the X direction. Figure 11 is a schematic plan view showing another example of a wafer with a micro-LED structure according to the present invention. Figure 12 is a schematic plan view illustrating one step of an example of a method for manufacturing a wafer with a micro-LED structure according to the present invention. Figure 13 is a schematic cross-sectional view of the structure shown in Figure 12 along the XIII-XIII' section. Figure 14 is a schematic plan view illustrating one step of an example of a method for manufacturing a wafer with a micro-LED structure according to the present invention. Figure 15 is a schematic cross-sectional view of the structure shown in Figure 14 along the XV-XV' section. Figure 16 is a schematic cross-sectional view of the structure shown in Figure 14 along the XVI-XVI' section. Figure 17 is a projection view of the structure shown in Figure 14 from the XVII direction. Figure 18 is an enlarged view of the XVIII section of the structure shown in Figure 15. Figure 19 is an enlarged view of the XIX section of the structure shown in Figure 16. Figure 20 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 21 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 22 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 23 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 24 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 25 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 26 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 27 is a schematic diagram of a bonding semiconductor wafer manufactured in an example of a method for manufacturing a bonding semiconductor wafer with a micro-LED structure according to the present invention. Figure 28 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 29 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 30 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 31 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 32 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 33 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 34 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 35 is a schematic diagram illustrating one step of an example of a method for manufacturing a bonding type semiconductor wafer in a comparative example. Figure 36 is a graph showing the relationship between the chip design size and luminous efficiency of the microLED structures manufactured in various embodiments and comparative examples. Implementation

[0030] As described above, the aim is to develop a wafer of a micro-LED structure with suppressed luminance degradation, a method for manufacturing the wafer of the micro-LED structure with suppressed luminance degradation, and a method for manufacturing a bonding semiconductor wafer of the micro-LED structure with suppressed luminance degradation.

[0031] The inventors focused on the following: When epitaxially growing an epitaxial layer structure as a micro-LED structure at the opening of a mask pattern applied to a starting substrate, by setting the V / III ratio of the raw material to 1 or more and 50 or less, a {111} surface with a slower growth rate appears on the surface of the starting substrate as the parallel (001) surface grows. Therefore, the aforementioned epitaxial layer structure can be formed into a pyramidal or frustum-shaped structure. Furthermore, the inventors focused on the following: In such a shape, the thickness of the inclined layer becomes very thin compared to the thickness in the direction perpendicular to the substrate surface (hereinafter referred to as the

[0001] direction). Therefore, by adjusting the size of the opening and the V / III ratio of the raw material, unwanted layers can be completely eliminated. The inventors focused on studying the above steps and found that it is possible to use a pair of selectively grown pyramidal or frustum-shaped epitaxial layer structures as micro-LED structures without component isolation or processing for forming electrodes, thereby completing the present invention.

[0032] That is, the present invention is a wafer with a micro LED structure, characterized in that it has: Starting substrate; A mask, formed on the starting substrate, having a mask pattern including openings; and, A plurality of epitaxial layer structures are selectively grown on the portion of the aforementioned starting substrate corresponding to the aforementioned opening of the aforementioned masking pattern; Each of the aforementioned multiple epitaxial layer structures is a pyramidal or frustum-shaped structure surrounded by {111} planes; The aforementioned plurality of epitaxial layer structures include a first structure serving as a light-emitting element and a second structure connected to the first structure; The aforementioned first structure and the aforementioned second structure each have electrodes with different polarities, and together they constitute a micro-LED structure capable of operating as a micro-LED.

[0033] Furthermore, the present invention is a wafer with a micro-LED structure, characterized in that it has: Starting substrate; and, A plurality of epitaxial layer structures are selectively grown on a portion of the aforementioned starting substrate; Each of the aforementioned multiple epitaxial layer structures is a pyramidal or frustum-shaped structure surrounded by {111} planes; The aforementioned plurality of epitaxial layer structures include a first structure serving as a light-emitting element and a second structure connected to the first structure; The aforementioned first structure and the aforementioned second structure each have electrodes with different polarities, and together they constitute a micro-LED structure capable of operating as a micro-LED.

[0034] Furthermore, the present invention provides a method for manufacturing a wafer with a micro-LED structure, characterized in that the wafer with the micro-LED structure is manufactured by means of the following: Prepare the starting substrate; A mask is formed on the starting substrate, the mask having a mask pattern including openings; On the portion of the aforementioned starting substrate exposed through the aforementioned opening of the aforementioned masking pattern, a plurality of epitaxial layer structures are selectively grown in such a manner that each of the plurality of epitaxial layer structures is a pyramidal or frustum-shaped structure surrounded by {111} planes. The plurality of epitaxial layer structures include a first structure serving as a light-emitting element portion and a second structure connected to the first structure. Electrodes of different polarities are formed on the aforementioned first structure and the aforementioned second structure, thereby manufacturing a wafer having a microLED structure capable of operating as a microLED, the microLED structure being composed of the aforementioned first structure and the aforementioned second structure.

[0035] Furthermore, the present invention provides a method for manufacturing a bonding semiconductor wafer with a micro-LED structure, characterized in that the aforementioned bonding semiconductor wafer with a micro-LED structure is manufactured by means of the following: The aforementioned wafer having the micro-LED structure is manufactured using the wafer manufacturing method of the present invention. The wafer on which the aforementioned micro-LED structure is formed is bonded to one of the main surfaces of a support substrate through a bonding material to obtain a bonded substrate; Remove the aforementioned starting substrate from the aforementioned bonding substrate.

[0036] The present invention will now be described in detail with reference to the accompanying drawings, but the present invention is not limited to these descriptions.

[0037] [Wafer with micro-LED structure] (First Implementation Form) Figures 1 and 2 schematically illustrate a first embodiment of the wafer with a micro-LED structure according to the present invention. Figure 1 is a plan view, and Figure 2 is a projection view (side view) of Figure 1 viewed from direction II.

[0038] The wafer 1 with micro-LED structures shown in Figures 1 and 2 includes: a starting substrate 2; a mask 3 formed on the starting substrate 2, having a mask pattern including openings (not shown in Figures 1 and 2); and a plurality of epitaxial layer structures 4 selectively grown on portions of the starting substrate 2 corresponding to the openings of the mask pattern (not shown in Figures 1 and 2).

[0039] Each of the plurality of epitaxial layer structures 4 is a pyramidal or frustum-shaped structure surrounded by {111} planes 4A.

[0040] The plurality of epitaxial layer structures 4 include a first structure 41 serving as a light-emitting element and a second structure 42 connected to the first structure 41.

[0041] The first structure 41 has an electrode 5. The second structure 42 has an electrode 6. Electrodes 5 and 6 have different polarities. The first structure 41 and the second structure 42 constitute a microLED structure 7 that can operate as a microLED.

[0042] The wafer 1 with such a micro-LED structure 7 is composed of a first structure 41 and a second structure 42 of an epitaxial layer structure 4 selectively grown in a state of pre-isolation using a mask 3. Therefore, element isolation processing is not required. Furthermore, the first structure 41 and the second structure 42 each have electrodes 5 and 6 with different polarities, thereby allowing contact with an N-type electrode from one side and a P-type electrode from the other side. Therefore, dry etching or other processing is not required for forming electrodes on the epitaxial layer structure. Thus, the wafer 1 with the micro-LED structure 7 shown in Figures 1 and 2 can provide a micro-LED structure 7 whose brightness reduction caused by damage from processing such as element isolation processing and electrode formation processing is suppressed. Moreover, by transferring the micro-LED structure 7 from the wafer 1 with such a micro-LED structure 7 to a substrate suitable for a micro-LED device, a micro-LED device with a micro-LED structure 7 exhibiting excellent brightness can be manufactured.

[0043] The wafer 1 with a micro-LED structure 7 of the first embodiment shown in Figures 1 and 2 will be described in more detail below.

[0044] The starting substrate 2 is not particularly limited, and for example, a GaAs substrate of the first conductivity type can be used. The starting substrate 2 may have a buffer layer (not shown), such as a GaAs buffer layer of the first conductivity type, on its surface. In the first embodiment shown in FIG1 and FIG2, the GaAs buffer layer is typically 0.5 μm.

[0045] The mask 3 is obtained, for example, by forming a mask pattern of a nonpolar dielectric film such as SiO2 or silicon nitride, and forming a nonpolar dielectric film with openings. The area in the opening of the mask pattern where the first structure 41 is formed has, for example, a rectangular planar shape. Furthermore, the area in the opening of the mask pattern where the second structure 42 is formed is, for example, a region where all angles are right angles (90°). The opening of the mask pattern, the area where the first structure 41 is formed, and the area where the second structure 42 is formed are illustrated in the following description of the method for manufacturing a wafer with a micro-LED structure according to the present invention.

[0046] In the first embodiment shown in Figures 1 and 2, the mask 3 includes: a portion formed on the portion including the center of the starting substrate 2, and a portion formed on the outer periphery of the starting substrate 2.

[0047] The first structure 41 is a light-emitting element portion having a frustum-of-pyramid shape (also referred to as a conical shape), and sequentially includes a sacrificial layer 41A, a first cladding layer 41B, an active layer 41C, a second cladding layer 41D, an intermediate layer (not shown), and a window layer 41E. The first structure 41 is a part of the epitaxial layer structure 4, and thus these layers are epitaxial layers.

[0048] The sacrificial layer 41A can include, for example, an AlAs sacrificial layer, a GaInP sacrificial layer, and / or a GaAs sacrificial layer. The sacrificial layer 41A can be composed of a plurality of layers. In the first embodiment shown in FIGS. 1 and 2, the sacrificial layer 41A is a first-conductive-type AlAs sacrificial layer having a thickness of 0.5 μm.

[0049] The first cladding layer 41B is, for example, a first-conductive-type AlGaInP (for example, (Al yGa 1 - y) xIn 1 - xP (0.4 ≦ x ≦ 0.6, 0 < y ≦ 1)) first cladding layer. In the first embodiment shown in FIGS. 1 and 2, the first cladding layer 41B is a layer in which x and y in the above general formula are 0.5 and 0.85, respectively, and the thickness is 1.0 μm.

[0050] The active layer 41C is, for example, an undoped AlGaInP (for example, (Al yGa 1 - y) xIn 1 - xP (0.4 ≦ x ≦ 0.6, 0 ≦ y ≦ 0.6))-based light-emitting layer. In the first embodiment shown in FIGS. 1 and 2, the active layer 41C is a layer in which x and y in the above general formula are 0.5 and 0.1, respectively, and the thickness is 0.25 μm.

[0051] The second cladding layer 41D is, for example, a second-conductive-type AlGaInP (for example, (Al yGa 1 - y) xIn 1 - xP (0.4 ≦ x ≦ 0.6, 0 < y ≦ 1)) second cladding layer. In the first embodiment shown in FIGS. 1 and 2, the second cladding layer 41D is a layer in which x and y in the above general formula are 0.5 and 0.85, respectively, and the thickness is 0.75 μm.

[0052] The intermediate layer not shown is, for example, a second-conductive-type GaInP intermediate layer, and in the first embodiment shown in FIGS. 1 and 2, it is a layer having a thickness of 0.1 μm.

[0053] The window layer 41E is, for example, a second-conductive-type GaP window layer. In the first embodiment shown in FIGS. 1 and 2, the window layer 41E is a layer having a thickness of 1.9 μm.

[0054] As shown in Figure 1, the width of the shortest part at the bottom of the first structure 41 is Lws. Even if the width Lws of the shortest part at the bottom of the first structure 41, which is the light-emitting element, is 10 μm or more and 100 μm or less, which is the size of a typical micro LED, the wafer 1 of the present invention having the micro LED structure 7 can still provide a micro LED structure 7 since it does not require processing such as element isolation processing and electrode formation processing. The brightness reduction caused by processing damage to the micro LED structure 7 is suppressed.

[0055] Furthermore, as shown in Figure 2, the total thickness of the first structure 41 in the direction perpendicular to the surface of the starting substrate 2 (

[0001] direction) is Lh. Preferably, the total thickness Lh of the first structure 41 and the width Lws of the shortest part at the bottom satisfy Lh ≤ 0.707 × Lws. The first structure 41 with such a configuration can prevent it from becoming a cone shape without a flat top before reaching the designed thickness, thereby creating a structure in which all the epitaxial layers necessary for functioning as a light-emitting element are grown in the

[0001] direction according to the designed thickness. The lower limit of the total thickness Lh is not particularly limited, for example, it is 0.5 μm.

[0056] As shown in Figures 1 and 2, the second structure 42 is connected to the first structure 41. More specifically, the second structure 42 includes at least a pyramidal bridging portion 43, which contacts the first structure 41.

[0057] The bridging portion 43 has a sacrificial layer 43A integral with the sacrificial layer 41A of the first structure 41, and a laminate portion 43F thereon.

[0058] As shown in Figure 18 below, the laminated body 43F contains various materials of the epitaxial layer of the first structure 41, forming a pyramidal shape with the upper part of the first coating layer as the vertex. Therefore, the layer above the active layer only has the {111} facet 4A grown to form a thin film. That is, since the second conductivity type layer is completely empty, the bridging portion 43 actually exhibits the first conductivity type.

[0059] The second structure 42 shown in Figures 1 and 2 further includes, in sequence, a sacrificial layer 42A, a first covering layer 42B, an active layer 42C, a second covering layer 42D, an intermediate layer (not shown), and a window layer 42E, which are identical to those in the first structure 41. These layers constitute the laminate body 42F. The sacrificial layer 42A is integral with the sacrificial layers 41A and 43A.

[0060] The second structure 42 shown in FIGS. 1 and 2 is a non-light-emitting element portion. Also, as shown in FIG. 1, the width of the shortest portion of the bridging portion 43 is W [μm]. Moreover, the total thickness of the epitaxial layer structure 4 up to the active layer 41C and the active layer 42C in the direction perpendicular to the surface of the starting substrate 2 (

[0001] direction) is T [μm]. In the first embodiment shown in FIGS. 1 and 2, 1.5 μm < W < T / 0.707. When the layer below the active layer is of the first conductivity type and the layer above the active layer is of the second conductivity type, satisfying W < T / 0.707, the bridging portion 43 of the second structure 42 can be formed into a conical shape without a flat portion until the layer of the second conductivity type. Also, if W > 1.5 μm, the thickness of the coating layer of the first conductivity type required for contact with the electrode of the first conductivity type can be ensured.

[0061] The plurality of epitaxial layer structures 4 (in the first embodiment shown in FIGS. 1 and 2, the first structure 41 and the second structure 42 including the laminated body portion 42F and the bridging portion 43) are preferably such that the {111} plane 4A direction is a thin film as a completely depleted layer.

[0062] An electrode 5 made of a material capable of forming an ohmic contact with a semiconductor of the second conductivity type is formed in the window layer 41E portion of the first structure 41.

[0063] On the other hand, an electrode 6 made of a material capable of forming an ohmic contact with a semiconductor of the first conductivity type is formed on the laminated body portion 42F of the second structure 42.

[0064] In the first embodiment shown in FIGS. 1 and 2, the electrode 6 formed on the second structure 42 is in a shape covering from the window layer 42E at the top of the structure of the laminated body portion 42F to the bridging portion 43, and makes an ohmic contact with the bridging portion 43 of the first conductivity type. At this time, a part of the electrode 6 is also in direct or indirect contact with the second coating layer 42D and the window layer 42E of the second structure 42 which is a non-light-emitting element portion through a depletion layer, and another part of the electrode 6 is in contact with the bridging portion 43 of the first conductivity type. Therefore, it will not be in a short-circuited state and will not be energized through the p-n junction, so there will be no problem electrically.

[0065] In this way, by making the {111} plane 4A direction of the bridging portion 43 which is a part of the plurality of epitaxial layer structures 4 a thin film as a completely depleted layer, the insulation between the electrode 5 and the electrode 6 can be ensured.

[0066] Furthermore, the outermost periphery of the bridging portion 43 is covered by a completely empty, extremely thin layer, thus ensuring insulation between the electrodes. If the effective V / III ratio of the surface increases due to factors such as lowering the growth temperature during the formation step of the bridging portion 43, the layer thickness on the slope may sometimes become thicker, leading to leakage. In such cases, as shown in the variation examples in Figures 3 and 4 (Figure 3: plan view; Figure 4: projection view of Figure 3 from the IV direction (side view)), a portion of the stacked body portion 43F of the bridging portion 43 can be removed using methods such as dry etching to form the stacked body portion 43G, thereby preventing leakage.

[0067] Furthermore, in the first embodiment described above, the first structure 41, which serves as the light-emitting element, and the laminated portion 42F, which serves as the non-light-emitting element, are shown to have the same height. However, the laminated portion 42F of the second structure 42, which serves as the non-light-emitting element, can also be lower than the first structure 41, which serves as the light-emitting element. Also, as shown in the variations in Figures 5 and 6, the second structure 42, which serves as the non-light-emitting element, can also be simply a bridging portion 43 (Figure 5: plan view; Figure 6: projection view of Figure 5 from direction VI (side view)). Such a design change can be implemented simply by changing the size / design of the mask pattern of the mask 3. On the other hand, it is also possible to make the laminated portion 42F of the second structure 42, which serves as the non-light-emitting element, higher than the first structure 41, which serves as the light-emitting element. However, the GaP window layer 41E of the light-emitting element usually stops growing when it reaches the designed thickness, so the non-light-emitting element will not be higher than the light-emitting element, and even if it is made higher, there is no functional benefit. For this reason, it is preferable that the height of the laminate portion 42F of the second structure 42, which is a non-light-emitting element portion, is below the height of the first structure 41, which is a light-emitting element portion.

[0068] (Second Implementation Form) Figures 7 and 8 schematically illustrate a second embodiment of the wafer with a micro-LED structure according to the present invention. Figure 7 is a plan view, and Figure 8 is a projection view (side view) of Figure 7 viewed from direction VIII.

[0069] The second embodiment shown in Figures 7 and 8 is identical to the first embodiment except for the shape of the first structure 41, which serves as the light-emitting element. The size of the second structure 42, which is a non-light-emitting element, remains the same, while the size of the first structure 41, which serves as the light-emitting element, is set to be horizontally long, thereby enabling the realization of a rectangular element.

[0070] (Third Implementation Form) Figures 9 and 10 schematically illustrate a second embodiment of the wafer with a micro-LED structure according to the present invention. Figure 9 is a plan view, and Figure 10 is a projection view (side view) of Figure 9 viewed from the X direction.

[0071] The third embodiment shown in Figures 9 and 10 is identical to the first embodiment except that the shape of the first structure 41, which serves as the light-emitting element, is changed, and consequently the shape of the bridging portion 43 of the second structure 42, which serves as the non-light-emitting element, is also changed. The size of the laminate portion 42F of the second structure 42, which serves as the non-light-emitting element, remains the same, and the bridging portion 43 and the first structure 41, which serves as the light-emitting element, are arranged along its two outer peripheries, thereby enabling the realization of an element with the shape shown in Figures 9 and 10.

[0072] (Fourth Implementation Form) Another embodiment of the present invention is a wafer with a micro-LED structure that may not include a mask.

[0073] Figure 11 schematically illustrates a fourth embodiment of the wafer with a micro-LED structure according to the present invention. Figure 11 is a plan view.

[0074] The fourth embodiment shown in Figure 11 is the same as the first embodiment except that it does not have a mask.

[0075] More specifically, the wafer 1 with a micro-LED structure shown in Figure 11 has: a starting substrate 2; and a plurality of epitaxial layer structures 4, which are selectively grown on portions 21, 22, and 23 of the starting substrate 1. Each of the plurality of epitaxial layer structures 4 is a pyramidal or frustum-shaped form surrounded by a {111} facet 4A. The plurality of epitaxial layer structures 4 includes a first structure 41 serving as a light-emitting element and a second structure 42 connected to the first structure 41. The first structure 41 has an electrode 5, and the second structure 42 has an electrode 6 of a different polarity than the electrode 5. The first structure 41 and the second structure 42 constitute a micro-LED structure 7 capable of operating as a single micro-LED.

[0076] For other matters, please refer to the description of the first implementation form.

[0077] The wafer 1 with such a micro-LED structure 7 does not have a mask. Since the micro-LED structure 7 formed on the wafer 1 is composed of a first structure 41 and a second structure 42 of epitaxial layer structures 4, which are selectively grown, element isolation processing is not required. Furthermore, the first structure 41 and the second structure 42 each have electrodes 5 and 6 with different polarities, thereby allowing contact with an N-type electrode from one side and a P-type electrode from the other side. Therefore, it is not necessary to perform dry etching or other processing on the epitaxial layer structures to form electrodes. Thus, the wafer 1 with the micro-LED structure 7 shown in FIG. 11 can provide a micro-LED structure 7 in which the decrease in brightness caused by damage from processing such as element isolation processing and electrode formation processing is suppressed. Moreover, by transferring the micro-LED structure 7 from the wafer 1 with such a micro-LED structure 7 to a substrate suitable for a micro-LED device, a micro-LED device can be manufactured that has a micro-LED structure 7 with excellent brightness.

[0078] [Manufacturing method of wafers with micro-LED structures] Hereinafter, a method for manufacturing a wafer with a micro-LED structure as shown in Figures 1 and 2 will be described with reference to Figures 12 to 19, as an example of the method for manufacturing a wafer with a micro-LED structure according to the present invention.

[0079] First, a starting substrate 2, such as a GaAs starting substrate of the first conductivity type, is prepared as shown in FIG12 (plan view) and FIG13 (cross-sectional view along XIII-XIII' of FIG12). Then, as shown in FIG12 and FIG13, a mask 3 is formed on the starting substrate 2, the mask 3 having a mask pattern including an opening 31. The mask 3 can be, for example, a non-polar dielectric film such as SiO2 or silicon nitride. In the example shown in FIG12 and FIG13, the mask 3 is formed to include: a portion formed on the center of the region of the starting substrate 2 containing the region forming the micro-LED structure, and a portion formed on its outer periphery. This creates a patterned substrate 2 having a portion 20 exposed through the opening 31.

[0080] The following example is shown in this embodiment: As shown in FIGS. 1 and 2, a stacked body portion 42F having the same size as the first structure body 41 as a light-emitting element portion is stacked in the second structure body 42 as a non-light-emitting element portion, and the first structure body 41 and the stacked body portion 42F are connected by a bridging portion 43. Further, the formation region 21 of the first structure body 41 among the portions 20 exposed through the opening 31 is set to a rectangular planar shape, the formation region 22 of the second structure body 42 is set to a region where all corners are right angles (90°), and each side of the opening 31 is arranged substantially parallel or substantially perpendicular to the

[0100] direction. When the orientation of the side deviates by a few degrees, a height difference may occur on the inclined surface portion, but in the case of the size of the micro-LED level, it will not form a size that causes problems.

[0081] When the width of the shortest portion is set to Lws and the total thickness of the epitaxial layer grown in the

[0001] direction (the direction perpendicular to the surface of the starting substrate 2) is set to Lh (FIG. 2), the formation region 21 of the first structure body 41 as a light-emitting element portion among the portions 20 exposed through the opening 31 is arranged such that Lh ≦ 0.707 × Lws. By setting Lh ≦ 0.707 × Lws, all the following epitaxial layers can be grown in the

[0001] direction according to the designed thickness. The reason is that by doing so, it is possible to prevent the shape from becoming a cone without a flat portion at the top before reaching the designed thickness, so that all the epitaxial layers required for the light-emitting element portion to function can be grown in the

[0001] direction without being hindered by the {111} plane according to the designed thickness.

[0082] On the other hand, when the width of the formation region 23 of the bridging portion 43 among the portions 20 exposed through the opening 31 is set to W [μm], and the total thickness of the epitaxial layer structure body 4 up to the active layer 41C and the active layer 42C grown in the

[0001] direction is set to T [μm], it is arranged such that 1.5 μm < W < T / 0.707. When the layer below the active layer is set to the first conductivity type and the layer above the active layer is set to the second conductivity type, by satisfying W < T / 0.707, the bridging portion 43 of the second structure body 42 can be made into a cone shape without a flat portion until the layer of the second conductivity type. Further, if W > 1.5 μm, the thickness of the coating layer of the first conductivity type required for contact with the electrode of the first conductivity type can be ensured.

[0083] Subsequently, as shown in Figures 14 to 19, a plurality of epitaxial layer structures 4 are selectively grown on the portion 20 exposed through the opening 31 of the patterned substrate 2 made in the above manner. The plurality of epitaxial layer structures 4 include a first structure 41 serving as a light-emitting element portion and a second structure 42 connected to the first structure 41.

[0084] Figure 14 is a plan view. Figure 15 is a schematic cross-sectional view of the structure shown in Figure 14 along the XV-XV' section. Figure 16 is a schematic cross-sectional view of the structure shown in Figure 14 along the XVI-XVI' section. Figure 17 is a projection view of the structure shown in Figure 14 viewed from the XVII direction. Figure 18 is an enlarged view of the XVIII section of the structure shown in Figure 15. Figure 19 is an enlarged view of the XIX section of the structure shown in Figure 16.

[0085] After depositing a GaAs buffer layer (not shown) of a first conductivity type on the formation region 21 of the first structure 41 in the exposed portion 20 of the patterned substrate 2, an AlAs sacrificial layer 41A, a first cladding layer 41B of the first conductivity type AlGaInP, an undoped AlGaInP active layer 41C, a second cladding layer 41D of the second conductivity type AlGaInP, a GaInP intermediate layer (not shown) of the second conductivity type, and a GaP window layer 41E of the second conductivity type are epitaxially grown in sequence. The composition and thickness of each layer are as described above. Thus, the first structure 41 shown in Figures 14, 15, 17, and 18 is obtained.

[0086] At this time, epitaxial layers (sacrificial layer 42A, first cladding layer 42B, active layer 42C, second cladding layer 42D, intermediate layer (not shown), and window layer 42E) are simultaneously and sequentially epitaxially grown on the portion of the second structure 42 outside the bridging portion 43 formation region 22. This yields the laminated body 42F shown in Figures 14, 15, and 17.

[0087] Furthermore, a sacrificial layer 43A and a stacked body 43F are simultaneously epitaxially grown in the bridging portion 43 forming region 23 within the forming region 22 of the second structure 42. This yields the bridging portion 43 shown in Figures 14, 16, 17, and 19.

[0088] When growing the epitaxial layer, by setting the V / III ratio to 50 or less, the {111} plane 4A, which grows at a slower rate along with the (001) plane, can be formed, thus enabling the formation of an epitaxial layer structure 4 in the shape of a pyramid or frustum. Furthermore, by setting the V / III ratio to 1 or more, it is possible to prevent a decrease in crystallinity due to stoichiometric imbalance. A V / III ratio of 10 or more is more preferable.

[0089] Specifically, as shown in Figures 14, 15, and 17, the first structure 41 and the laminate portion 42F are epitaxial layer structures in the shape of a frustum pyramid. As shown in Figure 15, the total thickness of the first structure 41 in the direction perpendicular to the surface of the starting substrate 2 is Lh. Furthermore, as shown in Figure 17, the sum of the thicknesses of the first structure 41 and the laminate portion 42F of the epitaxial layer structure 4, up to the active layer 41C and the active layer 42C in the direction perpendicular to the surface of the starting substrate 2, is T. Moreover, as shown in Figures 14, 16, and 17, the bridging portion 43 is an epitaxial layer structure in the shape of a pyramid.

[0090] Figure 18 shows an enlarged view of the area near the {111} surface (sloping surface) 4A of the first structure 41, which serves as a light-emitting element. In this embodiment, the laminated body portion 42F of the second structure 42, which serves as a non-light-emitting element, is also of the same size, and therefore identical. The width of the opening 31 that exposes the region forming the laminated body portion 42F in the formation region 21 of the first structure 41 and the formation region 22 of the second structure 42 is predetermined so that all epitaxial layers up to the window layer 41E and the window layer 42E can be laminated in the

[0001] direction according to the designed thickness, and thus grows in this manner. On the other hand, as shown in Figure 18, the {111} plane 4A of the slope also has the same type and order of layered structures as the

[0001] direction. When the V / III ratio is 50 or less, the growth rate of the {111} plane is 1 / 50 or less compared to the growth rate of the (001) plane. For example, if the V / III ratio is set to 30, the slope direction will become an extremely thin layer and completely empty. Figure 18 shows a certain thickness from the active layer to the window layer, but this is a description for ease of expression.

[0091] Figure 19 shows an enlarged view of the bridging portion 43, including the top slope. Similar to the case in Figure 18, the {111} surface 4A of the slope of the stacked body portion 43F contains layers of material that respectively contain all the epitaxial layers (sacrificial layer 41A, first cladding layer 41B, active layer 41C, second cladding layer 41D, intermediate layer (not shown), and window layer 41E) contained in the first structure 41 (sacrificial layer 43A, first cladding layer 43B, active layer 43C, second cladding layer 43D, intermediate layer (not shown), and window layer 43E). However, the difference is that by pre-designing the opening width W, the apex of the stacked body portion 43F reaches a pyramidal shape above the first cladding layer 43B, so that the layer above the active layer 43C only grows the {111} surface, thus becoming a thin film. That is, the {111} surface of the second conductivity type layer is a thin film that is a completely depleted layer, so the bridging part 43 actually exhibits a structure of the first conductivity type.

[0092] Next, an electrode made of a material capable of forming an ohmic contact with a second conductivity type semiconductor is formed on the GaP window layer 41E portion of the first structure 41, which serves as the light-emitting element portion. An electrode is formed on the second structure 42, which serves as the non-light-emitting element portion, using a material capable of forming an ohmic contact with a first conductivity type semiconductor. The electrodes formed in this manner are electrodes 5 and 6 shown in Figures 1 and 2. For details regarding electrodes 5 and 6, please refer to the previous description.

[0093] Electrodes of different polarities are formed on the first structure 41 and the second structure 42 in this manner, thereby manufacturing a wafer 1 having a microLED structure 7 capable of operating as a microLED, as shown in Figures 1 and 2. The microLED structure 7 is composed of the first structure 41 and the second structure 42. That is, according to the manufacturing method described above, the wafer 1 having the microLED structure 7 of the present invention can be manufactured.

[0094] Furthermore, as previously explained, the wafer 1 with the micro-LED structure 7 of the present invention can be modified in various ways, for example, design changes can be made by simply changing the size and design of the mask pattern of the mask 3.

[0095] Furthermore, for example, a wafer 1 without a mask as shown in FIG11 can be obtained by means of the following method: after manufacturing a wafer 1 with a micro LED structure 7 by means of the method described above, a resist mask or a hard mask is formed on the part other than the mask 3 by photolithography, and the mask 3 is removed by means of appropriate means.

[0096] [Manufacturing method of a bonding semiconductor wafer with micro-LED structure] Hereinafter, an example of the manufacturing method of the bonding semiconductor wafer with micro-LED structure of the present invention will be described with reference to Figures 20 to 27.

[0097] First, referring to Figures 12 to 19, a wafer 1 with a micro-LED structure 7 as shown in Figures 1 and 2 is manufactured using the previously described method.

[0098] Subsequently, as shown in Figure 20, benzocyclobutene (BCB) with a thickness of approximately 0.6 μm is coated on the surface of wafer 1 where the micro-LED structure 7 is formed, as a bonding material 11. The thickness of the BCB is not limited to this condition; the same effect can be obtained regardless of whether it is thicker or thinner. Furthermore, the bonding material 11 is not limited to BCB; other bonding materials can also be used.

[0099] After coating with BCB, as shown in FIG21, the planarized substrate 12 is pressed onto the bonding material 11 layer to perform planarization. In this embodiment, an example without heat treatment is illustrated, but the pressing treatment can also be performed by heating to a temperature range (150°C) where BCB will not harden.

[0100] After planarization, as shown in Figure 22, the planarized substrate 12 is removed, and BCB hardening is performed, for example, by holding it at 250°C for 1 hour.

[0101] After BCB hardening, inductively coupled plasma (ICP) dry etching is performed using fluorine-based plasma. In this embodiment, the etching is performed with a BCB thickness of 0.6 μm, followed by planarization. Therefore, dry etching is performed under conditions equivalent to 0.1 μm etching in a planarization plate, thereby etching the BCB covering the top of the first structure 41 of the cone-shaped portion and the top of the stacked portion 42F, exposing the electrodes 5 and 6, as shown in FIG23.

[0102] After exposing the electrode portion, a resist mask or hard mask is formed using photolithography. The BCB (bonding material) 11 of the predetermined area for device isolation is removed using fluorine-based plasma to form the device isolation processing substrate 13 shown in FIG. 24. At this time, the portion of the outer periphery of the starting substrate 2 formed on the mask 3 is also removed.

[0103] Subsequently, an adhesive layer 14, such as a silicon oxide adhesive layer, is formed on the main surface of one of the support substrates 15, such as a quartz substrate. The silicon oxide adhesive layer 14 is then adhered to and bonded to the surface of the component isolation processing substrate 13 where the electrodes 5 and 6 are exposed, thereby obtaining the bonding substrate 16 shown in FIG25.

[0104] After bonding, at least sacrificial layers 41A, 42A and 43A of the bonding substrate 16 are immersed in HF and sacrificial layer etching is performed to separate the starting substrate 2, as shown in FIG26.

[0105] The separated starting substrate 2 is removed, thereby manufacturing the bonding semiconductor wafer 100 with micro-LED structure 7 shown in FIG27.

[0106] In the above-described method for manufacturing the bonding semiconductor wafer 100 of the present invention, it is not necessary to perform processes such as element isolation processing and electrode formation processing on the micro-LED structure 7. Therefore, according to the method for manufacturing the bonding semiconductor wafer having the micro-LED structure of the present invention, it is possible to provide a micro-LED structure 7 in which the brightness reduction caused by processing damage is suppressed. [Example]

[0107] The present invention will now be specifically described using examples and comparative examples, but the present invention is not limited to these examples.

[0108] (Example 1) In Example 1, firstly, a wafer having a micro-LED structure is manufactured in the following order.

[0109] As previously described with reference to Figures 12 and 13, a mask 3 with a masking pattern of SiO2 is formed on an N-type GaAs starting substrate 2 to obtain a patterned substrate 2, wherein the masking pattern includes an opening 31.

[0110] The portion of the opening 31 corresponding to the forming area 21 of the first structure 41 is set to a rectangular planar shape, and the portion corresponding to the forming area 22 of the second structure 42 is set to a region where all angles are right angles (90°). Each side of the opening 31 is arranged approximately parallel or approximately perpendicular to the

[0100] direction.

[0111] The opening width Lws of the first structure 41, which serves as the light-emitting element, is set to 10 μm, the opening width W of the bridging part 43 is set to 2.5 μm, and the opening width of the laminate part 42F, which is not the light-emitting element, is set to 10 μm.

[0112] As shown in Figures 14, 15, 17, and 18, after depositing a 0.5 μm thick n-type GaAs buffer layer (not shown) on the formation region 21 of the first structure 41 in the portion 20 exposed through the opening 31 of such a patterned substrate 2, a 0.5 μm thick first conductivity type AlAs sacrificial layer 41A, a 1.0 μm thick first conductivity type (AlyGa1-y)xIn1-xP (x: 0.5; y: 0.85) first cladding layer 41B, a 0.25 μm thick undoped (AlyGa1-y)xIn1-xP (x: 0.5; y: 0.1) active layer 41C, and a 0.75 μm thick second conductivity type (AlyGa1-y)xIn1-xP The structure consists of a second cladding layer 41D (x:0.5;y:0.85), a 0.1 μm thick GaInP intermediate layer (not shown), and a 1.9 μm thick GaP window layer 41E. The V / III ratio of the raw materials during growth is set to 30.

[0113] At this time, epitaxial layers (sacrificial layer 42A, first cladding layer 42B, active layer 42C, second cladding layer 42D, intermediate layer (not shown), and window layer 42E) are simultaneously and sequentially epitaxially grown on the portion of the second structure 42 outside the bridging portion 43 formation region 22. This yields the laminated body 42F shown in Figures 14, 15, 17, and 18.

[0114] Furthermore, a sacrificial layer 43A and a stacked body 43F are simultaneously epitaxially grown in the bridging portion 43 forming region 23 within the forming region 22 of the second structure 42. This yields the bridging portion 43 shown in Figures 14, 16, 17, and 19.

[0115] Subsequently, as shown in Figures 1 and 2, an N-type electrode 6 is formed by covering the top of the laminate portion 42F of the second structure 42 (which is a non-light-emitting element) to the bridging portion 43. The N-type electrode 6 is a metal using Au as the main material and containing Ge. On the other hand, as shown in Figures 1 and 2, a P-type electrode 5 is formed by covering only the P-type GaP window layer 41E of the first structure 41. The P-type electrode is a metal using Au as the main material and containing Be.

[0116] Using the above method, a wafer 1 with a micro-LED structure 7 as shown in Figures 1 and 2 is obtained. Using this wafer 1, a bonding semiconductor substrate with a micro-LED structure is manufactured in the following order.

[0117] First, as shown in Figure 20, BCB, serving as the bonding material 11, is coated on the flat surface of wafer 1 with a film thickness of 0.6 μm. After coating with BCB, as shown in Figure 21, a planarization substrate 12 is pressed at room temperature with a pressure of 10 N / cm² to perform planarization. Then, the substrate is held at 250°C for 1 hour to perform BCB curing, resulting in the state shown in Figure 22.

[0118] After BCB hardening, ICP dry etching is performed using fluorine-based plasma at an etching condition equivalent to 0.1 μm in a flat plate. By performing dry etching, the top of the BCB of the first structure 41 of the cone-shaped portion and the top of the stacked portion 42F are etched to expose the electrodes 5 and 6, as shown in Figure 23.

[0119] After the electrode portion is exposed, a resist mask or hard mask is formed by photolithography, and the BCB of the predetermined area for device isolation is removed by fluorine-based plasma to form the device isolation processing substrate 13 shown in FIG24.

[0120] Subsequently, a silicon oxide adhesive layer 14 is formed on one of the main surfaces of the quartz substrate serving as the support substrate 15, and the silicon oxide adhesive layer 14 is adhered and bonded to the surface of the component isolation processing substrate 13 where the electrodes 5 and 6 are exposed, thereby obtaining the bonding substrate 16 shown in FIG25.

[0121] After adhesion and bonding, the substrate is immersed in HF and the sacrificial layer is etched to separate the starting substrate 2, as shown in Figure 26.

[0122] The separated starting substrate 2 is removed, thereby manufacturing the bonding semiconductor wafer 100 with micro-LED structure 7 shown in FIG27.

[0123] (Comparative Example)

[0124] In the comparative example, the bonding type semiconductor wafer is manufactured in the following order as described with reference to Figures 28 to 35.

[0125] First, as shown in Figure 28, after depositing a 0.5 μm thick N-type GaAs buffer layer (not shown) on an unmasked N-type GaAs substrate 2, a 0.3 μm thick N-type GaxIn1-xP(x:0.5) first sacrificial layer and a 0.3 μm thick N-type GaAs second sacrificial layer are epitaxially grown as sacrificial layer 44A. On this sacrificial layer 44A, a 1.0 μm thick N-type (AlyGa1-y)xIn1-xP(x:0.5;y:0.85) first cladding layer 44B, a 0.25 μm thick undoped (AlyGa1-y)xIn1-xP(x:0.5;y:0.1) active layer 44C, and a 1.0 μm thick P-type (AlyGa1-y)xIn1-xP active layer are sequentially epitaxially grown. The epitaxial wafer (EPW) 8 with light-emitting element structure 44 shown in FIG28 consists of a second cladding layer 44D with xP (x:0.5;y:0.85), a P-type GaInP intermediate layer with a thickness of 0.1μm (not shown), and a P-type GaP window layer 44E with a thickness of 4.0μm.

[0126] Subsequently, as shown in Figure 29, benzocyclobutene (BCB) is spin-coated on the epitaxial wafer 8 with a film thickness of 0.6 μm as a thermosetting bonding material 11. Then, it is overlapped with the sapphire wafer, which serves as the support substrate 15, in an opposing manner and thermo-pressed to form the epitaxial wafer (EPW) bonding substrate 10 shown in Figure 30.

[0127] Subsequently, the GaAs starting substrate 2 is removed by wet etching to expose the first sacrificial layer as shown in FIG31. Then, the etchant is switched to remove the sacrificial layer 44A composed of the first sacrificial layer and the second sacrificial layer respectively, thereby exposing the first cladding layer 44B, and thus fabricating the epitaxial (EP) bonding substrate 16' shown in FIG32.

[0128] Subsequently, the following steps are performed: a device isolation step, in which a mask is formed on the EP bonding substrate 16' (lower side in the figure) using photolithography, and a portion of each from the first cladding layer 44B to the GaP window layer 44E is etched to form island-shaped devices; and an etching step, in which a portion of the second cladding layer 44D is exposed. Through these steps, a plurality of island-shaped devices 45 as shown in FIG. 33 are obtained.

[0129] Subsequently, a SiO2 passivation (PSV) film 9 is formed on the surface of the island element 45. The PSV film 9 is formed using a tetraethyl orthosilicate (TEOS) + O2 system P-CVD apparatus, with a film thickness of 0.4 μm. As shown in Figure 34, the PSV film 9 is processed to expose a portion of each of the first coating layer 44B and the second coating layer 44D.

[0130] Subsequently, as shown in FIG35, electrodes 5 and 6 are formed on portions of the first coating layer 44B and the second coating layer 44D exposed through the opening of the PSV film 9, respectively, and heat treatment is performed to achieve ohmic contact. Electrodes 5 and 6 are the same as in the embodiment.

[0131] By following the above sequence, a bonding semiconductor wafer 200 with a plurality of micro-LED structures 7, as shown in Figure 35, is obtained.

[0132] (Evaluate) In Embodiment 1 described above, a plurality of bonding semiconductor wafers 100 are manufactured by changing the size of one side of the first structure 41, which serves as the light-emitting element, to a value of 10 to 250 μm. The change in the size of one side of the first structure 41 is achieved by changing the width Lws of one side of the square opening of the first structure 41 to a value of 10 to 250 μm, while the thickness of each layer in the stacking direction and the width W (=2.5 μm) of the opening of the bridging portion 43 are kept constant.

[0133] Similarly, in the comparative example described above, the size of one side of the island element 45 is changed to 10~250μm to manufacture a plurality of bonded semiconductor wafers 200.

[0134] Figure 36 shows the relationship between the dimension (grain design size) of one side of the first structure 41 or island element 45 serving as the light-emitting element in Embodiment 1 and the comparative example, and the external quantum efficiency (luminous efficiency) at a current density of 8 [A / cm²]. In the case of Embodiment 1, the grain design size is equivalent to the length of one side of the opening (square) of the light-emitting element portion of the mask pattern of the mask 3. Furthermore, when the area is changed, the current is changed so that the current density is always 8 A / cm². The luminous efficiency is calculated based on the light output [W] / power [W].

[0135] As shown in Figure 36, in the comparative example, the luminous efficiency decreased significantly as the size of the island element 45, which serves as the light-emitting element, was reduced. This is believed to be due to damage to the light-emitting element caused by the element isolation process and subsequent element processing.

[0136] On the other hand, in Embodiment 1, even though the size of the first structure 41 is typical of micro-LEDs, that is, less than 100 μm, there is no significant decrease in luminous efficiency.

[0137] The wafer 1 of the present invention having a micro-LED structure 7 is characterized in that, since no element processing is required after epitaxial growth in principle, there is no processing cross section, and the outer peripheral surface of the epitaxial layer structure 4 is composed only of the epitaxial surface. Therefore, there is no damage caused by processing in the first structure 41, which serves as the light-emitting element.

[0138] Furthermore, since the wafer 1 with the micro-LED structure 7 of the present invention does not suffer processing damage, a damage removal step is not required. Also, during epitaxial growth, for example as shown in FIG18, the partial surface coverage of the thin film of the window layer 41E also has a function similar to a passivation layer. Therefore, even without forming a passivation film, it can achieve a similar effect of reducing surface states as when a passivation layer is formed, thus reducing the number of photons absorbed by the surface states. As a result, the decrease in luminous efficiency is suppressed more effectively than in the prior art.

[0139] Furthermore, this invention is not limited to the embodiments described above. The embodiments described above are examples; any invention that has a substantially similar structure and performs the same function as the technical concept described in the claims of this invention is included within the technical scope of this invention.

[0140] 1: Wafer 2: Starting substrate 3: Mask 4: Epitaxial Layer Structure 4A:{111} face 5,6: Electrodes 7: Miniature LED Structure 8: Epistar Wafer 9: Passivation film 11: Bonding materials 12: Planarization treatment substrate 13: Component isolation processing substrate 14: Adhesive layer 15: Supporting substrate 16: Bonding substrate 16': Epitaxial bonding substrate 20: Exposed parts 21: Formation region of the first structure 22: Formation region of the second structure 23: Formation area of ​​the bridging section 31: Opening 41: First Structure 41A, 42A, 43A, 44A: Sacrificial Layer 41B, 42B, 43B, 44B: First cladding layer 41C, 42C, 43C, 44C: Active layer 41D, 42D, 43D, 44D: Second coating layer 41E, 42E, 43E, 44E: Window layer 42: Second Structure 42F, 43F: Laminated body 43G: Laminated body 43: Bridging section 44: Structure of light-emitting element 45: Island element 100, 200: Junction type semiconductor wafers Lh: Total thickness of the first structure Lws: Width of the shortest part at the bottom of the first structure T: Total thickness of the epitaxial layer structure W: Width of the shortest part of the bridging section

[0141] Domestic storage information (please note in order of storage institution, date, and number) none Overseas storage information (please note in the order of storage country, institution, date, and number) none

Claims

1. A wafer having a micro-LED structure, characterized in that it comprises: a starting substrate; a mask formed on the starting substrate having a mask pattern including an opening; and a plurality of epitaxial layer structures selectively grown on portions of the starting substrate corresponding to the openings of the mask pattern; each of the plurality of epitaxial layer structures being a pyramidal or frustum-shaped shape surrounded by {111} planes; each of the plurality of epitaxial layer structures comprising a first structure serving as a light-emitting element portion and a second structure connected to the first structure; each of the first structure and the second structure having electrodes of different polarities, and constituting a micro-LED structure capable of operating as a single micro-LED, wherein the {111} plane direction of the plurality of epitaxial layer structures is a thin film serving as a completely depleted layer.

2. A wafer having a micro-LED structure as described in claim 1, wherein, The aforementioned first structure is a light-emitting element with an AlGaInP-based light-emitting layer. When the width of the shortest part at the bottom is set to Lws and the total thickness of the aforementioned first structure in the direction perpendicular to the surface of the aforementioned starting substrate is set to Lh, Lh≦0.707×Lws.

3. A wafer having a micro-LED structure as described in claim 2, wherein, The width Lws of the shortest part at the bottom of the aforementioned first structure is more than 10 μm and less than 100 μm.

4. A wafer having a micro-LED structure as described in any one of claims 1 to 3, wherein, The aforementioned epitaxial layer structure includes an active layer, and the aforementioned second structure is a non-light-emitting element portion and includes a pyramidal bridging portion in at least a portion. When the width of the shortest portion of the aforementioned bridging portion is set to W [μm], and the total thickness of the aforementioned epitaxial layer structure up to the aforementioned active layer in the direction perpendicular to the aforementioned starting substrate surface is set to T [μm], 1.5μm < W < T / 0.

707.

5. A wafer having a micro-LED structure, characterized in that it comprises: a starting substrate; and a plurality of epitaxial layer structures selectively grown on a portion of the starting substrate; each of the plurality of epitaxial layer structures is a pyramidal or frustum-shaped form surrounded by {111} planes; each of the plurality of epitaxial layer structures includes a first structure serving as a light-emitting element portion and a second structure connected to the first structure; each of the first structure and the second structure has electrodes of different polarities and constitutes a micro-LED structure capable of operating as a single micro-LED, wherein the {111} plane direction of the plurality of epitaxial layer structures is a thin film serving as a completely depleted layer.

6. A method for manufacturing a wafer having a micro-LED structure, characterized in that the wafer having the micro-LED structure is manufactured by: preparing a starting substrate; forming a mask on the starting substrate, the mask having a mask pattern including an opening; selectively growing a plurality of epitaxial layer structures, each of which is a pyramidal or frustum-shaped structure surrounded by {111} planes and the {111} plane direction is a thin film serving as a completely depleted layer, on the portion of the starting substrate exposed through the opening of the mask pattern, such that the plurality of epitaxial layer structures include a first structure serving as a light-emitting element portion and a second structure connected to the first structure; forming electrodes of different polarities on the first structure and the second structure respectively, thereby manufacturing a wafer having a micro-LED structure capable of operating as a micro-LED, the micro-LED structure being composed of the first structure and the second structure.

7. A method for manufacturing a bonding semiconductor wafer having a micro-LED structure, characterized in that the bonding semiconductor wafer having the micro-LED structure is manufactured by: manufacturing the aforementioned wafer having the micro-LED structure by means of the method for manufacturing a wafer having a micro-LED structure as described in claim 6; bonding the surface of the aforementioned wafer having the micro-LED structure to one of the main surfaces of a support substrate with a bonding material in between, thereby obtaining a bonding substrate; and removing the aforementioned starting substrate from the bonding substrate.

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