Sputtering targets for forming oxide semiconductor thin films with high mobility and large band gaps; manufacturing methods of sputtering targets for forming oxide semiconductor thin films with high mobility and large band gaps; oxide semiconductor thin films with high mobility and large band gaps; thin-film semiconductor devices and manufacturing methods thereof.

Abstract

[The technical problem to be solved] The present invention aims to provide a sputtering target for forming oxide semiconductor thin films and a method for manufacturing the same, an oxide semiconductor thin film, and even a thin film semiconductor device and a method for manufacturing the same. The sputtering target for forming oxide semiconductor thin films can form oxide semiconductor thin films that are suitable for use as active layers with high mobility and large band gap. Technical means to solve the problem An oxide semiconductor thin film forming sputtering target is disclosed to form an oxide semiconductor thin film; the thin film is constructed by an oxide sintered body containing a predetermined oxide; when the elemental ratio of the predetermined oxide is set to InXSnYGaVGeWZnZ, X is 0.4~0.8, Y is 0~0.1, Z is 0.2~0.6, and within the range of X+Y+Z=1, V / (V+W+X+Y+Z) is 0.01 to 0.22 and W / (V+W+X+Y+Z) is 0.01 to 0.06.

Description

Technical Field

[0001] The present invention relates to a sputtering target for forming an oxide semiconductor thin film, a method for manufacturing the sputtering target for forming an oxide semiconductor thin film, an oxide semiconductor thin film, a thin-film semiconductor device, and a method for manufacturing the same. Prior Art

[0002] Thin-film transistors (TFTs) using In-Ga-Zn-O oxide semiconductor thin films (IGZO) as active layers have been widely used in various displays in recent years because they can achieve higher mobility than conventional TFTs using amorphous silicon thin films as active layers (see, for example, Patent Documents 1-3).

[0003] For example, Patent Document 1 discloses an organic EL display device using IGZO as the active layer of the TFT driving the organic EL element. Patent Document 2 discloses a thin-film transistor using a-IGZO as the channel layer (active layer) and having a mobility exceeding 5 cm² / Vs. Patent Document 3 discloses a thin-film transistor using IGZO as the active layer and having an on / off current ratio exceeding five digits.

[0004] On the other hand, to lower the raw material costs of IGZO, some are using Zn-Sn-O (ZTO) (Patent Document 4) or In-Sn-Zn-O (ITZO), which adds Sn to replace Ga in IGZO (Patent Document 5). Among these, ITZO is attracting much attention as a material second only to IGZO, due to its significantly higher mobility compared to IGZO.

[0005] In addition, among the materials used in oxide semiconductors, ITZO has a large thermal expansion coefficient and a low thermal conductivity, making it unsuitable for use as a sputtering target. From this perspective, some people use a sputtering target that includes an oxide sintered body containing In+Sn+Zn+X elements and oxygen elements, and the atomic ratio of each element conforms to the following mathematical formula (1), and further includes a spinel structure compound represented by Zn2SnO4 (Patent Document 6). 0.001≦X / (In+Sn+Zn+X)≦0.05···(1) (The X element is at least one selected from Ge, Si, Y, Zr, Al, Mg, Yb, and Ga.) [Prior Art Literature]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-31750 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-216574 [Patent Document 3] WO2010 / 092810 [Patent Document 4] Japanese Patent Application Laid-Open No. 2017-36497 [Patent Document 5] WO2013 / 179676 [Patent Document 6] WO2019 / 026954 Summary of the Invention

[0007] [Problems to be solved by the invention]

[0008] In recent years, the demand for higher-resolution, lower-power, and faster frame rates in various displays has increased dramatically, leading to a surge in demand for oxide semiconductors with higher mobility. However, thin-film transistors (TFTs) using IGZO in their active layers struggle to achieve mobilities exceeding 10 cm² / Vs. Therefore, the development of materials with even higher mobility for TFTs is necessary.

[0009] On the other hand, when used in high-mobility active layers, the threshold voltage at which the current switches from OFF to ON shifts. In other words, the band gap of high-mobility active layers tends to become smaller, which is a problem.

[0010] As mentioned above, a balance between high mobility and a wide band gap is crucial for the active layer of TFTs used in high-performance displays. While this has resulted in improved light resistance and high reliability for displays, achieving optimal composition from this perspective is unprecedented.

[0011] In addition, when used as the active layer of TFT, the etching rate of the etchant is also an important point.

[0012] In view of the above circumstances, the purpose of the present invention is to provide a sputtering target for forming an oxide semiconductor thin film, a method for manufacturing a sputtering target for forming an oxide semiconductor thin film, an oxide semiconductor thin film, and even a thin film semiconductor device and its manufacturing method. The sputtering target for forming an oxide semiconductor thin film can form: an oxide semiconductor thin film, which is suitable for use in an active layer that has both high mobility and a large band gap. [Methods for solving the problem]

[0013] The inventors have conducted repeated and careful studies to achieve this goal, and have found that an oxide film containing indium, zinc, and tin and also containing gallium and germanium is suitable as the desired active layer, thereby completing the present invention. The present invention is described herein as follows.

[0014] A first aspect of the present invention is a sputtering target for forming an oxide semiconductor thin film, which forms an oxide semiconductor thin film; Composed of an oxide sintered body containing a predetermined oxide; When the element ratio of the predetermined oxide is set to InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0015] The second aspect of the present invention is that in the sputtering target material for forming an oxide semiconductor thin film of the first aspect, The oxide sintered body further contains at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb, namely, A group elements.

[0016] The third aspect of the present invention is the sputtering target material for forming an oxide semiconductor thin film according to the second aspect. Ti is less than 2 at%, Ta is less than 2 at%, Zr is less than 3 at%, Y is less than 4 at%, Al is less than 5 at%, Mg is less than 5 at%, and Sb is less than 9 at%; The content of the A group elements is less than 10 at %.

[0017] According to a fourth aspect of the present invention, in the sputtering target for forming an oxide semiconductor thin film according to any one of the first to third aspects, The relative density is above 90%.

[0018] A fifth aspect of the present invention is a method for manufacturing a sputtering target for forming an oxide semiconductor thin film, wherein the sputtering target is used to form an oxide semiconductor thin film. Indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide and germanium oxide powder are mixed to form a powder compact, and the powder compact is calcined at a temperature of not less than 1100°C and not more than 1650°C to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body of any one of the first to fourth embodiments.

[0019] A sixth aspect of the present invention is a method for manufacturing a sputtering target for forming an oxide semiconductor thin film, wherein the sputtering target is used to form an oxide semiconductor thin film. Oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium are mixed to form a precursor powder which is pre-calcined at 600°C to 1500°C to form a powder compact, and the powder compact is calcined at a temperature between 1100°C and 1650°C to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body according to any of the first to fourth embodiments.

[0020] A seventh aspect of the present invention is an oxide semiconductor thin film composed of an oxide semiconductor including a predetermined oxide. When the element ratio of the predetermined oxide is set to InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0021] In the eighth aspect of the present invention, in the oxide semiconductor thin film of the seventh aspect, The mobility is 15~30cm2 / V·s, and the band gap is above 2.75eV.

[0022] In the ninth aspect of the present invention, in the oxide semiconductor thin film of the seventh or eighth aspect, The etching rate when etching with phosphoric acid and acetic acid etchants is above 1nm / sec.

[0023] According to a tenth aspect of the present invention, in the oxide semiconductor thin film of any one of the seventh to ninth aspects, the oxide semiconductor thin film further comprises: At least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb, namely, an A group element.

[0024] In the 11th aspect of the present invention, in the oxide semiconductor thin film of the 10th aspect, Ti is less than 2 at%, Ta is less than 2 at%, Zr is less than 3 at%, Y is less than 4 at%, Al is less than 5 at%, Mg is less than 5 at%, and Sb is less than 9 at%; The content of the A group elements is less than 10 at %.

[0025] A twelfth aspect of the present invention is a thin film semiconductor device comprising: Gate electrode; A gate insulating film is provided on the gate electrode; The active layer is provided on the gate insulating film and is composed of a high-mobility oxide semiconductor thin film; and A source electrode and a drain electrode connected to the active layer; The active layer is composed of an oxide semiconductor thin film of any one of the 7th to 11th states.

[0026] A thirteenth aspect of the present invention, in the thin film semiconductor device of the twelfth aspect, comprises: The cover layer covers the active layer.

[0027] According to a fourteenth aspect of the present invention, in the thin film semiconductor device according to the thirteenth aspect, The cap layer is suitable for an etching rate when patterned together with the active layer.

[0028] A fifteenth aspect of the present invention is a method for manufacturing a thin-film semiconductor device, for manufacturing the thin-film semiconductor device of the twelfth aspect; forming a gate insulating film on the gate electrode; On the gate insulating film, an active layer composed of a high-mobility oxide semiconductor thin film is formed by sputtering; patterning the active layer; Forming a metal layer with the patterned active layer as the underlying film; The metal layer is patterned by wet etching to form a source electrode and a drain electrode.

[0029] A sixteenth aspect of the present invention is a method for manufacturing a thin-film semiconductor device, for manufacturing the thin-film semiconductor device of the thirteenth or fourteenth aspect; forming a gate insulating film on the gate electrode; On the gate insulating film, an active layer composed of a high-mobility oxide semiconductor thin film is formed by sputtering; Forming the cap layer on the active layer by sputtering; Patterning the laminated film of the active layer and the cover layer; forming a metal layer with the patterned active layer and the cover layer as the bottom film; The metal layer is patterned by wet etching to form a source electrode and a drain electrode. [Effects of the Invention]

[0030] The present invention provides a sputtering target for forming an oxide semiconductor thin film. This target can form an oxide semiconductor thin film suitable for use as the active layer of a TFT for high-performance displays. The target exhibits high mobility, a large band gap, and an excellent etching rate for a given etchant. This improves the light resistance of the display and achieves high reliability. Simple diagram description

[0031] Figure 1 shows the mobility of a ternary composite oxide thin film of In, Sn, and Zn, which ranges from 15 to 30 cm² / V·s. [Figure 2] Figure 2 is a diagram showing the energy band gap range of In, Sn and Zn ternary composite oxide thin films above 2.75 eV. [Figure 3] Figure 3 is a graph showing the etching rate of a ternary composite oxide thin film of In, Sn, and Zn for a phosphoric acid-acetic acid etchant in the range of 1 nm / sec or more. [Figure 4] Figure 4 is a diagram showing the range obtained by integrating the ranges of Figures 1 to 3. [Figure 5] Figure 5 is a diagram showing the schematic structure of an example of a thin film transistor of the present invention. [Figure 6] Figure 6 is a diagram showing the schematic structure of another example of a thin film transistor of the present invention. [Figure 7] Figures 7(a) to 7(d) are diagrams showing the schematic structure of an example of the thin film transistor manufacturing process of the present invention. [Figure 8] Figures 8(a) to 8(d) are diagrams showing the schematic structure of an example of the manufacturing process of the thin film transistor of the present invention. [Figure 9] Figure 9 is a graph comparing the initial characteristics of the thin film transistors of Examples 21, 22 and Comparative Example 21 of the present invention, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [Figure 10] Figure 10 is a diagram comparing the PBTS of the thin film transistors of Examples 21, 22 and Comparative Example 21 of the thin film transistors of the present invention, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [Figure 11] Figure 11 is a diagram comparing the NBTS of the thin film transistors of Examples 21, 22 and Comparative Example 21 of the thin film transistors of the present invention, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [Figure 12] Figure 12 is a diagram comparing the NBITS of the thin film transistors of Examples 21, 22 and Comparative Example 21 of the present invention, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [Figure 13] Figure 13 is a graph comparing the initial characteristics of the thin film transistors of Examples 23, 24 and Comparative Example 22 of the present invention, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [Figure 14] Figure 14 is a diagram comparing the PBTS of the thin film transistors of Examples 23, 24 and Comparative Example 22 of the thin film transistors of the present invention, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [Figure 15] Figure 15 is a diagram comparing the NBTS of the thin film transistors of Examples 23 and 24 and Comparative Example 22 of the thin film transistors of the present invention, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [Figure 16] Figure 16 is a diagram comparing the NBITS of the thin film transistors of Examples 23 and 24 and Comparative Example 22 of the thin film transistors of the present invention, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. Implementation Method

[0032] The following describes the implementation of the present invention with reference to the accompanying drawings. Before describing the sputtering target for forming an oxide semiconductor thin film according to this embodiment, the characteristics of the oxide semiconductor thin film formed using this sputtering target will be described.

[0033] [Oxide semiconductor thin film] Oxide semiconductor thin films are used as active layers (inversion layers) with high mobility in thin film transistors such as so-called bottom-gate field-effect transistors. Here, the active layer with high mobility is an active layer having a mobility of 15 to 30 cm 2 / V·s and a band gap of 2.75 eV or more.

[0034] The oxide semiconductor thin film of the present invention is composed of an oxide sintered body containing a predetermined oxide. When the element ratio of the predetermined oxide is set to InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0035] The present invention employs the following components: In as a carrier-generating element, Sn as an element with an etching control or mobility control function, and Zn as an element with an etching control function, with Ge added as a carrier-eliminating element. The In-Sn-Zn ternary system defines an element system with high mobility and a large band gap, which exhibits a high etching rate for a given etchant. A predetermined amount of Ge is added to this system as a carrier-eliminating element. Even with a large addition of Ge, the band gap is only slightly reduced, and the etching rate is minimally affected. Furthermore, a predetermined amount of Ga is added to provide both mobility control and etching control for phosphoric acid / acetic acid-based etchants.

[0036] This discovery was made by measuring the relationship between the degree of mobility reduction and the degree of band gap increase when adding various elements to an element system composed of a 1:1 mixture of In and Zn using this pentad composition as the basic component.

[0037] The relationship between the amount of each element added and the degree of mobility reduction was measured for an element system composed of a 1:1 mixture of In and Zn. The results showed that the element system with Ge added to In and Zn had a smaller rate of mobility reduction and a larger rate of band gap increase.

[0038] Furthermore, for an element system composed of a mixture of In and Zn in a 1:1 ratio, the relationship between the amount of each element added and the degree of band gap increase was determined. The results showed that adding Sn, which has an etching control function or a mobility control function, to this element system is preferable.

[0039] Furthermore, the inventors have discovered that when using a phosphoric acid-acetic acid-based etchant, the elements Ge and Ga only slightly reduce the etching rate even when added, and that the reduction rate is particularly small when Ga is added.

[0040] Therefore, according to the present invention, the range of components in the quinary system of In, Zn, Sn, Ga, and Ge that "achieve high mobility, large band gap, and high etching rate for a given etchant" is set as follows.

[0041] Specifically, for a ternary oxide semiconductor composed of InXSnYZnZ, the researchers first measured the relationship between the mobility, band gap, and etching rate for a given etchant and the component ratios. The etchant used was a phosphoric acid-acetic acid etchant, or PAN. PAN is a mixture of less than 80% phosphoric acid: less than 80% H₃PO₄, less than 5% nitric acid: less than 5% HNO₃, and less than 10% acetic acid: CH₃COOH.

[0042] The ranges of mobility of 15-30 cm2 / V·s, band gap of 2.75 eV and above, and etching rate of 1 nm / sec and above were determined respectively, and the range of overlap of the three was set.

[0043] First, the mobility of the In, Sn, and Zn ternary composite oxide thin film was measured, and the mobility range was set to 15-30 cm2 / V·s. The mobility was measured as follows. A metal for forming contacts is applied near the four vertices of a 10 mm x 10 mm semiconductor sample to obtain a sample.

[0044] Next, a current is passed through the sample, and a magnetic field is applied perpendicularly to the current, thereby generating an electromotive force perpendicular to both the current and the magnetic field, which is defined as the Hall electromotive force. This Hall electromotive force has the property of being proportional to the current and magnetic field, and the proportionality coefficient is a physical quantity inherent to the sample. While measuring this coefficient, the conductivity (resistance) of the sample is also measured, from which information such as the sample's mobility can be obtained.

[0045] Figure 1 shows the results. The results show that for a mobility range of 15-30 cm² / V·s, 0.4 ≤ X < 0.8, 0 ≤ Y ≤ 0.6, and 0 ≤ Z ≤ 0.6 are the optimal range because it achieves the desired high mobility.

[0046] Next, the band gap of the In, Sn, and Zn ternary composite oxide thin film was measured. The band gap was measured as follows. 1. Use a spectrometer to measure transmittance T and reflectance R. 2. Use the following mathematical formula to calculate the absorption coefficient α. α=((-ln(T / (1-R)) / n) / (T / (1-R)) n: film thickness [cm] T, R: measurement data / 100 3. Calculate (α×hω)^(1 / 2). hω(photon energy)[eV]:1239.8 / wavelength[nm] 4. For a graph with hω[eV] on the horizontal axis and (α×hω)^(1 / 2) on the vertical axis, the intersection of the steepest tangent line with the x-axis is the band gap.

[0047] Figure 2 shows the results. The results show that for band gaps above 2.75 eV, 0 ≤ X ≤ 0.8, 0 ≤ Y ≤ 0.8, and 0.2 ≤ Z ≤ 1. A band gap above 2.75 eV is preferred because it achieves high mobility and a large band gap.

[0048] Next, the etching rate for a phosphoric acid / acetic acid etchant was measured to be above 1 nm / sec. The etchant used was PAN, a mixture of phosphoric acid and H₃PO₄ (less than 80%), nitric acid and HNO₃ (less than 5%), and acetic acid and CH₃COOH (less than 10%). The etching rate was measured using the Dip method, in which a single cap layer of a freshly formed oxide semiconductor thin film was immersed in the etchant at 40°C.

[0049] The results are shown in Figure 3. The results show that when the etching rate is above 1 nm / sec, 0 ≦ X ≦ 0.8, 0 ≦ Y ≦ 0.1, and 0.2 ≦ Z ≦ 1. The reason is that this is a condition for achieving high mobility, a large band gap, and a high etching rate for phosphoric acid and acetic acid-based etchants.

[0050] Figure 4 shows the results obtained by integrating the ranges shown in Figures 1 to 3. The results show that the range that satisfies all requirements is: when using InXSnYGeWZnZ, X is 0.4-0.8, Y is 0-0.1, Z is 0.2-0.6, and X+Y+Z = 1. This range was chosen because the addition of Ge allows for the desired high mobility, wide band gap, and high etching rate against sulfuric acid / nitric acid etchants.

[0051] Furthermore, the inventors discovered that when the Ge addition amount, i.e., W / (V+W+X+Y+Z), is between 0.01 and 0.03, a mobility of 15 to 30 cm² / V·s and a band gap of 2.75 eV or greater can be achieved, i.e., high mobility and a large band gap. Furthermore, the etching rate when etching with a phosphoric acid-acetic acid etchant is above 1 nm / sec.

[0052] The oxide semiconductor film of the present invention may further contain at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb, namely, an A group element. The addition amounts of these A-group elements are less than 2 at% Ti, less than 2 at% Ta, less than 3 at% Zr, less than 4 at% Y, less than 5 at% Al, less than 5 at% Mg, and less than 9 at% Sb. The content of the A-group elements is less than 10 at%. This oxide semiconductor film has a high mobility of more than 10 cm2 / V·s and a large energy band gap of more than 2.75 eV, which is preferred.

[0053] [Table 1] α Addition amount (at%) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Ti ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Ta ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Zr ○ ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Y ○ ○ ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Al ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Mg ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ Sb ○ ○ ○ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳ ╳

[0054] [Sputtering target] Next, the sputtering target of this embodiment is described.

[0055] The sputtering target can be a planar target or a cylindrical rotating target. The sputtering target is composed of a sintered oxide containing In, Sn, Ga, Ge, and Zn. The composition ratios are the same as those for the aforementioned oxide semiconductor thin film, and the preferred composition ratios are also the same, so repeated descriptions are omitted.

[0056] The oxide sintered body of the sputtering target of the present invention has a composition range including indium, tin, and zinc, and is composed of an oxide sintered body containing oxides of gallium and germanium. When InXSnYGaVGeWZnZ is used, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0057] The oxide sintered body constituting the sputtering target of the present invention may further contain at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb, namely, an A group element.

[0058] The addition amounts of these A-group elements are: Ti 2 at % or less, Ta 2 at % or less, Zr 3 at % or less, Y 4 at % or less, Al 5 at % or less, Mg 5 at % or less, and Sb 9 at % or less. The total content of the A-group elements is less than 10 at %. This oxide semiconductor film has a high mobility of 10 cm 2 / V·s or more and a large energy band gap of 2.75 eV or more, which is preferred.

[0059] Furthermore, the oxide semiconductor thin film obtained by sputtering an oxide sintered body has a high mobility of 15 to 30 cm 2 / V·s and a large energy band gap of 2.75 eV or more, which is preferable.

[0060] The oxide semiconductor film formed using the sputtering target of the present invention has a high mobility of 15 to 30 cm² / V·s, a large band gap of 2.75 eV or greater, and an etching rate of 1 nm / sec or greater for phosphoric acid / acetic acid etchants.

[0061] (Method for manufacturing sputtering target) The method for producing the sputtering target of the present invention is not particularly limited as long as it is a method for producing a sintered body of the oxide of the above-mentioned components, but the following two production methods can be exemplified.

[0062] The first method is to mix indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide powder, and germanium oxide powder to form a powder compact, and then calcine the powder compact at a temperature above 1100°C and below 1650°C to produce a sputtering target having an oxide sintered body. The weight ratio of the raw material powder is set to the element ratio of the above-mentioned oxide sintered body to be obtained.

[0063] A second method is to mix oxides, hydroxides, or carbonates of indium, tin, zinc, gallium, and germanium to form a precursor powder that is pre-sintered at 600°C to 1500°C to form a powder compact, and then sinter the powder compact at a temperature between 1100°C and 1650°C to produce a sputtering target having an oxide sintered body. Furthermore, the weight ratio of the raw material powder is set to the element ratio of the above-mentioned oxide sintered body to be obtained.

[0064] The second method is further illustrated below to explain the manufacturing method in detail. In this embodiment, the raw material powder is produced using a spray drying method that simultaneously performs drying and granulation. This eliminates the need for a pulverization process that reduces pulverizability due to the addition of a binder, and allows the use of spherical powders with excellent flowability. This facilitates a uniform distribution of the components of the sputtering target.

[0065] The raw material powders contain at least oxides, hydroxides, or carbonates of indium, tin, zinc, gallium, and germanium. In addition, powders of one or more oxides selected from Group A elements may be mixed. Furthermore, a dispersant or the like may be added when mixing the raw material powders.

[0066] A ball mill can be used to pulverize and mix the raw material powders. However, other media agitation mills, such as bead mills and roller mills, can also be used. Furthermore, the surfaces of the balls or beads used as agitation media can be coated with a resin, for example. This effectively prevents the incorporation of impurities into the powder.

[0067] The mixed granulated powder is pre-calcined at a temperature between 600°C and 1500°C. If the calcination temperature is less than 600°C, the pre-calcination will not be complete and the composite oxide will not be fully formed. If the calcination temperature exceeds 1500°C, the primary particles will become larger due to continued sintering during the pre-calcination, and the sintered density will not increase during the subsequent main calcination. The pre-calcined powder is wet-milled again with a dispersant, binder, etc. using a ball mill, and granulated using a spray drying method.

[0068] The average particle size of the granulated powder should be 500μm or less. If the average particle size of the granulated powder exceeds 500μm, cracks and fissures will develop in the compact, and granular spots will appear on the surface of the calcined body. Using such a calcined body as a sputtering target may cause abnormal discharge or particle generation.

[0069] The preferred average particle size for granulated powder is between 20 μm and 100 μm. This minimizes the volume change (compression rate) before and after cold isostatic pressing (CIP), suppresses cracking in the powder compact, and allows for the stable production of long, strip-shaped powder compacts. However, if the average particle size is less than 20 μm, the powder tends to float, making it difficult to handle.

[0070] Here, the term "average particle size" refers to the value at the 50th percentile of the cumulative percentage of the particle size distribution measured using a sieving particle size analyzer. The average particle size is measured using a "Robot Sifter RPS-105M" manufactured by Seishin Enterprise Co., Ltd.

[0071] Granulated powder is compacted at a pressure of 100 MPa / cm² or higher. This produces a sintered body with a relative density of 97% or higher. If the compacting pressure is less than 100 MPa, the powder compact is easily damaged, making it difficult to handle, and the relative density of the sintered body is reduced.

[0072] The CIP method is used for forming. The CIP configuration can be either a typical vertically loaded vertical type or, more preferably, a horizontal type with horizontal loading. This is because using a vertical CIP method to produce long, flat powder compacts can lead to variations in thickness due to powder shifting in the mold, or cracking due to the weight of the powder during handling.

[0073] The green compact is then sintered at 1100°C to 1650°C to form a sintered body. If the calcination temperature is below 1100°C, the conductivity and relative density will decrease, making it unsuitable for target applications. On the other hand, if the calcination temperature exceeds 1650°C, some components will evaporate, causing compositional deviations in the calcined body, or the strength of the calcined body will decrease due to coarsening of the crystal grains.

[0074] The powder compact is fired in air or an oxidizing atmosphere to stably produce the desired oxide sintered body.

[0075] When preparing granulated powder, use a powder with an average primary particle size of 0.3 μm or more and 1.5 μm or less. This shortens the mixing and grinding time and improves the dispersion of the raw material powder within the granulated powder.

[0076] The repose angle of the granulated powder is preferably below 32°. This improves the fluidity of the granulated powder and enhances its formability and sinterability.

[0077] (Processing steps) The calcined body produced in the above manner is machined into a plate of the desired shape, size, and thickness to produce a sputtering target composed of an In-Sn-Ga-Ge-Zn-O sintered body. The sputtering target is integrally welded to a support plate.

[0078] According to this embodiment, a long, strip-shaped sputtering target with a length exceeding 1000 mm in the longitudinal direction can be produced. This allows for the production of a large, non-divided sputtering target. This prevents deterioration in film properties caused by sputtering of bonding material (solder) that intrudes into the gaps (joints) between the divided sections, enabling stable film formation. Furthermore, particle generation due to reattachment (redeposition) of sputtered particles deposited in these gaps is less likely.

[0079] [Evaluation of sputtering targets] (Resistivity distribution) The specific resistivity was measured by a direct current four-probe method using Model Sigma-5+ manufactured by NPS Corporation. The five-point average resistivity value on the plated surface side of the processed sintered body was used as the resistivity value.

[0080] (Relative density) The density of the sintered body is obtained by the mercury Archimedean method or directly calculated from the size and weight.

[0081] (Crystal Structure) Whether a composite oxide is generated in the oxide sintered body and whether the oxide semiconductor thin film is amorphous are confirmed by XRD: X-ray diffraction.

[0082] An example of the apparatus and measurement conditions used for X-ray diffraction is as follows. X-ray diffraction device: RINT manufactured by Rigaku Corporation Scanning method: 2θ / θ method Target:Cu Tube voltage: 40kV Tube current: 20mA Scanning speed: 2.000° / min Sampling width: 0.050° Divergence slit: 1° Scattering slit: 1° Light receiving slit: 0.3mm

[0083] (Element) The composition of the oxide sintered body was confirmed by SEM-EDX: Energy Dispersive X-ray Spectroscopy.

[0084] An example of the apparatus and measurement conditions used for component analysis is as follows. SEM-EDX:TM3030 Hitachi High-Technologies Corporation Accelerating voltage: 15kV Detection element type: Silicon drift detector Component area: 30mm2 Energy resolution: 154eV (Cu-Kα) Detectable elements: B 5~Am 95 Qualitative analysis: automatic / manual Quantitative analysis: no standard method

[0085] [Thin Film Transistor] FIG5 shows a schematic structure of an example of a thin film transistor according to the present invention. The thin film transistor 100 of this embodiment is disposed on a substrate 10 and includes a gate electrode 11 , a gate insulating film 12 , an active layer 13 , a cap layer 14 , a source electrode 15S, a drain electrode 15D, and a protective film 16 .

[0086] The gate electrode 11 is composed of a conductive film formed on the surface of the substrate 10. The substrate 10 is typically a transparent glass substrate. The gate electrode 11 is typically composed of a single-layer or multilayer metal film such as molybdenum (Mo), titanium (Ti), aluminum (Al), or copper (Cu), and is formed, for example, by sputtering. In this embodiment, the gate electrode 11 is composed of molybdenum. The thickness of the gate electrode 11 is not particularly limited, but is, for example, 200 nm. The gate electrode 11 is formed by, for example, sputtering or vacuum evaporation.

[0087] The active layer 13 functions as the channel layer of the thin film transistor 100. The thickness of the active layer 13 is, for example, 10 nm to 200 nm. The active layer 13 is formed of the oxide semiconductor thin film of the present invention. Furthermore, the active layer 13 is formed, for example, by sputtering.

[0088] The cap layer 14 can be a cap layer that is most suitable for the oxide semiconductor film with high mobility and large band gap of the present invention, and can also be a conventional cap layer that can suppress the influence of hydrogen elements generated by etching damage or CVD process.

[0089] The cap layer 14 is patterned together with the active layer 13. The etchant may be the above-mentioned etchant.

[0090] The gate insulating film 12 is formed between the gate electrode 11 and the active layer 13. The gate insulating film 12 is composed, for example, of a silicon oxide film (SiO X), a silicon nitride film (SiN X), or a stacked film thereof. The film formation method is not particularly limited and may be chemical vapor deposition, sputtering, evaporation, or the like. The thickness of the gate insulating film 12 is not particularly limited and may be, for example, 200 nm to 400 nm.

[0091] The source electrode 15S and the drain electrode 15D are formed on the active layer 13 and the cap layer 14, spaced apart from each other. The source electrode 15S and the drain electrode 15D can be formed, for example, from a single layer of a metal such as aluminum, molybdenum, copper, or titanium, or from a multilayer film of such a metal. As described later, the source electrode 15S and the drain electrode 15D can be formed simultaneously by patterning a metal film. The thickness of the metal film is, for example, 100 nm to 200 nm. The source electrode 15S and the drain electrode 15D are formed, for example, by sputtering or vacuum evaporation.

[0092] The source electrode 15S and the drain electrode 15D are covered with a protective film 16. The protective film 16 is made of an electrically insulating material such as a silicon oxide film, a silicon nitride film, or a laminated film thereof. The protective film 16 serves to shield the device portion, including the active layer 13 and the cap layer 14, from the outside air. The thickness of the protective film 16 is not particularly limited, but is, for example, 100 nm to 300 nm. The protective film 16 is formed, for example, by chemical vapor deposition.

[0093] After forming the protective film 16, an annealing process is performed to activate the active layer 13. Annealing conditions are not particularly limited, but in this embodiment, the process is performed in air at approximately 30°C for one hour. At this time, the cap layer 14 can be considered to have the function of suppressing the diffusion of hydrogen caused by heat flowing from the protective film 16 to the active layer 13.

[0094] The protective film 16 is provided with interlayer connection holes 16S and 16D at appropriate locations to connect the source electrode 15S and the drain electrode 15D to a wiring layer (not shown). The wiring layer is used to connect the thin film transistor 100 to peripheral circuits (not shown) and is composed of a transparent conductive film such as ITO.

[0095] FIG6 shows the schematic structure of another example of the thin film transistor of the present invention. In this example, except that the cover layer 14 of the thin film transistor in FIG. 5 is not provided, everything is the same as FIG. 8 , and therefore repeated description is omitted.

[0096] As described above, thin-film semiconductor transistors using the oxide semiconductor thin film of the present invention as an active layer, regardless of the structure shown in Figures 5 or 6, can be used as TFTs for high-performance displays, thereby improving the display's light resistance and achieving high reliability.

[0097] (Manufacturing Method of Thin Film Transistor) Next, an example of a method for manufacturing a thin film transistor according to the present invention will be described with reference to FIG. 7 and FIG. 8 . First, as shown in Figure 7(a), a gate electrode material layer 11a is sputtered onto a substrate 10 at room temperature. Then, as shown in Figure 7(b), wet patterning is performed to form a gate electrode 11. Next, as shown in Figure 7(c), a gate insulating film 12 is formed by CVD. Here, a stack of SiO X / SiN X is formed. Next, as shown in Figure 7(d), an active layer material layer 13a and a cap layer material layer 14a are sequentially formed by sputtering at a temperature of 100°C on the substrate 10. Then, as shown in Figure 8(a), the active layer material layer 13a and the cap layer material layer 14a are patterned by etching to form the active layer 13 and the cap layer 14. For example, etching is performed using a sulfuric acid / nitric acid etchant, followed by annealing at 400°C in air for one hour. Next, as shown in FIG8(b), a source / drain metal material layer 15a is formed by sputtering at room temperature. As shown in FIG8(c), this is patterned to form the source electrode 15S and the drain electrode 15D. Finally, as shown in FIG8(d), a protective film material layer 16a is formed by CVD. For example, the protective film material layer 16a is made of SiO2 with a thickness of 300 nm. After annealing at 300°C in air, the protective film material layer 16a is patterned by dry etching to form interlayer connection holes 16S and 16D connecting to the source electrode 15S and the drain electrode 15D.

[0098] In the thin film transistor of the present invention described above, if the cap layer 14 uses the above-mentioned oxide thin film containing indium, magnesium, and tin, for the material of the active layer 13 with a high mobility that tends to have a smaller band gap Eg, when it is stacked with the cap layer 14, the Vth of the TFT will not shift, which has the effect of suppressing external factors when manufacturing the TFT. Specifically, the cap layer 14 of the present invention has the following functions: suppressing the damage to the active layer 13 caused by the hydrogen process, the patterning of the source electrode 15S, and the drain electrode 15D during the manufacture of the TFT.

[0099] The thin film semiconductor transistor without the cap layer 14 shown in FIG. 6 can be manufactured in the same manner except that the cap layer 14 is not formed. Regardless, thin-film semiconductor transistors using the oxide semiconductor thin film of the present invention as an active layer, regardless of the structure shown in Figures 5 and 6, can be used as TFTs for high-performance displays, thereby improving the display's light resistance and achieving high reliability. [Example]

[0100] (Sputtering Target Examples 1-6, Comparative Examples 1-4) As shown in Table 2 below, indium oxide, gallium oxide, germanium oxide, zinc oxide, and tin oxide were weighed and mixed using a ball mill. The mixed granulated powder was sintered in air to obtain a sintered body.

[0101] The relative density and resistivity of the sintered body were measured, and the results are shown in Table 2. Furthermore, EDX was used to confirm whether there was any compositional variation between the mixed granulated powder and the oxide sintered body before and after sintering, and the results are also shown. Furthermore, XRD was used to confirm the formation of composite oxides of each component.

[0102] In the examples, sintering in air using indium oxide, gallium oxide, germanium oxide, zinc oxide, or even tin oxide as raw materials can produce a sintered body with a relative density of 90% or higher. In particular, sintering at temperatures above 1300°C can achieve a relative density of 97% or higher and a resistivity of less than 10 mΩ·cm.

[0103] Furthermore, in the comparative example, when the sintering temperature was below 1100°C, the sintering was not sufficient and the relative density was less than 90%. Furthermore, when sintering at a temperature above 1650°C, the zinc oxide sublimated, resulting in a weight loss of approximately 7% before and after sintering, and a compositional deviation.

[0104] [Table 2] Element(%) raw material sintering temperature (°C) time (hr) environment gas relatively density (%) Bidian resistance (mΩcm) Composition deviation In Ga Ge Sn Zn In Ga Ge Sn Zn Example 1 45 twenty two 2 0 31 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1360 5 atmosphere 99.7 4 none Example 2 50 15 2 3 30 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1360 5 atmosphere 99.9 3 none Example 3 45 twenty two 2 0 31 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1150 5 atmosphere 90.5 15 none Example 4 45 twenty two 2 0 31 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1600 5 atmosphere 99.9 3 none Example 5 50 15 2 3 30 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1150 5 atmosphere 90.9 14 none Example 6 50 15 2 3 30 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1600 5 atmosphere 99.9 2 none Comparative Example 1 45 twenty two 2 0 31 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1050 5 atmosphere 86.7 20 none Comparative Example 2 50 15 2 3 30 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1700 5 atmosphere 99.3 3 have Comparative Example 3 45 twenty two 2 0 31 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1050 5 atmosphere 88.5 18 none Comparative Example 4 50 15 2 3 30 In 2O 3 Ga 2O 3 GeO 2 SnO 2 ZnO 1700 5 atmosphere 99.5 2 have

[0105] (Oxide Semiconductor Thin Film Examples 11 and 12) The oxide semiconductor thin films were produced using the sputtering targets of Examples 1 and 2, and the mobility, band gap, and etching rate for a given etchant were measured as described above. The results are shown in Table 3.

[0106] (Oxide Semiconductor Thin Film Comparative Examples 11-13) Oxide semiconductor thin films with the compositions shown in Table 3 were produced using multiple sputtering targets. The mobility, band gap, and etching rate for a given etchant were measured as described above. Furthermore, XRD was used to confirm amorphous properties. The results are shown in Table 3.

[0107] As a result, the mobility, band gap, and etching rate of the oxide semiconductor films of Examples 11 and 12 all achieved the desired characteristics, but the desired characteristics could not be achieved in all of Comparative Examples 11-13.

[0108] [Table 3] Example Comparative Example Element(%) Migration (cm 2 / V˙s) Carrier concentration ( / cm 3) Band gap (eV) Etching rate (nm / sec) XRD In Ga Ge Sn Zn PAN Actual example 11 45 twenty two 2 0 31 18.1 4.3E+16 2.8 3.0 amorphous Actual example 12 50 15 2 3 30 18.5 6.8E+16 2.8 3.4 amorphous Comparative Example 11 10 twenty two 6 10 52 5.0 1.0E+13 3.1 3.1 amorphous Comparative Example 12 40 5 5 30 20 19.8 1.0E+17 3.2 2.9 amorphous Comparative Example 13 70 0 0 5 twenty five 29.3 1.0E+19 2.6 2.6 amorphous

[0109] (Thin Film Transistor Examples 21 and 22) The thin film transistors of Examples 21 and 22 were manufactured without the cap layer 14 as shown in the structure of FIG. 6 . The active layer 13 used In-Sn-Ga-Ge-O of Examples 11 and 12 shown in Table 3, and had a film thickness of 50 nm.

[0110] In this embodiment, TFT characteristics were measured using a thin-film transistor having an active layer having the following composition range: when the element ratio of the oxide is set to InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0111] (Thin Film Transistor Comparative Example 21) The active layer 13 used commercially available ITGZO and was the same as that in Example 21 except that the film thickness was 50 nm. In the comparative example, the TFT characteristics were measured using a thin film transistor with the active layer made of conventional material ITGZO.

[0112] (Thin Film Transistor Examples 23 and 24) The thin film transistors of Examples 23 and 24 were manufactured, each having a cap layer 14 as shown in the structure of FIG. 5 . The active layer 13 used In-Sn-Ga-Ge-O of Examples 11 and 12 shown in Table 3, and had a film thickness of 50 nm. The cover layer uses commercially available IGZO136 with a film thickness of 15 nm.

[0113] In this embodiment, TFT characteristics were measured using a thin-film transistor having an active layer with the following composition range and a cap layer provided thereon: when the element ratio of the oxide is set to InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, and Z is 0.2-0.6. In the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than 0.01 and less than 0.22, and W / (V+W+X+Y+Z) is greater than 0.01 and less than 0.06.

[0114] (Thin Film Transistor Comparative Example 22) Except that the active layer 13 uses commercially available IGZO and has a film thickness of 50 nm, everything is the same as Example 23. In the comparative example, a thin film transistor having a conventional material ITGZO as an active layer and a cap layer on top is used to measure TFT characteristics.

[0115] (TFT Characteristics Comparison) For the thin-film transistors of Examples 21, 22, and Comparative Example 21, initial characteristics, positive bias temperature stress (PBTS), negative bias temperature stress (NBTS), and negative bias illustration temperature stress (NBITS) were measured. The results are shown in Figures 9 to 12. In Figures 9 to 12, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21.

[0116] As a result, we were able to confirm that, compared to the comparative example, the example can obtain a mobility equal to or higher than that of the comparative example, and a light resistance (NBITS) equal to or higher than that of the comparative example. It can be seen that the material cognition of the present invention can improve the characteristics of stress testing.

[0117] (TFT Characteristics Comparison) For the thin-film transistors of Examples 23, 24, and Comparative Example 22, initial characteristics, positive bias temperature stress (PBTS), negative bias temperature stress (NBTS), and negative bias illustration temperature stress (NBITS) were measured. The results are shown in Figures 13 to 16. In Figures 13 to 16, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22.

[0118] As a result, we have confirmed that as long as the mobility of the embodiment is at least equal to that of the comparative example, good reliability (PBTS, NBTS) characteristics can be obtained.

[0119] 10: Base material 11: Gate electrode 11a: Gate electrode material layer 12: Gate insulation film 13: Active layer 13a: Active layer material layer 14: Cover layer 14a: Cover material layer 15a: Source and drain metal material layer 15S: Source electrode 15D: Drain electrode 16: Protective film 16a: protective film material layer 16S, 16D: interlayer connection holes 100: Thin Film Transistor

Claims

1. A sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap, used to form a high-mobility oxide semiconductor thin film with a large band gap; It is constructed from an oxide sintered body containing In, Sn, Zn, Ga, and Ge as essential metal elements; When the atomic ratio of the metal elements in the oxide sintered body is set to InXSnYGaVGeWZnZ, X, Y, and Z are 0.4≦X≦0.8, 0<Y≦0.1, 0.2≦Z≦0.6, and within the range of X+Y+Z=1, V and W are V / (V+W+X+Y+Z) ≥ 0.01 ≤ 0.22 ≤ W / (V+W+X+Y+Z) ≥ 0.01 ≤ 0.06 ≤ The relative density of the oxide sintered body is above 90%, and the resistivity is below 10 mΩ·cm.

2. The sputtering target for forming oxide semiconductor thin films with high mobility and large band gap, as described in claim 1, wherein, The oxide sintered body further contains at least one element selected from Ti, Ta, Zr, Y, Al, Mg, and Sb, i.e., a group A element.

3. The sputtering target for forming oxide semiconductor thin films with high mobility and large band gap, as described in claim 2, wherein, Ti is below 2 at%, Ta is below 2 at%, Zr is below 3 at%, Y is below 4 at%, Al is below 5 at%, Mg is below 5 at%, and Sb is below 9 at%; the content of this group A element is less than 10 at%.

4. A method for manufacturing a sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap, wherein the sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap forms a high-mobility oxide semiconductor thin film; indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide and germanium oxide powder are mixed to form a powder compact, and the powder compact is calcined at a temperature between 1100°C and 1650°C to manufacture the sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap having an oxide sintered body as described in any one of claims 1 to 3.

5. A method for manufacturing a sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap, wherein the sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap is used to form a high-mobility oxide semiconductor thin film; the method involves mixing oxides, hydroxides, or carbonates of indium, tin, zinc, gallium, and germanium, and pre-calcining the precursor powder obtained at 600°C to 1500°C to form a powder compact, and calcining the powder compact at 1100°C to 1650°C to manufacture the sputtering target for forming a high-mobility oxide semiconductor thin film with a large band gap having an oxide sintered body as described in any one of claims 1 to 3.

6. A high-mobility oxide semiconductor thin film with a large band gap, comprising an oxide semiconductor containing a predetermined oxide with In, Sn, Zn, Ga and Ge as essential elements; wherein the atomic ratio of the predetermined oxide is set as InXSnYGaVGeWZnZ, 0.4≦X≦0.8, 0<Y≦0.1, 0.2≦Z≦0.6, and in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is 0.01 to 0.22 and W / (V+W+X+Y+Z) is 0.01 to 0.

06.

7. The oxide semiconductor thin film with high mobility and large band gap as described in claim 6, wherein, The mobility is 15–30 cm² / V·s, and the band gap is above 2.75 eV.

8. The oxide semiconductor thin film with high mobility and large band gap as described in claim 6, wherein, The etching rate when using phosphoric acid-acetic acid based etchant is above 1 nm / sec.

9. The oxide semiconductor thin film with high mobility and large band gap as claimed in claim 6 further contains: at least one element selected from Ti, Ta, Zr, Y, Al, Mg and Sb, i.e., a group A element.

10. The oxide semiconductor thin film with high mobility and large band gap as described in claim 9, wherein, Ti is below 2 at%, Ta is below 2 at%, Zr is below 3 at%, Y is below 4 at%, Al is below 5 at%, Mg is below 5 at%, and Sb is below 9 at%; the content of this group A element is less than 10 at%.

11. A thin-film semiconductor device comprising: a gate electrode; a gate insulating film disposed on the gate electrode; an active layer disposed on the gate insulating film, which is composed of a high-mobility oxide semiconductor thin film; and a source electrode and a drain electrode connected to the active layer; the active layer being composed of a high-mobility oxide semiconductor thin film with a large band gap as described in any one of claims 6 to 10.

12. The thin-film semiconductor device of claim 11, comprising: a cover layer disposed covering the active layer.

13. The thin-film semiconductor device as claimed in claim 12, wherein, The cover layer is suitable for the etch ratio when patterned together with the active layer.

14. A method for manufacturing a thin-film semiconductor device, used to manufacture the thin-film semiconductor device of claim 11; forming a gate insulating film on a gate electrode; forming an active layer on the gate insulating film by sputtering, consisting of an oxide semiconductor thin film with high mobility and a large band gap; patterning the active layer; forming a metal layer with the patterned active layer as the bottom film; patterning the metal layer by wet etching, thereby forming a source electrode and a drain electrode.

15. A method for manufacturing a thin-film semiconductor device, comprising: forming a gate insulating film on a gate electrode; forming an active layer on the gate insulating film by sputtering, the active layer being composed of an oxide semiconductor thin film with high mobility and a large band gap; forming a capping layer on the active layer by sputtering; patterning the stacked film of the active layer and the capping layer; forming a metal layer with the patterned active layer and the capping layer as the bottom film; and patterning the metal layer by wet etching to form a source electrode and a drain electrode.

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