Wafer processing sheet and wafer processing method

Abstract

The present invention relates to a wafer processing sheet comprising: a first layer having a surface in contact with the main surface of a wafer; a second layer having a back surface opposite to the aforementioned surface; and an intermediate layer located between the first layer and the second layer; wherein the ratio of the storage modulus G'(140°C) at 140°C to the storage modulus G'(110°C) at 110°C, G'(140°C) / G'(110°C), of the wafer processing sheet is 0.001 to 0.100; the melting point Tm1 of the first layer is 120 to 140°C; and the melting point Tm2 of the second layer is 133 to 155°C.

Description

Technical Field

[0001] The present invention relates to a wafer processing sheet and a wafer processing method. Prior Art

[0002] During wafer processing, a sheet is attached to protect the wafer from damage. For example, during the back grinding step to thin a wafer with bumps formed on its surface, a sheet is attached to the surface where the bumps are formed to protect the surface. Furthermore, during the dicing step to cut semiconductor chips from a wafer, dicing is performed with the sheet attached to the wafer.

[0003] This type of sheet material is required to conform to the irregularities of the wafer surface. Previously, this conformability was improved by increasing the thickness of the adhesive or by placing a cushioning, flexible resin layer between the base film and the adhesive. However, when the wafer surface has large irregularities, this can lead to insufficient conformability or the adhesive layer penetrating deep into the concave areas of the wafer surface, resulting in reduced yield due to residual paste and malfunctioning of the processed wafers.

[0004] As a solution to this problem, Patent Document 1 discloses a technique in which a sheet is constructed such that a non-adhesive portion having a diameter smaller than the outer diameter of the semiconductor wafer to be attached and an adhesive portion surrounding the non-adhesive portion are provided on one side of the substrate sheet. The adhesive portion is configured to have an adhesive strength of 500 mN or greater at 23°C, thereby preventing paste residue and a decrease in protective performance. [Prior Art Literature] [Patent Document]

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2013-211438 Summary of the Invention

[0006] [Problems to be solved by the invention]

[0007] However, the technique described in Patent Document 1 provides an adhesive portion attached only to the edge of the semiconductor wafer, without providing a structure for directly protecting bumps on non-adhesive portions. Therefore, during the backside grinding step, if a semiconductor wafer has bump electrodes, the backside of the semiconductor wafer is ground with only the tip of the bump electrodes in contact with the substrate sheet. This creates the risk of excessive load being applied to the bump electrodes during backside grinding, potentially damaging them.

[0008] Furthermore, the technology described in Patent Document 1 provides an adhesive portion that is only attached to the edge of the semiconductor wafer, but does not disclose that the adhesive portion that contacts the uneven surface of the wafer can be peeled off well without generating any paste residue.

[0009] The present invention is made in view of the above problems, and its purpose is to provide a wafer processing sheet that has excellent followability and peelability relative to the wafer surface and suppresses residue when peeling from the wafer surface, and a wafer processing method using the wafer processing sheet. [Technical means to solve the problem]

[0010] The present inventors conducted intensive research to solve the aforementioned problems. As a result, they discovered that the aforementioned problems can be solved by using a multilayer structure as a layer that follows and protects the unevenness formed on the wafer main surface, and by setting the storage modulus of the multilayer structure within a specific range. This led to the completion of the present invention.

[0011] That is, the present invention is as follows. [1] A wafer processing sheet having: a first layer having a surface in contact with the main surface of the wafer; a second layer having a back surface opposite to the surface; and an intermediate layer, which is located between the first layer and the second layer; The ratio of the storage modulus G'(140°C) / G'(110°C) of the wafer processing sheet at 140°C to the storage modulus G'(110°C) at 110°C is 0.001 to 0.100. The melting point Tm1 of the first layer is 120-140°C, and The melting point Tm2 of the second layer is 133-155°C. [2] The wafer processing sheet as described in [1], wherein the intermediate layer is laminated on the side of the first layer opposite to the surface. [3] A wafer processing sheet as described in [1] or [2], wherein the melting point Tm1 is less than the melting point Tm2. [4] A wafer processing sheet as described in any one of [1] to [3], wherein the thickness T1 of the first layer is 1 to 20 μm. [5] A wafer processing sheet as described in any one of [1] to [4], wherein the thickness T3 of the intermediate layer is 30-300 μm. [6] A wafer processing sheet as described in any one of [1] to [5], wherein the thickness T2 of the second layer is 10-100 μm. [7] The wafer processing sheet as described in any one of [1] to [6], wherein the first layer comprises polyolefin. [8] The wafer processing sheet as described in any one of [1] to [7], wherein the intermediate layer comprises polyolefin. [9] The wafer processing sheet as described in any one of [1] to [8], wherein the second layer comprises polyolefin.

[10] A wafer processing sheet as described in any one of [1] to [9], wherein the ratio of the storage modulus G'(110°C) at 110°C to the storage modulus G'(50°C) at 50°C, G'(110°C) / G'(50°C), is 0.001 to 0.700.

[11] A wafer processing method comprising: a laminating step of laminating the heated surface of the first layer of the wafer processing sheet as described in any one of items [1] to

[10] to the main surface of the wafer; and The processing step is to process the wafer in a state where the wafer processing sheet is bonded to the wafer.

[12] A wafer processing method as described in

[11] , wherein in the above processing step, the main surface of the above wafer that is not bonded with the above wafer processing sheet is ground to obtain a thinned wafer.

[13] A wafer processing method as described in

[11] or

[12] , wherein a semiconductor chip is obtained in the above processing steps. [Effects of the Invention]

[0012] According to the present invention, a wafer processing sheet having excellent followability and peelability to a wafer surface and suppressing residue when peeled from the wafer surface, and a wafer processing method using the wafer processing sheet can be provided. Simple diagram description

[0013] 1(A) to (D) are cross-sectional views showing an example of backside grinding of a wafer using the wafer processing sheet according to the present embodiment. FIG2 is a graph showing the dynamic viscoelasticity measurement results in Example 2. Implementation Method

[0014] The following describes an embodiment of the present invention (hereinafter referred to as the "present embodiment") in detail. However, the present invention is not limited thereto and various modifications may be made without departing from the spirit and scope of the present invention. In the drawings, identical components are denoted by identical reference numerals, and duplicate descriptions are omitted. Unless otherwise specified, positional relationships, such as up and down, left and right, are based on those shown in the drawings. Furthermore, the dimensional ratios in the drawings are not limited to those shown.

[0015] 1. Sheets for wafer processing The wafer processing sheet of this embodiment comprises: a first layer having a surface in contact with the main surface of the wafer; a second layer having a back surface opposite to the surface; and an intermediate layer located between the first layer and the second layer; the ratio of the storage modulus G'(140°C) of the wafer processing sheet at 140°C to the storage modulus G'(110°C) at 110°C, G'(140°C) / G'(110°C), is 0.001~0.100, the melting point Tm1 of the first layer is 120~140°C, and the melting point Tm2 of the second layer is 133~155°C.

[0016] First, the usage of the wafer processing sheet of this embodiment will be briefly described. Figure 1 shows a cross-sectional view illustrating an example of backside grinding of a wafer using the wafer processing sheet of this embodiment. In Figure 1, the wafer processing sheet 10 comprises a first layer 11 having a surface 10a in contact with the wafer's main surface 20a; an intermediate layer 12; and a second layer 13 having a backside 10b opposite the surface 10a. The first layer 11 ensures peelability, the intermediate layer 12 acts as a buffer layer to ensure conformability, and the second layer 13 serves as a base layer to ensure mechanical strength.

[0017] The wafer 20 has a protrusion 20b on its main surface 20a. The protrusion 20b can be a structure formed by, for example, a circuit in the semiconductor wafer. The wafer processing sheet 10 of this embodiment is used by attaching the surface 10a of the first layer 11 to the main surface 20a of the wafer during processing of the wafer 20, such as a back grinding step or a dicing step.

[0018] More specifically, before processing, the wafer processing sheet 10 is heated with the wafer main surface 20a in contact with the surface 10a of the first layer 11 (step A). ​​The heating lowers the elastic modulus of the wafer processing sheet 10, and the sheet is bonded to the wafer main surface 20a so as to follow the protrusions 20b formed on the wafer main surface 20a (step B).

[0019] Next, the wafer processing sheet 10 is cooled, and back grinding is performed on the back surface 20c of the wafer 20 (step C). Finally, the wafer processing sheet 10 is peeled off from the main surface 20a of the wafer (step D). The specific method of back grinding is not particularly limited, and known methods can be used. For example, a method of supplying a slurry containing abrasive particles to the back surface 20c of the wafer 20 and grinding to thin the wafer 20 can be cited. When the wafer processing sheet 10 is cooled before back grinding, the elastic modulus is restored while following the main surface 20a of the wafer, and the main surface 20a of the wafer and the surface 10a of the first layer 11 are not offset, and the main surface 20a of the wafer is protected.

[0020] When using a wafer with complex shapes such as deep bumps and concave surfaces, the wafer processing sheet 10 may not be able to adequately follow the gaps formed by the bumps and concave surfaces (step B). If the wafer processing step (step C) is then performed with this insufficient following condition, liquid used for wafer grinding may seep into the gaps and contaminate the wafer.

[0021] On the other hand, when the wafer processing sheet 10 is softened by heating to improve conformability, it becomes easier to fit into complex shapes such as deep bumps and depressions on the wafer. However, after the wafer processing step, the wafer processing sheet 10 may break when being peeled from the wafer (step D). The broken wafer processing sheet 10 remains as residue on the wafer, contaminating the wafer.

[0022] In contrast, this embodiment comprises, in this order, a first layer that is less likely to produce residue and exhibits excellent releasability, an intermediate layer exhibiting excellent conformability, and a second layer exhibiting excellent thin film mechanical strength. In other words, the wafer processing sheet of this embodiment has a multilayer structure comprising a layer that is less likely to produce residue and exhibits excellent releasability, and a layer exhibiting excellent conformability. This structure provides excellent conformability and releasability to the wafer surface, suppressing the generation of residue during peeling from the wafer surface. The following details the various components of the wafer processing sheet of this embodiment.

[0023] 1.1. Layer 1 The first layer has a surface that contacts the wafer's main surface and constitutes the outermost surface of the wafer processing sheet of this embodiment. The melting point Tm1 of the first layer is 120-140°C, preferably 122.5-137.5°C, 125-135°C, or 127.5-132.5°C. A melting point Tm1 of 120°C or higher for the first layer tends to further improve peelability and minimize residue generation. Furthermore, a melting point Tm1 of 140°C or lower for the first layer tends to further improve conformability.

[0024] The melting point Tm1 is preferably lower than the melting point Tm2 described below. This further improves the conformability of the first layer when the wafer processing sheet 10 is heated and laminated, and suppresses deformation of the second layer, which tends to further improve the accuracy of wafer processing.

[0025] The melting point T1 can be controlled by adjusting the type of resin used in the first layer or the type or ratio of comonomers in the copolymer. In this embodiment, the melting point of each layer can be measured according to JIS K7121.

[0026] The thickness T1 of the first layer is preferably 1-20 μm, 2-20 μm, 3-20 μm, 4-15 μm, 4-10 μm, or 5-7.5 μm. A first layer thickness T1 of 1 μm or greater improves peelability and reduces the generation of residue even when stretched while following the surface in contact with the wafer's main surface. A first layer thickness T1 of 20 μm or less further improves followability.

[0027] The material constituting the first layer is not particularly limited, and examples thereof include polyolefins, ethylene-vinyl acetate copolymers, polypropylene resins, and polyester resins. The first layer preferably contains polyolefins. The inclusion of polyolefins tends to further improve followability and peelability, and also to further reduce residue. The resins may be used alone or in combination of two or more.

[0028] The polyolefin is not particularly limited, and examples thereof include homopolymers of ethylene or propylene, or copolymers formed from at least two monomers selected from the group consisting of ethylene, propylene, 1-butene, 4-methyl-1-pentene, 1-hexene, and 1-octene.

[0029] Among them, polypropylene resins are preferred. There are no particular limitations on the polypropylene resin, as long as it is a polymer composed mainly of propylene. Examples include polypropylene homopolymers and copolymers of propylene with monomers having unsaturated double bonds, such as ethylene, 1-butene, 4-methyl-1-pentene, 1-hexene, and 1-octene.

[0030] Here, "composed of propylene as the main monomer" means that the molar ratio of propylene relative to the total structural units of the polypropylene resin is 50 mol% or greater. In the first layer, the molar ratio of propylene in the polypropylene resin relative to the total amount of the polypropylene resin is preferably 60 mol% or greater, 70 mol% or greater, 80 mol% or greater, or 90 mol% or greater. Furthermore, the molar ratio of propylene relative to the total amount of the polypropylene resin is preferably 99 mol% or less, 98 mol% or less, or 97 mol% or less.

[0031] Furthermore, the polyolefin-based resin may include a soft polypropylene resin. The soft polypropylene resin is not particularly limited, and examples thereof include polypropylene resins blended with a rubber component. The rubber component used herein is not particularly limited, and examples thereof include styrene-butadiene copolymer rubber, styrene-butadiene-styrene block copolymer rubber, styrene-isoprene-styrene block copolymer rubber, and ethylene-propylene copolymer rubber.

[0032] The weight average molecular weight (Mw) of the resin contained in the first layer is preferably 5.0×10 4 to 3.5×10 5, 1.0×10 5 to 3.0×10 5, or 1.5×10 5 to 2.5×10 5. In this embodiment, the weight average molecular weight (Mw) can be measured by gel permeation chromatography according to a known method.

[0033] The first layer may also contain additives as needed. There are no particular limitations on the additives, and examples thereof include known plasticizers, heat stabilizers, colorants, organic lubricants, inorganic lubricants, surfactants, and processing aids.

[0034] 1.2. Layer 2 The second layer is a layer having a backside opposite to the front surface and constitutes the outermost surface of the wafer processing sheet of this embodiment that does not contact the wafer main surface. The melting point Tm2 of the second layer is 133-155°C, preferably 135-152.5°C, 137.5-150°C, 137.5-147.5°C, or 137.5-145°C. A melting point Tm2 of 133°C or higher for the second layer further enhances mechanical strength and tends to be less susceptible to breakage. Furthermore, when the wafer processing sheet 10 is heated and bonded, deformation of the second layer is suppressed, tending to further improve wafer processing accuracy. Furthermore, a melting point Tm2 of 155°C or lower for the first layer further enhances conformability.

[0035] The melting point T2 of the second layer can be controlled by adjusting the type of resin used in the second layer or the type or ratio of comonomers in the copolymer.

[0036] The thickness T2 of the second layer is preferably 10-100 μm, 12.5-90 μm, 15-80 μm, 17.5-70 μm, 20-60 μm, 22.5-50 μm, or 25-40 μm. A second layer thickness T2 of 10 μm or greater further enhances mechanical strength, making it less susceptible to breakage. Furthermore, deformation of the second layer is suppressed during heating and lamination of the wafer processing sheet 10, further improving wafer processing accuracy. Furthermore, a second layer thickness T2 of 100 μm or less further enhances tracking performance.

[0037] The material constituting the second layer is not particularly limited, and examples thereof include polyolefins, ethylene-vinyl acetate copolymers, polypropylene resins, and polyester resins. The second layer preferably contains a polyolefin, and more preferably a polypropylene resin. The inclusion of a polyolefin further improves followability and peelability, and tends to further suppress residue. Examples of polyolefins include the same ones listed for the first layer. The resins may be used alone or in combination of two or more.

[0038] Examples of the monomer constituting the polyolefin or polypropylene resin include the same monomers as those exemplified for the first layer.

[0039] In the second layer, the molar ratio of propylene in the polypropylene resin relative to the total amount of the polypropylene resin is preferably 60 mol% or greater, 70 mol% or greater, 80 mol% or greater, or 90 mol% or greater. Furthermore, the molar ratio of propylene relative to the total amount of the polypropylene resin is preferably 99 mol% or less, 98 mol% or less, or 97 mol% or less.

[0040] When polypropylene resin is used in both the first layer and the second layer, the molar ratio of propylene in the polypropylene resin of the first layer may be greater than the molar ratio of propylene in the polypropylene resin of the second layer.

[0041] 1.3. Middle Layer The intermediate layer is located between the first layer and the second layer. The intermediate layer may be directly laminated on the surface of the first layer opposite to the surface, or may be laminated indirectly via another layer. Preferably, the intermediate layer is directly laminated on the surface of the first layer opposite to the surface.

[0042] The thickness T3 of the intermediate layer is preferably 30-300 μm, 40-290 μm, 50-280 μm, 60-270 μm, 70-260 μm, 80-250 μm, 90-260 μm, 100-250 μm, 110-240 μm, 120-230 μm, or 130-220 μm. An intermediate layer thickness T3 of 30 μm or greater tends to further improve conformability. An intermediate layer thickness T3 of 300 μm or less tends to further improve peelability.

[0043] The total thickness of the wafer processing sheet is preferably 50-500 μm, 70-400 μm, or 100-300 μm. When the total thickness of the wafer processing sheet falls within this range, it can adequately conform to the irregularities of the wafer surface while maintaining its strength. This reduces the risk of sheet breakage during peeling, and tends to further improve peelability.

[0044] The material constituting the intermediate layer is not particularly limited, and examples thereof include polyolefins, ethylene-vinyl acetate copolymers, polypropylene resins, and polyester resins. The intermediate layer preferably contains polyolefins. The inclusion of polyolefins tends to further improve followability and peelability, and further suppress the generation of residue. Examples of polyolefins include the same materials as those exemplified for the first layer.

[0045] The polyolefin is not particularly limited, and examples thereof include homopolymers of ethylene or propylene, or copolymers formed from at least two monomers selected from the group consisting of ethylene, propylene, 1-butene, 4-methyl-1-pentene, 1-hexene, and 1-octene.

[0046] Among them, polypropylene resins are preferred. There are no particular limitations on the polypropylene resin, as long as it is a polymer composed mainly of propylene. Examples include polypropylene homopolymers and copolymers of propylene with monomers having unsaturated double bonds, such as ethylene, 1-butene, 4-methyl-1-pentene, 1-hexene, and 1-octene.

[0047] In the intermediate layer, the molar ratio of propylene in the polypropylene resin relative to the total amount of the polypropylene resin is preferably 60 mol% or greater, 70 mol% or greater, or 80 mol% or greater. Furthermore, the molar ratio of propylene relative to the total amount of the polypropylene resin is preferably 99 mol% or less, 98 mol% or less, or 97 mol% or less.

[0048] The intermediate layer mainly comprises a resin and may contain additives as needed. The resin may be used alone or in combination of two or more.

[0049] 1.4. Storage modulus G' During the processing of the wafer 20 described above, in order to properly protect the wafer main surface 20a, the wafer processing sheet 10 is required to conform to the wafer main surface 20a. Therefore, in this embodiment, the reduction characteristics of the storage modulus G' (elastic component) during heating and lamination are specified.

[0050] The storage modulus G'(110°C) at 110°C is preferably 2.50×105-2.00×107, 5.00×105-1.50×107, 7.50×105-1.00×107, 1.00×106-7.50×106, or 2.50×106-5.00×106. When the storage modulus G'(110°C) is within this range, the tracking performance tends to be further improved.

[0051] The storage modulus G'(140°C) at 140°C is preferably 2.50×10 3 to 7.50×10 5, 5.00×10 3 to 5.00×10 5, 7.50×10 3 to 2.50×10 5, 2.00×10 4 to 1.00×10 5, or 3.50×10 4 to 7.50×10 4. When the storage modulus G'(140°C) is within this range, the tracking performance tends to be further improved.

[0052] The storage modulus G'(50°C) at 50°C is preferably 7.50×10⁶ to 2.50×10⁹, 1.00×10⁷ to 1.00×10⁹, 2.50×10⁷ to 7.50×10⁷, 5.00×10⁷ to 5.00×10⁷, or 7.50×10⁷ to 2.50×10⁷. When the storage modulus G'(50°C) is within this range, the tracking performance tends to be further improved.

[0053] The ratio of the storage modulus G'(140°C) to the storage modulus G'(110°C), G'(140°C) / G'(110°C), is preferably 0.001-0.100, 0.003-0.075, 0.005-0.050, or 0.007-0.025. A G'(140°C) / G'(110°C) ratio of 0.001 or greater tends to further improve followability. A G'(140°C) / G'(110°C) ratio of 0.100 or less further improves peelability and suppresses residue.

[0054] The ratio of the storage modulus G'(110°C) to the storage modulus G'(50°C), G'(110°C) / G'(50°C), is preferably 0.001-0.700, 0.003-0.650, 0.005-0.550, 0.010-0.500, 0.015-0.450, or 0.020-0.400. A G'(110°C) / G'(50°C) ratio of 0.001 or greater tends to further improve followability. A G'(110°C) / G'(50°C) ratio of 0.700 or less further improves peelability and suppresses residue.

[0055] The dynamic viscoelasticity measurement of the wafer processing sheet of this embodiment can be performed using conventional methods. For example, a sample maintained in a constant temperature and humidity chamber at 23°C (±2°C) and 50% (±5%) relative humidity can be used. Furthermore, a known apparatus such as the "Rheometrics Series RSA III" (manufactured by TA Instruments) can be used. Other conditions are not particularly limited and can be measured according to the conditions described in the Examples.

[0056] 1.5. Other layers The wafer processing sheet 10 of this embodiment may optionally include other layers between the first layer and the intermediate layer, between the intermediate layer and the second layer, or on the surface of the second layer. These other layers are not particularly limited, and examples include an adhesive layer disposed between the first layer and the intermediate layer, an adhesive layer disposed between the intermediate layer and the second layer, and an adhesive layer disposed on the surface of the second layer. Furthermore, an adhesive layer is provided to enhance interlayer adhesion. Furthermore, an adhesive layer is used to secure the wafer processing sheet 10 to the stage of wafer processing equipment.

[0057] Like the adhesive layer described above, the wafer processing sheet 10 of this embodiment can optionally include other layers depending on the type of processing. For example, in addition to the adhesive layer, an interference layer can also be included. Furthermore, the other layers can be single layers or a stack of layers having the same or different functions.

[0058] In addition, from the perspective of improving the peelability of the wafer processing sheet 10 relative to the wafer main surface 20a and suppressing residue, the wafer processing sheet 10 of this embodiment preferably does not have an adhesive layer on the surface 10a (the surface of the first layer 11) that contacts the surface of the wafer main surface 20a where the protrusion 20b is formed.

[0059] 2. Wafer processing method The wafer processing method of this embodiment includes a bonding step of bonding the heated surface of the first layer of the wafer processing sheet to the main surface of the wafer, and a processing step of processing the wafer while the wafer processing sheet and wafer are bonded. Each step is described below using Figure 1.

[0060] 2.1. Lamination steps In the laminating step, the heated surface 10a of the first layer 11 of the wafer processing sheet 10 is laminated to the main surface 20a of the wafer. In the laminating step, the wafer processing sheet 10 may be pre-heated and laminated to the main surface 20a of the wafer, or the wafer processing sheet 10 may be laminated to the main surface 20a of the wafer and then heated.

[0061] By laminating the surface 10a of the first layer 11 to the main surface 20a of the wafer in a heated state, the surface 10a can be laminated with the main surface 20a of the wafer following the surface 10a (see FIG. 1B ). As described above, by submerging the protrusions 20b in the wafer processing sheet 10, the main surface 20a of the wafer having the protrusions 20b can be protected.

[0062] The heating temperature is preferably 60-150°C, more preferably 70-140°C, and even more preferably 80-130°C. Furthermore, the heating time of the wafer processing sheet 10 is preferably 3-120 seconds, more preferably 5-90 seconds. When the heating conditions are within this range, the conformability of the wafer processing sheet 10 tends to be further improved.

[0063] Processing steps The processing steps for processing wafer 20 after wafer processing sheet 10 and wafer 20 have been bonded are not particularly limited, and any suitable wafer processing technique may be appropriately applied. For example, the processing steps include grinding the back surface 20c of the wafer not bonded to wafer processing sheet 10 to obtain a thinned wafer 21, and slicing the wafer 20 to obtain semiconductor wafers. The wafer processing method of this embodiment is preferably used for back surface grinding.

[0064] The specific method for back grinding is not particularly limited, and known methods may be used. For example, a method of supplying a slurry containing abrasive particles to the back surface 20c of the wafer and grinding the wafer may be employed. The thickness of the resulting thinned wafer 21 is not particularly limited, as long as it meets the processing objectives. For example, it is preferably 300 μm or less, more preferably 150 μm or less, and even more preferably 50 μm or less.

[0065] During back grinding, a load is applied in the thickness direction of the wafer, which can damage the protrusions 20b and the like, leading to a decrease in yield. In contrast, by using the wafer processing sheet of this embodiment, processing can be performed with at least a portion of the protrusions 20b embedded in the wafer processing sheet 10, thereby avoiding damage to the protrusions 20b and the like.

[0066] In the wafer processing method of this embodiment, when back grinding is performed to thin the wafer thickness starting from the back side of a wafer with pre-formed grooves on its surface for singulation, the wafer thickness can be thinned to the same depth as the grooves. This allows simultaneous thinning by back grinding and singulation.

[0067] 2.3. Stripping step The wafer processing method of this embodiment may include a peeling step for peeling the thinned wafer 21 from the wafer processing sheet 10. The peeling method for the wafer processing sheet 10 is not particularly limited. For example, as shown in FIG1 , the wafer processing sheet 10 may be bent in a direction F to separate one end of the wafer processing sheet 10 from the thinned wafer 21.

[0068] Alternatively, as described above, when singulation is performed simultaneously by backside grinding, the singulated semiconductor wafers can be picked up from the wafer processing sheet 10 .

[0069] The stripping step can be performed at room temperature or at a temperature of 10-70°C, more preferably 20-60°C.

[0070] When using wafer processing sheets with conventional adhesive layers, adhesive residue on the main surface 20a of the wafer 20 becomes a problem. However, the wafer processing sheet of this embodiment, due to its specific viscoelastic properties, can be peeled without adhesive residue.

[0071] Furthermore, as mentioned above, the present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. In other words, the above-mentioned embodiments are only illustrative in all aspects and are not to be interpreted as limiting.

[0072] For example, the lamination process can be performed under reduced pressure in addition to normal pressure. Furthermore, a curable resin can be used instead of or in addition to other layers. When using a curable resin, for example, the curable resin is applied to a film. The surface of the wafer processing sheet 10 opposite to the surface 10a that contacts the wafer main surface 20a is then pressed against the film to spread the curable resin. The curable resin is then cured, securing the wafer processing sheet 10 to the film.

[0073] Furthermore, FIG. 1 mainly shows the back grinding process as an example, but the wafer processing sheet of this embodiment can also be used in the wafer slicing process or other wafer processing processes. [Example]

[0074] The present invention will be further described in detail below using Examples and Comparative Examples. The present invention is not limited to the following Examples.

[0075] 1. Method for manufacturing wafer processing sheet 1.1. Example 1 The wafer processing sheet was produced using a co-extrusion method using a propylene-ethylene copolymer (molar ratio: propylene / ethylene = 95 / 5 mol %) for the first layer, a propylene-ethylene copolymer (molar ratio: propylene / ethylene = 94 / 6 mol %) for the second layer, and a propylene-butylene copolymer for the middle layer. The thickness of the first layer reached 5 μm, the middle layer reached 500 μm, and the second layer reached 25 μm.

[0076] 1.2. Example 2 A wafer processing sheet was prepared by co-extrusion in the same manner as in Example 1, except that propylene-butene-ethylene terpolymer was used in the first and second layers and propylene-butene copolymer was used in the middle layer.

[0077] 1.3. Examples 3-7, Comparative Examples 1-6 The wafer processing sheet was prepared in the same manner as in Examples 1 and 2, except that the first layer, the second layer, and the intermediate layer used resins with different copolymerization ratios and melting points and storage moduli as shown in Table 1.

[0078] 2. Measurement and evaluation Dynamic viscoelasticity measurement Dynamic viscoelasticity measurements of wafer processing sheets were conducted under the following conditions. First, the wafer processing sheets were maintained in a constant temperature and humidity chamber at 23°C (±2°C) and 50% (±5%) relative humidity for 40 hours. The resulting wafer processing sheets were used as samples and subjected to dynamic viscoelasticity measurements under normal atmospheric conditions (dry state). A "Rheometrics Series RSA III" (manufactured by TA Instruments) dynamic viscoelasticity measurement apparatus was used. The storage modulus G' obtained from the measurements for Example 2 was compared with that of single-component polypropylene and is shown in Figure 2. (Measurement conditions) Measuring device: Rheometrics Series III (manufactured by TA Instruments) Sample: 7 cm long × 0.5 cm wide × 0.018 cm thick Test length: 1 cm Pretreatment: Keep in an atmosphere with a temperature of 23°C and a relative humidity of 50% for 40 hours Test mode: stretching in the direction parallel to the surface of the wafer processing sheet Frequency: 1 Hz Temperature range: 30℃~150℃ Heating rate: 2℃ / min Strain range: 0.10% Measurement interval: 1 point / °C

[0079] Melting point The melting point of each layer of the wafer processing sheet was measured under the following conditions. First, the wafer processing sheet was maintained in a constant temperature and humidity chamber at 23°C (±2°C) and 50% (±5%) relative humidity for 40 hours. A sample was obtained from the wafer processing sheet using a surface and interface physical analysis system (SAICAS) and subjected to differential scanning calorimetry (DSC). A "Heat Flux DSC3400" (manufactured by NETZSCH) was used as the DSC measuring instrument. (Sample selection) Device: SAICAS NN-04-01 (manufactured by DAIPLA WINTES) Measurement mode: low speed mode Horizontal speed: 100 nm / sec Vertical speed: 5 μm / sec Blade: Diamond blade width 0.3 mm, forward tilt 20°, clearance 10 (Melting point determination) Heating conditions: Heating from room temperature to 250°C at a rate of 10°C / min Carrier gas: Nitrogen (40 ml / min) Container: Aluminum pot (with sheet material lid) Reference: Empty pot Sample weight: 1 mg

[0080] 2.3. Followability A wafer with grooves 50 μm wide and 400 μm deep was prepared. A wafer processing sheet was pressure-fused to the grooved wafer surface at 133°C for 1 minute. The temperature was then lowered to room temperature (25°C). The tracking performance of the wafer processing sheet was evaluated based on the depth of the grooves. (Evaluation Criteria) ○: Tracking depth is 230 μm or more Δ: Tracking depth is 200 μm or more and less than 230 μm ×: Tracking depth less than 200 μm

[0081] 2.4. Residue A wafer with multiple recesses measuring 800 μm in length, 400 μm in width, and 140 μm in depth was prepared. A wafer processing sheet was pressure-fused to the surface of the wafer with the recesses at 133°C for one minute. The temperature was then lowered to room temperature (25°C), and the wafer processing sheet was peeled off. The remaining residue from the wafer processing sheet within the recessed area was then observed. The residue generation rate was calculated using the following formula, and the residue was evaluated based on the residue generation rate. Residue occurrence rate = (number of sections where residue was confirmed) / (total number of sections on the wafer surface) (Evaluation Criteria) 0: Residue occurrence rate is less than 1% Δ: The residue occurrence rate is 1% or more and less than 5% ×: Residue generation rate is 5% or more

[0082] 2.5. Peelability A wafer with multiple recesses measuring 800 μm in length, 400 μm in width, and 140 μm in depth was prepared. A wafer processing sheet was pressure-fused to the surface of the wafer with the recesses at 133°C for one minute. The temperature was then lowered to room temperature (25°C) and the wafer processing sheet was peeled off. The wafer processing sheet was then observed for breakage within the recessed areas. The breakage rate was calculated using the following formula, and the peelability was evaluated based on the breakage rate. Damage incidence rate = (number of damaged sections) / (total number of sections on the wafer surface) (Evaluation Criteria) 0: The damage rate is 0% Δ: The breakage rate is more than 0% and less than 1% ×: The breakage rate exceeds 1%

[0083] [Table 1] Example 1 2 3 4 5 6 7 G'(50℃) 1.57E+09 1.06E+08 2.31E+07 1.60E+08 1.62E+08 6.73E+07 5.75E+07 G'(110℃) 3.70E+06 3.13E+06 2.08E+06 5.59E+06 5.19E+06 2.69E+06 2.01E+06 G'(140℃) 9.40E+03 4.44E+04 9.37E+04 7.83E+04 9.36E+04 4.31E+04 3.02E+04 G'(140℃) / G'(110℃) 0.0025 0.0142 0.0450 0.0140 0.0180 0.0160 0.0150 G'(110℃) / G'(50℃) 0.0024 0.0295 0.0900 0.0350 0.0320 0.0400 0.0350 Melting point (℃) Layer 1 132 132 132 125 136 130 130 Layer 2 140 140 140 140 140 135 151 Followability ○ ○ Δ ○ Δ ○ Δ residue Δ ○ ○ Δ ○ ○ ○ Peelability ○ ○ ○ ○ ○ Δ ○ Comparative Example 1 2 3 4 5 6 G'(50℃) 7.76E+08 6.41E+07 6.25E+07 8.20E+08 5.85E+08 2.07E+08 G'(110℃) 2.41E+07 2.17E+06 2.25E+06 2.54E+07 1.60E+07 7.20E+06 G'(140℃) 1.20E+04 3.05E+05 4.50E+04 3.05E+05 3.05E+05 3.05E+05 G'(140℃) / G'(110℃) 0.0005 0.1400 0.0200 0.0120 0.0180 0.0420 G'(110℃) / G'(50℃) 0.0310 0.0340 0.0360 0.0310 0.0290 0.0350 Melting point (℃) Tier 1 132 132 113 147 132 132 Layer 2 140 140 140 140 130 161 Followability ○ × ○ × ○ × residue × ○ × ○ ○ ○ Peelability ○ ○ ○ ○ × ○ [Industrial Applicability]

[0084] The wafer processing sheet of the present invention is industrially applicable as a protective sheet used in back grinding, dicing and other wafer processing processes.

[0085] 10: Sheets for wafer processing 10a: Surface 10b: Back 11: Layer 1 12: Middle layer 13: Layer 2 20: Wafer 20a: Main surface 20a: wafer main surface 20b:convex part 20c: Back 21: Thinning the wafer

Claims

1. A wafer processing sheet comprising: a first layer having a surface in contact with a main surface of a wafer; a second layer having a back surface opposite to the aforementioned surface; and an intermediate layer located between the first layer and the second layer; wherein the ratio of the storage modulus G'(140°C) at 140°C to the storage modulus G'(110°C) at 110°C, G'(140°C) / G'(110°C), of the wafer processing sheet is 0.001 to 0.100, the melting point Tm1 of the first layer is 120 to 140°C, and the melting point Tm2 of the second layer is 133 to 155°C.

2. The wafer processing sheet of claim 1, wherein the intermediate layer is deposited on the side of the first layer opposite to the surface described above.

3. The wafer processing sheet as claimed in claim 1, wherein the melting point Tm1 is less than the melting point Tm2.

4. The wafer processing sheet as claimed in claim 1, wherein the thickness T1 of the first layer is 1 to 20 μm.

5. The wafer processing sheet as claimed in claim 1, wherein the thickness T3 of the aforementioned intermediate layer is 30 to 300 μm.

6. The wafer processing sheet as claimed in claim 1, wherein the thickness T2 of the second layer is 10 to 100 μm.

7. The wafer processing sheet as claimed in claim 1, wherein the first layer comprises a polyolefin.

8. The wafer processing sheet as claimed in claim 1, wherein the intermediate layer comprises a polyolefin.

9. The wafer processing sheet as claimed in claim 1, wherein the second layer comprises a polyolefin.

10. The wafer processing sheet of claim 1, wherein the ratio of the storage modulus G'(110°C) at 110°C to the storage modulus G'(50°C) at 50°C, G'(110°C) / G'(50°C), is 0.001 to 0.

700.

11. A wafer processing method comprising: a bonding step, wherein the surface of a first layer of a heated wafer processing sheet (as claimed in any one of claims 1 to 10) is bonded to the main surface of the wafer; and a processing step, wherein the wafer is processed while the wafer processing sheet is bonded to the wafer.

12. The wafer processing method as described in claim 11, wherein, In the above processing steps, the main surface of the wafer that is not attached to the wafer processing sheet is ground to obtain a thinned wafer.

13. The wafer processing method as described in claim 11, wherein, In the above processing steps, a semiconductor wafer is obtained.

Images