Light-emitting panel

Abstract

A light-emitting panel includes a circuit substrate, a first electronic component, a second electronic component, an insulating layer, and a conductive layer. The circuit substrate has multiple pads. The first electronic component includes multiple vertically stacked semiconductor layers, a first electrode, and a second electrode. The first electrode of the first electronic component is electrically connected to a first pad. The second electronic component includes multiple vertically stacked semiconductor layers, a first electrode, and a second electrode. The second electrode of the second electronic component is electrically connected to a second pad. The insulating layer extends along the lower surface and multiple sidewalls of the first electronic component and the lower surface and multiple sidewalls of the second electronic component. The conductive layer is at least partially located within the insulating layer and electrically connects the second electrode of the first electronic component to the first electrode of the second electronic component.

Description

Light-emitting panel The present disclosure relates to a light-emitting panel. Compared with liquid crystal displays, micro light-emitting diode displays have advantages such as low power consumption, high color saturation, and high response speed. Currently, each micro light-emitting diode in a common micro light-emitting diode display panel has a corresponding driving circuit, enabling each driving circuit to drive the corresponding micro light-emitting diode. However, when the display panel requires a high pixel density (pixels per inch, PPI), an excessive number of driving transistors will limit the layout space of the display panel. In addition, limited by the layout space, the spacing between micro light-emitting diodes, the size of driving transistors, and the wiring will also be restricted, making it difficult to improve the yield of mass transfer. Therefore, how to propose a light-emitting panel that can solve the above problems is one of the problems that the industry urgently wants to invest in research and development resources to solve. In view of this, one object of the present disclosure is to propose a light-emitting panel that can solve the above problems. One aspect of the present disclosure relates to a light-emitting panel including a circuit substrate, a first electronic component, a second electronic component, an insulating layer, and a conductive layer. The circuit substrate has a plurality of pads. The first electronic component includes a plurality of semiconductor layers stacked vertically, a first electrode, and a second electrode. The first electrode of the first electronic component is electrically connected to the first of the pads. The second electronic component includes a plurality of semiconductor layers stacked vertically, a first electrode, and a second electrode. The second electrode of the second electronic component is electrically connected to the second of the pads. The insulating layer extends along the lower surface and the side walls of the first electronic component and the lower surface and the side walls of the second electronic component. The conductive layer is at least partially located in the insulating layer and electrically connects the second electrode of the first electronic component and the first electrode of the second electronic component. In some embodiments, the first electronic component and the second electronic component have a continuous undoped semiconductor layer. In some embodiments, the first electronic component is a light-emitting diode. The semiconductor layers of the first electronic component include a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer. The first electrode of the first electronic component is electrically connected to the first semiconductor layer. The second electrode of the first electronic component is electrically connected to the second semiconductor layer. In some embodiments, the second electronic component is a light-emitting diode. The semiconductor layers of the second electronic component include a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer. The first electrode of the second electronic component is electrically connected to the first semiconductor layer of the second electronic component. The second electrode of the second electronic component is electrically connected to the second semiconductor layer of the second electronic component. In some embodiments, the first semiconductor layer of the first electronic component and the first semiconductor layer of the second electronic component are one of n-type doping and p-type doping, and the second semiconductor layer of the first electronic component and the second semiconductor layer of the second electronic component are the other of n-type doping and p-type doping. In some embodiments, the second electronic component is a driving component. In some embodiments, the driving component is a high electron mobility transistor. The second electronic component further includes a third electrode. The third electrode is electrically connected to one of the semiconductor layers of the second electronic component and one of the pads of the circuit substrate. The first electrode of the second electronic component is one of the source electrode and the drain electrode. The second electrode of the second electronic component is the other of the source electrode and the drain electrode. The third electrode is the gate electrode. In some embodiments, the first semiconductor layer is one of n-type doping and p-type doping, and the second semiconductor layer is the other of n-type doping and p-type doping. In some embodiments, the light-emitting panel further includes a tether. The tether is located on the top surface or sidewall of the first electronic component or the top surface or sidewall of the second electronic component. In summary, in the light-emitting electronic device and the light-emitting panel according to some embodiments of the present disclosure, by integrating the light-emitting element and the driving element on a semiconductor layer such as an undoped gallium nitride layer, the circuit can be simplified and the light-emitting element and the driving element can be disposed on the same side to achieve a high pixel density panel design. In addition, by integrating two light-emitting elements on the semiconductor layer and connecting them in series, in addition to simplifying the circuit and reducing the pitch between components, the total current of the panel can be reduced while the driving voltage of the array substrate remains unchanged, thereby reducing power consumption. At the same time, the integrated light-emitting electronic device can reduce the number of mass transfers and reduce the defects caused by circuit complexity, so the yield of mass transfer can be improved. Compared with common light-emitting electronic devices and light-emitting panels, it has the power consumption advantage of a series architecture, can reduce the number of mass transfers, improve the transfer yield, and increase the pixel density, providing a more flexible panel design. These and other aspects of the present disclosure will become apparent from the following description of the preferred embodiments in conjunction with the drawings. The embodiments of the present disclosure will become obvious, but changes and modifications can be made without departing from the spirit and scope of the novel concept of the present disclosure. The following disclosure will now be more fully described herein with reference to the drawings and the reference materials. Some exemplary embodiments are illustrated in the drawings. The present disclosure can be implemented in different forms and should not be limited by the embodiments mentioned below. However, these embodiments are provided to help a more complete understanding of the content of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art. In the drawings, for clarity, the thicknesses of layers, films, panels, regions, etc. are exaggerated. Throughout the specification, like reference numerals refer to like elements throughout. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, no intervening elements are present. As used herein, "connected" can refer to physical and / or electrical connection. Further, "electrically connected" or "coupled" can be such that other elements exist between two elements. It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, and / or portions are not to be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or portion from another. Thus, a "first element", "component", "region", "layer", or "portion" discussed below could be termed a second element, component, region, layer, or portion without departing from the teachings of the disclosure. The terminology used herein is for the purpose of describing particular embodiments only and is not limiting. As used in this disclosure, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms, including "at least one". "Or" means "and / or". As used in this disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items. It should also be understood that when used in this specification, the terms "comprises" and / or "comprising" specify the presence of the stated features, regions, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components, and / or combinations thereof. In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used in this disclosure to describe the relationship of one element to another, as illustrated in the figures. It should be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is flipped, an element described as being on the "lower" side of another element will be oriented on the "upper" side of the other element. Thus, the exemplary term "lower" can include both the "lower" and "upper" orientations, depending on the particular orientation of the figure. Similarly, if the device in one figure is flipped, an element described as being "beneath" or "below" another element will be oriented as being "above" the other element. Thus, the exemplary terms "beneath" or "below" can include both above and below orientations. Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined in this disclosure. The present disclosure describes exemplary embodiments with reference to cross-sectional views that are schematic illustrations of idealized embodiments. Accordingly, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and / or tolerances are to be expected. Thus, the embodiments described in the present disclosure should not be construed as limited to the specific shapes of the regions as shown in the present disclosure, but include, for example, shape deviations resulting from manufacturing. For example, regions shown or described as flat may typically have rough and / or non-linear features. Additionally, the sharp angles shown may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the exact shape of the regions and are not intended to limit the scope of the claims. Please refer to FIG. 1, which is a schematic diagram of a light-emitting electronic device 10 according to some embodiments of the present disclosure. As shown in FIG. 1, the light-emitting electronic device 10 includes a first electronic component 200 and a second electronic component 300. The first electronic component 200 and the second electronic component 300 are connected by a tether 191 and an anchor structure 192. As shown in FIG. 1, the anchor structure 192 is further connected to a bonding layer 401 located on a temporary substrate 400. In some embodiments, the temporary substrate 400 may also be referred to as a substrate. In some embodiments, as shown in FIG. 1, the first electronic component 200 is a light-emitting diode (LED), and the second electronic component 300 is a driving component, such as a high electron mobility transistor (HEMT). As shown in FIG. 1, the first electronic component 200 includes a semiconductor stack structure of a plurality of vertically stacked semiconductor layers (such as semiconductor layers 120 to 180), a first electrode 201, and a second electrode 202. In an embodiment where the first electronic component 200 is a light-emitting diode, the semiconductor layer 150 serves as the first semiconductor layer of the first electronic component 200 and is electrically connected to the first electrode 201. The semiconductor layer 140 serves as the active layer of the first electronic component 200. The semiconductor layer 130 serves as the second semiconductor layer of the first electronic component 200 and is electrically connected to the second electrode 202. In some embodiments, the semiconductor layer 150 is a p-type doped semiconductor layer, and the semiconductor layer 130 is an n-type doped semiconductor layer. For example, the semiconductor layer 150 includes p-type doped gallium nitride (GaN), and the semiconductor layer 130 includes n-type doped GaN. In some embodiments, the semiconductor layer 140 includes indium gallium nitride (InGaN). In some embodiments, the semiconductor layer 140 includes a semiconductor stack structure as a multi-quantum well (MQW), and the semiconductor stack structure includes periodically stacked InGaN / GaN. In some embodiments, the vertical height of the semiconductor layer 130 is 0.4 micrometers, the vertical height of the semiconductor layer 140 is 0.3 micrometers, and the vertical height of the semiconductor layer 150 is 0.3 micrometers. In the embodiment where the semiconductor layer 150 is a p-type doped semiconductor layer, the first electrode 201 includes an indium tin oxide (ITO) transparent conductive film. As shown in FIG. 1, the second electronic component 300 includes a semiconductor stack structure of a plurality of vertically stacked semiconductor layers (such as semiconductor layer 120 to semiconductor layer 180), a first electrode 301, and a second electrode 302. In the embodiment where the second electronic component 300 is a HEMT, the second electronic component 300 further includes a third electrode 303, as shown in FIG. 1. The first electrode 301, the second electrode 302, and the third electrode 303 are electrically connected to the semiconductor layer 180, where the first electrode 301 and the second electrode 302 are source / drain, and the third electrode 303 is a gate. In the embodiment where the second electronic component 300 is a HEMT, the semiconductor layer 180 serves as a barrier layer of the second electronic component 300. In some embodiments, the semiconductor layer 180 includes aluminum gallium nitride (Al x Ga 1-xN, 0 < x ≤ 1). In some embodiments, the vertical height of the semiconductor layer 180 is between 5 nm and 1000 nm. The semiconductor layer 170 serves as a spacer layer of the second electronic component 300 to enhance electron mobility and increase the drain current. In some embodiments, the semiconductor layer 170 includes aluminium nitride (AlN). The semiconductor layer 160 serves as a channel layer of the second electronic component 300. In some embodiments, the semiconductor layer 160 includes undoped GaN. As shown in FIG. 1, the first electronic component 200 and the second electronic component 300 have a continuous undoped semiconductor layer, such as the semiconductor layer 120. In other words, the first electronic component 200 and the second electronic component 300 share the semiconductor layer 120. In some embodiments, the semiconductor layer 120 includes undoped GaN. The light-emitting electronic device 10 further includes a conductive layer 204 and a conductive layer 305. As shown in FIG. 1, the conductive layer 204 is electrically connected to the second electrode 202 of the first electronic component 200 and the first electrode 301 of the second electronic component 300. The conductive layer 305 is electrically connected to the second electrode 302 of the second electronic component 300. The light-emitting electronic device 10 further includes an insulating layer 190-1 and an insulating layer 190-2 (collectively referred to as the insulating layer 190). As shown in FIG. 1, the insulating layer 190-1 extends along the sidewalls and surface of the first electronic component 200 and then connects to the sidewalls and surface of the second electronic component 300. The insulating layer 190-2 extends along the conductive layer 204 such that the insulating layer 190-1 and the insulating layer 190-2 cover the conductive layer 204. In some embodiments, the conductive layer 204 is at least partially located in the insulating layer 190. The light-emitting electronic device 10 further includes an anchor structure 192. As shown in FIG. 1, the anchor structure 192 is laterally separated from the first electronic component 200 and the second electronic component 300. The anchor structure 192 includes a semiconductor stack structure of a plurality of vertically stacked semiconductor layers (such as the semiconductor layer 120 to the semiconductor layer 180). In some embodiments, a portion of the insulating layer 190 that extends serves as a tether 191. The tether 191 extends and connects to the sidewall 192a and the surface 192b of the anchor structure 192. The tether 191 connects the surface 192b of the anchor structure 192 to the bonding layer 401, thereby connecting the first electronic component 200, the second electronic component 300, and the anchor structure 192 on the temporary substrate 400. The light-emitting electronic device 10 further includes a metal contact 203, a metal contact 304, and a metal contact 306. As shown in FIG. 1, the metal contact 203 is electrically connected to the first electrode 201 of the first electronic component 200, the metal contact 304 is electrically connected to the third electrode 303 of the second electronic component 300, and the metal contact 306 is electrically connected to the conductive layer 305 of the second electronic component 300. Please refer to FIG. 2, which is a schematic diagram of a light-emitting panel 20 according to some embodiments of the present disclosure. As shown in FIG. 2, the light-emitting panel 20 includes a circuit substrate 500, a first electronic component 200, and a second electronic component 300. Similar to the light-emitting electronic device 10, in some embodiments, the first electronic component 200 is a light-emitting diode, and the second electronic component 300 is a driving component, such as a HEMT. The first electronic component 200 includes a semiconductor stack structure, a first electrode 201, and a second electrode 202. The second electronic component 300 includes a semiconductor stack structure, a first electrode 301, a second electrode 302, and a third electrode 303, where the first electrode 301 and the second electrode 302 are source / drain electrodes, and the third electrode 303 is a gate electrode. As shown in FIG. 2, the first electronic component 200 and the second electronic component 300 have a continuous undoped semiconductor layer, such as the semiconductor layer 120. In some embodiments, the semiconductor layer 120 includes undoped GaN. In some embodiments, a plurality of pads are provided on the circuit substrate 500. For example, as shown in FIG. 2, the circuit substrate 500 has a first pad 501, a second pad 502, and a third pad 503. The first pad 501 is electrically connected to the first electrode 201 of the first electronic component 200 through the metal contact 203. The second pad 502 is electrically connected to the second electrode 302 of the second electronic component 300 through the metal contact 306 and the conductive layer 305. The third pad 503 is electrically connected to the third electrode 303 of the second electronic component 300 through the metal contact 304. As shown in FIG. 2, the light-emitting panel 20 further includes a conductive layer 204. The conductive layer 204 is electrically connected to the second electrode 202 of the first electronic component 200 and the first electrode 301 of the second electronic component 300. In some embodiments, the conductive layer 204 is at least partially located in the insulating layer 190. The light-emitting panel 20 further includes a tether 191. In some embodiments, the tether 191 is located on the sidewall of the first electronic component 200 or the sidewall of the second electronic component 300. As shown in FIG. 2, the tether 191 is located on the sidewall of the second electronic component 300. Please refer to FIG. 3, which is a flowchart of a manufacturing method 30 of a light-emitting electronic device 10 and a light-emitting panel 20 according to some embodiments of the present disclosure. Please refer to FIGS. 4 to 10, which are schematic diagrams of intermediate stages of a manufacturing method 30 of a light-emitting electronic device 10 and a light-emitting panel 20 according to some embodiments of the present disclosure. As shown in FIG. 3, the manufacturing method 30 includes an operation 310. The operation 310 provides a semiconductor stack structure on a substrate 110. The manufacturing method 30 includes an operation 320. The operation 320 performs an etching process to form trenches in the semiconductor stack structure. The manufacturing method 30 includes an operation 330. The operation 330 disposes an insulating layer 190-1 and an electrode. The manufacturing method 30 includes an operation 340. The operation 340 disposes a conductive layer 204 and a conductive layer 305. The manufacturing method 30 includes an operation 350. The operation 350 disposes an insulating layer 190-2 and metal contacts 203, metal contacts 304, and metal contacts 306. The manufacturing method 30 includes an operation 360. The operation 360 disposes a sacrificial layer 402 and a bonding layer 401 to bond to a temporary substrate 400. The manufacturing method 30 includes an operation 370. The operation 370 inverts the structure and thins the semiconductor stack structure. The manufacturing method 30 includes an operation 380. The operation 380 removes the sacrificial layer 402. The manufacturing method 30 includes an operation 390. The operation 390 separates the structure from the anchor structure 192, transfers and electrically connects it to a circuit substrate 500. As shown in FIG. 4, the operation 310 provides a semiconductor stack structure on a substrate 110. The semiconductor stack structure includes a plurality of vertically stacked semiconductor layers (such as semiconductor layer 120 to semiconductor layer 180). In some embodiments, the substrate 110 includes a sapphire wafer. FIG. 5 is an intermediate stage after the operation 320 is completed. The operation 320 performs a mesa etching process, for example, by an inductively coupled plasma (ICP) etching process, to form a trench structure on the semiconductor stack structure, as shown in FIG. 5. It should be understood that those skilled in the art can change the stacking order of the semiconductor layers and modify the trench structure formed by the mesa etching to achieve the same effect as the light-emitting electronic device 10 and the light-emitting panel 20 of the present disclosure. In addition, in some embodiments, as shown in FIG. 5, an ITO transparent conductive film is disposed on the semiconductor layer 150 as a first electrode 201, which is electrically connected to the semiconductor layer 150. FIG. 6 is an intermediate stage after operation 330 is completed. As shown in FIG. 6, operation 330 sets the insulating layer 190-1, the second electrode 202, the first electrode 301, and the second electrode 302. The insulating layer 190-1 is disposed along the sidewalls 200a, 200b, the surface 180a, and the sidewall 200c, and extends through the surface 130a, and then connects to the sidewalls 300a, the surface 180a, and the sidewall 300b. The second electrode 202 penetrates the insulating layer 190-1 and is electrically connected to the semiconductor layer 130. The first electrode 301 and the second electrode 302 penetrate the insulating layer 190-1 and are electrically connected to the semiconductor layer 180. As shown in FIG. 6, the insulating layer 190-1 has a groove T1 that penetrates the insulating layer 190-1 and is configured for the third electrode 303 (as shown in FIG. 7) to be disposed in subsequent operations. In some embodiments, as shown in FIG. 6, a portion of the insulating layer 190-1 extends to be used as a tether 191. The tether 191 extends and connects to the sidewall 192a and the surface 192b of the anchor structure 192. In some embodiments, the semiconductor layer 130 is a p-type doped semiconductor layer, and the semiconductor layer 150 is an n-type doped semiconductor layer. For example, the semiconductor layer 130 includes p-type doped GaN, and the semiconductor layer 150 includes n-type doped GaN. In embodiments where the semiconductor layer 130 is a p-type doped semiconductor layer, operation 320 sets the ITO transparent conductive film on the semiconductor layer 130 to be used as the second electrode 202, while the first electrode 201 is set together with the first electrode 301 and the second electrode 302 in operation 330. FIG. 7 is an intermediate stage after operation 340 is completed. Operation 340 sets the conductive layer 204, the conductive layer 305, and the third electrode 303. As shown in FIG. 7, the conductive layer 204 is electrically connected to the second electrode 202 and the first electrode 301. The conductive layer 305 is electrically connected to the second electrode 302. The third electrode 303 is disposed in the groove T1 and is electrically connected to the semiconductor layer 180. FIG. 8 is an intermediate stage after operation 350 is completed. Operation 350 sets the insulating layer 190-2 and the metal contacts 203, 304, and 306. As shown in FIG. 8, the insulating layer 190-2 extends along the conductive layer 204 such that the conductive layer 204 is covered by the insulating layer 190-1 and the insulating layer 190-2. In this way, the first electronic component 200 and the second electronic component 300 that are electrically connected by the conductive layer 204 and share the semiconductor layer 120 are formed. FIG. 9 is an intermediate stage after operation 360 is completed. Operation 360 sets the sacrificial layer 402 and sets the bonding layer 401 to bond the first electronic component 200, the second electronic component 300, and the anchor structure 192 to the temporary substrate 400. FIG. 10 shows an intermediate stage after operation 370 is completed. Operation 370 inverts the structure and peels it off from the substrate 110, for example, via a laser liftoff (LLO) process, and then thins it, for example, thins the semiconductor layer 120, such that a part of the insulating layer 190-1 and the tether 191 are exposed through the semiconductor layer 120. The structure of FIG. 10 further performs operation 380. Operation 380 removes the sacrificial layer 402, such that the first electronic component 200 and the second electronic component 300 are connected to the bonding layer 401 and the temporary substrate 400 by the anchor structure 192 and the tether 191. The structure after operation 380 is completed is the light-emitting electronic device 10, as shown in FIG. 1. The light-emitting electronic device 10 further performs operation 390. Operation 390 peels the first electronic component 200 and the second electronic component 300 from the anchor structure 192, and then transfers and electrically connects them to the circuit substrate 500. Specifically, the first electrode 201 of the first electronic component 200 is electrically connected to the first pad 501 on the circuit substrate 500 via the metal contact 203. The second electrode 302 of the second electronic component 300 is electrically connected to the second pad 502 on the circuit substrate 500 via the conductive layer 305 and the metal contact 306. The third electrode 303 of the second electronic component 300 is electrically connected to the third pad 503 on the circuit substrate 500 via the metal contact 304. The structure after operation 390 is completed is the light-emitting panel 20, as shown in FIG. 2. In some embodiments, during the process of peeling the first electronic component 200 and the second electronic component 300 from the anchor structure 192, a part of the tether 191 remains on the sidewall 300b of the second electronic component 300 (as shown in FIG. 6). In some embodiments, the tether 191 connects the surfaces 120a of the first electronic component 200 and the second electronic component 300 and the surface 192c of the anchor structure 192, as shown in FIG. 11. FIG. 11 is a schematic diagram of a light-emitting electronic device 10' according to some embodiments of the present disclosure. The first electronic component 200 and the second electronic component 300 are connected to the bonding layer 401 and the temporary substrate 400 by the tether 191 and the anchor structure 192. In the method of manufacturing the light-emitting electronic device 10', operation 370 may thin the semiconductor stack structure such that the anchor structure 192 is separated from the first electronic component 200 and the second electronic component 300, and then form the tether 191 on the surfaces 120a and 192c to connect the surfaces 120a and 192c, thereby connecting the anchor structure 192 to the first electronic component 200 and the second electronic component 300. Please refer to FIG. 12, which is a schematic diagram of a light-emitting panel 20' according to some embodiments of the present disclosure. In some embodiments, corresponding to the light-emitting electronic device 10', the tether 191 of the light-emitting panel 20' is disposed on the surface 120a of the first electronic component 200 or the second electronic component 300. In some embodiments, the first electrode 201 of the first electronic component 200 is electrically connected to the n-type doped semiconductor layer 130, and the second electrode 202 is electrically connected to the p-type doped semiconductor layer 150. Please refer to FIG. 13, which is a schematic diagram of an intermediate stage of manufacturing the light-emitting electronic device 10'' according to some embodiments of the present disclosure. In the method of manufacturing the light-emitting electronic device 10'', the operation 320 additionally etches out the trench T2 to separate the semiconductor layer of the first electronic component 200 from the semiconductor layer of the second electronic component 300, such as the semiconductor layer 130 to the semiconductor layer 150. In addition, the operation 320 sets the ITO transparent conductive film as the second electrode 202 of the first electronic component 200, and the first electrode 201 is set in the operation 330. The light-emitting electronic device 10'' and the corresponding light-emitting panel 20'' are shown in FIGS. 14 and 15. Please refer to FIGS. 16A and 16B, which are circuit connection diagrams of the light-emitting panel 20 and the light-emitting panel 20'' according to some embodiments of the present disclosure. As shown in FIG. 16A, in the circuit including the light-emitting panel 20, the electrode of the first electronic component 200 (such as the first electrode 201 in FIG. 2) is connected to the drain power supply voltage (Voltage Drain Drain, VDD), and the electrode of the second electronic component 300 (such as the second electrode 302 in FIG. 2) is grounded. In contrast, as shown in FIG. 16B, in the circuit including the light-emitting panel 20'', the electrode of the second electronic component 300 (such as the second electrode 302 in FIG. 15) is connected to the drain power supply voltage, and the electrode of the first electronic component 200 (such as the first electrode 201 in FIG. 15) is grounded. Please refer to FIG. 17, which is a schematic diagram of a light-emitting electronic device 40 according to some other embodiments of the present disclosure. As shown in FIG. 17, the light-emitting electronic device 40 includes a first electronic component 600 and a second electronic component 700. The first electronic component 600 and the second electronic component 700 are connected by a tether 191 and an anchor structure 192. As shown in FIG. 17, the anchor structure 192 is further connected to a bonding layer 401 located on the temporary substrate 400. In some embodiments, as shown in FIG. 17, the first electronic component 600 and the second electronic component 700 are light-emitting diodes. As shown in FIG. 17, the first electronic component 600 includes a semiconductor stack structure of a plurality of vertically stacked semiconductor layers (such as semiconductor layers 120 to 150), a first electrode 601, and a second electrode 602. The second electronic component 700 includes a semiconductor stack structure of a plurality of vertically stacked semiconductor layers (such as semiconductor layers 120 to 150), a first electrode 701, and a second electrode 702. The semiconductor layer 150 serves as the first semiconductor layer of the first electronic component 600 and the second electronic component 700, and different portions of the semiconductor layer 150 are electrically connected to the first electrode 601 and the first electrode 701, respectively. Different portions of the semiconductor layer 140 serve as the active layers of the first electronic component 600 and the second electronic component 700, respectively. The semiconductor layer 130 serves as the second semiconductor layer of the first electronic component 600 and the second electronic component 700, and different portions of the semiconductor layer 130 are electrically connected to the second electrode 602 and the second electrode 702, respectively. As shown in FIG. 17, the first electronic component 600 and the second electronic component 700 have a continuous undoped semiconductor layer, such as the semiconductor layer 120. In some embodiments, the semiconductor layer 120 includes undoped GaN. In some embodiments, the semiconductor layer 150 is a p-type doped semiconductor layer, and the semiconductor layer 130 is an n-type doped semiconductor layer. For example, the semiconductor layer 130 includes n-type doped GaN, and the semiconductor layer 150 includes p-type doped GaN. In some embodiments, the semiconductor layer 140 includes InGaN. In some embodiments, the vertical height of the semiconductor layer 130 is 0.4 micrometers, the vertical height of the semiconductor layer 140 is 0.3 micrometers, and the vertical height of the semiconductor layer 150 is 0.3 micrometers. In the embodiments where the semiconductor layer 150 is a p-type doped semiconductor layer, the first electrode 601 and the first electrode 701 include ITO transparent conductive films. The light-emitting electronic device 40 further includes a conductive layer 604. As shown in FIG. 17, the conductive layer 604 is electrically connected to the second electrode 602 of the first electronic component 600 and the first electrode 701 of the second electronic component 700. The light-emitting electronic device 40 further includes an insulating layer 190-1 and an insulating layer 190-2 (collectively referred to as the insulating layer 190). As shown in FIG. 17, the insulating layer 190-1 extends along the sidewalls and the surface of the first electronic component 600, and then connects to the sidewalls and the surface of the second electronic component 700. The insulating layer 190-2 extends along the conductive layer 604 such that the conductive layer 604 is covered by the insulating layer 190-1 and the insulating layer 190-2. In some embodiments, the conductive layer 604 is at least partially located in the insulating layer 190. The light-emitting electronic device 40 further includes an anchor structure 192. As shown in FIG. 17, the anchor structure 192 is laterally separated from the first electronic component 600 and the second electronic component 700. The anchor structure 192 includes a semiconductor stacking structure of a plurality of vertically stacked semiconductor layers (such as semiconductor layer 120 and semiconductor layer 130). In some embodiments, a portion of the insulating layer 190 extending out serves as a tether 191. The tether 191 extends and connects to the sidewall 192a and the surface 192b of the anchor structure 192. The tether 191 connects the surface 192b of the anchor structure 192 to the bonding layer 401, thereby connecting the first electronic component 600 and the second electronic component 700 to the anchor structure 192 via the tether 191 on the temporary substrate 400. The light-emitting electronic device 40 further includes a metal contact 603 and a metal contact 703. As shown in FIG. 17, the metal contact 603 is electrically connected to the first electrode 601 of the first electronic component 600, and the metal contact 703 is electrically connected to the second electrode 702 of the second electronic component 700. Please refer to FIG. 18, which is a schematic diagram of a light-emitting panel 50 according to other embodiments of the present disclosure. As shown in FIG. 18, the light-emitting panel 50 includes a circuit substrate 500, a first electronic component 600, and a second electronic component 700. Similar to the light-emitting electronic device 40, in some embodiments, the first electronic component 600 and the second electronic component 700 are light-emitting diodes. As shown in FIG. 18, the first electronic component 600 and the second electronic component 700 have a continuous undoped semiconductor layer, such as semiconductor layer 120. In some embodiments, the semiconductor layer 120 includes undoped GaN. As shown in FIG. 18, a plurality of pads are provided on the circuit substrate 500. For example, as shown in FIG. 18, the circuit substrate 500 has a first pad 501 and a second pad 502. The first pad 501 is electrically connected to the first electrode 601 of the first electronic component 600 via a metal contact 603. The second pad 502 is electrically connected to the second electrode 702 of the second electronic component 700 via a metal contact 703. As shown in FIG. 18, the light-emitting panel 50 further includes a conductive layer 604. The conductive layer 604 is electrically connected to the second electrode 602 of the first electronic component 600 and the first electrode 701 of the second electronic component 700. In some embodiments, the conductive layer 604 is at least partially located in the insulating layer 190. The light-emitting panel 50 further includes a tether 191. In some embodiments, the tether 191 is located on the sidewall of the first electronic component 600 or the sidewall of the second electronic component 700. As shown in FIG. 18, the tether 191 is located on the sidewall of the second electronic component 700. Please refer to FIG. 19, which is a flowchart of a manufacturing method 60 of a light-emitting electronic device 40 and a light-emitting panel 50 according to some other embodiments of the present disclosure. Please refer to FIGS. 20 to 26, which are schematic diagrams of intermediate stages of a manufacturing method 60 of a light-emitting electronic device 40 and a light-emitting panel 50 according to some other embodiments of the present disclosure. As shown in FIG. 19, the manufacturing method 60 includes operation 610. Operation 610 provides a semiconductor stack structure on a substrate 110. The manufacturing method 60 includes operation 620. Operation 620 performs an etching process to form trenches in the semiconductor stack structure. The manufacturing method 60 includes operation 630. Operation 630 disposes an insulating layer 190-1, an electrode, a conductive layer 604, and an insulating layer 190-2. The manufacturing method 60 includes operation 640. Operation 640 disposes metal contacts 603 and 703. The manufacturing method 60 includes operation 650. Operation 650 disposes a sacrificial layer 402 and a bonding layer 401 to bond to a temporary substrate 400. The manufacturing method 60 includes operation 660. Operation 660 inverts the structure and thins the semiconductor stack structure. The manufacturing method 60 includes operation 670. Operation 670 removes the sacrificial layer 402. The manufacturing method 60 includes operation 680. Operation 680 peels the structure from the anchor structure 192, transfers it, and electrically connects it to a circuit substrate 500. As shown in FIG. 20, operation 610 provides a semiconductor stack structure on a substrate 110. The semiconductor stack structure includes a plurality of vertically stacked semiconductor layers (such as semiconductor layers 120 to 150). In some embodiments, the substrate 110 includes a sapphire wafer. FIGS. 21 to 23 are intermediate stages of performing operation 620. Operation 620 first performs a first mesa etching process, for example, by an ICP etching process, to form a preliminary trench-like structure on the semiconductor stack structure, as shown in FIG. 21. In addition, in some embodiments, as shown in FIG. 21, operation 620 disposes an ITO transparent conductive film as the first electrodes 601 and 701, which are electrically connected to the semiconductor layer 150. Then, as shown in FIGS. 22 and 23, operation 620 performs second and third mesa etching processes to form a trench-like structure as shown in FIG. 23. Figure 24 shows an intermediate stage after operation 630 is completed. As shown in Figure 24, operation 630 sets the insulating layer 190-1, the second electrode 602, the second electrode 702, the conductive layer 604, and the insulating layer 190-2. The insulating layer 190-1 is disposed along the sidewalls 600a, the surface 601a, the sidewalls 600b, and the sidewalls 600c, and extends through the surface 120a, and then connects to the sidewalls 700a, the surface 701a, the sidewalls 700b, and the sidewalls 700c. As shown in Figure 24, the insulating layer 190-1 has a groove T3 configured to set the metal contact 603 (as shown in Figure 25) in subsequent operations. The second electrode 602 and the second electrode 702 penetrate the insulating layer 190-1 and are electrically connected to the semiconductor layer 130. Operation 630 further sets the conductive layer 604, which is electrically connected to the second electrode 602 and the first electrode 701. Operation 630 further sets the insulating layer 190-2. As shown in Figure 24, the insulating layer 190-2 extends along the conductive layer 604 such that the conductive layer 604 is covered by the insulating layer 190-1 and the insulating layer 190-2. In some embodiments, the semiconductor layer 130 is a p-type doped semiconductor layer, and the semiconductor layer 150 is an n-type doped semiconductor layer. For example, the semiconductor layer 130 includes p-type doped GaN, and the semiconductor layer 150 includes n-type doped GaN. In the embodiment where the semiconductor layer 130 is a p-type doped semiconductor layer, operation 620 sets the ITO transparent conductive film on the semiconductor layer 130 as the second electrode 602 and the second electrode 702, while the first electrode 601 and the first electrode 701 are set in operation 630. Figure 25 shows an intermediate stage after operation 640 is completed. Operation 640 sets the metal contact 603 and the metal contact 703. As shown in Figure 25, the metal contact 603 is electrically connected to the first electrode 601, and the metal contact 703 is electrically connected to the second electrode 702. In this way, two light-emitting diodes that are connected in series through the conductive layer 604 and share the semiconductor layer 120 are formed, namely the first electronic component 600 and the second electronic component 700. Figure 26 shows an intermediate stage after operation 650 is completed. Operation 650 sets the sacrificial layer 402 and sets the bonding layer 401 to bond the first electronic component 600, the second electronic component 700, and the anchor structure 192 to the temporary substrate 400. Figure 27 shows an intermediate stage after operation 660 is completed. Operation 660 inverts the structure and peels it off from the substrate 110, for example, via the LLO process, and then thins it, for example, thins the semiconductor layer 120, such that a part of the insulating layer 190-1 and the tether 191 is exposed through the semiconductor layer 120. The structure of FIG. 27 further performs operation 670. Operation 670 removes the sacrificial layer 402, such that the first electronic component 600 and the second electronic component 700 are connected to the bonding layer 401 and the temporary substrate 400 by the tether 191 and the anchor structure 192. The structure after operation 670 is the light-emitting electronic device 40, as shown in FIG. 17. The light-emitting electronic device 40 further performs operation 680. Operation 680 detaches the first electronic component 600 and the second electronic component 700 from the anchor structure 192, and then transfers and electrically connects them to the circuit substrate 500. Specifically, the first electrode 601 of the first electronic component 600 is electrically connected to the first pad 501 on the circuit substrate 500 via the metal contact 603. The second electrode 702 of the second electronic component 700 is electrically connected to the second pad 502 on the circuit substrate 500 via the metal contact 703. The structure after operation 680 is the light-emitting panel 50, as shown in FIG. 18. In some embodiments, during the process of detaching the first electronic component 600 and the second electronic component 700 from the anchor structure 192, a portion of the tether 191 remains on the sidewall of the second electronic component 700. In some embodiments, the tether 191 connects the surface 120a of the first electronic component 600 and the second electronic component 700 and the surface 192c of the anchor structure 192, as shown in FIG. 28. FIG. 28 is a schematic diagram of a light-emitting electronic device 40' according to some other embodiments of the present disclosure. The first electronic component 600 and the second electronic component 700 are connected to the bonding layer 401 and the temporary substrate 400 by the anchor structure 192 and the tether 191. In the method of manufacturing the light-emitting electronic device 40', operation 660 may thin the semiconductor stack structure, such that the anchor structure 192 is separated from the first electronic component 600 and the second electronic component 700, and then the tether 191 is formed on the surface 120a and the surface 192c, such that the surface 120a and the surface 192c are connected, thereby connecting the anchor structure 192 to the first electronic component 600 and the second electronic component 700. Please refer to FIG. 29, which is a schematic diagram of a light-emitting panel 50' according to some embodiments of the present disclosure. In some embodiments, corresponding to the light-emitting electronic device 40', the tether 191 of the light-emitting panel 50' is disposed on the surface 120a of the first electronic component 600 or the second electronic component 700. Please refer to FIG. 30A, which is a configuration diagram of two light-emitting diodes connected in series according to some embodiments of the present disclosure. FIG. 30A corresponds to the top view schematic diagram of FIG. 25. For clarity, the insulating layer 190 is omitted in FIG. 30A. As shown in FIG. 30A, the conductive layer 604 electrically connects the second electrode 602 and the first electrode 701 to connect two light-emitting diodes in series. Please refer to FIGS. 30B and 30C, which are configuration diagrams of two light-emitting diodes connected in series according to some embodiments of the present disclosure. Similarly, for clarity, the insulating layer 190 is omitted in FIGS. 30B and 30C. Depending on the semiconductor stack structure and mesa etching pattern, the two light-emitting diodes may have different orientations, and thus the connection manner of the conductive layer 604 is different. As shown in FIG. 30B, the two light-emitting diodes are arranged in parallel and the second electrode 602 is adjacent to the second electrode 702. Therefore, the conductive layer 604 is in a lightning shape to electrically connect the second electrode 602 to the first electrode 701. In FIG. 30C, the two light-emitting diodes are arranged in parallel and the second electrode 602 is adjacent to the first electrode 701. Therefore, the conductive layer 604 is in a straight line to electrically connect the second electrode 602 to the first electrode 701. Please refer to FIGS. 31A, 31B, and 31C, which are configuration diagrams of three light-emitting diodes connected in series according to some embodiments of the present disclosure. Similarly, for clarity, the insulating layer 190 is omitted in FIGS. 31A, 31B, and 31C. As shown in FIG. 31A, the conductive layer 604 electrically connects the second electrode 602 to the first electrode 801, and the conductive layer 804 electrically connects the second electrode 802 to the first electrode 701 to connect three light-emitting diodes in series. FIGS. 31B and 31C are similar to FIGS. 30B and 30C. Due to the different orientations of the light-emitting diodes (for example, three light-emitting diodes are arranged in parallel here), the connection manners of the conductive layer 604 and the conductive layer 804 change accordingly. Please refer to FIGS. 32A, 32B, 32C, and 32D, which are configuration diagrams of the tether 191 and the anchor structure 192 according to some other embodiments of the present disclosure. Depending on the required bonding strength with the temporary substrate 400, the configurations of the tether 191 and the anchor structure 192 may be different. For example, the configurations of the tether 191 and the anchor structure 192 in FIG. 32A are the same as those in FIG. 25, that is, the tether 191 and the anchor structure 192 are laterally disposed on one side of the second electronic component 700 close to the second electrode 702. In FIG. 32B, there are two tethers 191 and two anchor structures 192, which are laterally disposed on one side of the first electronic component 600 close to the first electrode 601 and on one side of the second electronic component 700 close to the second electrode 702. In some embodiments, as shown in FIG. 32C, the tether 191 and the anchor structure 192 are disposed outside the conductive layer 604. In FIG. 32D, there are two tethers 191 and two anchor structures 192, which are disposed on both sides of the conductive layer 604. In some embodiments, the tether 191 and the anchor structure 192 are L-shaped. The anchor structure 192 laterally and partially surrounds the tether 191 and is disposed together around a corner of the semiconductor layer 120. As shown in FIG. 32E, two tethers 191 and two anchor structures 192 are disposed at two opposite corners of the semiconductor layer 120. And in FIG. 32F, four tethers 191 and four anchor structures 192 are included and disposed at the four corners of the semiconductor layer 120. From the detailed description of the specific embodiments of the present disclosure above, it can be clearly seen that in the light-emitting electronic device and the light-emitting panel of some embodiments of the present disclosure, by integrating the light-emitting element and the driving element on a semiconductor layer such as an undoped gallium nitride layer, the circuit can be simplified and the light-emitting element and the driving element can be disposed on the same side to achieve a panel design with a high pixel density. In addition, by integrating two light-emitting elements on the semiconductor layer and connecting them in series, in addition to simplifying the circuit and reducing the pitch between elements, the total current of the panel can be reduced while the driving voltage of the array substrate remains unchanged, thereby reducing power consumption. At the same time, the integrated light-emitting electronic device can reduce the number of mass transfers and reduce the defects caused by circuit complexity, so the yield of mass transfer can be improved. Compared with common light-emitting electronic devices and light-emitting panels, it has the power consumption advantage of a series connection structure, can reduce the number of mass transfers, improve the transfer yield, and increase the pixel density, providing a more flexible panel design. The foregoing description is only illustrative and descriptive of the exemplary embodiments of the present disclosure and is not intended to be exhaustive or to limit the precise form of the invention disclosed. The above teachings can be modified or varied. The embodiments selected and described are used to explain the content of the present disclosure and their practical applications, so as to inspire those skilled in the art to utilize the present disclosure and various embodiments, and make various modifications to meet the specific purposes expected. Alternative embodiments will be apparent to those skilled in the art without departing from the spirit and scope of the present disclosure. Therefore, the scope of the present disclosure is defined by the appended claims for invention, rather than being limited by the foregoing description and the exemplary embodiments described therein. 10, 10’, 10”, 40, 40’: Light-emitting electronic device 20, 20’, 20”, 50, 50’: Light-emitting panel 30, 60: Manufacturing method 110: Substrate 120, 130, 140, 150, 160, 170, 180: Semiconductor layer 120a, 130a, 180a, 192b, 192c, 601a, 701a: Surface 192a, 200a, 200b, 200c, 300a, 300b, 600a, 600b, 600c, 700a, 700b, 700c: Sidewall 190, 190-1, 190-2: Insulating layer 191: Tie chain 192: Anchor structure 200, 600: First electronic component 201, 301, 601, 701, 801: First electrode 202, 302, 602, 702, 802: Second electrode 203, 304, 306, 603, 703: Metal contact 204, 305, 604, 804: Conductive layer 300, 700: Second electronic component 303: Third electrode 310, 320, 330, 340, 350, 360, 370, 380, 390, 610, 620, 630, 640, 650, 660, 670, 680: Operation 400: Temporary substrate 401: Bonding layer 402: Sacrificial layer 500: Circuit substrate 501: First pad 502: Second pad 503: Third pad T1, T2, T3: Groove The drawings illustrate one or more embodiments of the present disclosure and, together with the written description, are used to explain the principles of the present disclosure. In all the drawings, the same reference numerals are used, wherever possible, to refer to similar or identical elements of the embodiments, wherein: FIG. 1 is a schematic diagram of a light-emitting electronic device according to some embodiments of the present disclosure. FIG. 2 is a schematic diagram of a light-emitting panel according to some embodiments of the present disclosure. FIG. 3 is a flowchart of a method for manufacturing a light-emitting electronic device and a light-emitting panel according to some embodiments of the present disclosure. FIGS. 4 to 10 are schematic diagrams of intermediate stages of a method for manufacturing a light-emitting electronic device and a light-emitting panel according to some embodiments of the present disclosure. FIG. 11 is a schematic diagram of a light-emitting electronic device according to some embodiments of the present disclosure. FIG. 12 is a schematic diagram of a light-emitting panel according to some embodiments of the present disclosure. FIG. 13 is a schematic diagram of an intermediate stage of manufacturing a light-emitting electronic device according to some embodiments of the present disclosure. FIG. 14 is a schematic diagram of a light-emitting electronic device according to some embodiments of the present disclosure. FIG. 15 is a schematic diagram of a light-emitting panel according to some embodiments of the present disclosure. FIGS. 16A and 16B are circuit connection diagrams of a light-emitting panel according to some embodiments of the present disclosure. FIG. 17 is a schematic diagram of a light-emitting electronic device according to some other embodiments of the present disclosure. FIG. 18 is a schematic diagram of a light-emitting panel according to some other embodiments of the present disclosure. FIG. 19 is a flowchart of a method for manufacturing a light-emitting electronic device and a light-emitting panel according to some other embodiments of the present disclosure. FIGS. 20 to 27 are schematic diagrams of intermediate stages of a method for manufacturing a light-emitting electronic device and a light-emitting panel according to some other embodiments of the present disclosure. FIG. 28 is a schematic diagram of a light-emitting electronic device according to some other embodiments of the present disclosure. FIG. 29 is a schematic diagram of a light-emitting panel according to some embodiments of the present disclosure. FIGS. 30A to 30C are configuration diagrams of two light-emitting diodes connected in series according to some embodiments of the present disclosure. FIGS. 31A to 31C are configuration diagrams of three light-emitting diodes connected in series according to some embodiments of the present disclosure. FIGS. 32A to 32F are configuration diagrams of a tethering and anchoring structure according to some embodiments of the present disclosure. Domestic deposit information (please note in the order of deposit institution, date, and number) None Foreign deposit information (please note in the order of deposit country, institution, date, and number) None 20: Light-emitting panel 120, 130, 140, 150, 160, 170, 180: Semiconductor layer 190, 190-1, 190-2: Insulating layer 191: Tether 200: First electronic component 201, 301: First electrode 202, 302: Second electrode 203, 304, 306: Metal contact 204, 305: Conductive layer 300: Second electronic component 303: Third electrode 500: Circuit substrate 501: First pad 502: Second pad 503: Third pad

Claims

1. A light-emitting panel, comprising: a circuit substrate having a plurality of pads; a metal contact located above the circuit substrate and contacting a first of the pads; a first electronic element comprising a plurality of vertically stacked semiconductor layers, a first electrode, and a second electrode, wherein the first electrode of the first electronic element is electrically connected to the first of the pads via the metal contact; a second electronic element comprising a plurality of vertically stacked semiconductor layers, a first electrode, and a second electrode, wherein the second electrode of the second electronic element is electrically connected to a second of the pads; an insulating layer extending along a lower surface and a plurality of sidewalls of the first electronic element and a lower surface and a plurality of sidewalls of the second electronic element; a conductive layer at least partially located in the insulating layer and electrically connecting the second electrode of the first electronic element and the first electrode of the second electronic element; and a chain located at a top surface of the first electronic element relative to the lower surface and a top surface of the second electronic element relative to the lower surface and spaced apart from the circuit substrate. One portion of the insulating layer extends along an outer sidewall of the first electronic component, with the bottom surface of the portion contacting the top surface of the metal contact, and the top surface of the portion contacting the bottom surface of the chain.

2. The light-emitting panel as claimed in claim 1, wherein the first electronic element and the second electronic element have a continuous undoped semiconductor layer.

3. The light-emitting panel as claimed in claim 1, wherein the first electronic element is a light-emitting diode, the semiconductor layers of the first electronic element include a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer, wherein the first electrode of the first electronic element is electrically connected to the first semiconductor layer, and the second electrode of the first electronic element is electrically connected to the second semiconductor layer.

4. The light-emitting panel as claimed in claim 3, wherein the second electronic element is a light-emitting diode, the semiconductor layers of the second electronic element include a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer, wherein the first electrode of the second electronic element is electrically connected to the first semiconductor layer of the second electronic element, and the second electrode of the second electronic element is electrically connected to the second semiconductor layer of the second electronic element.

5. The light-emitting panel as claimed in claim 4, wherein the first semiconductor layer of the first electronic element and the first semiconductor layer of the second electronic element are one of n-type doped and p-type doped, and the second semiconductor layer of the first electronic element and the second semiconductor layer of the second electronic element are the other of n-type doped and p-type doped.

6. The light-emitting panel as described in claim 3, wherein the second electronic element is a driving element.

7. The light-emitting panel as claimed in claim 6, wherein the driving element is a high electron mobility transistor, the second electronic element further includes a third electrode electrically connected to one of the semiconductor layers of the second electronic element and one of the pads of the circuit substrate, wherein the first electrode of the second electronic element is one of a source and a drain, the second electrode of the second electronic element is the other of the source and the drain, and the third electrode is a gate.

8. The light-emitting panel as claimed in claim 6, wherein the first semiconductor layer is one of n-type doping and p-type doping, and the second semiconductor layer is the other of n-type doping and p-type doping.

9. The light-emitting panel as claimed in claim 4, wherein the second semiconductor layer of the first electronic element and the second semiconductor layer of the second electronic element are connected n-type doped semiconductor layers.

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