Wafer etching or deposition method, wafer etching or deposition model acquisition method, and semiconductor process apparatus

Abstract

This application discloses a wafer etching or deposition method, a wafer etching or deposition model acquisition method, and semiconductor process equipment. Specifically, it relates to a temperature control method for each temperature control zone of a multi-temperature zone electrostatic chuck or multi-temperature zone heating base. This temperature control method combines the influence of temperature sensitivity and the diffusion distribution of etching by-products or deposits with the temperature gradient on the etching or deposition rate. It can more accurately predict the etching or deposition rate distribution data at any target temperature in each temperature control zone, or improve the uniformity of wafer etching or deposition or obtain the desired morphology on the wafer surface by adjusting the target temperature control value of each temperature control zone based on the target etching or deposition rate distribution data.

Description

[Technical Field]

[0001] This application belongs to the field of semiconductor technology, specifically to the field of temperature control technology for multi-temperature zone electrostatic chucks or heating bases, and more specifically relates to a wafer etching or deposition method, a method for obtaining an etching or deposition rate prediction model, and semiconductor process equipment. [Previous Technology]

[0002] Advanced integrated circuit manufacturing processes typically consist of thousands of process steps, including etching, deposition, and cleaning. Among these, etching is a critical step that determines the critical dimensions of semiconductor devices and ultimately affects their performance. Etching rate and etching uniformity are key parameters of concern in semiconductor manufacturing processes. Currently, the etching rate is usually adjusted by regulating the temperature values ​​of various temperature control zones on the wafer carrier to ensure the etching uniformity of the wafer.

[0003] In related technologies, when the temperature value of a certain temperature control zone of a wafer carrier changes, the etch rate after the change is predicted based on the temperature sensitivity and the temperature difference before and after the change. However, the etch rate distribution data predicted by this method has a large deviation from the actual measured etch rate distribution data. [Summary of the Invention]

[0004] This application discloses a wafer etching or deposition method, a method for obtaining an etching or deposition rate prediction model, and a semiconductor process equipment to solve the problem that there is a large deviation between the predicted and measured values ​​of etching or deposition rate distribution data in related technologies.

[0005] To solve the above-mentioned technical problems, according to a first aspect, this application discloses a wafer etching or deposition method. The method is applied to a process chamber having a wafer carrier device. The wafer carrier device has a wafer carrier surface with multiple main temperature control areas and multiple auxiliary temperature control areas. The multiple main temperature control areas are arranged sequentially in the radial direction of the wafer carrier surface. The main temperature control areas located on the outer side in the radial direction surround the main temperature control areas located on the inner side in the radial direction. The multiple auxiliary temperature control areas are arranged along the angular direction of the wafer carrier device. The method includes: acquiring first basic etching or deposition rate distribution data and temperature sensitivity values ​​of the wafer to be etched or deposited at the basic temperature of each of the main temperature control areas in the radial direction; wherein the first basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with the radial direction position on the wafer carrier surface, and the temperature sensitivity values ​​are used to characterize the rate of change of etching or deposition rate with temperature. Using a preset first etching or deposition rate prediction model, target temperature control values ​​for each of the main temperature control zones are obtained based on first target etching or deposition rate distribution data, first basic etching or deposition rate distribution data, and the temperature sensitivity value. The first etching or deposition rate prediction model is associated with the diffusion of radial etching byproducts or deposits generated during the etching or deposition process. This model characterizes the correspondence between the etching or deposition rate at each radial position on the wafer carrier surface and its associated position. The first target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with radial positions on the wafer carrier surface.

[0006] According to a second aspect, embodiments of this application disclose a wafer etching or deposition method, the method being applied to a process chamber having a wafer carrier device, the wafer carrier surface of the wafer carrier device having multiple temperature control zones, the method comprising: acquiring basic etching or deposition rate distribution data and temperature sensitivity values ​​of the wafer to be etched or deposited at basic temperatures in each of the temperature control zones; wherein, the basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with positions on the wafer carrier surface, and the temperature sensitivity values ​​are used to characterize the rate of change of the etching or deposition rate with temperature; Using a preset etching or deposition rate prediction model, target temperature control values ​​for each of the temperature control zones are obtained based on target etching or deposition rate distribution data, the basic etching or deposition rate distribution data, and the temperature sensitivity value. The etching or deposition rate prediction model is associated with the diffusion of etching byproducts or deposits generated during the etching or deposition process. The etching or deposition rate prediction model is used to characterize the correspondence between the etching or deposition rate at each location on the wafer carrier surface and the associated location. The target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with locations on the wafer carrier surface.

[0007] According to a third aspect, embodiments of this application disclose a wafer etching or deposition method, the method being applied to a process chamber having a wafer carrier device, the wafer carrier surface of the wafer carrier device having multiple temperature control zones, the method comprising: acquiring basic etching or deposition rate distribution data and temperature sensitivity values ​​of the wafer to be etched or deposited at basic temperatures in each of the temperature control zones; wherein, the basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with positions on the wafer carrier surface, and the temperature sensitivity values ​​are used to characterize the rate of change of the etching or deposition rate with temperature; Using a preset etching or deposition rate prediction model, target temperature control values ​​for each temperature control region are obtained based on target etching or deposition rate distribution data, the basic etching or deposition rate distribution data, and the temperature sensitivity distribution data. The etching or deposition rate prediction model characterizes how all positions on the wafer support surface are affected by the changed temperature control region when the temperature control value of any temperature control region changes, and the correspondence between the changed etching or deposition rate at each position and the corresponding position. The target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with positions on the wafer support surface.

[0008] According to a fourth aspect, embodiments of this application disclose a method for obtaining an etch or deposition rate prediction model. The method is applied to a process chamber having a wafer carrier device, wherein the wafer carrier surface of the wafer carrier device has multiple temperature control zones. The method includes: obtaining basic etch or deposition rate distribution data and temperature sensitivity values ​​for a wafer to be etched or deposited, wherein the basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with positions on the wafer carrier surface, and the temperature sensitivity values ​​characterize the rate of change of the etch or deposition rate with temperature; changing the temperature control value of one of the temperature control zones while keeping the remaining temperature control zones at the basic temperature, and obtaining the changed etch or deposition rate distribution data; obtaining an etch or deposition rate prediction sub-model for the changed temperature control zone, wherein the etch or deposition rate prediction sub-model is related to the basic etch or deposition rate distribution data, the changed etch or deposition rate distribution data, the basic temperature, the temperature control value of the changed temperature control zone, and the temperature sensitivity values. Repeatedly change the temperature control value of another temperature control zone in the temperature control zone, while keeping the remaining temperature control zones at the basic temperature, obtain the changed etching or deposition rate distribution data, and obtain the etching or deposition rate prediction sub-model of the changed temperature control zone, until the etching or deposition rate prediction sub-model of all the temperature control zones is obtained; obtain the etching or deposition rate prediction model based on the etching or deposition rate prediction sub-model of each of the temperature control zones.

[0009] According to a fifth aspect, embodiments of this application disclose a wafer etching or deposition method, the method being applied to a process chamber having a wafer carrier device, the wafer carrier surface of the wafer carrier device having multiple temperature control zones, characterized in that the method includes: acquiring basic etching or deposition rate distribution data and temperature sensitivity values ​​of the wafer to be etched or deposited at basic temperatures in each of the temperature control zones; wherein the basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with positions on the wafer carrier surface, and the temperature sensitivity values ​​are used to characterize the rate of change of the etching or deposition rate with temperature; using an etching or deposition rate prediction model obtained according to the method described in the fourth aspect above, acquiring target temperature control values ​​for each of the temperature control zones based on target etching or deposition rate distribution data, the basic etching or deposition rate distribution data, and the temperature sensitivity values; wherein the target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with positions on the wafer carrier surface.

[0010] According to a sixth aspect, embodiments of this application disclose a wafer etching or deposition method, the method being applied to a process chamber having a wafer carrier device, wherein the wafer carrier surface of the wafer carrier device has a plurality of main temperature control regions and a plurality of auxiliary temperature control regions, the plurality of main temperature control regions being sequentially arranged in the radial direction of the wafer carrier surface, the main temperature control regions located on the outer side in the radial direction surrounding the main temperature control regions located on the inner side in the radial direction, and the plurality of auxiliary temperature control regions being arranged along the angular direction of the wafer carrier device, the method comprising: acquiring first basic etching or deposition rate distribution data and temperature sensitivity values ​​in the radial direction of the wafer to be etched or deposited at the basic temperature of each of the main temperature control regions; wherein the first basic etching or deposition rate distribution data includes a plurality of etching or deposition rate values ​​associated with the radial direction position on the wafer carrier surface, and the temperature sensitivity values ​​being used to characterize the rate of change of etching or deposition rate with temperature; Using the first etch or deposition rate prediction model obtained according to the method described in the fourth aspect above, target temperature control values ​​for each of the main temperature control regions are obtained based on the first target etch or deposition rate distribution data, the first basic etch or deposition rate distribution data, and the temperature sensitivity value; wherein, the first target etch or deposition rate distribution data includes multiple target etch or deposition rate values ​​associated with the radial positions on the wafer carrier surface.

[0011] According to a seventh aspect, embodiments of this application disclose a semiconductor process apparatus, comprising: a process chamber; a wafer carrier disposed within the process chamber, the wafer carrier surface of the wafer carrier having a plurality of temperature control zones; and a control device comprising at least one processor and at least one memory, the memory storing a computer program, the computer program being executed by the processor to implement the method described in any one of the first to sixth aspects above.

[0012] According to the eighth aspect, embodiments of this application disclose a semiconductor process apparatus, including: a process chamber; a wafer carrier device disposed in the process chamber, the wafer carrier device having a plurality of temperature control zones on its wafer carrier surface; and a control device including at least one processor and at least one memory, the memory storing an etch or deposition rate prediction model obtained by the method described in the fourth aspect above.

[0013] In the wafer etching or deposition method of this application embodiment, by employing an etching or deposition rate prediction model associated with the diffusion of etching by-products or deposits generated during the etching or deposition process, compared with the etching rate prediction model in the related art that is only associated with temperature sensitivity, the influence of the diffusion of etching by-products or deposits on the etching or deposition rate distribution can be compensated. Therefore, the etching or deposition rate distribution data at each location on the wafer at any target temperature in each temperature control zone can be predicted more accurately, or the target temperature control value of each temperature control zone can be calculated more accurately based on the target etching or deposition rate distribution data. That is, by using the wafer etching or deposition method of this application embodiment to control the temperature of each temperature control zone of the wafer carrier device, the uniformity of wafer etching or deposition can be improved, or the wafer surface can obtain the desired morphology.

Implementation Method

[0015] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0016] Those skilled in the art should understand that the embodiments of this application are merely illustrative of the structures and methods claimed in this application that can be implemented in various forms. Furthermore, each example given in conjunction with various embodiments is intended to be illustrative and not restrictive. Additionally, the drawings are not necessarily drawn to scale, and some features may be exaggerated to show detail of specific elements. Therefore, the specific structural and functional details in the embodiments of this application should not be interpreted as restrictive, but merely as a representative basis for teaching those skilled in the art to adopt the methods and structures of the embodiments of this application in different ways. It should also be noted that identical and corresponding elements are denoted by the same reference numerals.

[0017] In the following description, numerous specific details, such as particular structures, elements, materials, dimensions, processing steps, and techniques, are set forth in order to provide an understanding of various embodiments of this application. However, those skilled in the art will understand that various embodiments of this application can be practiced without these specific details. In other instances, well-known structures or processing steps have not been described in detail to avoid obscuring this application.

[0018] For the purposes described below, the terms “upper,” “right,” “left,” “vertical,” “horizontal,” “top,” “bottom,” and their derivatives should be understood in relation to the orientation in the structures and methods disclosed in the accompanying drawings. It should be understood that when an element as a layer, region, or substrate is referred to as being on another element, that element may be directly on the other element, or there may be intermediate elements present. Conversely, when an element is referred to as being directly on another element, there are no intermediate elements between them. It should also be understood that when an element is referred to as being under another element, that element may be directly under the other element, or there may be intermediate elements present. Conversely, when an element is referred to as being directly under another element, there are no intermediate elements between them.

[0019] Figures 1 and 2 respectively show top views of the wafer carrier device according to an embodiment of the present application. The wafer carrier device may be, for example, a multi-zone electrostatic chuck or a heating base. Its wafer carrier surface may have multiple temperature control zones. In the example of Figure 1, the wafer carrier device has four temperature control zones, namely, a first temperature control zone 11, a second temperature control zone 12, a third temperature control zone 13 and a fourth temperature control zone 14 arranged sequentially from the inside to the outside in the radial direction. The first temperature control zone 11 is a circular area located at the center of the wafer carrier surface. The second temperature control zone 12, the third temperature control zone 13 and the fourth temperature control zone 14 are annular areas arranged sequentially around the first temperature control zone 11 from the inside to the outside. That is, the second temperature control zone 12 is arranged around the first temperature control zone 11, the third temperature control zone 13 is arranged around the second temperature control zone 12, and the fourth temperature control zone 14 is arranged around the third temperature control zone 13. In the example of Figure 2, the wafer carrier device has nine temperature control zones: a first temperature control zone 21 located at the center of the wafer carrier surface; a second temperature control zone 22, a third temperature control zone 23, a fourth temperature control zone 24, and a fifth temperature control zone 25 distributed around the first temperature control zone 21; and a sixth temperature control zone 26, a seventh temperature control zone 27, an eighth temperature control zone 28, and a ninth temperature control zone 29 distributed around the second to fourth temperature control zones.

[0020] Figures 3A and 3B show schematic diagrams of a wafer carrier device according to another embodiment of this application. This wafer carrier device may include, for example, a base 31, a heating layer 32, and an electrostatic chuck 33. The heating layer 32 includes main heaters corresponding to multiple main temperature control areas 34 and auxiliary heaters corresponding to multiple auxiliary temperature control areas 35. The multiple main temperature control areas 34 are arranged sequentially in the radial direction, with the main temperature control areas 34 located on the outer side of the radial direction surrounding the main temperature control areas 34 located on the inner side of the radial direction. The multiple auxiliary temperature control areas 35 are arranged along the angular direction of the wafer carrier device to locally adjust the temperature on the wafer carrier surface, for example, to adjust the uniformity of the wafer carrier surface at the angular direction. In the examples of Figures 3A and 3B, the main heaters corresponding to the main temperature control areas 34 are located above the auxiliary heaters corresponding to the auxiliary temperature control areas 35. However, this application is not limited to this; the main heaters corresponding to the main temperature control areas 34 may also be located below the auxiliary heaters corresponding to the auxiliary temperature control areas 35. The electrostatic chuck 33 includes an adsorption electrode 36 to provide electrostatic adsorption force on the wafer carrier surface. The adsorption electrode 36 can be configured as a unipolar or bipolar electrode, or other suitable configurations, which are not limited in this application.

[0021] Those skilled in the art should understand that Figures 1, 2, 3A, and 3B are merely examples, and more or fewer temperature control areas are feasible. The temperature control areas can be regularly arranged on the wafer carrier surface or irregularly arranged on the wafer carrier surface, and this application does not impose any limitations on this. For temperature-sensitive etching processes, due to various reasons, the plasma distribution generated by the RF source may be uneven. It is necessary to adjust the temperature of each temperature control area of ​​the wafer carrier device to compensate for the difference in etching rate caused by the uneven plasma distribution, thereby ensuring the uniformity of wafer etching.

[0022] In related technologies, the etching rate distribution data [ER]H and [ER]L of each position of the etched wafer are first obtained when the temperature of each temperature control zone of the wafer carrier is at a high temperature TH and a low temperature TL. It should be noted that [ER]H and [ER]L are used in this paper to characterize the etching rate distribution data. The brackets [] are only intended to indicate that multiple etching rate values ​​associated with the position are included. For example, for a wafer with a radius of 150 mm, if a point is collected every 10 mm in the radial direction, 16 etching rate values ​​corresponding to the radial position can be obtained. For example, [ER]H=[ER0, ER1,…, ER15], where ER0 represents the etching rate value at position 0 mm from the center of the circle, ER1 represents the etching rate value at position 10 mm from the center of the circle, and so on. This expression method will be used in the following text. Those skilled in the art should understand that the collected points are not limited to the radial direction, but can be any point on the wafer.

[0023] Then, the temperature sensitivity value [Sen] = ([ER]H - [ER]L) / (THTL) is obtained, which is to calculate the rate of change of etching rate with temperature for multiple positions. Finally, the etching rate distribution data [ER]target at any target temperature [T]target can be predicted based on this temperature sensitivity value, or the target temperature control value of each temperature control zone can be calculated based on the target etching rate distribution data according to this formula. Wherein, [ER]target = [ER]base + ([T]target - [T]base)▪[Sen], [ER]base is the etching rate distribution data of each position when the temperature of each temperature control zone of the wafer carrier is at the basic temperature Tbase, and [T]target - [T]base represents the difference between the target temperature and the basic temperature of the corresponding temperature control zone, such as the difference between the target temperature and the basic temperature of each temperature control zone shown in Figure 1 or Figure 2 or Figure 3A and Figure 3B. This expression will be used in the following text.

[0024] The inventors of this application discovered during the implementation of the above-mentioned related technologies that there is a significant deviation between the etch rate distribution data predicted by the above-mentioned related technologies and the actual measured etch rate distribution data, as shown in Figure 4. For simplification, taking the distribution data in the radial direction of the wafer as an example, the basic etch rate distribution data [ER]base in the radial direction at the basic temperature [T]base=[60, 60, 60, 60] of the process is collected, and the temperature sensitivity value of the process is also collected. The etch rate prediction model of the related technologies is used to predict the etch rate distribution data in the radial direction at [T]target=[60, 63, 65, 58] and compare it with the measured etch rate distribution data. In Figure 4, the hollow dots represent the predicted values, and the solid dots represent the measured values. There is a significant deviation between the two. Therefore, the above-mentioned related technologies cannot accurately predict the etch rate distribution data, and correspondingly, the target temperature control values ​​of each temperature control zone cannot be accurately obtained based on the target etch rate distribution data.

[0025] To solve the above-mentioned technical problems, the inventors of this application have conducted in-depth research on the plasma etching mechanism. During the plasma etching process, various etching byproducts are continuously generated. When a large amount of etching byproducts accumulates, the deposition effect is aggravated, resulting in a decrease in the etching rate. When a small amount of etching byproducts accumulates, the deposition effect is weakened, making etching easier and increasing the etching rate. The inventors of this application have discovered that when the surface temperature of the wafer carrier is different, the etching byproducts diffuse from the high-temperature region to the low-temperature region along the temperature gradient, as shown in Figure 5. That is, the amount of etching byproducts accumulated in the high-temperature region is less than that accumulated in the low-temperature region, which causes a change in the overall etching rate. The above-mentioned related technologies do not take into account the influence of etching byproduct diffusion, therefore the predicted etching rate distribution data will deviate from the actual measured etching rate distribution data.

[0026] Based on the above research work of the inventors of this application, the embodiments of this application provide a wafer etching method. The method is applied to a process chamber with a wafer carrier device. The wafer carrier device has multiple temperature control zones on its wafer carrier surface. The wafer carrier device can be, for example, a multi-temperature zone electrostatic chuck or a heating base. The method can be executed by a control device of a semiconductor process equipment. The control device can be, for example, a host computer or a slave computer of the semiconductor process equipment. As shown in FIG6, the method may include the following steps: S11. Obtain the basic etching rate distribution data and temperature sensitivity value of the wafer to be etched at the basic temperature of each temperature control zone.

[0027] In this embodiment, the basic etch rate distribution data includes multiple etch rate values ​​associated with positions on the wafer carrier surface. The temperature sensitivity value is used to characterize the rate of change of the etch rate with temperature. In this embodiment, the basic etch rate distribution data and the temperature sensitivity value can be pre-stored in the memory of the control device of the semiconductor process equipment. The basic etch rate distribution data is associated with each position on the two-dimensional plane of the wafer carrier surface. When the basic temperature of each temperature control zone is T base, multiple basic etch rates [ER] base associated with positions on the wafer carrier surface can be collected. The temperature sensitivity value can be a single value or multiple values ​​associated with positions on the wafer carrier surface, which will be described in detail below.

[0028] S12. Using a preset etching rate prediction model, the target temperature control value of each temperature control zone is obtained based on the target etching rate distribution data, the basic etching rate distribution data, and the temperature sensitivity value.

[0029] The above relationship can be characterized by the following function: where [ER] target represents the target etching rate distribution data, [M] represents the etching rate prediction model, [ER] base represents the basic etching rate distribution data, [Sen] represents the temperature sensitivity value, [T] target represents the target temperature control value of each temperature control zone, and T base represents the basic temperature. In the above functional relationship, [M], [ER] base, [Sen], and T base are all known values. When it is necessary to predict the etching rate distribution data of each position on the wafer at any target temperature in each temperature control zone, [T] target is a known value, and [ER] target can be obtained according to the above functional relationship; when it is necessary to calculate the target temperature control value of each temperature control zone based on the target etching rate distribution data in order to achieve etching uniformity or to obtain the desired morphology on the wafer surface, [ER] target is a known value, and [T] target can be obtained according to the above functional relationship.

[0030] In this embodiment, the etching rate prediction model [M] is associated with the diffusion of etching byproducts generated during the etching process. The etching rate prediction model [M] is used to characterize the correspondence between the etching rate at each position on the wafer carrier surface and the associated position. The target etching rate distribution data [ER] target includes multiple target etching rate values ​​associated with positions on the wafer carrier surface.

[0031] Similarly, the etching rate prediction model [M] can be pre-stored in the memory of the control device of the semiconductor process equipment. In some embodiments, the etching rate prediction model [M] is normalized relative to the temperature sensitivity value, thereby making it universal for various wafers to be etched. That is, the etching rate prediction model of the embodiments of this application can be applied to the etching of various materials such as single crystal silicon, polycrystalline silicon, and silicon oxide, and there is no need to change the model for different etching processes. The etching rate prediction model will be described in detail below.

[0032] As described above, in the temperature control method of the wafer carrier device in the related art, when the temperature of a certain temperature control zone changes, only the change in the etching rate of that temperature control zone is considered, without realizing that when the temperature of that temperature control zone changes, the etching by-products generated during the etching process will diffuse from the high-temperature zone to the low-temperature zone with the temperature gradient, thereby affecting the etching rate of all positions on the wafer carrier surface. In the wafer etching method of the present application embodiment, by adopting an etching rate prediction model associated with the diffusion of etching by-products generated during the etching process, compared with the etching rate prediction model in the related art that is only associated with temperature sensitivity, the influence of etching by-product diffusion on the etching rate distribution can be compensated. Therefore, the etching rate distribution data of each position on the wafer at any target temperature in each temperature control zone can be predicted more accurately, or the target temperature control value of each temperature control zone can be calculated more accurately based on the target etching rate distribution data. That is, by using the wafer etching method of the present application embodiment to control the temperature of each temperature control zone of the wafer carrier device, the uniformity of wafer etching can be improved, or the wafer surface can obtain the desired morphology.

[0033] The inventors of this application further discovered that the temperature control method for multiple temperature control zones in the embodiments of this application can be applied not only to etching processes but also to deposition processes. For temperature-sensitive deposition processes, when the surface temperature of the wafer carrier device is different, the deposit will diffuse from the high-temperature zone to the low-temperature zone along the temperature gradient. That is, the deposit accumulated in the high-temperature zone will be less than the deposit accumulated in the low-temperature zone. Therefore, when the temperature of a certain temperature control zone changes, it will not only affect the deposition rate of the temperature control zone with the changed temperature but also affect the deposition rate of all positions on the wafer carrier surface. Corresponding to the wafer etching method described above, the embodiments of this application also provide a wafer deposition method, which may include the following steps: S11'. Obtain basic deposition rate distribution data and temperature sensitivity values ​​of the wafer to be deposited at the basic temperature of each temperature control zone. The basic deposition rate distribution data includes multiple deposition rate values ​​associated with positions on the wafer carrier surface. The temperature sensitivity values ​​are used to characterize the rate of change of the deposition rate with temperature. S12'. Using a preset deposition rate prediction model, target temperature control values ​​for each temperature control zone are obtained based on target deposition rate distribution data, basic deposition rate distribution data, and temperature sensitivity values. The deposition rate prediction model is associated with the diffusion of deposits generated during the deposition process. The deposition rate prediction model is used to characterize the correspondence between the deposition rate at each location on the wafer support surface and the associated location. The target deposition rate distribution data includes multiple target deposition rate values ​​associated with locations on the wafer support surface.

[0034] In the wafer deposition method of this application embodiment, by adopting a deposition rate prediction model associated with deposition diffusion during the deposition process, compared with the deposition rate prediction model associated only with temperature sensitivity in the related art, the influence of deposition diffusion on the deposition rate distribution can be compensated. Therefore, the deposition rate distribution data of each position on the wafer at any target temperature in each temperature control zone can be predicted more accurately, or the target temperature control value of each temperature control zone can be calculated more accurately based on the target deposition rate distribution data.

[0035] The etching rate prediction model of the embodiments of this application will be described in detail below. The etching rate prediction model is associated with the etching rate prediction sub-model of each temperature control zone. Each etching rate prediction sub-model is used to characterize the correspondence between the etching rate of each position on the wafer carrier surface and the associated position when the temperature control value of each corresponding temperature control zone changes.

[0036] As shown in Figure 7, a method for obtaining the etch rate prediction model provided in this application embodiment may include the following steps: S21. Obtain the basic etch rate distribution data [ER] base and temperature sensitivity value of the wafer to be etched at the basic temperature T base in each temperature control zone.

[0037] Those skilled in the art should understand that in order to obtain a more comprehensive etch rate prediction model so as to improve the etch uniformity on the entire wafer plane, it is necessary to collect the distribution data of each position on the entire wafer plane, and the obtained distribution data can be correlated with each position on the two-dimensional plane.

[0038] When the wafer carrier has four temperature control zones as shown in Figure 1, and the base temperature Tbase is 60°C, the temperature of each temperature control zone of the wafer carrier from the inside to the outside can be characterized by [T]base = [60, 60, 60, 60]. Of course, when the wafer carrier has nine temperature control zones as shown in Figure 2, the temperature of each temperature control zone can be characterized by [T]base = [T1, T2, T3, T4, T5, T6, T7, T8, T9]. This expression will be used in the following text. S22. Change the temperature control value of one of the temperature control zones to T1, and keep the remaining temperature control zones at the base temperature Tbase, and obtain the changed etching rate distribution data [ER]1.

[0039] For example, the temperature control value of the innermost first temperature control zone 11 is changed to 65°C, while the temperature control values ​​of the remaining temperature control zones remain at 60°C. The temperature of the wafer carrier device at this time is [65, 60, 60, 60]. Under this condition, the etch rate distribution data of each position on the wafer carrier surface after the change is detected. S23. Obtain the etch rate prediction sub-model [M] 1 of the changed temperature control zone. The etch rate prediction sub-model [M] 1 is related to the basic etch rate distribution data [ER] base, the changed etch rate distribution data [ER] 1, the basic temperature T base, the temperature control value T 1 of the changed temperature control zone, and the temperature sensitivity value [Sen].

[0040] More specifically, the etch rate prediction sub-model [M]sub can be represented by the following formula: (1) The temperature sensitivity value [Sen] can be represented by the following formula: (2) Wherein, [ER]2 represents the etch rate distribution data when the temperature control value of all temperature control areas of the wafer carrier is T2.

[0041] For example, the temperature control value of the innermost first temperature control zone 11 can be changed to 65°C, which is greater than the basic temperature. In other examples, the temperature value can also be changed to a temperature control value that is less than the basic temperature, such as 55°C.

[0042] To obtain the temperature sensitivity value, for example, the temperature control value of the temperature control area of ​​the wafer carrier can be set to T2 = 65°C. Under this condition, the etching rate distribution data [ER]2 is detected, and the etching rate distribution data [ER]2 is also normalized to obtain [Sen]. Similarly, in other examples, the temperature control value of the temperature control area of ​​the wafer carrier can be set to a temperature control value below 60°C, for example, 55°C, and the temperature sensitivity value can also be obtained according to the above formula (2).

[0043] For the sake of simplicity, only the distribution data in the radial direction of the wafer is taken as an example. In fact, the obtained distribution data should be associated with each position on the two-dimensional plane, and not only with the radial position. The radial data calculated according to the above formula (1) is shown as the dots in Figure 8, thus obtaining the etching rate prediction sub-model [M] 1 of the innermost first temperature control zone 11. This etching rate prediction sub-model is used to characterize the correspondence between the etching rate of each position on the wafer bearing surface and the associated position when the temperature control value of the corresponding first temperature control zone 11 changes. In order to obtain the etching rate corresponding to any position, a smooth curve can be used to fit the data calculated by the above formula (1) as shown in Figure 8, so that the etching rate corresponding to any position can be obtained according to the smooth curve. As shown in Figure 8, when the temperature value of the innermost first temperature control zone 11 changes, the etching rate of each position in the radial direction will change due to the influence of the diffusion of etching by-products.

[0044] It should be noted that if the temperature control value of the innermost first temperature control zone 11 is changed to a temperature value lower than the basic temperature, the resulting curve will be a curve symmetrical about the horizontal axis. To facilitate computer processing, a piecewise function can be used to characterize the above smooth curve, so that the control device of the semiconductor device can conveniently obtain the etching rate corresponding to any position according to the piecewise function. In some other embodiments, the data calculated by the above formula (1) can also be used to train a neural network model, so that the control device of the semiconductor device can conveniently obtain the etching rate corresponding to any position according to the neural network model. S24. Determine whether the etching rate prediction sub-model of all temperature control zones has been obtained. If the etching rate prediction sub-model of all temperature control zones has not been obtained, return to step S22 to obtain the etching rate prediction sub-model of the next temperature control zone; if the etching rate prediction sub-model of all temperature control zones has been obtained, execute step S25.

[0045] Following the same method, the etching rate prediction sub-models for all temperature control zones can be obtained. S25. Based on the etching rate prediction sub-models for each temperature control zone, the etching rate prediction model is obtained.

[0046] Specifically, when the wafer carrier device includes n temperature control zones, where n is an integer greater than or equal to 2, the etching rate prediction model can be represented by the following formula: (3) Wherein, [ER] target represents the target etching rate distribution data when each temperature control zone of the wafer carrier device is at the corresponding target temperature control value, [ER] base represents the basic etching rate distribution data when the temperature control values ​​of all temperature control zones of the wafer carrier device are T base, [Sen] represents the temperature sensitivity value; T target1 represents the target temperature control value of the first temperature control zone, T target2 represents the target temperature control value of the second temperature control zone, up to T targetn represents the target temperature control value of the nth temperature control zone, [M] 1 represents the etching rate prediction sub-model of the first temperature control zone, [M] 2 represents the etching rate prediction sub-model of the second temperature control zone, up to [M] n represents the etching rate prediction sub-model of the nth temperature control zone.

[0047] More specifically, for the example of the wafer carrier device shown in Figure 1, which includes four temperature control zones, the above formula (3) can be expressed as: (4) In the above formula (4), [Sen], [M]1, [M]2, [M]3, [M]4, and T base are all known data, which can be stored in advance in the memory of the control device of the semiconductor process equipment. When it is necessary to predict the etching rate distribution data at any target temperature in each temperature control zone, T target1, T target2, T target3, and T target4 are all known values. Substituting these known values ​​into formula (4) will yield the value of [ER] target, which is to obtain the target etching rate distribution data of each temperature control zone under the target temperature control value. When it is necessary to calculate the target temperature control value of each temperature control zone based on the target etching rate distribution data, [ER] target is known data. Substituting [ER] target into formula (4) will yield the values ​​of T target1, T target2, T target3, and T target4, which is to obtain the target temperature control value of each temperature control zone.

[0048] Taking the wafer carrier device shown in Figure 1, which includes four temperature control zones, as an example, the basic etch rate distribution data [ER] base in the radial direction at the basic temperature [T] base=[60, 60, 60, 60] is collected, and the temperature sensitivity value [Sen] is collected at the same time. The etch rate prediction model of this application is used to predict the etch rate distribution data in the radial direction at [T] target=[60, 63, 65, 58] and compare it with the measured etch rate distribution data, as shown in Figure 9. The hollow dots in the figure represent the predicted values, and the solid dots represent the measured values. It can be seen that the two are basically coincident, and the prediction deviation is within 2%, which is far better than the related technology shown in Figure 4.

[0049] Accordingly, for the wafer carrier device with nine temperature control zones shown in Figure 2, the etching rate prediction sub-models for the nine temperature control zones can also be obtained. Thus, when it is necessary to predict the etching rate distribution data at any target temperature in each temperature control zone, the etching rate distribution data at the predetermined target temperature of each temperature control zone can be obtained. When it is necessary to calculate the target temperature control value of each temperature control zone based on the target etching rate distribution data, the target temperature control value of each temperature control zone can be obtained to improve the uniformity of wafer etching or obtain the desired morphology.

[0050] Correspondingly, the deposition rate prediction model in this embodiment is associated with the deposition rate prediction sub-model for each temperature control zone. Each deposition rate prediction sub-model is used to characterize the correspondence between the deposition rate at each position on the wafer support surface and the associated position when the temperature control value of the corresponding temperature control zone changes. Further details can be found in the relevant descriptions above, and will not be repeated here.

[0051] Another embodiment of this application discloses a wafer etching method. This method is applied to a process chamber with a wafer carrier device. The wafer carrier device has multiple temperature control zones on its wafer carrier surface. The wafer carrier device can be, for example, a multi-temperature zone electrostatic chuck or a heating base. This method can be executed by a control device of a semiconductor process equipment, such as a host computer or slave computer of the semiconductor process equipment. The method may include the following steps: S31. Obtaining basic etching rate distribution data and temperature sensitivity values ​​of the wafer to be etched at the basic temperatures of each temperature control zone. S32. Using a preset etching rate prediction model, obtaining the target temperature control value for each temperature control zone based on the target etching rate distribution data, the basic etching rate distribution data, and the temperature sensitivity values.

[0052] In this embodiment, the etching rate prediction model is used to characterize the etching rate of all positions on the wafer carrier surface when the temperature control value of any temperature control region changes, and the corresponding relationship between the etch rate after the change of each position and the corresponding position.

[0053] In the wafer etching method of this application embodiment, the etching rate prediction model is used to characterize the effect of the changed temperature control region on the etching rate of all positions on the wafer carrier surface when the temperature control value of any temperature control region changes. The model defines the correspondence between the changed etching rate of each position and the corresponding position. In other words, when the temperature control value of one or more temperature control regions in the etching rate prediction model of this application embodiment changes, it will not only affect the etching rate value of the changed temperature control region but also the etching rate values ​​of other temperature control regions. This is based on the inventors' discovery that when the surface temperature of the wafer carrier device is different, etching byproducts diffuse from the high-temperature region to the low-temperature region along the temperature gradient. The amount of etching byproducts accumulated in the high-temperature region is less than that accumulated in the low-temperature region, causing a change in the overall wafer etching rate. In contrast, related etching rate prediction models that only relate to temperature sensitivity only consider the effect of temperature. For temperature control regions where the temperature has not changed, it is assumed that their etching rate also remains unchanged. Because the etching rate prediction models in related technologies do not take into account the influence of etching byproduct diffusion, the predicted etching rate distribution data will deviate from the actual measured etching rate distribution data. The etching rate prediction model used in the wafer etching method of this application takes into account that changes in the temperature control values ​​of one or more temperature control zones will also affect the etching rate values ​​at various locations in other temperature control zones. It can compensate for the influence of etching byproduct diffusion on the etching rate distribution, and therefore can more accurately predict the etching rate distribution data at various locations on the wafer at any target temperature in each temperature control zone, or can more accurately calculate the target temperature control values ​​of each temperature control zone based on the target etching rate distribution data.

[0054] Further details regarding this embodiment can be found in the corresponding description in the previous embodiment, and will not be repeated here. Correspondingly, the temperature control method in this embodiment can also be applied to the deposition process, and specific details can be found in the corresponding description above, and will not be repeated here.

[0055] In the above embodiments, the etching rate prediction model can be associated with various positions on the two-dimensional plane of the wafer carrier surface. However, such an etching rate prediction model is relatively complex and not conducive to quickly predicting the etching rate distribution data of various positions on the wafer, or calculating the target temperature control value of each temperature control zone. In order to simplify the etching rate prediction model, this application embodiment also provides a wafer etching method. The method is applied to a process chamber with a wafer carrier device, as shown in Figures 3A and 3B. The wafer carrier surface of the wafer carrier device has multiple main temperature control zones 34 and multiple auxiliary temperature control zones 35. The multiple main temperature control zones 34 are arranged sequentially in the radial direction of the wafer carrier surface. The main temperature control zones 34 located on the outer side in the radial direction are arranged around the main temperature control zones 34 located on the inner side in the radial direction. The multiple auxiliary temperature control zones 35 are arranged along the angular direction of the wafer carrier device. The wafer carrier device can be, for example, a multi-temperature zone electrostatic chuck or a heating base. The method can be executed by the control device of the semiconductor process equipment. The control device can be, for example, a host computer or a slave computer of the semiconductor process equipment. As shown in Figure 10, the method may include the following steps: S31. Obtain the first basic etching rate distribution data and temperature sensitivity value of the wafer to be etched in the radial direction at the basic temperature of each main temperature control zone.

[0056] In this embodiment, the first basic etching rate distribution data includes multiple etching rate values ​​associated with the radial direction position on the wafer carrier surface, and the temperature sensitivity value is used to characterize the rate of change of the etching rate with temperature. Further details can be found in the corresponding description in step S11. S32. Using a preset first etching rate prediction model, the target temperature control value of each main temperature control zone is obtained based on the first target etching rate distribution data, the first basic etching rate distribution data, and the temperature sensitivity value.

[0057] In this embodiment, the first etch rate prediction model is associated with the diffusion of etch byproducts in the radial direction generated during the etching process. The first etch rate prediction model is used to characterize the correspondence between the etch rate at each position in the radial direction on the wafer carrier surface and the associated position. The first target etch rate distribution data includes multiple target etch rate values ​​associated with positions in the radial direction on the wafer carrier surface. Further details can be found in the corresponding description in step S12.

[0058] In this embodiment, the first etching rate prediction model is only associated with each position in the radial direction on the wafer carrier surface. The model is relatively simple and can quickly predict the etching rate distribution data of each position in the radial direction of the wafer, or calculate the target temperature control value of each main temperature control zone to achieve etching uniformity in the radial direction of the wafer, or obtain the desired morphology in the radial direction. S33. Obtain the second basic etching rate distribution data and temperature sensitivity value of the wafer to be etched in the angular direction at the basic temperature of each auxiliary temperature control zone.

[0059] In this embodiment, the second basic etching rate distribution data includes multiple etching rate values ​​associated with positions in the angular direction on the wafer carrier surface. S34. Using a preset second etching rate prediction model, the target temperature control value of each auxiliary temperature control zone is obtained based on the second target etching rate distribution data, the second basic etching rate distribution data, and the temperature sensitivity value.

[0060] In this step, the etching uniformity in the wafer corner direction is adjusted. In the example of Figure 3B, there are 3 main temperature control regions, and each main temperature control region has multiple auxiliary temperature control regions. Therefore, 3 second etching rate prediction models are required. The second etching rate prediction model corresponding to the 4 auxiliary temperature control regions in the inner region is used to adjust the corner etching uniformity of the inner region. The second etching rate prediction model corresponding to the 8 auxiliary temperature control regions in the middle region is used to adjust the corner etching uniformity of the middle region. The second etching rate prediction model corresponding to the 16 auxiliary temperature control regions in the outer region is used to adjust the corner etching uniformity of the outer region.

[0061] In this embodiment, the second etch rate prediction model is associated with the diffusion of etch byproducts in the angular direction generated during the etching process. The second etch rate prediction model is used to characterize the correspondence between the etch rate at each position in the angular direction on the wafer carrier surface and the associated position. The second target etch rate distribution data includes multiple target etch accumulation rate values ​​associated with the positions in the angular direction on the wafer carrier surface.

[0062] In this embodiment, the second etching rate prediction model is only associated with each position in the angular direction on the wafer carrier surface. The model is relatively simple and can quickly predict the etching rate distribution data of each position in the angular direction of the wafer, or calculate the target temperature control value of each auxiliary temperature control area, so as to achieve etching uniformity in the angular direction of the wafer, or obtain the desired morphology in the angular direction.

[0063] In the wafer etching method of the embodiment shown in Figure 10, the target temperature control values ​​of each main temperature control region are obtained through the first stage, namely steps S31 and S32, thereby adjusting the etching uniformity in the radial direction of the wafer or obtaining the desired morphology in the radial direction; then, through the second stage, namely steps S33 and S34, the target temperature control values ​​of each auxiliary temperature control region are obtained, thereby adjusting the etching uniformity in the angular direction of the wafer or obtaining the desired morphology in the angular direction. The above wafer etching method achieves etching uniformity on the entire wafer plane or obtains the desired morphology on the entire wafer plane through these two stages. The first and second etching rate prediction models used in these two stages are only associated with each position in one direction on the wafer carrier surface. Compared with the etching rate prediction model associated with each position on the two-dimensional plane of the wafer carrier surface, the model used in this embodiment is simpler, thereby enabling rapid temperature control.

[0064] Further details of the embodiments of this application can be found in the relevant descriptions above, and will not be repeated here. Those skilled in the art should understand that the temperature control method in this embodiment can also be applied to the deposition process, and specific details can be found in the corresponding descriptions above, and will not be repeated here.

[0065] Another embodiment of this application discloses a method for obtaining an etch rate prediction model. This method can be applied, for example, to a process chamber having a wafer carrier apparatus as shown in Figures 3A and 3B. The wafer carrier surface of the wafer carrier apparatus has multiple main temperature control regions 34 and multiple auxiliary temperature control regions 35. The multiple main temperature control regions 34 are sequentially arranged in the radial direction of the wafer carrier surface, with the main temperature control region 34 located on the outer side of the radial direction surrounding the main temperature control region 34 located on the inner side of the radial direction. The multiple auxiliary temperature control regions 35 are arranged along the angular direction of the wafer carrier apparatus. As shown in Figure 11, the method may include the following steps: S41. Obtaining first basic etch rate distribution data of the wafer to be etched in the radial direction when all main temperature control regions are at a basic temperature. The first basic etch rate distribution data includes multiple etch rate values ​​associated with positions in the radial direction on the wafer carrier surface. Further details can be found in the corresponding description in step S21. S42. Change the temperature control value of one of the main temperature control zones, while keeping the remaining main temperature control zones at their base temperatures, and obtain the changed etching rate distribution data in the radial direction. Further details can be found in the corresponding description in step S22. S43. Obtain the first etching rate prediction sub-model for the changed main temperature control zone. The first etching rate prediction sub-model is related to the first base etching rate distribution data, the changed etching rate distribution data, the base temperature, the changed temperature control value of the main temperature control zone, and the temperature sensitivity value. Further details can be found in the corresponding description in step S23. S44. Repeatedly change the temperature control value of another main temperature control zone, while keeping the remaining main temperature control zones at their base temperatures, obtain the changed etching rate distribution data in the radial direction, and obtain the etching rate prediction sub-model for the changed main temperature control zone, until the etching rate prediction sub-models for all main temperature control zones are obtained. S45. Obtain the second basic etch rate distribution data along the angular direction of the wafer to be etched, with all auxiliary temperature control regions at the basic temperature. The second basic etch rate distribution data includes multiple etch rate values ​​associated with the angular position on the wafer's substrate surface. S46. Change the temperature control value of one of the auxiliary temperature control regions while keeping the remaining auxiliary temperature control regions at the basic temperature, and obtain the etch rate distribution data in the changed angular direction. S47. Obtain the second etch rate prediction sub-model for the changed auxiliary temperature control region. The second etch rate prediction sub-model is related to the second basic etch rate distribution data, the changed etch rate distribution data, the basic temperature, the changed temperature control value of the auxiliary temperature control region, and the temperature sensitivity value.S48. Repeatedly change the temperature control value of another auxiliary temperature control zone within the auxiliary temperature control zone, while keeping the remaining main temperature control zones at their basic temperatures. Obtain the changed etching rate distribution data in the radial direction, and obtain the etching rate prediction sub-model for the changed main temperature control zone, until the etching rate prediction sub-models for all main temperature control zones are obtained. S49. Obtain the first etching rate prediction model based on the first etching rate prediction sub-model for each main temperature control zone, and obtain the second etching rate prediction model based on the second etching rate prediction sub-model for each auxiliary temperature control zone.

[0066] In the example of Figure 3B, there are 3 main temperature control zones and 28 auxiliary temperature control zones. Each main temperature control zone has multiple auxiliary temperature control zones. For example, the second etch rate prediction sub-models for these 28 auxiliary temperature control zones can yield 3 second etch rate prediction models. The second etch rate prediction models corresponding to the 4 auxiliary temperature control zones in the inner region are used to adjust the angular etching uniformity of the inner region. The second etch rate prediction models corresponding to the 8 auxiliary temperature control zones in the middle region are used to adjust the angular etching uniformity of the middle region. The second etch rate prediction models corresponding to the 16 auxiliary temperature control zones in the outer region are used to adjust the angular etching uniformity of the outer region. Further details can be found in the corresponding description in step S25.

[0067] Further details of this embodiment can be found in the relevant descriptions above, and will not be repeated here. Those skilled in the art should understand that the method for obtaining the etch rate prediction model in this embodiment can also be applied to the deposition process, and specific details can be found in the corresponding descriptions above, and will not be repeated here.

[0068] Another embodiment of this application also provides a wafer etching or deposition method. This method is applied to a process chamber having a wafer carrier device. The wafer carrier device has multiple temperature control zones on its wafer carrier surface. The wafer carrier device can be, for example, a multi-temperature zone electrostatic chuck or a heating base. This method can be executed by a control device of a semiconductor process equipment. The control device can be, for example, a host computer or a slave computer of the semiconductor process equipment. The method may include the following steps: S51. Obtaining basic etching or deposition rate distribution data and temperature sensitivity values ​​of the wafer to be etched or deposited at the basic temperatures of each temperature control zone; wherein the basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with positions on the wafer carrier surface, and the temperature sensitivity values ​​include multiple temperature sensitivity values ​​associated with positions on the wafer carrier surface; S52. The etching or deposition rate prediction model obtained by the method described in the above embodiment for obtaining the etching or deposition rate prediction model obtains the target temperature control value of each temperature control zone based on the target etching or deposition rate distribution data, the basic etching or deposition rate distribution data, and the temperature sensitivity value; wherein, the target etching or deposition rate distribution data includes multiple target etching rate values ​​associated with the position on the wafer carrier surface.

[0069] Further detailed descriptions of this embodiment can be found in the relevant content above, and will not be repeated here.

[0070] Another embodiment of this application discloses a semiconductor process apparatus, as shown in FIG12. The semiconductor process apparatus may include: a process chamber 41, a wafer carrier 42, and a control device 43. The wafer carrier 42 may be, for example, a multi-temperature zone electrostatic chuck or a heating base, disposed within the process chamber 41. The wafer carrier surface of the wafer carrier 42 has multiple temperature control zones. The control device 43 includes at least one processor and at least one memory. The memory stores a computer program, which, when executed by the processor, implements the methods described in the various embodiments above. In other embodiments, the memory stores an etch or deposition rate prediction model obtained from the embodiments of the methods for obtaining etch or deposition rate prediction models described above.

[0071] Exemplarily, the control device 43 can be a host computer or a slave computer. In addition to controlling the target control temperature of each temperature control zone on the wafer carrier surface, the control device 43 can also control the opening of the valves of the gas inlet element of the semiconductor process equipment to introduce the corresponding process gas into the process chamber 41; the control device 43 can also control the opening degree of the valves of the gas inlet element to control the flow rate of the process gas. The control device 43 can also control the evacuation element to evacuate the interior of the process chamber, for example, by controlling the valve opening degree of the evacuation element or the speed of the evacuation pump, to control the pressure inside the process chamber 41 and remove reaction byproducts. The semiconductor process equipment may also include a radio frequency (RF) coil, and the control device 43 is also used to control the RF power supply to provide RF power to the RF coil to excite the process gas inside the process chamber 41 to generate plasma. The control device 43 is also used to control the RF power supply to provide RF power to the wafer carrier 42 to provide RF bias. Thus, semiconductor manufacturing equipment can process the wafers on the wafer carrier 42.

[0072] The above embodiments of this application focus on describing the differences between the various embodiments. As long as the different optimization features between the various embodiments are not contradictory, they can be combined to form a better embodiment. Considering the brevity of the text, they will not be described in detail here.

[0073] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application. [Simplified Explanation of the Diagram]

[0014] Figures 1 and 2 show top views of a wafer carrier device according to an embodiment of this application; Figures 3A and 3B show cross-sections and top views of a wafer carrier device according to another embodiment of this application; Figure 4 shows etch rate distribution data predicted by related technologies and actual measured etch rate distribution data; Figure 5 shows a schematic diagram of the diffusion mechanism of etch byproducts according to an embodiment of this application; Figure 6 shows a flowchart of a wafer etching method according to an embodiment of this application; Figure 7 shows a flowchart of a method for obtaining an etch rate prediction model according to an embodiment of this application; Figure 8 shows an etch rate prediction sub-model of the first temperature control zone using smooth curve fitting; Figure 9 shows etch rate distribution data predicted by the etch rate prediction model according to an embodiment of this application and actual measured etch rate distribution data; Figure 10 shows a flowchart of a wafer etching method according to another embodiment of this application; Figure 11 shows a flowchart of a method for obtaining an etch rate prediction model according to another embodiment of this application; Figure 12 shows a schematic diagram of a semiconductor process apparatus according to an embodiment of this application.

Claims

1. A wafer etching or deposition method, applied to a process chamber having a wafer carrier, wherein a wafer carrier surface of the wafer carrier has a plurality of main temperature control regions and a plurality of auxiliary temperature control regions, the plurality of main temperature control regions being sequentially arranged in a radial direction of the wafer carrier surface, the main temperature control regions located on the outer side of the radial direction surrounding the main temperature control regions located on the inner side of the radial direction, and the plurality of auxiliary temperature control regions being arranged along the angular direction of the wafer carrier, wherein... The method includes: acquiring a first basic etching or deposition rate distribution data and a temperature sensitivity value along the radial direction of a wafer to be etched or deposited at a basic temperature in each of the main temperature control zones; wherein the first basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with a position in the radial direction on the wafer carrier surface, and the temperature sensitivity value is used to characterize a rate of change of the etching or deposition rate with temperature; using a preset first etching or deposition rate prediction model, based on a first target etching or deposition rate distribution data, the first basic etching or deposition rate distribution data, and the temperature sensitivity value, acquiring a target temperature control value for each of the main temperature control zones; wherein the first etching or deposition rate prediction model is associated with the diffusion of an etching byproduct or deposit generated in the radial direction during the etching or deposition process, and the first etching or deposition rate prediction model is used to characterize a correspondence between the etching or deposition rate at each position in the radial direction on the wafer carrier surface and the associated position, and the first target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with a position in the radial direction on the wafer carrier surface.

2. The wafer etching or deposition method as described in claim 1, wherein, The method further includes: acquiring a second basic etching or deposition rate distribution data and a temperature sensitivity value of the wafer to be etched or deposited at a basic temperature in each of the auxiliary temperature control zones along an angular direction; wherein the second basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with a position in the angular direction on the wafer carrier surface; and acquiring a target temperature control value for each of the auxiliary temperature control zones using a preset second etching or deposition rate prediction model based on a second target etching or deposition rate distribution data, the second basic etching or deposition rate distribution data, and the temperature sensitivity value; wherein the second etching or deposition rate prediction model is associated with the diffusion of an etching byproduct or deposit generated in the angular direction during the etching or deposition process, and the second etching or deposition rate prediction model is used to characterize a correspondence between the etching or deposition rate at each position in the angular direction on the wafer carrier surface and the associated position, and the second target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with a position in the angular direction on the wafer carrier surface.

3. The wafer etching or deposition method as described in claim 2, wherein, The first etching or deposition rate prediction model is associated with a first etching or deposition rate prediction sub-model for each of the main temperature control regions. Each first etching or deposition rate prediction sub-model is used to characterize the correspondence between the etching or deposition rate at each position in the radial direction on the wafer carrier surface and the associated position when a temperature control value of the corresponding main temperature control region changes. Alternatively, the second etching or deposition rate prediction model is associated with a second etching or deposition rate prediction sub-model for each of the auxiliary temperature control regions. Each second etching or deposition rate prediction sub-model is used to characterize the correspondence between the etching or deposition rate at each position in the angular direction on the wafer carrier surface and the associated position when a temperature control value of the corresponding auxiliary temperature control region changes.

4. The wafer etching or deposition method as described in claim 3, wherein, The steps of obtaining the first etch or deposition rate prediction sub-model include: obtaining the first basic etch or deposition rate distribution data and the temperature sensitivity value of the wafer to be etched or deposited; changing the temperature control value of one of the main temperature control regions while keeping the remaining main temperature control regions at the basic temperature, and obtaining the changed etch or deposition rate distribution data along the radial direction; obtaining the first etch or deposition rate prediction sub-model of the changed main temperature control region, wherein the first etch or deposition rate prediction sub-model is related to the first basic etch or deposition rate distribution data, the changed etch or deposition rate distribution data, the basic temperature, a temperature control value of the changed main temperature control region, and the temperature sensitivity value.

5. The wafer etching or deposition method as described in claim 3, wherein, The steps for obtaining the second etch or deposition rate prediction sub-model include: obtaining the second basic etch or deposition rate distribution data and the temperature sensitivity value of the wafer to be etched or deposited; changing the temperature control value of one of the auxiliary temperature control regions while keeping the remaining auxiliary temperature control regions at the basic temperature, and obtaining the changed etch or deposition rate distribution data along the angular direction; obtaining the second etch or deposition rate prediction sub-model of the changed auxiliary temperature control region, wherein the second etch or deposition rate prediction sub-model is related to the second basic etch or deposition rate distribution data, the changed etch or deposition rate distribution data, the basic temperature, a temperature control value of the changed auxiliary temperature control region, and the temperature sensitivity value.

6. A wafer etching or deposition method applied to a process chamber having a wafer carrier device, wherein a wafer carrier surface of the wafer carrier device has multiple temperature control zones, wherein, The method includes: acquiring a basic etch or deposition rate distribution data and a temperature sensitivity value for a wafer to be etched or deposited at a basic temperature in each of the temperature control zones; wherein the basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with positions on the wafer support surface, and the temperature sensitivity value is used to characterize the rate of change of the etch or deposition rate with temperature; using a preset etch or deposition rate prediction model, acquiring a target temperature control value for each of the temperature control zones based on a target etch or deposition rate distribution data, the basic etch or deposition rate distribution data, and the temperature sensitivity value; wherein the etch or deposition rate prediction model is associated with the diffusion of an etching byproduct or deposit generated during the etch or deposition process, and the etch or deposition rate prediction model is used to characterize a correspondence between the etch or deposition rate at each position on the wafer support surface and the associated position, and the target etch or deposition rate distribution data includes multiple target etch or deposition rate values ​​associated with a position on the wafer support surface.

7. A wafer etching or deposition method applied to a process chamber having a wafer carrier device, wherein a wafer carrier surface of the wafer carrier device has multiple temperature control zones, wherein, The method includes: acquiring a basic etching or deposition rate distribution data and a temperature sensitivity value for a wafer to be etched or deposited at a basic temperature in each of the temperature control zones; wherein the basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with positions on the wafer support surface, and the temperature sensitivity value is used to characterize the rate of change of the etching or deposition rate with temperature; using a preset etching or deposition rate prediction model, acquiring a target temperature control value for each of the temperature control zones based on a target etching or deposition rate distribution data, the basic etching or deposition rate distribution data, and the temperature sensitivity distribution data; wherein the etching or deposition rate prediction model is used to characterize the influence of the changed temperature control zone on all positions on the wafer support surface when the temperature control value of any temperature control zone changes, and the correspondence between the etch or deposition rate after the change at each position and the corresponding position, and the target etching or deposition rate distribution data includes multiple target etching or deposition rate values ​​associated with a position on the wafer support surface.

8. The wafer etching or deposition method as described in claim 6 or 7, wherein, The etching or deposition rate prediction model is associated with an etching or deposition rate prediction sub-model for each of the temperature control zones. Each etching or deposition rate prediction sub-model is used to characterize the correspondence between the etching or deposition rate at each position on the wafer carrier surface and the associated position when the temperature control value of the corresponding temperature control zone changes.

9. The wafer etching or deposition method as described in claim 6 or 7, wherein, The steps for obtaining the etch or deposition rate prediction sub-model include: obtaining the basic etch or deposition rate distribution data and the temperature sensitivity value of the wafer to be etched or deposited at the basic temperature in each of the temperature control regions; changing the temperature control value of one of the temperature control regions while keeping the remaining temperature control regions at the basic temperature, and obtaining the changed etch or deposition rate distribution data; obtaining the etch or deposition rate prediction sub-model of the changed temperature control region, wherein the etch or deposition rate prediction sub-model is related to the basic etch or deposition rate distribution data, the changed etch or deposition rate distribution data, the basic temperature, a temperature control value of the changed temperature control region, and the temperature sensitivity value.

10. The wafer etching or deposition method as described in claim 9, wherein, The etch or deposition rate prediction sub-model is represented by the following formula: (1) Where Tbase represents the base temperature, T1 represents a temperature control value of a temperature control zone that has been changed, [ER]1 represents the etch or deposition rate distribution data after the change, [ER]base represents the base etch or deposition rate distribution data when the temperature control value of all temperature control zones of the wafer carrier is Tbase, and represents the temperature sensitivity value; The temperature sensitivity value is represented by the following formula: (2) Where [ER]2 represents the etch or deposition rate distribution data when the temperature control value of all temperature control zones of the wafer carrier is T2.

11. The wafer etching or deposition method as described in claim 10, wherein, Obtaining the etch or deposition rate prediction sub-model further includes: using a smooth curve to fit the data calculated by the formula (1) and using a piecewise function to characterize the smooth curve; or using the data calculated by the formula (1) to train a neural network model.

12. The wafer etching or deposition method as described in claim 9, wherein, The wafer carrier includes n temperature control zones, where n is an integer greater than or equal to 2. The etch or deposition rate prediction model is represented by the following formula: (3) Wherein, [ER]target represents the target etch or deposition rate distribution data when each temperature control zone of the wafer carrier is at the corresponding target temperature control value, [ER]base represents the basic etch or deposition rate distribution data when the temperature control values ​​of all temperature control zones of the wafer carrier are Tbase, and [Sen] represents the temperature sensitivity value; Ttarget1 represents a target temperature control value of a first temperature control zone, Ttarget2 represents a target temperature control value of a second temperature control zone, up to Ttargetn represents a target temperature control value of the nth temperature control zone, [M]1 represents an etch or deposition rate prediction sub-model of a first temperature control zone, [M]2 represents an etch or deposition rate prediction sub-model of a second temperature control zone, up to [M]n represents an etch or deposition rate prediction sub-model of the nth temperature control zone.

13. The wafer etching or deposition method as described in claim 10, wherein, The wafer carrier includes n temperature control zones, where n is an integer greater than or equal to 2. The etch or deposition rate prediction model is represented by the following formula: (3) Wherein, [ER]target represents the target etch or deposition rate distribution data when each of the temperature control zones of the wafer carrier is at the corresponding target temperature control value, [ER]base represents the basic etch or deposition rate distribution data when the temperature control value of all the temperature control zones of the wafer carrier is Tbase, and [Sen] represents the temperature sensitivity value; Ttarget1 represents a target temperature control value of a first temperature control zone, Ttarget2 represents a target temperature control value of a second temperature control zone, up to Ttargetn represents a target temperature control value of an nth temperature control zone, [M]1 represents an etch or deposition rate prediction sub-model of a first temperature control zone, [M]2 represents an etch or deposition rate prediction sub-model of a second temperature control zone, up to [M]n represents an etch or deposition rate prediction sub-model of an nth temperature control zone.

14. A method for obtaining an etch or deposition rate prediction model, the method being applied to a process chamber having a wafer carrier device, the wafer carrier surface of which has multiple temperature control zones, wherein, The method includes: acquiring a basic etch or deposition rate distribution data and a temperature sensitivity value for a wafer to be etched or deposited, wherein the basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with a location on the wafer's support surface, and the temperature sensitivity value is used to characterize the rate of change of the etch or deposition rate with temperature; changing a temperature control value of one of the temperature control regions while keeping the remaining temperature control regions at the basic temperature, and acquiring the changed etch or deposition rate distribution data; acquiring an etch or deposition rate prediction sub-model for the changed temperature control region, the etch or deposition rate prediction sub-model being correlated with the basic etch or deposition rate distribution data, the changed etch or deposition rate distribution data, the basic temperature, the temperature control value of the changed temperature control region, and the temperature sensitivity value; Repeatedly change the temperature control value of another temperature control zone in the temperature control zone, while keeping the remaining temperature control zones at the basic temperature, obtain the changed etching or deposition rate distribution data, and obtain the etching or deposition rate prediction sub-model of the changed temperature control zone, until the etching or deposition rate prediction sub-model of all temperature control zones is obtained; obtain the etching or deposition rate prediction model based on the etching or deposition rate prediction sub-model of each temperature control zone.

15. The method as described in claim 14, wherein, The etch or deposition rate prediction sub-model is represented by the following formula: (1) Where Tbase represents the base temperature, T1 represents a temperature control value of the changed temperature control zone, [ER]1 represents the changed etch or deposition rate distribution data, [ER]base represents the base etch or deposition rate distribution data when the temperature control value of all the temperature control zones of the wafer carrier is Tbase, and represents the temperature sensitivity value; The temperature sensitivity value is represented by the following formula: (2) Where [ER]2 represents the etch or deposition rate distribution data when the temperature control value of all the temperature control zones of the wafer carrier is T2.

16. The method as described in claim 15, wherein, Obtaining the etch or deposition rate prediction sub-model further includes: using a smooth curve to fit the data calculated by the formula (1) and using a piecewise function to characterize the smooth curve; or using the data calculated by the formula (1) to train a neural network model.

17. The method as described in claim 14, wherein, The wafer carrier includes n temperature control zones, where n is an integer greater than or equal to 2. The etch or deposition rate prediction model is represented by the following formula: (3) Wherein, [ER]target represents the target etch or deposition rate distribution data when each of the temperature control zones of the wafer carrier is at the corresponding target temperature control value, [ER]base represents the basic etch or deposition rate distribution data when the temperature control value of all the temperature control zones of the wafer carrier is Tbase, and [Sen] represents the temperature sensitivity value; Ttarget1 represents a target temperature control value of a first temperature control zone, Ttarget2 represents a target temperature control value of a second temperature control zone, up to Ttargetn represents a target temperature control value of an nth temperature control zone, [M]1 represents an etch or deposition rate prediction sub-model of a first temperature control zone, [M]2 represents an etch or deposition rate prediction sub-model of a second temperature control zone, up to [M]n represents an etch or deposition rate prediction sub-model of an nth temperature control zone.

18. The method as described in any one of claims 14 to 17, wherein, The multiple temperature control zones include multiple main temperature control zones and multiple auxiliary temperature control zones. The multiple main temperature control zones are arranged sequentially in a radial direction on the wafer carrier surface. The main temperature control zones located on the outer side of the radial direction surround the main temperature control zones located on the inner side of the radial direction. The multiple auxiliary temperature control zones are arranged along the angular direction of the wafer carrier device. The etch or deposition rate prediction model includes a first etch or deposition rate prediction model, which is used to characterize the correspondence between the etch or deposition rate at each position in the radial direction on the wafer carrier surface and the associated position. The acquisition of basic etch or deposition rate distribution data for the wafer to be etched or deposited under the base temperature in each of the temperature control zones includes: acquiring first basic etch or deposition rate distribution data along the radial direction for the wafer to be etched or deposited under the base temperature in each of the main temperature control zones, wherein the first basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with the radial direction position on the wafer carrier surface; the acquisition of modified etch or deposition rate distribution data includes: changing the temperature control value of one of the main temperature control zones while keeping the remaining main temperature control zones at the base temperature, and acquiring modified etch or deposition rate distribution data along the radial direction; the acquisition of the etch or deposition rate prediction sub-model for the modified temperature control zone includes: acquiring the first etch or deposition rate prediction sub-model for the modified main temperature control zone, wherein the first etch or deposition rate prediction sub-model is related to the first basic etch or deposition rate distribution data, the modified etch or deposition rate distribution data, the base temperature, a temperature control value of the modified main temperature control zone, and the temperature sensitivity value; The process of obtaining the etching or deposition rate prediction model based on the etching or deposition rate prediction sub-model of each of the temperature control zones includes: obtaining the first etching or deposition rate prediction model based on the first etching or deposition rate prediction sub-model of each of the main temperature control zones.

19. The method as described in any one of claims 14 to 17, wherein, The multiple temperature control zones include multiple main temperature control zones and multiple auxiliary temperature control zones. The multiple main temperature control zones are arranged sequentially in a radial direction on the wafer carrier surface. The main temperature control zones located on the outer side of the radial direction surround the main temperature control zones located on the inner side of the radial direction. The multiple auxiliary temperature control zones are arranged along the angular direction of the wafer carrier device. The etching or deposition rate prediction model also includes a second etching or deposition rate prediction model, which is used to characterize the correspondence between the etching or deposition rate at each position in the angular direction on the wafer carrier surface and the associated position. Obtaining the basic etching or deposition rate distribution data of the wafer to be etched or deposited at the basic temperature in each of the temperature control zones also includes: obtaining the second basic etching or deposition rate distribution data of the wafer to be etched or deposited at the basic temperature in each of the auxiliary temperature control zones along the angular direction, wherein the second basic etching or deposition rate distribution data includes multiple etching or deposition rate values ​​associated with the positions in the angular direction on the wafer carrier surface. The acquisition of the modified etching or deposition rate distribution data further includes: changing a temperature control value of one of the auxiliary temperature control zones while keeping the remaining auxiliary temperature control zones at the base temperature, and acquiring the modified etching or deposition rate distribution data along the angular direction; the acquisition of the etching or deposition rate prediction sub-model of the modified temperature control zone further includes: acquiring a second etching or deposition rate prediction sub-model of the modified auxiliary temperature control zone, the second etching or deposition rate prediction sub-model being related to the second base etching or deposition rate distribution data, the modified etching or deposition rate distribution data, the base temperature, the temperature control value of the modified auxiliary temperature control zone, and the temperature sensitivity value; the acquisition of the etching or deposition rate prediction model based on the etching or deposition rate prediction sub-model of each of the temperature control zones includes: acquiring a second etching or deposition rate prediction model based on the second etching or deposition rate prediction sub-model of each of the auxiliary temperature control zones.

20. A wafer etching or deposition method applied to a process chamber having a wafer carrier device, wherein the wafer carrier surface of the wafer carrier device has multiple temperature control zones, wherein, The method includes: acquiring basic etch or deposition rate distribution data and a temperature sensitivity value for a wafer to be etched or deposited at a basic temperature in each of the temperature control zones; wherein the basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with positions on the wafer support surface, and the temperature sensitivity value is used to characterize the rate of change of the etch or deposition rate with temperature; and acquiring a target temperature control value for each of the temperature control zones using an etch or deposition rate prediction model obtained by the method of any one of claims 14 to 19, based on a target etch or deposition rate distribution data, the basic etch or deposition rate distribution data, and the temperature sensitivity value; wherein the target etch or deposition rate distribution data includes multiple target etch or deposition rate values ​​associated with positions on the wafer support surface.

21. A wafer etching or deposition method, applied to a process chamber having a wafer carrier, the wafer carrier surface having a plurality of main temperature control regions and a plurality of auxiliary temperature control regions, the plurality of main temperature control regions being sequentially arranged in a radial direction on the wafer carrier surface, the main temperature control regions located on the outer side of the radial direction surrounding the main temperature control regions located on the inner side of the radial direction, and the plurality of auxiliary temperature control regions being arranged along the angular direction of the wafer carrier, wherein... The method includes: acquiring first basic etch or deposition rate distribution data along the radial direction at a basic temperature in each of the main temperature control regions, and a temperature sensitivity value; wherein the first basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with positions in the radial direction on the wafer carrier surface, and the temperature sensitivity value is used to characterize the rate of change of the etch or deposition rate with temperature; and acquiring a target temperature control value for each of the main temperature control regions based on a first etch or deposition rate prediction model obtained by the method as described in claim 18, according to a first target etch or deposition rate distribution data, the first basic etch or deposition rate distribution data, and the temperature sensitivity value; wherein the first target etch or deposition rate distribution data includes multiple target etch or deposition rate values ​​associated with positions in the radial direction on the wafer carrier surface.

22. The method as described in claim 21, wherein, It also includes: acquiring a second basic etch or deposition rate distribution data along the radial direction at the basic temperature of each of the auxiliary temperature control zones, and the temperature sensitivity value; wherein the second basic etch or deposition rate distribution data includes multiple etch or deposition rate values ​​associated with positions in the angular direction on the wafer support surface, and the temperature sensitivity value is used to characterize the rate of change of the etch or deposition rate with temperature; and acquiring a target temperature control value for each of the auxiliary temperature control zones based on a second target etch or deposition rate distribution data, the second basic etch or deposition rate distribution data, and the temperature sensitivity value using a second etch or deposition rate prediction model obtained as described in claim 19; wherein the second target etch or deposition rate distribution data includes multiple target etch or deposition rate values ​​associated with positions in the angular direction on the wafer support surface.

23. A semiconductor manufacturing apparatus, comprising: One process chamber; A wafer carrier device disposed within the process chamber, wherein a wafer carrier surface of the wafer carrier device has multiple temperature control zones; a control device comprising at least one processor and at least one memory, wherein the memory stores a computer program that, when executed by the processor, implements the method as described in any one of claims 1 to 22.

24. A semiconductor manufacturing apparatus, comprising: One process chamber; A wafer carrier device disposed within the process chamber, wherein a wafer carrier surface of the wafer carrier device has multiple temperature control zones; a control device comprising at least one processor and at least one memory, wherein the memory stores an etch or deposition rate prediction model obtained by the method of any one of claims 14 to 19.

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