Display device

Abstract

In one embodiment, the display device includes: a substrate having a plurality of pixels, each comprising a plurality of sub-pixels; a plurality of light-emitting elements located on the sub-pixels and each comprising one or more n-type electrodes and p-type electrodes; a first connecting electrode located on each of the light-emitting elements of the sub-pixels and comprising a recess with overlapping one or more n-type electrodes; and a second connecting electrode located on the light-emitting elements of the sub-pixels and comprising a protrusion with overlapping p-type electrodes. The recesses and protrusions extend along a first direction in each of a first subset of the sub-pixels, and extend along a second direction different from the first direction in each of a second subset of the sub-pixels.

Description

[Technical Field]

[0001] This invention relates to a display device and a method for manufacturing the same, particularly a display device using a light-emitting diode (LED) and a method for manufacturing the same. [Previous Technology]

[0002] Display devices used for displays in computers, televisions, mobile phones, etc., may be organic light-emitting displays (OLEDs) that emit light on their own, or liquid crystal displays (LCDs) that require an independent light source.

[0003] The applications of display devices range from computer and television monitors to personal mobile devices, and research is underway on display devices with wide display areas and reduced size and weight.

[0004] Recently, display devices incorporating light-emitting diodes (LEDs) have attracted attention as potential next-generation display devices. Because LEDs are made of inorganic materials rather than organic materials, they are more reliable and have a longer lifespan than liquid crystal displays or organic light-emitting displays. Furthermore, LEDs can be quickly switched on or off, have excellent luminous efficiency, high shock resistance, greater stability, and can display high-brightness images. [Summary of the Invention]

[0005] One object of the present invention is to provide a display device in which some light-emitting elements are aligned along a first direction and the remaining light-emitting elements are aligned along a second direction, such that even if the light-emitting elements are misaligned, at least some of the light-emitting elements will still operate normally. Another object of the present invention is to provide a method for manufacturing such a display device.

[0006] Another object of the present invention is to provide a display device and a method for manufacturing the same, wherein, despite the displacement and transfer of multiple light-emitting elements, one of a pair of sub-pixels displaying the same color can still display an image normally.

[0007] Another object of the present invention is to provide a display device and a method for manufacturing the same, wherein the display device is capable of assembling a plurality of light-emitting elements by controlling the alignment direction of these light-emitting elements.

[0008] The purpose of this invention is not limited to the purposes mentioned above, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0009] In one embodiment, the display device includes: a substrate having a plurality of pixels, each comprising a plurality of sub-pixels; a plurality of light-emitting elements located on the sub-pixels and each comprising one or more n-type electrodes and p-type electrodes; a first connecting electrode located on each of the light-emitting elements of the sub-pixels and comprising a recess overlapping one or more n-type electrodes; and a second connecting electrode located on each of the light-emitting elements of the sub-pixels and comprising a protrusion overlapping a p-type electrode. The recesses and protrusions extend along a first direction in each of the plurality of first subsets of the sub-pixels, and the recesses and protrusions extend along a second direction different from the first direction in each of the plurality of second subsets of the sub-pixels.

[0010] In another embodiment, each of these pixels comprises: a pair of first sub-pixels, comprising a first-first sub-pixel and a first-second sub-pixel; a pair of second sub-pixels, comprising a second-first sub-pixel and a second-second sub-pixel; and a pair of third sub-pixels, comprising a third-first sub-pixel and a third-second sub-pixel. The recess extends in different directions in the pair of first sub-pixels, the pair of second sub-pixels, and the pair of third sub-pixels.

[0011] In another state, the recess extends along a first direction in either the first-first sub-pixel or the first-second sub-pixel, the recess extends along a first direction in either the second-first sub-pixel or the second-second sub-pixel, and the recess extends along a first direction in either the third-first sub-pixel or the third-second sub-pixel.

[0012] In another configuration, the concave portion and the convex portion extend along a second direction in each of the first-first sub-pixel, the second-first sub-pixel and the third-first sub-pixel, and the concave portion and the convex portion extend along a first direction in each of the first-second sub-pixel, the second-second sub-pixel and the third-second sub-pixel.

[0013] In another embodiment, each of these light-emitting elements further comprises: an n-type semiconductor layer having a top surface on which n-type electrodes are disposed; a light-emitting layer located on the n-type semiconductor layer; and a p-type semiconductor layer located on the light-emitting layer and having a top surface on which p-type electrodes are disposed. In each of the plurality of subsets of these light-emitting elements, the top surface of the n-type semiconductor layer has an elliptical shape, and the n-type electrodes are disposed at two opposite ends of the top surface of the n-type semiconductor layer in the long axis direction.

[0014] In another embodiment, the short axis of the top surface of the n-type semiconductor layer of each of the subsets of light-emitting elements is arranged in the same direction as the expansion direction of the concave and convex portions corresponding to the subsets of light-emitting elements, and the long axis of the top surface of the n-type semiconductor layer of each of the subsets of light-emitting elements is arranged in a direction different from the expansion direction of the concave and convex portions corresponding to the subsets of light-emitting elements.

[0015] In another embodiment, the long axis of the top surface of the n-type semiconductor layer overlaps with the recesses and protrusions of the light-emitting elements extending in the first direction in these subsets of light-emitting elements and is disposed in the second direction.

[0016] In another embodiment, the display device further includes an insulating layer located between the light-emitting elements and the first connecting electrode, and between the light-emitting elements and the second connecting electrode. The insulating layer includes: a pair of first contact holes overlapping an n-type electrode and a first connecting electrode of each of the light-emitting elements; and a second contact hole overlapping a p-type electrode and a second connecting electrode of each of the light-emitting elements.

[0017] In another embodiment, the recess of the first connecting electrode is located between a pair of first contact holes, and the second contact hole overlaps the protrusion of the second connecting electrode.

[0018] In one embodiment, a method of manufacturing a display device includes: self-assembling a plurality of light-emitting elements on an assembly substrate on which a plurality of assembly electrodes are formed; transferring the light-emitting elements on the assembly substrate to a substrate; and transferring the light-emitting elements on the substrate to a plurality of sub-pixels of a display panel. Self-assembling the light-emitting elements includes: forming an electric field by applying a voltage to the assembly electrodes, and self-assembling the light-emitting elements on the assembly electrodes using the electric field.

[0019] In another embodiment, these assembled electrodes include: a plurality of first assembled electrodes extending along a first direction and including a first-first assembled electrode and a first-second assembled electrode; and a plurality of second assembled electrodes extending along the first direction and including a second-first assembled electrode disposed adjacent to the first-first assembled electrode and a second-second assembled electrode disposed adjacent to the first-second assembled electrode. The first-first assembled electrode and the second-first assembled electrode are arranged in an alternating manner, thereby forming a gap extending along the first direction between the first-first assembled electrode and the second-first assembled electrode. The first-second assembled electrode is configured to face the second-second assembled electrode, thereby forming a gap extending along a second direction perpendicular to the first direction between the first-second assembled electrode and the second-second assembled electrode.

[0020] In another embodiment, each of the plurality of subsets of these light-emitting elements comprises: an n-type semiconductor layer having a top surface having an elliptical shape; a pair of n-type electrodes located on the top surface of the n-type semiconductor layer at two opposite ends of the n-type semiconductor layer in the long axis direction; a light-emitting layer located on the n-type semiconductor layer; a p-type semiconductor layer located on the light-emitting layer; and a p-type electrode located on the p-type semiconductor layer. The self-assembly of these subsets of light-emitting elements comprises performing self-assembly such that one of the pair of n-type electrodes overlaps these first assembled electrodes, and the other of the pair of n-type electrodes overlaps these second assembled electrodes.

[0021] In another embodiment, a pair of n-type electrodes are aligned along a second direction in each of the plurality of light-emitting elements assembled on the first-first assembly electrode and the second-first assembly electrode, and a pair of n-type electrodes are aligned along a first direction in each of the subsets of light-emitting elements assembled on the first-second assembly electrode and the second-second assembly electrode.

[0022] In another state, the shape of each of these light-emitting elements corresponds to the shape of each of the plurality of holes in the assembly substrate.

[0023] In one embodiment, the display device includes: a substrate including a plurality of sub-pixels; a plurality of light-emitting elements located on the sub-pixels, each including one or more n-type electrodes and p-type electrodes; and a first connecting electrode and a second connecting electrode, the first connecting electrode overlapping one or more n-type electrodes, the second connecting electrode overlapping the p-type electrodes on each of the light-emitting elements, wherein the second connecting electrode overlaps the p-type electrodes in at least two of the sub-pixels along a plurality of different directions.

[0024] In another embodiment, the first connecting electrode and the second connecting electrode have a U-shaped shape for the first connecting electrode and the second connecting electrode to overlap the p-type electrodes on each of the light-emitting elements.

[0025] In another state, these sub-pixels are paired and the p-type electrodes in each of these specific pairs of sub-pixels overlap along one of a plurality of different directions.

[0026] In another state, the p-type electrodes in at least two adjacent sub-pixels overlap in the same direction.

[0027] In another state, the p-type electrodes in any two adjacent sub-pixels overlap in different directions.

[0028] In another state, these sub-pixels are paired, and the light-emitting elements on the sub-pixels of each pair of sub-pixels have the same number of n-type electrodes.

[0029] In another state, when a specific pair of sub-pixels has two n-type electrodes, the two n-type electrodes of the first sub-pixel of the specific pair are oriented along a first direction, and the two n-type electrodes of the second sub-pixel of the specific pair are oriented along a second direction different from the first direction.

[0030] In another state, the first direction and the second direction are different from one of the multiple different directions of the overlapping p-type electrodes in the first and second sub-pixels of these sub-pixels.

[0031] In another state, one or more n-type electrodes have either a circular or an elliptical shape.

[0032] In another embodiment, the display device further includes a light-emitting layer located between one or more n-type electrodes and p-type electrodes of each of these light-emitting elements.

[0033] In another state, one or more n-type electrodes are electrically connected to a p-type electrode. In another state, each of the one or more n-type electrodes has either a circular or an elliptical shape.

[0034] In another state, these light-emitting elements include a first light-emitting element, a second light-emitting element and a third light-emitting element.

[0035] In another state, the first light-emitting element has a circular shape.

[0036] In another state, the second light-emitting element and the third light-emitting element have an elliptical shape.

[0037] In another embodiment, the display device further includes: a driving transistor; and at least one insulating layer located on the driving transistor.

[0038] In another embodiment, at least one insulating layer includes a first insulating portion and a second insulating portion separated by the first connecting electrode.

[0039] In another embodiment, the display device further includes: an adhesive layer; and a planarization layer, wherein the adhesive layer and the planarization layer have a step-wise structure.

[0040] The effects of the present invention are not limited to the examples above, and many more effects are included in this specification.

Implementation Method

[0050] Various examples of the invention are discussed in detail below. While specific implementations are discussed, it should be understood that this is done for illustrative purposes only. Those skilled in the art will recognize that other components and configurations can be used without departing from the spirit and scope of the invention. Therefore, the following descriptions and figures are illustrative and should not be construed as limiting. Many specific details are described to provide a thorough understanding of the invention. However, in some cases, well-known or conventional details are not described to avoid obscuring the description. References to one or more embodiments in this invention may refer to the same embodiment or any of the embodiments; and such references refer to at least one of the plurality of embodiments.

[0051] The shapes, sizes, proportions, angles, quantities, etc., illustrated in the accompanying drawings, which are used to describe various exemplary embodiments of the present invention, are merely examples, and the present invention is not limited thereto. Similar symbols throughout the specification generally denote similar elements. Furthermore, in the following description of the present invention, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the spirit of the present invention. Unless used with the word "only," terms such as "comprising," "having," and "consisting of" as used herein are generally intended to allow for the addition of other components. Unless explicitly stated otherwise, singular references may include plurals.

[0052] Even if not explicitly described, the component is still interpreted as including a general error range.

[0053] When using terms such as “above,” “on top,” “below,” and “beside,” to describe the positional relationship between two parts, one or more parts may be placed between the two parts unless used with the terms “just” or “directly.”

[0054] When one element or layer is disposed on another element or layer, another layer or another element may be inserted between them or directly on the other element.

[0055] Although terms such as "first" and "second" are used to describe various components, these components are not limited to these terms. These terms are only used to distinguish one component from other components. Therefore, in the technical concept of the present invention, the first component to be mentioned below may be the second component.

[0056] Similar symbols throughout the specification usually represent similar components.

[0057] The dimensions and thicknesses of the components shown in the drawings are for ease of description, and the present invention is not limited to the dimensions and thicknesses of the components shown.

[0058] The features of various embodiments of the present invention can be partially or entirely coupled or combined with each other, and can be interlocked and operated in various technical ways, and these embodiments can be implemented independently or in association with each other.

[0059] The following will describe in detail, with reference to the accompanying drawings, a display device and a method of manufacturing the present invention according to several exemplary embodiments.

[0060] FIG1 is a schematic diagram of the configuration of a display device according to some aspects of the present invention. For ease of description, FIG1 only shows the display panel PN, gate drive unit GD, data drive unit DD and timing controller TC among the various constituent elements of the display device 100.

[0061] Please refer to FIG1. ​​The display device 100 includes: a display panel PN including a plurality of sub-pixels SP, a gate drive unit GD for supplying various types of signals to the display panel PN, and a timing controller TC for controlling the data drive unit DD and the gate drive unit GD.

[0062] The gate drive unit GD supplies multiple scan signals to multiple scan lines SL in response to multiple gate control signals provided from the timing controller TC. Figure 1 illustrates a gate drive unit GD configured to be separate from one side of the display panel PN. However, the number and arrangement of gate drive units GD are not limited thereto.

[0063] The data driver unit DD responds to multiple data control signals provided by the timing controller TC by using a reference gamma voltage to convert the image data input from the timing controller TC into a data voltage. The data driver unit DD can supply the converted data voltage to multiple data lines DL.

[0064] The timing controller TC sorts the externally input image data and supplies the image data sequentially to the data drive unit DD. The timing controller TC can generate gate control signals and data control signals by using synchronization signals such as point clock signals, data enable signals, and horizontal / vertical synchronization signals input from the outside. Furthermore, the timing controller TC can control the gate drive unit GD and the data drive unit DD by supplying the generated gate control signals and data control signals to the gate drive unit GD and the data drive unit DD.

[0065] The display panel PN is used to display images to the user and includes multiple sub-pixels SP. In the display panel PN, multiple scan lines SL and multiple data lines DL are interleaved, and each of these sub-pixels SP is connected to the scan lines SL and the data lines DL. In addition, although not shown in the figure, these sub-pixels SP can be connected to the high-potential power line VDD, the low-potential power line VDD, the reference line, etc., respectively.

[0066] The display panel PN may have a display area AA and a non-display area NA surrounding the display area AA.

[0067] The display area AA is the area on the display device 100 that displays images. The display area AA may include sub-pixels SP that constitute multiple pixels PX and circuitry for operating these sub-pixels SP. These sub-pixels SP are the smallest units constituting the display area AA. n sub-pixels SP can constitute one pixel PX. Each of these sub-pixels SP may be provided with a light-emitting element LED, a thin-film transistor for operating the light-emitting element LED, etc. These light-emitting elements LED may have different configurations depending on the type of display panel PN. For example, in the case of an inorganic light-emitting display panel PN, the light-emitting element LED may be a light-emitting diode (LED) or a micro light-emitting diode (micro LED).

[0068] Multiple signal lines for transmitting various types of signals to these sub-pixels SP are provided in the display area AA. For example, these signal lines may include: data lines DL for supplying data voltage to these sub-pixels SP and scan lines SL for supplying gate voltage to these sub-pixels SP. These scan lines SL may extend in one direction in the display area AA and be connected to these sub-pixels SP. These data lines DL may extend in the display area AA in a direction different from the stated one direction and be connected to these sub-pixels SP. Furthermore, low-potential power lines VDD, high-potential power lines VDD, etc., may be further provided in the display area AA. However, the present invention is not limited thereto.

[0069] The non-display area NA can be defined as an area where no image is displayed, that is, an area extending from the display area AA. The non-display area NA may include multiple pad electrodes and multiple connection lines for transmitting signals to the sub-pixels SP in the display area AA. Alternatively, the non-display area NA may include drive circuitry such as gate driver circuitry and data driver circuitry.

[0070] In some examples, the non-display area NA may be placed on the rear surface of the display panel PN, i.e., on the surface without sub-pixels SP. Alternatively, the non-display area NA may be excluded. However, the invention is not limited to the configuration illustrated in the figures.

[0071] In some examples, the gate driver GD, data driver DD, and timing controller TC can be connected to the display panel PN in various ways. For example, the gate driver GD can be mounted in the non-display area NA using the gate-in-on-board (GIP) method, or mounted between these sub-pixels SP in the display area AA using the gate-in-active area (GIA) method. For example, the data driver DD and timing controller TC can be formed on separate flexible films and printed circuit boards, and electrically connected to the display panel PN by bonding the flexible film and printed circuit board to pad electrodes formed in the non-display area NA of the display panel PN. When the gate driver GD is mounted using the GIP method and the data driver DD and timing controller TC transmit signals to the display panel PN via the pad electrodes in the non-display area NA, it is necessary to ensure that the area of ​​the non-display area NA is available for the gate driver GD and the pad electrodes, which may increase the bezel.

[0072] In some examples, the gate driver GD is mounted in the display area AA by the GIA method, and the side line SRL connecting the signal lines on the front surface of the display panel PN to the pad electrodes on the rear surface of the display panel PN is formed to bond the flexible film and the printed circuit board to the rear surface of the display panel PN. Therefore, the non-display area NA on the front surface of the display panel PN can be minimized. That is, when the gate driver GD, the data driver DD, and the timing controller TC are connected to the display panel PN by the method described above, a virtually bezel-less design can be implemented. This will be described in more detail with reference to Figures 2A and 2B.

[0073] FIG2A is a partial cross-sectional view of a display device according to some aspects of the present invention. FIG2B is a perspective view of a splicing display device according to some aspects of the present invention.

[0074] Multiple pad electrodes for transmitting various types of signals to these sub-pixels SP are disposed in the non-display area NA of the display panel PN. For example, a first pad electrode PAD1 for transmitting signals to these sub-pixels SP is disposed in the non-display area NA on the front surface of the display panel PN. A second pad electrode PAD2 electrically connected to a driving member such as a flexible film and a printed circuit board is disposed in the non-display area NA on the rear surface of the display panel PN.

[0075] In this case, although not shown in the figure, various types of signal lines, such as scan lines SL, data lines DL, etc., connected to these sub-pixels SP can extend from the display area AA to the non-display area NA and can be electrically connected to the first pad electrode PAD1.

[0076] Furthermore, a side line SRL is provided along the side surface of the display panel PN. The side line SRL is electrically connected to a first pad electrode PAD1 on the front surface of the display panel PN and a second pad electrode PAD2 on the rear surface of the display panel PN. Therefore, signals received from the driving members on the rear surface of the display panel PN can be transmitted to these sub-pixels SP via the second pad electrode PAD2, the side line SRL, and the first pad electrode PAD1. Thus, the signal transmission path is defined from the front surface to the side and rear surfaces of the display panel PN, which minimizes the area of ​​the non-display area NA of the display panel PN.

[0077] Furthermore, referring to FIG2B, a large-screen splicing display device TD can be implemented by connecting multiple display devices 100. In this case, as shown in FIG2A, when the splicing display device TD is implemented by using display devices 100 with minimized bezels, the seam (spacing) area between multiple display devices 100 where no image is displayed can be minimized, thereby improving display quality.

[0078] For example, these sub-pixels SP can constitute a pixel PX. The spacing D1 between the outermost periphery of a display device 100 and the outermost periphery of another display device 100 adjacent to the display device 100 can be implemented as equal to the spacing D1 between multiple pixels PX in a display device 100. Therefore, because a fixed spacing of multiple pixels PX is implemented between any two adjacent display devices 100 in the splicing display device TD, the seam area can be minimized.

[0079] As shown in Figures 2A and 2B, the display device 100 of various exemplary forms according to the present invention may be a general display device 100 with a border. However, the present invention is not limited thereto.

[0080] Figures 3 and 4 are enlarged top views of a display device according to some aspects of the present invention. Figures 5A to 5C are diagrams illustrating the light-emitting elements of a display device according to some aspects of the present invention. Figure 6 is a cross-sectional view of a display device according to some aspects of the present invention.

[0081] First, referring to Figure 3, the display panel PN includes multiple pixels PX, each having these sub-pixels SP. Each of these sub-pixels SP may include a light-emitting element LED and pixel circuitry and emit light independently. For example, the first sub-pixel SP1 may be a red sub-pixel SP, the second sub-pixel SP2 may be a green sub-pixel SP, and the third sub-pixel SP3 may be a blue sub-pixel SP. However, the present invention is not limited thereto.

[0082] A pixel PX may contain: subpixels SP including a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3. For example, the first subpixel SP1 includes a first-first subpixel SP1a and a first-second subpixel SP1b, the second subpixel SP2 includes a second-first subpixel SP2a and a second-second subpixel SP2b, and the third subpixel SP3 includes a third-first subpixel SP3a and a third-second subpixel SP3b. The first-first subpixel SP1a, the second-first subpixel SP2a, and the third-first subpixel SP3a may be set in the same column. The first-second subpixel SP1b, the second-second subpixel SP2b, and the third-second subpixel SP3b may be set in the same column.

[0083] The orientations of the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2 may be different between the first-first sub-pixel SP1a and the first-second sub-pixel SP1b, between the second-first sub-pixel SP2a and the second-second sub-pixel SP2b, and between the third-first sub-pixel SP3a and the third-second sub-pixel SP3b. In this case, even though the light-emitting elements LED are misaligned, the light-emitting elements LED can still be normally connected to the first connecting electrode CE1 and the second connecting electrode CE2 in at least one of the pair of sub-pixels SP. This will be described in more detail later with reference to Figures 7A to 7C.

[0084] According to a plurality of exemplary embodiments of the present invention and referring to FIG6, each of the sub-pixels SP of the display panel PN of the display device 100 may include a substrate 110, a buffer layer 111, a gate insulating layer 112, a first interlayer insulating layer 113, a second interlayer insulating layer 114, a first planarization layer 115, an adhesive layer 116, a second planarization layer 117, a third planarization layer 118, a driving transistor DT, a light-emitting element LED, a plurality of reflective electrodes RE, a plurality of first connection electrodes CE1, a second connection electrode CE2, a light blocking layer LS, and an auxiliary electrode LE.

[0085] According to some exemplary embodiments of the present invention, each sub-pixel SP may further include an insulating layer 119 on the driving transistor DT. The insulating layer 119 may further include a first insulating portion 119a and a second insulating portion 119b separated by the first connection electrodes CE1 and / or the second connection electrodes CE2. In some examples, each of the first insulating portion 119a and the second insulating portion 119b may cover (e.g., partially cover) the first connection electrodes CE1 and / or the second connection electrodes CE2.

[0086] According to some exemplary embodiments of the present invention, the adhesive layer 116 and the second planarization layer 117 may have a stepped structure (also referred to as a staircase structure). Such a structure can facilitate the manufacturing process of creating holes in the first connecting electrode CE1. Without a stepped structure, creating holes in the first connecting electrode CE1 is likely to cause the first connecting electrode CE1 to crack (break).

[0087] First, the substrate 110 is a component for supporting various constituent elements included in the display device 100, and may be made of an insulating material. For example, the substrate 110 may be made of glass, resin, etc. In addition, the substrate 110 may contain a plastic such as a polymer, and may be made of a flexible material.

[0088] A light blocking layer LS is disposed on each of these sub-pixels SP on the substrate 110. The light blocking layer LS blocks light from entering the active layer ACT of the driving transistor DT from the lower side of the substrate 110, as will be described below. The light blocking layer LS blocks light entering the active layer ACT of the driving transistor DT, thereby minimizing leakage current.

[0089] A buffer layer 111 is disposed on the substrate 110 and the light-blocking layer LS. The buffer layer 111 can reduce the penetration of moisture or impurities through the substrate 110. For example, the buffer layer 111 can be configured as a single-layer or multi-layer structure made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto. However, the buffer layer 111 can be excluded depending on the type of substrate 110 or the type of transistor. However, the present invention is not limited thereto.

[0090] The driving transistor DT is disposed on the buffer layer 111. The driving transistor DT includes an active layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0091] An active layer ACT is disposed on the buffer layer 111. The active layer ACT may be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon. However, the present invention is not limited thereto.

[0092] A gate insulating layer 112 is disposed on the active layer ACT. The gate insulating layer 112 is an insulating layer that insulates the active layer ACT and the gate electrode GE. The gate insulating layer 112 may be configured as a single-layer or multi-layer structure made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto.

[0093] The gate electrode GE is disposed on the gate insulating layer 112. The gate electrode GE may be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys of the above metals. However, the present invention is not limited thereto.

[0094] A first interlayer insulating layer 113 and a second interlayer insulating layer 114 are disposed on the gate electrode GE. Contact holes are formed in the first interlayer insulating layer 113 and the second interlayer insulating layer 114, and the source electrode SE and the drain electrode DE are connected to the active layer ACT via the contact holes. The first interlayer insulating layer 113 and the second interlayer insulating layer 114 may be insulating layers used to protect the lower portion of the first interlayer insulating layer 113 and the lower portion of the second interlayer insulating layer 114, and each may be configured as a single-layer or multi-layer structure made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the present invention is not limited thereto.

[0095] The source electrode SE and the drain electrode DE are disposed on the second interlayer insulating layer 114 and electrically connected to the active layer ACT. The source electrode SE and the drain electrode DE may each be made of conductive materials such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys of the above metals. However, the present invention is not limited thereto.

[0096] The above description provides an exemplary configuration in which a first interlayer insulating layer 113 and a second interlayer insulating layer 114 (i.e., multiple insulating layers) are disposed between the gate electrode GE, the source electrode SE, and the drain electrode DE. In other non-limiting examples, only one insulating layer may be disposed between the gate electrode GE, the source electrode SE, and the drain electrode DE. However, the present invention is not limited thereto.

[0097] Furthermore, as illustrated in the figure, when multiple insulating layers (e.g., the first interlayer insulating layer 113 and the second interlayer insulating layer 114) are disposed between the gate electrode GE, the source electrode SE, and the drain electrode DE, an additional electrode can be formed between the first interlayer insulating layer 113 and the second interlayer insulating layer 114. The additionally formed electrode can define a capacitor together with other components disposed on the lower portion of the first interlayer insulating layer 113 or the upper portion of the second interlayer insulating layer 114.

[0098] An auxiliary electrode LE is disposed on the gate insulating layer 112. The auxiliary electrode LE is an electrode that electrically connects the light blocking layer LS disposed below the buffer layer 111 to either the source electrode SE or the drain electrode DE on the second interlayer insulating layer 114. For example, the light blocking layer LS can be electrically connected to either the source electrode SE or the drain electrode DE via the auxiliary electrode LE, thereby not operating with a floating gate, thereby minimizing the change in the critical voltage of the driving transistor DT caused by the floating light blocking layer LS. The figure illustrates the light blocking layer LS connected to the source electrode SE. However, the light blocking layer LS can be connected to the drain electrode DE. However, the present invention is not limited thereto.

[0099] The power line VDD is disposed on the second interlayer insulating layer 114. The power line VDD can be electrically connected to the light-emitting element LED together with the driving transistor DT, and allows the light-emitting element LED to emit light. The power line VDD can be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys of the above metals. However, the present invention is not limited thereto.

[0100] A first planarization layer 115 is disposed on the driving transistor DT and the power line VDD. The first planarization layer 115 can planarize the upper portion of the substrate 110 on which the driving transistor DT is disposed. For example, the first planarization layer 115 may be configured as a single-layer or multi-layer structure made of photoresist or acrylic-based organic material. However, the present invention is not limited thereto.

[0101] A plurality of mutually separated reflective electrodes RE are disposed on the first planarization layer 115. These reflective electrodes RE can be used to electrically connect the light-emitting element LED to the power line VDD and the driving transistor DT, and serve as reflectors that reflect light emitted from the light-emitting element LED to the upper part of the light-emitting element LED. These reflective electrodes RE can each be made of a conductive material with excellent reflective properties, and reflect light emitted from the light-emitting element LED toward the upper part of the light-emitting element LED.

[0102] These reflective electrodes RE include a first reflective electrode RE1 and a second reflective electrode RE2. The first reflective electrode RE1 can be electrically connected to the driving transistor DT and the light-emitting element LED. The first reflective electrode RE1 can be connected to the source electrode SE or drain electrode DE of the driving transistor DT via a contact hole formed in the first planarization layer 115. Furthermore, the first reflective electrode RE1 can be electrically connected to the first electrode and the first semiconductor layer of the light-emitting element LED via the first connection electrode CE1, which will be described below.

[0103] The second reflective electrode RE2 can be electrically connected to the power line VDD and the light-emitting element LED. The second reflective electrode RE2 can be connected to the power line VDD through a contact hole formed in the first planarization layer 115, and can be electrically connected to the second electrode and the second semiconductor layer of the light-emitting element LED through the second connection electrode CE2, which will be described below.

[0104] An adhesive layer 116 is disposed on these reflective electrodes RE. The front surface of the substrate 110 may be coated with the adhesive layer 116, and the adhesive layer 116 may fix the light-emitting element LED disposed on the adhesive layer 116. For example, the adhesive layer 116 may be made of any material selected from adhesive polymers, epoxy resins, UV resins, polyimide-based materials, acrylic-based materials, urethane-based materials, and polydimethylsiloxane (PDMS). However, the present invention is not limited thereto.

[0105] These light-emitting elements (LEDs) are provided on the adhesive layer 116 and disposed on each of the sub-pixels SP. These light-emitting elements (LEDs) can be elements for emitting light by using an electric current, and include LEDs for emitting red light, green light, blue light, etc. These light-emitting elements (LEDs) can implement various colors of light, including white, by using combinations of red light, green light, blue light, etc. For example, these light-emitting elements (LEDs) can each be a light-emitting diode (LED) or a miniature light-emitting diode. However, the present invention is not limited thereto.

[0106] Please refer to Figures 5A to 5C. These light-emitting elements (LEDs) include a first light-emitting element 120, a second light-emitting element 130, and a third light-emitting element 140. The first light-emitting element 120 may be disposed on a first sub-pixel SP1, the second light-emitting element 130 may be disposed on a second sub-pixel SP2, and the third light-emitting element 140 may be disposed on a third sub-pixel SP3. For example, the first light-emitting element 120 may be a red light-emitting element (LED), the second light-emitting element 130 may be a green light-emitting element (LED), and the third light-emitting element 140 may be a blue light-emitting element (LED).

[0107] Please refer to Figures 5A and 6. The first light-emitting element 120 includes a first n-type semiconductor layer 121, a first light-emitting layer 122, a first p-type semiconductor layer 123, a first n-type electrode 124, a first p-type electrode 125, and a first sealing film 126.

[0108] A first n-type semiconductor layer 121 is disposed on the adhesive layer 116, and a first p-type semiconductor layer 123 is disposed on the first n-type semiconductor layer 121. The first n-type semiconductor layer 121 and the first p-type semiconductor layer 123 may each be a layer formed from a specific material doped with n-type and p-type impurities. For example, the first n-type semiconductor layer 121 and the first p-type semiconductor layer 123 may each be a layer formed from a material doped with n-type and p-type impurities, such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs). Furthermore, the p-type impurity may be magnesium, zinc (Zn), beryllium (Be), etc. The n-type impurity may be silicon (Si), germanium, tin (Sn), etc. However, the present invention is not limited thereto.

[0109] A first light-emitting layer 122 is disposed between a first n-type semiconductor layer 121 and a first p-type semiconductor layer 123. The first light-emitting layer 122 can emit light by receiving positively charged holes and electrons from the first n-type semiconductor layer 121 and the first p-type semiconductor layer 123. The first light-emitting layer 122 can be configured as a single-layer bulk or a multiple quantum well (MQW) structure. For example, the first light-emitting layer 122 can be made of indium gallium nitride (InGaN), gallium nitride (GaN), etc. However, the present invention is not limited thereto.

[0110] A first n-type electrode 124 is disposed on a first n-type semiconductor layer 121. The first n-type electrode 124 is an electrode electrically connecting the driving transistor DT and the first n-type semiconductor layer 121. The first n-type electrode 124 may be disposed on the top surface of the first n-type semiconductor layer 121 exposed from the first light-emitting layer 122 and the first p-type semiconductor layer 123. For example, the first n-type electrode 124 may be disposed around the top surface of the first n-type semiconductor layer 121 and has a circular planar shape. The first n-type electrode 124 may be made of a conductive material, such as a transparent conductive material of indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material of titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0111] A first p-type electrode 125 is disposed on a first p-type semiconductor layer 123. The first p-type electrode 125 may be disposed on the top surface of the first p-type semiconductor layer 123. The first p-type electrode 125 is an electrode electrically connected to the power supply line VDD and the first p-type semiconductor layer 123. The first p-type electrode 125 may be made of a conductive material, such as: a transparent conductive material of indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material of titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0112] Next, the first sealing film 126 is configured to surround the first n-type semiconductor layer 121, the first light-emitting layer 122, the first p-type semiconductor layer 123, the first n-type electrode 124, and the first p-type electrode 125. The first sealing film 126 may be made of an insulating material and protects the first n-type semiconductor layer 121, the first light-emitting layer 122, and the first p-type semiconductor layer 123. Furthermore, contact holes may be formed in the first sealing film 126, through which the first n-type electrode 124 and the first p-type electrode 125 are exposed, so that the first connecting electrode CE1, the second connecting electrode CE2, the first n-type electrode 124, and the first p-type electrode 125 can be electrically connected.

[0113] Please refer to Figure 5B. The second light-emitting element 130 includes a second n-type semiconductor layer 131, a second light-emitting layer 132, a second p-type semiconductor layer 133, a second n-type electrode 134, a second p-type electrode 135, and a second sealing film 136.

[0114] A second n-type semiconductor layer 131 is disposed on the adhesive layer 116, and a second p-type semiconductor layer 133 is disposed on the second n-type semiconductor layer 131. The second n-type semiconductor layer 131 and the second p-type semiconductor layer 133 may each be a layer formed from a specific material doped with n-type and p-type impurities. For example, the second n-type semiconductor layer 131 and the second p-type semiconductor layer 133 may each be a layer formed from a material doped with n-type and p-type impurities, such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs). Furthermore, the p-type impurity may be magnesium, zinc (Zn), beryllium (Be), etc. The n-type impurity may be silicon (Si), germanium, tin (Sn), etc. However, the present invention is not limited thereto.

[0115] A second light-emitting layer 132 is disposed between a second n-type semiconductor layer 131 and a second p-type semiconductor layer 133. The second light-emitting layer 132 can emit light by receiving positively charged holes and electrons from the second n-type semiconductor layer 131 and the second p-type semiconductor layer 133. The second light-emitting layer 132 can be configured as a single-layer bulk or a multiple quantum well (MQW) structure. For example, the second light-emitting layer 132 can be made of indium gallium nitride (InGaN), gallium nitride (GaN), etc. However, the present invention is not limited thereto.

[0116] One or more second n-type electrodes 134 are disposed on the second n-type semiconductor layer 131. The second n-type electrodes 134 are electrodes electrically connected to the driving transistor DT and the second n-type semiconductor layer 131. The second n-type electrodes 134 may be disposed on the top surface of the second n-type semiconductor layer 131 exposed from the second light-emitting layer 132 and the second p-type semiconductor layer 133. For example, the second n-type electrodes 134 may be disposed adjacent to two opposite ends of the top surface of the second n-type semiconductor layer 131 based on the long axis direction of the top surface of the second n-type semiconductor layer 131 having an elliptical planar shape. The second n-type electrodes 134 may be made of a conductive material, such as: a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0117] A second p-type electrode 135 is disposed on a second p-type semiconductor layer 133. The second p-type electrode 135 may be disposed on the top surface of the second p-type semiconductor layer 133. The second p-type electrode 135 is an electrode electrically connected to the power supply line VDD and the second p-type semiconductor layer 133. The second p-type electrode 135 may be made of a conductive material, such as: a transparent conductive material of indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material of titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0118] Next, the second sealing film 136 is configured to surround the second n-type semiconductor layer 131, the second light-emitting layer 132, the second p-type semiconductor layer 133, the second n-type electrode 134, and the second p-type electrode 135. The second sealing film 136 may be made of an insulating material and protects the second n-type semiconductor layer 131, the second light-emitting layer 132, and the second p-type semiconductor layer 133. Furthermore, contact holes may be formed in the second sealing film 136, through which the second n-type electrode 134 and the second p-type electrode 135 are exposed, so that the second connecting electrode CE2, the second n-type electrode 134, and the second p-type electrode 135 can be electrically connected.

[0119] Please refer to Figure 5C. The third light-emitting element 140 includes a third n-type semiconductor layer 141, a third light-emitting layer 142, a third p-type semiconductor layer 143, a third n-type electrode 144, a third p-type electrode 145, and a third sealing film 146.

[0120] A third n-type semiconductor layer 141 is disposed on the adhesive layer 116, and a third p-type semiconductor layer 143 is disposed on the third n-type semiconductor layer 141. The third n-type semiconductor layer 141 and the third p-type semiconductor layer 143 may each be a layer formed from a specific material doped with n-type and p-type impurities. For example, the third n-type semiconductor layer 141 and the third p-type semiconductor layer 143 may each be a layer formed from a material doped with n-type and p-type impurities, such as gallium nitride (GaN), indium aluminum phosphide (InAlP), or gallium arsenide (GaAs). Furthermore, the p-type impurity may be magnesium, zinc (Zn), beryllium (Be), etc. The n-type impurity may be silicon (Si), germanium, tin (Sn), etc. However, the present invention is not limited thereto.

[0121] A third light-emitting layer 142 is disposed between a third n-type semiconductor layer 141 and a third p-type semiconductor layer 143. The third light-emitting layer 142 can emit light by receiving positively charged holes and electrons from the third n-type semiconductor layer 141 and the third p-type semiconductor layer 143. The third light-emitting layer 142 can be configured as a single-layer bulk or a multiple quantum well (MQW) structure. For example, the third light-emitting layer 142 can be made of indium gallium nitride (InGaN), gallium nitride (GaN), etc. However, the present invention is not limited thereto.

[0122] A third n-type electrode 144 is disposed on a third n-type semiconductor layer 141. The third n-type electrode 144 is an electrode electrically connecting the driving transistor DT and the third n-type semiconductor layer 141. The third n-type electrode 144 may be disposed on the top surface of the third n-type semiconductor layer 141 exposed from the third light-emitting layer 142 and the third p-type semiconductor layer 143. For example, the third n-type electrode 144 may be disposed adjacent to two opposite ends of the top surface of the third n-type semiconductor layer 141 based on the long axis direction of the top surface of the third n-type semiconductor layer 141 having an elliptical planar shape. The third n-type electrode 144 may be made of a conductive material, such as: a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material such as titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0123] A third p-type electrode 145 is disposed on a third p-type semiconductor layer 143. The third p-type electrode 145 may be disposed on the top surface of the third p-type semiconductor layer 143. The third p-type electrode 145 is an electrode electrically connecting the power supply line VDD and the third p-type semiconductor layer 143. The third p-type electrode 145 may be made of a conductive material, such as: a transparent conductive material of indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductive material of titanium (Ti), gold (Au), silver (Ag), copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0124] Next, a third sealing film 146 is configured to surround the third n-type semiconductor layer 141, the third light-emitting layer 142, the third p-type semiconductor layer 143, the third n-type electrode 144, and the third p-type electrode 145. The third sealing film 146 may be made of an insulating material and protects the third n-type semiconductor layer 141, the third light-emitting layer 142, and the third p-type semiconductor layer 143. Furthermore, contact holes may be formed in the third sealing film 146, through which the third n-type electrode 144 and the third p-type electrode 145 are exposed, so that the third connecting electrode, the second connecting electrode CE2, the third n-type electrode 144, and the third p-type electrode 145 can be electrically connected.

[0125] Meanwhile, the first light-emitting element 120, the second light-emitting element 130, and the third light-emitting element 140 may have different shapes. These light-emitting elements (LEDs) may each collectively include n-type semiconductor layers 121, 131, 141, light-emitting layers 122, 132, 142, p-type semiconductor layers 123, 133, 143, n-type electrodes 124, 134, 144, p-type electrodes 125, 135, 145, and sealing films 126, 136, 146. However, the shapes of some components of these light-emitting elements (LEDs) may differ from each other.

[0126] For example, the planar shapes of the first n-type semiconductor layer 121, the first light-emitting layer 122, the second p-type semiconductor layer 133, the first n-type electrode 124, and the first p-type electrode 125 of the first light-emitting element 120 can be circular. Among these components, the first n-type electrode 124 can be configured as a circular electrode with a closed-loop shape disposed around the first n-type semiconductor layer 121. The first p-type electrode 125 can have a shape corresponding to the top surface of the first p-type semiconductor layer 123.

[0127] For example, the planar shape of the second n-type semiconductor layer 131, the second p-type semiconductor layer 133, and the second p-type electrode 135 of the second light-emitting element 130 can be elliptical. In this case, the major axis direction of the second n-type semiconductor layer 131 can be different from the major axis direction of the second p-type semiconductor layer 133. For example, when the second n-type semiconductor layer 131 has an elliptical shape with a major axis in the horizontal direction, the second p-type semiconductor layer 133 can have an elliptical shape with a major axis in the vertical direction. Furthermore, a plurality of second n-type electrodes 134 can be respectively disposed at two opposite ends of the second n-type semiconductor layer 131 based on the major axis direction on the top surface of the second n-type semiconductor layer 131. Therefore, these second n-type electrodes 134 disposed at the two opposite ends of the second n-type semiconductor layer 131 can each have a semi-circular shape. Finally, the second p-type electrode 135 can have an elliptical shape like the top surface of the second p-type semiconductor layer 133.

[0128] In some examples, the planar shape of the third n-type semiconductor layer 141, the third p-type semiconductor layer 143, and the third p-type electrode 145 of the third light-emitting element 140 may be elliptical. Unlike the second light-emitting element 130, in the third light-emitting element 140, the major axis direction of the third n-type semiconductor layer 141 may be the same as the major axis direction of the third p-type semiconductor layer 143. The third n-type electrode 144 may be disposed at two opposite ends of the third n-type semiconductor layer 141 based on the major axis direction on the top surface of the third n-type semiconductor layer 141. The third n-type electrode 144 may have a semi-circular shape. Furthermore, the third p-type electrode 145 may have an elliptical shape, similar to the top surface of the third p-type semiconductor layer 143.

[0129] In the various exemplary display devices 100 according to the present invention, the first light-emitting element 120, the second light-emitting element 130, and the third light-emitting element 140 may have different shapes, thereby distinguishing these light-emitting elements LED. For example, during the manufacturing process of self-assembling the light-emitting elements LED, these light-emitting elements LED may be formed in different shapes, such that these light-emitting elements LED can self-assemble at positions respectively corresponding to these sub-pixels SP. However, the shapes of these light-emitting elements LED are exemplary, and the present invention is not limited thereto.

[0130] Referring back to Figure 6, the second planarization layer 117 and the third planarization layer 118 are disposed on the adhesive layer 116. The second planarization layer 117 may partially overlap the side surfaces of the light-emitting elements (LEDs) and fix and protect them. The third planarization layer 118 may be formed to cover the upper portion of the second planarization layer 117 and the upper portion of the light-emitting elements (LEDs), and has contact holes through which the n-type electrodes 124, 134, 144 and p-type electrodes 125, 135, 145 of the light-emitting elements (LEDs) are exposed. The n-type electrodes 124, 134, 144 and p-type electrodes 125, 135, 145 of the light-emitting elements (LEDs) may be exposed from the third planarization layer 118. The third planarization layer 118 may be partially disposed in the region between the n-type electrodes 124, 134, 144 and the p-type electrodes 125, 135, 145, thereby minimizing short-circuit defects. For example, the second planarization layer 117 and the third planarization layer 118 may each be configured as a monolayer or multilayer structure made of a photoresist or an acrylic-based organic material. However, the present invention is not limited thereto. The above exemplary embodiments describe a configuration in which the second planarization layer 117 and the third planarization layer 118 are provided. However, the planarization layer may be configured as a monolayer structure. However, the present invention is not limited thereto.

[0131] These first connecting electrodes CE1 and second connecting electrodes CE2 may be disposed on the third planarization layer 118.

[0132] These first connection electrodes CE1 are electrodes respectively disposed on these sub-pixels SP and electrically connected to the light-emitting elements LED and the driving transistor DT. The first connection electrodes CE1 can be connected to the first reflective electrode RE1 through contact holes formed in the third planarization layer 118, the second planarization layer 117 and the adhesive layer 116. Therefore, the first connection electrodes CE1 can be electrically connected to either the source electrode SE or the drain electrode DE of the driving transistor DT through the first reflective electrode RE1. Furthermore, the first connection electrodes CE1 can be connected to the n-type electrodes 124, 134, and 144 of these light-emitting elements LED through contact holes formed in the third planarization layer 118. Therefore, these first connection electrodes CE1 can be electrically connected to the driving transistor DT and the n-type electrodes 124, 134, 144 and n-type semiconductor layers 121, 131, and 141 of these light-emitting elements LED.

[0133] The second connection electrode CE2 is an electrode electrically connected to the light-emitting element LED and the power line VDD. The second connection electrode CE2 can be connected to the second reflective electrode RE2 through contact holes formed in the third planarization layer 118, the second planarization layer 117, and the adhesive layer 116. Therefore, the second connection electrode CE2 can be electrically connected to the power line VDD through the second reflective electrode RE2. Furthermore, these second connection electrodes CE2 can be connected to the p-type electrodes 125, 135, and 145 of these light-emitting elements LED through contact holes formed in the third planarization layer 118. Therefore, these second connection electrodes CE2 can be electrically connected to the power line VDD and the p-type electrodes 125, 135, and 145 and p-type semiconductor layers 123, 133, and 143 of these light-emitting elements LED.

[0134] In some examples, the first connection electrode CE1 connecting the light-emitting element LED and the driving transistor DT disposed on each of these sub-pixels SP can be independently disposed on each of these sub-pixels SP. Furthermore, the second connection electrodes CE2 disposed on each of these sub-pixels SP and connecting the power line VDD and the light-emitting element LED can be connected to each other. That is, since the power supply voltage of the power line VDD is commonly applied to all the light-emitting elements LED of these sub-pixels SP, one second connection electrode CE2 can be disposed on all sub-pixels SP.

[0135] Referring to Figures 3 and 4, recesses CE1a and CE1b are formed at positions corresponding to p-type electrodes 125, 135, and 145, such that the first connection electrode CE1 of these sub-pixels SP can be connected only to the n-type electrodes 124, 134, and 144 of the light-emitting elements LED, and not to the p-type electrodes 125, 135, and 145. The recesses CE1a and CE1b of the first connection electrode CE1 can overlap the p-type electrodes 125, 135, and 145 of these light-emitting elements LED. Furthermore, the second connection electrode CE2 includes protrusions CE2a and CE2b extending inward toward the recesses CE1a and CE1b, and is electrically connected to the p-type electrodes 125, 135, and 145 of these light-emitting elements LED. The protrusions CE2a and CE2b of the second connection electrode CE2 can overlap the p-type electrodes 125, 135, and 145 of these light-emitting elements LED.

[0136] In this case, the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2 can be provided along either the first direction DR1 or the second direction DR2. The recesses CE1a and CE1b of the first connecting electrode CE1 include a first recess CE1a provided along the first direction DR1 and a second recess CE1b provided along the second direction DR2. The protrusions CE2a and CE2b of the second connecting electrode CE2 include a first protrusion CE2a provided along the first direction DR1 and a second protrusion CE2b provided along the second direction DR2. Therefore, the first recess CE1a and the first protrusion CE2a extending along the first direction DR1 can be provided together on a sub-pixel SP. The second recess CE1b and the second protrusion CE2b extending along the second direction DR2, which is different from the first direction DR1, can be provided together on another sub-pixel SP.

[0137] Specifically, the concave portions CE1a and CE1b and the convex portions CE2a and CE2b can be arranged in different directions on the two first sub-pixels SP1. Similarly, the concave portions CE1a and CE1b and the convex portions CE2a and CE2b can be arranged in different directions on a pair of second sub-pixels SP2 and a pair of third sub-pixels SP3.

[0138] For example, please refer to Figure 3. The second concave portion CE1b and the second convex portion CE2b can be disposed on the first-first sub-pixel SP1a, the second-first sub-pixel SP2a and the third-first sub-pixel SP3a, and the first concave portion CE1a and the first convex portion CE2a can be disposed on the first-second sub-pixel SP1b, the second-second sub-pixel SP2b and the third-second sub-pixel SP3b.

[0139] For example, please refer to Figure 4. The second concave portion CE1b and the second convex portion CE2b can be disposed on the first-first sub-pixel SP1a, the second-second sub-pixel SP2b and the third-first sub-pixel SP3a, and the first concave portion CE1a and the first convex portion CE2a can be disposed on the first-second sub-pixel SP1b, the second-first sub-pixel SP2a and the third-second sub-pixel SP3b.

[0140] Furthermore, the two second light-emitting elements 130 and the two third light-emitting elements 140, each having an elliptical n-type semiconductor layer 131, 141 disposed on a pixel PX, can be disposed in different directions. The placement directions of the recesses CE1a, CE1b and the convex portions CE2a, CE2b can be determined according to the placement directions of the second light-emitting elements 130 and the third light-emitting elements 140.

[0141] For example, referring to FIG3, in the second-first sub-pixel SP2a and the third-first sub-pixel SP3a, which include the second recess CE1b and the second convex portion CE2b extending along the second direction DR2, the second light-emitting element 130 and the third light-emitting element 140 can be configured such that the short axis of the top surface of the n-type semiconductor layers 131 and 141 can be set along the second direction DR2, and the long axis of the top surface of the n-type semiconductor layers 131 and 141 can be set along the first direction DR1. In the second-second sub-pixel SP2b and the third-second sub-pixel SP3b, which include the first recess CE1a and the first convex portion CE2a extending along the first direction DR1, the second light-emitting element 130 and the third light-emitting element 140 can be configured such that the short axis of the top surface of the n-type semiconductor layers 131 and 141 can be set along the first direction DR1, and the long axis of the top surface of the n-type semiconductor layers 131 and 141 can be set along the second direction DR2. Therefore, in the top surface of the n-type semiconductor layers 131 and 141 with elliptical shapes, the short axis can be set in the same direction as the expansion direction of the recesses CE1a and CE1b and the convexes CE2a and CE2b, and the long axis can be set in a direction different from the expansion direction of the recesses CE1a and CE1b and the convexes CE2a and CE2b.

[0142] In some examples, in the display device 100 of various exemplary forms according to the present invention, the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2 may be arranged in different directions in each of these sub-pixels SP. Therefore, even if the light-emitting elements LED are displaced and transferred in any direction, the light-emitting elements LED, the first connecting electrode CE1 and the second connecting electrode CE2 can still be connected in at least one sub-pixel SP. This configuration will be described with reference to Figures 7A to 7C.

[0143] Figures 7A to 7C are top plan views illustrating the connection relationship between the first connecting electrode, the second connecting electrode, and the light-emitting element in a display device according to some embodiments of the present invention, based on the shifting position of the light-emitting element. Figure 7A is a top plan view of the second sub-pixel SP2 when the light-emitting element LED has shifted to a specific position. Figure 7B is a top plan view of the second sub-pixel SP2 when the light-emitting element LED has shifted along the first direction DR1. Figure 7C is a top plan view of the second sub-pixel SP2 when the light-emitting element LED has shifted along the second direction DR2. For ease of description, Figures 7A to 7C illustrate multiple top plan views of the second sub-pixels SP2. However, substantially similar to the second sub-pixels SP2, in the first sub-pixels SP1 and the third sub-pixels SP3, the first connecting electrode CE1 and the second connecting electrode CE2 may be connected to the light-emitting element LED.

[0144] Referring to FIG7A, when the second light-emitting element 130 is moved to a specific position, the second n-type electrode 134 can be configured to correspond to the first contact hole CH1 and the first connecting electrode CE1, and the second p-type electrode 135 can be configured to correspond to the protrusions CE2a, CE2b and the second contact hole CH2 of the second connecting electrode CE2. In this case, the first contact hole CH1 and the second contact hole CH2 are the contact holes of the third planarization layer 118 shown in FIG6, and can be configured to correspond to the second n-type electrode 134 and the second p-type electrode 135. The size of the second contact hole CH2 can be larger than the size of the second p-type electrode 135. The size of the second contact hole CH2 can be larger than the size of the portion of the second p-type electrode 135 exposed from the second sealing film 136. The second n-type electrode 134 can be electrically connected to the first connecting electrode CE1 via the first contact hole CH1, and the second p-type electrode 135 can be electrically connected to the second connecting electrode CE2 via the second contact hole CH2. Therefore, when the second light-emitting element 130 is moved to the exact position, the second light-emitting element 130 can be normally connected to the first connecting electrode CE1 and the second connecting electrode CE2 in both the second-first sub-pixel SP2a and the second-second sub-pixel SP2b.

[0145] Referring to FIG7B, during the process of transferring the light-emitting element LED onto the adhesive layer 116, alignment errors may occur, and the light-emitting element LED may be displaced from its exact position along the first direction DR1. In the case of the second light-emitting element 130 being displaced along the first direction DR1, the second n-type electrode 134 and the second p-type electrode 135 of the second light-emitting element 130, a portion of the first contact hole CH1 and a portion of the second contact hole CH2 may be misaligned with each other. However, in the recesses CE1a, CE1b and the protrusions CE2a, CE2b extending in the same direction as the displacement direction of the second light-emitting element 130, at least a portion of the first contact hole CH1 and at least a portion of the second contact hole CH2 can overlap the second n-type electrode 134 and the second p-type electrode 135 of the second light-emitting element 130, and electrically connect the first connecting electrode CE1 and the second connecting electrode CE2 to the second light-emitting element 130.

[0146] For example, a second recess CE1b and a second protrusion CE2b extending along the second direction DR2 are disposed in the second-first sub-pixel SP2a. In this case, when the second light-emitting element 130 is displaced along the first direction DR1, the positions of the first contact hole CH1, the second contact hole CH2, the second n-type electrode 134, and the second p-type electrode 135 will not be aligned, making it impossible for the second light-emitting element 130 to be connected to the first connecting electrode CE1 and the second connecting electrode CE2.

[0147] However, the first recess CE1a and the first protrusion CE2a extending along the first direction DR1 are disposed in the second-second sub-pixel SP2b, so that the second light-emitting element 130, the first connecting electrode CE1, and the second connecting electrode CE2 can be electrically connected. Because the first protrusion CE2a extending along the first direction DR1 and the second contact hole CH2 are disposed in the second-second sub-pixel SP2b, the second p-type electrode 135 and the second contact hole CH2 of the second light-emitting element 130 can still overlap each other even if the second light-emitting element 130 is partially displaced along the first direction DR1. Furthermore, because the size of the second contact hole CH2 is larger than the size of the second p-type electrode 135, the second p-type electrode 135 can still be easily exposed in the area of ​​the second contact hole CH2 even if the second p-type electrode 135 is partially displaced. Because the first contact holes CH1 disposed on the two opposite sides of the first recess CE1a also extend along the first direction DR1, at least a portion of the second n-type electrode 134 of the second light-emitting element 130 can overlap the first contact hole CH1. Therefore, in the second-second sub-pixel SP2b having a first recess CE1a and a first convex portion CE2a extending in the same direction as the displacement direction of the second light-emitting element 130, the second light-emitting element 130, the first connecting electrode CE1 and the second connecting electrode CE2 can be connected.

[0148] Referring to FIG7C, during the process of transferring the light-emitting element LED, alignment errors may occur, and the light-emitting element LED may be displaced from its exact position along the second direction DR2. In this case, in the recesses CE1a, CE1b and the protrusions CE2a, CE2b extending in the same direction as the displacement direction of the second light-emitting element 130, at least a portion of the first contact hole CH1 and at least a portion of the second contact hole CH2 may overlap the second n-type electrode 134 and the second p-type electrode 135 of the second light-emitting element 130, and electrically connect the first connecting electrode CE1 and the second connecting electrode CE2 to the second light-emitting element 130.

[0149] For example, a second recess CE1b and a second convex portion CE2b extending along the second direction DR2 are disposed in the second-first sub-pixel SP2a. Because the second convex portion CE2b and the second contact hole CH2 are disposed while extending along the second direction DR2, at least a portion of the second contact hole CH2 and the second p-type electrode 135 of the second light-emitting element 130 can still overlap each other even though the second light-emitting element 130 is displaced along the second direction DR2. Because the first contact hole CH1 also extends along the second direction DR2, at least a portion of the second n-type electrode 134 of the second light-emitting element 130 can overlap the first contact hole CH1. Therefore, in the second-first sub-pixel SP2a having a second recess CE1b and a second convex portion CE2b extending in the same direction as the displacement direction of the second light-emitting element 130, the second light-emitting element 130, the first connecting electrode CE1, and the second connecting electrode CE2 can be normally connected.

[0150] Conversely, since the first recess CE1a and the first convex portion CE2a provided along the first direction DR1 are provided in the second-second sub-pixel SP2b, the second light-emitting element 130 displaced along the second direction DR2 may not be aligned with the first contact hole CH1 and the second contact hole CH2.

[0151] Therefore, in the display device 100 according to various exemplary embodiments of the present invention, even though the light-emitting elements LED are not aligned, the light-emitting elements LED, the first connecting electrode CE1, and the second connecting electrode CE2 are still connected, and the image can be normally displayed in at least one of a pair of sub-pixels SP displaying the same color. For example, the first protrusion CE2a of the second connecting electrode CE2 and the first concave portion CE1a of the first connecting electrode CE1 can extend along the first direction DR1 and are connected to the light-emitting element LED displaced along the first direction DR1. Furthermore, the second protrusion CE2b of the second connecting electrode CE2 and the second concave portion CE1b of the first connecting electrode CE1 can extend along the second direction DR2 and are connected to the light-emitting element LED displaced along the second direction DR2. Therefore, in each of the pair of sub-pixels SP displaying the same color, the concave portions CE1a and CE1b and the protrusion portions CE2a and CE2b of the first connecting electrode CE1 and the second connecting electrode CE2 are arranged in different directions. Therefore, even though the light-emitting element LED is displaced and transferred, the first connecting electrode CE1 and the second connecting electrode CE2 can still be connected in at least one of these sub-pixels SP.

[0152] In some examples, in the display device 100 of various exemplary embodiments according to the present invention, the light-emitting elements (LEDs) can be self-assembled onto the assembly substrate 10, and then the self-assembled LEDs can be transferred to the display panel PN, thereby producing the display device 100. In this case, during the manufacturing process of the self-assembling LEDs, self-assembly can be performed by aligning the LEDs so that they correspond to the orientation of the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2. In particular, the second light-emitting element 130 and the third light-emitting element 140, each having an elliptical planar shape, need to be aligned to correspond to the orientation of the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2 on the display panel PN, so that the second light-emitting element 130 and the third light-emitting element 140 can be electrically connected to the first connecting electrode CE1 and the second connecting electrode CE2. Therefore, the arrangement orientation of the multiple assembly electrodes of the assembly substrate 10 can be configured differently, and these light-emitting elements (LEDs) can be aligned and self-assembled in different directions.

[0153] The method of manufacturing a display device 100 according to a plurality of exemplary forms of the present invention will now be described with reference to FIGS. 8A to 8G.

[0154] Figures 8A to 8G are process diagrams illustrating a method for manufacturing a display device according to some aspects of the present invention. Figures 8A to 8C are process diagrams illustrating a process for self-assembling these light-emitting elements LEDs. Figures 8D to 8G are process diagrams illustrating a process for transferring these light-emitting elements LEDs and a process for forming the first connecting electrode CE1 and the second connecting electrode CE2.

[0155] Please refer to Figure 8A, the light-emitting element LED can be transferred to the assembly substrate 10 by self-assembly.

[0156] First, these light-emitting elements (LEDs) grown on the wafer are fed into a chamber CB filled with a fluid WT. The fluid WT may contain water, etc., and the chamber CB filled with the fluid WT may have an opening on its upper side.

[0157] Next, the assembly substrate 10 can be placed on the cavity CB filled with the light-emitting element LED. The assembly substrate 10 is a substrate 110 for the temporary self-assembly of the light-emitting element LED. After the light-emitting element LED is self-assembled on the assembly substrate 10, the light-emitting element LED on the assembly substrate 10 can be transferred to the display device 100.

[0158] Next, the magnet MG can be placed on the assembly substrate 10. The light-emitting element LED, which is immersed or suspended at the bottom of the chamber CB, can be moved toward the assembly substrate 10 by the magnetic force of the magnet MG.

[0159] In this case, the light-emitting element (LED) may include a magnetic element, thereby allowing the LED to be moved by a magnetic field. For example, any one of the n-type electrodes 124, 134, 144 or the p-type electrodes 125, 135, 145 of the LED may contain a ferromagnetic material such as iron (Fe), cobalt (Co), or nickel (Ni), so that the direction of the LED toward the magnet MG can be aligned.

[0160] Next, the light-emitting element LED, which has been moved toward the assembly substrate 10 by means of the magnet MG, can be self-assembled to the assembly substrate 10 by means of an electric field, which is formed by multiple assembly lines AL and multiple assembly electrodes.

[0161] Specifically, please refer to Figures 8B and 8C. The assembly substrate 10 includes a combined substrate SUB, multiple assembly lines AL, multiple assembly electrodes, an assembly insulating layer IL, and an organic layer OL.

[0162] First, these assembly lines AL and these assembly electrodes are disposed on the composite substrate SUB. These assembly lines AL include a plurality of first assembly lines AL1 and a plurality of second assembly lines AL2. These first assembly lines AL1 and the plurality of second assembly lines AL2 can be configured to be separated from each other at a preset interval.

[0163] These assembly electrodes include a plurality of first assembly electrodes AE1 and a plurality of second assembly electrodes AE2. The first assembly electrodes AE1 can be connected to the first assembly lines AL1, and the second assembly electrodes AE2 can be connected to the second assembly lines AL2. A pair of first assembly electrodes AE1 and second assembly electrodes AE2 can be arranged adjacent to each other and form an electric field for self-assembling the light-emitting element LED. In these sub-pixels SP, a pair of first assembly electrodes AE1 and second assembly electrodes AE2 can be positioned at the exact location where the light-emitting element LED is transferred.

[0164] An assembly insulation layer IL is disposed on these assembly lines AL and these assembly electrodes. The assembly insulation layer IL protects these assembly lines AL from the influence of fluid WT, thereby suppressing defects such as corrosion of these assembly lines AL.

[0165] An organic layer OL comprising multiple pocket portions OLH is disposed on an assembly insulating layer IL. Each of these pocket portions OLH, formed by opening a portion of the organic layer OL, can be a region for self-assembly of the light-emitting elements LED. These pocket portions OLH can be configured to overlap the region between a pair of first assembly electrodes AE1 and second assembly electrodes AE2. Subsequently, these pocket portions OLH can each be formed at a position corresponding to the sub-pixels SP of the display device 100. These pocket portions OLH can be configured one-to-one, each corresponding to the sub-pixels SP. The light-emitting elements LED self-assembled in these pocket portions OLH can be transferred to the sub-pixels SP without alteration. The planar shape of these pocket portions OLH can correspond to the planar shape of the light-emitting elements LED. For example, these pocket portions OLH can include a pocket portion OLH having a circular planar shape corresponding to the first light-emitting element 120, a pocket portion OLH having an elliptical planar shape corresponding to the second light-emitting element 130, and a pocket portion OLH having an elliptical planar shape corresponding to the third light-emitting element 140.

[0166] Furthermore, by applying voltage to these assembly lines AL and these assembly electrodes, these light-emitting elements (LEDs) can self-assemble within the pocket portion OLH of the organic layer OL. For example, an electric field can be formed by applying alternating current voltage to these first assembly lines AL1, these first assembly electrodes AE1, these second assembly lines AL2, and second assembly electrodes AE2. The light-emitting elements (LEDs) can become polarized by being dielectrically polarized by the electric field. Furthermore, the dielectrically polarized LEDs can be moved or fixed in a specific direction by dielectrophoresis (DEP), i.e., by the electric field. Therefore, these light-emitting elements (LEDs) can temporarily self-assemble within the pocket portion OLH of the assembly substrate 10 by using dielectrophoresis.

[0167] In this case, the alignment direction of these light-emitting elements LEDs can be adjusted by using the setting direction of the first assembly electrode AE1 and the second assembly electrode AE2. In particular, the alignment direction of the second light-emitting element 130 and the third light-emitting element 140 can be changed according to the setting direction of the first assembly electrode AE1 and the second assembly electrode AE2. The second light-emitting element 130 includes a pair of second n-type electrodes 134 disposed at two opposite ends of the second n-type semiconductor layer 131, and the third light-emitting element 140 includes a pair of third n-type electrodes 144 disposed at two opposite ends of the third n-type semiconductor layer 141.

[0168] Please refer to Figure 8B. The first assembly electrode AE1 includes a first-first assembly electrode AE1a and a first-second assembly electrode AE1b, and the second assembly electrode AE2 includes a second-first assembly electrode AE2a and a second-second assembly electrode AE2b. The first-first assembly electrode AE1a and the second-first assembly electrode AE2a can be arranged adjacent to each other at a preset interval, and the first-second assembly electrode AE1b and the second-second assembly electrode AE2b can be arranged adjacent to each other at a preset interval.

[0169] A first-first assembly electrode AE1a and a second-first assembly electrode AE2a extending along a first direction DR1 are arranged in an alternating manner along a second direction DR2. The first-first assembly electrode AE1a extends along the first direction DR1 toward a second assembly line AL2 adjacent to the first-first assembly electrode AE1a. The second-first assembly electrode AE2a extends along the first direction DR1 toward a first assembly line AL1 adjacent to the second-first assembly electrode AE2a. However, the first-first assembly electrode AE1a and the second-first assembly electrode AE2a extend in an alternating manner such that the first-first assembly electrode AE1a and the second-first assembly electrode AE2a can face each other along the second direction DR2. For example, when the second direction DR2 is perpendicular, the second-first assembly electrode AE2a can be disposed on the upper side or the lower side of the first-first assembly electrode AE1a. Therefore, the first-first assembly electrode AE1a and the second-first assembly electrode AE2a arranged in an alternating manner along the second direction DR2 can be disposed adjacent to each other while having a gap extending along the first direction DR1.

[0170] The first-second assembly electrode AE1b and the second-second assembly electrode AE2b may face each other while extending along the first direction DR1. The first-second assembly electrode AE1b and the second-second assembly electrode AE2b may extend towards each other on the same line. Therefore, one end of the first-second assembly electrode AE1b and one end of the second-second assembly electrode AE2b may face each other along the first direction DR1. The first-second assembly electrode AE1b and the second-second assembly electrode AE2b may be arranged adjacent to each other while having a gap extending along the second direction DR2.

[0171] In this case, the second light-emitting element 130 can self-assemble such that a pair of second n-type electrodes 134 are respectively positioned toward the first assembly electrode AE1 and the second assembly electrode AE2 adjacent to each other. For example, one of the pair of second n-type electrodes 134 may be positioned toward the first assembly electrode AE1. The other of the pair of second n-type electrodes 134 may be positioned toward the second assembly electrode AE2 most adjacent to the first assembly electrode AE1.

[0172] In this case, in the second light-emitting element 130 self-assembled on the first-first assembly electrode AE1a and the second-first assembly electrode AE2a facing each other along the second direction DR2, a pair of second n-type electrodes 134 can be aligned along the second direction DR2. Because one second n-type electrode 134 is aligned toward the first-first assembly electrode AE1a and the other second n-type electrode 134 is aligned toward the second-first assembly electrode AE2a, the pair of second n-type electrodes 134 can be aligned along the second direction DR2 and the second p-type electrode 135 is inserted between them. That is, the long axis of the second n-type semiconductor layer 131 of the second light-emitting element 130 can be aligned along the second direction DR2.

[0173] Conversely, in the second light-emitting element 130 self-assembled on the first-second assembly electrode AE1b and the second-second assembly electrode AE2b facing each other along the first direction DR1, a pair of second n-type electrodes 134 can be aligned along the first direction DR1. Because one second n-type electrode 134 is aligned toward the first-second assembly electrode AE1b and the other second n-type electrode 134 is aligned toward the second-second assembly electrode AE2b, the pair of second n-type electrodes 134 can be aligned along the first direction DR1 and a second p-type electrode 135 is inserted between them. That is, the long axis of the second n-type semiconductor layer 131 of the second light-emitting element 130 can be aligned along the first direction DR1.

[0174] Therefore, the alignment position of the second n-type electrodes 134 disposed at the two opposite ends of the second light-emitting element 130 can be adjusted according to the arrangement position of the first assembly electrode AE1 and the second assembly electrode AE2. First-first assembly electrodes AE1a and second-first assembly electrodes AE2a facing each other along the second direction DR2 can be formed and aligned, such that a pair of second n-type electrodes 134 are disposed along the second direction DR2, and the second light-emitting element 130 can self-assemble. Similarly, first-second assembly electrodes AE1b and second-second assembly electrodes AE2b facing each other along the first direction DR1 can be formed and aligned, such that a pair of second n-type electrodes 134 are disposed along the first direction DR1, and the second light-emitting element 130 can self-assemble. Furthermore, the alignment direction of the third light-emitting element 140, which includes a pair of third n-type electrodes 144 disposed at the two opposite ends of the third n-type semiconductor layer 141, can be adjusted in the same manner as the second light-emitting element 130.

[0175] Next, referring to FIG8D, these light-emitting elements LEDs of the assembly substrate 10 are transferred to the substrate DN.

[0176] First, the assembly substrate 10 and the prebody DN are aligned such that the light-emitting elements LED and the prebody DN face each other. Next, the assembly substrate 10 and the prebody DN can be connected such that the upper portion of the light-emitting element LED can contact the prebody DN. In this case, the prebody DN is made of a material with adhesive properties, such that the upper portion of the light-emitting element LED can be bonded to the prebody DN and transferred from the assembly substrate 10 to the prebody DN. The prebody DN can be made of viscoelastic polymer materials such as polydimethylsiloxane (PDMS), polyurethane acrylate (PUA), polyethylene glycol (PEG), polymethyl methacrylate (PMMA), polystyrene (PS), epoxy resin, ethyl carbamate resin, acrylic resin, etc. However, the present invention is not limited thereto.

[0177] Next, referring to Figures 8E and 8F, these light-emitting elements LED on the substrate DN are transferred to the adhesive layer 116 of the display panel PN.

[0178] The substrate DN and the display device 100 to which the adhesive layer 116 is formed are aligned. The display device 100 and the substrate DN can be aligned such that the light-emitting elements LED of the substrate DN and the adhesive layer 116 of the display device 100 face each other. Furthermore, the substrate DN and the display device 100 can be connected such that the light-emitting elements LED on the substrate DN can be transferred to the adhesive layer 116.

[0179] In this case, the bonding force between the adhesive layer 116 and the light-emitting element LED is greater than the bonding force between the prebody DN and the light-emitting element LED, so that the light-emitting element LED can be detached from the prebody DN and attached to the adhesive layer 116.

[0180] Therefore, these light-emitting elements (LEDs) can self-assemble to be arranged on the assembly substrate 10 corresponding to the sub-pixels (SPs), and then these LEDs on the assembly substrate 10 can be transferred to the display device 100 by using a substrate DN. In this case, after aligning these LEDs so that they correspond to the spacing between the sub-pixels (SPs), the process of transferring these LEDs from the wafer to the substrate DN can be omitted. By using an electric field, the LEDs can easily self-assemble in precise positions. Therefore, by using the assembly substrate 10 to enable these LEDs on the wafer to self-assemble, alignment errors can be minimized and the process of transferring these LEDs can be simplified.

[0181] In this invention, the configuration has been described as follows: the light-emitting elements (LEDs) are self-assembled to the assembly substrate 10 by a self-assembly method, and then the LEDs are transferred to the display device 100 by using a substrate DN. However, the invention is not limited thereto. For example, separate assembly lines AL can be formed on the display device 100, and the LEDs can be directly self-assembled on the display device 100. However, the invention is not limited thereto.

[0182] Next, referring to Figures 8F and 8G, the light-emitting element LED is transferred to the adhesive layer 116 of the display device 100, and then the first connecting electrode CE1 and the second connecting electrode CE2 are formed, so that the light-emitting element LED can be electrically connected to the driving transistor DT and the power line VDD.

[0183] First, a second planarization layer 117 and a third planarization layer 118 are formed to cover these light-emitting elements (LEDs). Next, a plurality of contact holes may be formed in the third planarization layer 118, through which the n-type electrodes 124, 134, 144 and p-type electrodes 125, 135, 145 of these light-emitting elements (LEDs) are exposed. A plurality of contact holes may be formed in the third planarization layer 118, the second planarization layer 117, and the adhesive layer 116, through which the first reflective electrode RE1 and the reflective electrode RE are exposed.

[0184] Next, the first connection electrode CE1 and the second connection electrode CE2 can be formed on the third planarization layer 118. Furthermore, a conductive material layer can be formed on the front surface of the substrate 110, and the first connection electrode CE1 and the second connection electrode CE2 can be formed by patterning the conductive material layer.

[0185] Therefore, in the display device 100 and the method of manufacturing the display device 100 according to a plurality of exemplary embodiments of the present invention, self-assembly can be performed by adjusting the alignment direction of the second light-emitting element 130 and the third light-emitting element 140, each having an elliptical shape, according to the arrangement position of the first assembly electrode AE1 and the second assembly electrode AE2. The alignment position of the second n-type electrode 134 disposed at two opposite ends of the second light-emitting element 130, or the alignment position of the third n-type electrode 144 disposed at two opposite ends of the third light-emitting element 140, can be adjusted according to the position of the first assembly electrode AE1 and the second assembly electrode AE2. For example, first-first assembly electrodes AE1a and second-first assembly electrodes AE2a facing each other along the second direction DR2 can be formed and aligned such that a pair of second n-type electrodes 134 and a pair of third n-type electrodes 144 are disposed along the second direction DR2, and the second light-emitting element 130 and the third light-emitting element 140 can self-assemble. A first-second assembly electrode AE1b and a second-second assembly electrode AE2b facing each other along a first direction DR1 can be formed and aligned, such that a pair of second n-type electrodes 134 and a pair of third n-type electrodes 144 are disposed along the first direction DR1, and the second light-emitting element 130 and the third light-emitting element 140 can self-assemble. Therefore, the first assembly electrode AE1 and the second assembly electrode AE2 can face each other and be aligned along either the first direction DR1 or the second direction DR2, such that the orientation of the second light-emitting element 130 and the third light-emitting element 140, each having an elliptical shape, corresponds to the orientation of the recesses CE1a and CE1b of the first connecting electrode CE1 and the protrusions CE2a and CE2b of the second connecting electrode CE2, and self-assembly can be performed.

[0186] Several exemplary embodiments of the present invention may also be described as follows:

[0187] A display device is provided according to one aspect of the present invention. The display device includes: a substrate having a plurality of pixels, each including a plurality of sub-pixels; a plurality of light-emitting elements disposed on the sub-pixels and each including one or more n-type electrodes and p-type electrodes; a first connecting electrode disposed on each of the light-emitting elements of the sub-pixels and including a recess with overlapping p-type electrodes; and a second connecting electrode disposed on each of the light-emitting elements of the sub-pixels and including a protrusion with overlapping p-type electrodes. The recess and the protrusion extend in each of the plurality of sub-pixels along a first direction, and the recess and the protrusion extend in each of the plurality of sub-pixels along a second direction different from the first direction.

[0188] A pixel may include: a pair of first sub-pixels, including a first-first sub-pixel and a first-second sub-pixel; a pair of second sub-pixels, including a second-first sub-pixel and a second-second sub-pixel; and a pair of third sub-pixels, including a third-first sub-pixel and a third-second sub-pixel, and the recess may extend in different directions in each of the pair of first sub-pixels, each of the pair of second sub-pixels and each of the pair of third sub-pixels.

[0189] The recess may extend along a first direction in either the first-first sub-pixel or the first-second sub-pixel, the recess may extend along a first direction in either the second-first sub-pixel or the second-second sub-pixel, and the recess may extend along a first direction in either the third-first sub-pixel or the third-second sub-pixel.

[0190] The concave portion and the convex portion may extend along a second direction in each of the first-first sub-pixel, the second-first sub-pixel and the third-first sub-pixel, and the concave portion and the convex portion may extend along a first direction in each of the first-second sub-pixel, the second-second sub-pixel and the third-second sub-pixel.

[0191] Each of these light-emitting elements may further include: an n-type semiconductor layer having a top surface on which an n-type electrode is disposed; a light-emitting layer disposed on the n-type semiconductor layer; and a p-type semiconductor layer disposed on the light-emitting layer and having a top surface on which a p-type electrode is disposed. In each of these multiple light-emitting elements, the top surface of the n-type semiconductor layer may have an elliptical shape, and the n-type electrode may be disposed at two opposite ends of the top surface of the n-type semiconductor layer in the long axis direction.

[0192] The short axis of the top surface of the n-type semiconductor layer of each of these light-emitting elements may be arranged in the same direction as the expansion direction of the concave and convex portions corresponding to these light-emitting elements, and the long axis of the top surface of the n-type semiconductor layer of each of these light-emitting elements may be arranged in a direction different from the expansion direction of the concave and convex portions corresponding to these light-emitting elements.

[0193] The long axis of the top surface of the n-type semiconductor layer may be arranged in the second direction in some light-emitting elements, overlapping the concave and convex portions extending in the first direction.

[0194] The display device may further include an insulating layer disposed between the light-emitting elements and the first connecting electrode, and between the light-emitting elements and the second connecting electrode. The insulating layer may include: a pair of first contact holes overlapping an n-type electrode and a first connecting electrode of each of the light-emitting elements; and a second contact hole overlapping a p-type electrode and a second connecting electrode of each of the light-emitting elements.

[0195] The recess of the first connecting electrode may be disposed between a pair of first contact holes, and the second contact hole may overlap the protrusion of the second connecting electrode.

[0196] According to one aspect of the present invention, a method for manufacturing a display device is provided. The method includes: self-assembling a plurality of light-emitting elements on an assembly substrate on which a plurality of assembly electrodes are formed; transferring the light-emitting elements on the assembly substrate to a substrate; and transferring the light-emitting elements on the substrate to a plurality of sub-pixels of a display panel. Self-assembling the light-emitting elements includes: forming an electric field by applying a voltage to the assembly electrodes, and self-assembling the light-emitting elements on the assembly electrodes using the electric field.

[0197] These assembled electrodes may include: a plurality of first assembled electrodes extending along a first direction and including a first-first assembled electrode and a first-second assembled electrode; and a plurality of second assembled electrodes extending along the first direction and including a second-first assembled electrode disposed adjacent to the first-first assembled electrode and a second-second assembled electrode disposed adjacent to the first-second assembled electrode. The first-first assembled electrode and the second-first assembled electrode may be arranged in an alternating manner, thereby forming a gap extending along the first direction between the first-first assembled electrode and the second-first assembled electrode. The first-second assembled electrode may be configured to face the second-second assembled electrode, thereby forming a gap extending along a second direction perpendicular to the first direction between the first-second assembled electrode and the second-second assembled electrode.

[0198] Each of these light-emitting elements may include: an n-type semiconductor layer having a top surface with an elliptical shape; a pair of n-type electrodes disposed on the top surface of the n-type semiconductor layer at two opposite ends of the n-type semiconductor layer in the long axis direction; a light-emitting layer disposed on the n-type semiconductor layer; a p-type semiconductor layer disposed on the light-emitting layer; and a p-type electrode disposed on the p-type semiconductor layer. Self-assembly of these light-emitting elements may include performing self-assembly such that one of the pair of n-type electrodes overlaps the first assembled electrodes, and the other of the pair of n-type electrodes overlaps the second assembled electrodes.

[0199] A pair of n-type electrodes may be aligned along a second direction in each of the plurality of light-emitting elements assembled on the first-first assembly electrode and the second-first assembly electrode, and a pair of n-type electrodes may be aligned along a first direction in each of the light-emitting elements assembled on the first-second assembly electrode and the second-second assembly electrode.

[0200] Although several exemplary embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be practiced in many different forms without departing from the technical concept of the present invention. Therefore, the various exemplary embodiments of the present invention are provided for illustrative purposes only and are not intended to limit the technical concept of the present invention. The scope of the technical concept of the present invention is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present invention.

[0201] Language or other language describing a group of "at least one" and / or a group of "one or more" claims is intended to satisfy the claims of one member of the group or multiple members of the group (in any combination). For example, language describing "at least one of A and B" or "at least one of A or B" means A, B, or A and B. In another example, language describing "at least one of A, B, and C" or "at least one of A, B, or C" means A, B, C, or A and B, or A and C, or B and C, or A and B and C. A group of "at least one" and / or a group of "one or more" does not limit the group to the items listed in the group. For example, language describing "at least one of A and B" or "at least one of A or B" may mean A, B, or A and B, and may include items not listed in the combination of A and B. [Simplified Explanation of the Diagram]

[0041] The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0042] FIG1 is a schematic diagram of the configuration of a display device according to an exemplary state according to the present invention;

[0043] FIG2A is a partial cross-sectional view of a display device of some forms according to the present invention;

[0044] Figure 2B is a perspective view of a splicing display device of some forms according to the present invention;

[0045] Figures 3 and 4 are enlarged top views of some types of display devices according to the present invention;

[0046] Figures 5A to 5C are diagrams illustrating the light-emitting elements of a display device according to some aspects of the present invention;

[0047] FIG6 is a cross-sectional view of a display device of some forms according to the present invention;

[0048] Figures 7A to 7C are top plan views illustrating the connection relationship between the first connecting electrode, the second connecting electrode, and the light-emitting element in a display device according to some aspects of the present invention, showing the transfer position of the light-emitting element; and

[0049] Figures 8A to 8G are process diagrams illustrating a method for manufacturing a display device of some forms according to the present invention.

Claims

1. A display device comprising: a substrate having a plurality of pixels, each comprising a plurality of sub-pixels; a plurality of light-emitting elements located on the sub-pixels and each comprising an n-type electrode and a p-type electrode; a first connecting electrode located on each of the light-emitting elements of the sub-pixels and comprising a recess overlapping the p-type electrode; and a second connecting electrode located on each of the light-emitting elements of the sub-pixels and comprising a protrusion overlapping the p-type electrode, wherein each of the pixels comprises two sub-pixels displaying the same color, and the recesses of the first connecting electrodes and the protrusions of the second connecting electrodes of the two sub-pixels displaying the same color are oriented in different directions.

2. The display device as claimed in claim 1, wherein the light-emitting elements include a first light-emitting element, a second light-emitting element, and a third light-emitting element disposed in each of the pixels, wherein, The first light-emitting element, the second light-emitting element, and the third light-emitting element have different shapes.

3. The display device as claimed in claim 2, wherein each of the pixels includes a first-first sub-pixel and a first-second sub-pixel respectively disposed for the first light-emitting elements, a second-first sub-pixel and a second-second sub-pixel respectively disposed for the second light-emitting elements, and a third-first sub-pixel and a third-second sub-pixel respectively disposed for the third light-emitting elements.

4. The display device as claimed in claim 3, wherein each of the light-emitting elements further comprises: an n-type semiconductor layer; a p-type semiconductor layer disposed on the n-type semiconductor layer; and a light-emitting layer located between the n-type semiconductor layer and the p-type semiconductor layer, wherein, The n-type electrode is disposed on the n-type semiconductor layer and the p-type electrode is disposed on the p-type semiconductor layer.

5. The display device as claimed in claim 1, further comprising: a light-blocking layer disposed on the substrate; a transistor disposed on the light-blocking layer and including an active layer; a reflective electrode disposed on the transistor; and one or more insulating layers disposed on the reflective electrode, wherein... These light-emitting elements are disposed on one or more insulating layers.

6. The display device as claimed in claim 5, wherein the one or more insulating layers include a planarization layer surrounding one side of the light-emitting elements, wherein, The n-type electrode and the p-type electrode are exposed from the planarization layer.

7. The display device as claimed in claim 6, wherein the first connection electrode and the second connection electrode are disposed on the planarization layer.

8. The display device as claimed in claim 7, wherein the planarization layer includes a pair of first contact holes overlapping the first connection electrode and the n-type electrode of each of the light-emitting elements; and a second contact hole overlapping the second connection electrode and the p-type electrode of each of the light-emitting elements, wherein, The recess of the first connecting electrode is located between the pair of first contact holes, and the second contact hole overlaps the protrusion of the second connecting electrode.

9. The display device as claimed in claim 1, wherein the first connecting electrode and the second connecting electrode have a U-shaped shape that overlaps the p-type electrode on each of the light-emitting elements.

10. The display device as claimed in claim 3, wherein the recess and the convex portion are along a direction in the first-first sub-pixel, and the recess and the convex portion extend in the first-second sub-pixel along a direction other than the direction.

11. The display device as claimed in claim 4, wherein in some of the light-emitting elements, a top surface of the n-type semiconductor layer has an elliptical shape, and the n-type electrodes are disposed at two opposite ends of the top surface of the n-type semiconductor layer in a major axis direction.

12. The display device as claimed in claim 11, wherein a short axis of the top surface of the n-type semiconductor layer of each of the light-emitting elements is disposed in the same direction as the extension direction of the recess and the protrusion of the corresponding portion of the light-emitting elements, and wherein a long axis of the top surface of the n-type semiconductor layer of each of the light-emitting elements is disposed in a direction different from the extension direction of the recess and the protrusion of the corresponding portion of the light-emitting elements.

13. The display device as claimed in claim 11, wherein a long axis of the top surface of the n-type semiconductor layer is disposed in a direction different from the direction in which one of the light-emitting elements overlaps the recess and the convex portion extending in one direction among the light-emitting elements.

14. The display device as claimed in claim 11, wherein, among the remaining light-emitting elements, the top surface of the n-type semiconductor layer has a circular shape, and the n-type electrode is disposed around the top surface of the n-type semiconductor layer.

15. The display device as claimed in claim 3, wherein the first light-emitting element of the first-first sub-pixel and the first light-emitting element of the first-second sub-pixel are connected to different first connection electrodes and connected to the same second connection electrode.

16. The display device as claimed in claim 3, wherein in a plane, the first light-emitting elements of the first-first sub-pixel and the first light-emitting elements of the first-second sub-pixel are arranged in the same row.

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