Circuit array substrate

Abstract

A circuit array substrate includes multiple pixel units, each pixel unit including a gate electrode layer, a semiconductor layer, a storage capacitor, and a control capacitor. The gate electrode layer includes a first portion extending in a first direction and a second portion extending in a second direction, wherein the first direction is not parallel to the second direction. The semiconductor layer and the first portion of the gate electrode layer form a first transistor, and the semiconductor layer and the second portion of the gate electrode layer form a second transistor. A conductive plate of the storage capacitor is electrically connected to a first source / drain electrode of the first transistor. A conductive plate of the control capacitor is electrically connected to a second source / drain electrode of the first transistor.

Claims

1. A circuit array substrate comprising a plurality of pixel units, wherein each pixel unit comprises: A gate electrode layer includes a first portion extending in a first direction and a second portion extending in a second direction, wherein the first direction is not parallel to the second direction; A semiconductor layer, wherein the semiconductor layer and the first portion of the gate electrode layer form a first transistor, and the semiconductor layer and the second portion of the gate electrode layer form a second transistor; a storage capacitor, wherein a plate of the storage capacitor is electrically connected to a first source / drain electrode of the first transistor; and a control capacitor, wherein a plate of the control capacitor is electrically connected to a second source / drain electrode of the first transistor.

2. The circuit array substrate as claimed in claim 1 further includes a common electrode layer, and the other conductive plate of the control capacitor is the common electrode layer.

3. The circuit array substrate as claimed in claim 2, wherein another conductive plate of the storage capacitor is the common electrode layer.

4. The circuit array substrate as claimed in claim 2, wherein the second source / drain electrode is electrically connected to a transparent conductive layer, and the transparent conductive layer is made of the same material as the common electrode layer.

5. The circuit array substrate as claimed in claim 4, wherein the guide plate of the control capacitor is a metal layer.

6. The circuit array substrate as claimed in claim 1 further includes a metal layer that forms another conductive plate of the control capacitor and is used to transmit a touch signal.

7. The circuit array substrate as claimed in claim 1, wherein the control capacitor includes a dielectric layer having a thickness between 200 Å and 8000 Å.

8. The circuit array substrate as claimed in claim 7, wherein the thickness of the dielectric layer falls between 200 Å and 4000 Å.

9. The circuit array substrate as claimed in claim 1, wherein the plate of the control capacitor is electrically connected to a source / drain electrode of the second transistor.

10. The circuit array substrate of claim 1, wherein the guide plate of the storage capacitor is a pixel electrode of the pixel unit.

11. The circuit array substrate as claimed in claim 1, wherein the ratio of the capacitance of the control capacitor to the capacitance of the storage capacitor falls within the range of 1 / 65 to 1 / 40.

Images