Integrated circuit, pixel driving device and pixel defect detecting method
Patent Information
- Application Number
- TW111136530
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-10-08
- Filing Date
- 2022-09-27
- Publication Date
- 2026-10-21
- Estimated Expiration
- 2042-09-26
AI Technical Summary
Existing display devices face challenges in reducing size while maintaining high-resolution image display, particularly in large-sized LED displays, where pixel defects require separate defect detection circuits, increasing the display circuit area and complicating defect determination.
An integrated circuit that senses the voltage of each pixel's light-emitting diode and compares it with a reference voltage to detect defects, using the driving circuit's amplifier as a comparator to eliminate the need for additional defect detection circuits, allowing simultaneous defect detection across multiple pixels.
This approach reduces the display circuit area and minimizes defect determination time by reusing the driving circuit's amplifier as a comparator, enabling efficient detection of open or short circuits in LED pixels without additional hardware.
Smart Images

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Abstract
Description
Technical Field
[0001] This disclosure relates to an integrated circuit for driving pixels of a display panel, a pixel driving device, and a pixel defect detection method. Prior Technology
[0002] With the advancement of information technology, various display devices capable of visualizing information have been developed. Examples of recently developed or under development display devices include liquid crystal displays (LCDs), organic light-emitting diode (OLED) displays, and plasma display panels (PDPs). As display technology evolves, such devices are designed to appropriately display high-resolution images.
[0003] However, while the aforementioned display devices can appropriately display high-resolution images, it is difficult to reduce their size. For example, the large-size OLED display devices developed so far are only 80 inches (about 2m) or 100 inches (about 25m) in size, and therefore are not suitable for manufacturing large-size display devices with a horizontal length of 10m or more.
[0004] Recently, light-emitting diode (LED) display devices have received considerable attention as a solution to such size issues. LED display devices can include a necessary number of modular LED pixels (arranged to form a large-size panel). Alternatively, LED display devices can include a necessary number of unit panels, each unit panel having multiple LED pixels (arranged to form a large-size panel structure). According to LED display device technology, the necessary number of LED pixels can be expanded and arranged, making it easy to realize large-size display devices.
[0005] LED display devices offer advantages in terms of panel size diversification and expansion. Therefore, the horizontal and vertical lengths of an LED display device can be adjusted to various values based on the appropriate arrangement of LED pixels.
[0006] A display panel with LEDs can be driven using various methods. Representative examples of driving methods include pulse amplitude modulation (PAM) and pulse width modulation (PWM). The PAM method supplies an analog voltage corresponding to the grayscale value of the pixel and controls the magnitude of the current flowing through the pixel to different values according to the analog voltage. The PWM method adjusts the timing of supplying current to the pixel based on the grayscale value of the pixel.
[0007] The display panel can include multiple pixels. Depending on the current flowing through the LEDs included in each pixel, the LEDs can emit light to display the desired image.
[0008] However, when a defect occurs in the LEDs within each pixel, the corresponding pixel cannot be displayed correctly. To detect defects in multiple pixels, multiple defect detection circuits corresponding to the number of pixels need to be added. Therefore, the area of the display circuit inevitably increases. Summary of the Invention
[0009] In this context, in one embodiment, various embodiments relate to providing an integrated circuit for driving pixels of a display panel, as well as a pixel driving device and a pixel defect detection method. In the integrated circuit, a driving circuit for providing data voltage to drive each pixel can sense the voltage of the light-emitting diode included in each pixel (e.g., the voltage of the anode terminal or the forward voltage drop) and detect pixel defects (e.g., open circuit or short circuit).
[0010] In one embodiment, this disclosure provides an integrated circuit including: a driving circuit configured to provide a data voltage to a pixel via a data line connected to the pixel of a panel, sense a voltage of a light-emitting diode of the pixel via the data line, and compare the voltage of the light-emitting diode with a reference voltage; and a detection circuit configured to receive a comparison result between the voltage of the light-emitting diode and the reference voltage from the driving circuit, and identify a defect in the pixel based on the received comparison result.
[0011] In another embodiment, this disclosure provides a pixel driving device, comprising: an amplifier configured to provide a data voltage to the pixel via a data line connected to the pixel of a panel; and a first switch connected between the pixel and an output terminal of the amplifier, wherein, when the first switch is closed, the amplifier receives a source voltage through a first input terminal of the amplifier and provides the data voltage to the pixel via the data line connected to the output terminal of the amplifier; and when the first switch is open, the amplifier receives a reference voltage through the first input terminal of the amplifier, receives a voltage of a light-emitting diode included in the pixel sensed via the data line through a second input terminal of the amplifier, and outputs a comparison result between the reference voltage and the voltage of the light-emitting diode through the output terminal.
[0012] In another embodiment, this disclosure provides a pixel defect detection method for detecting defects in pixels of a display panel, wherein the display panel has a plurality of pixels arranged therein, the pixel defect detection method comprising: providing a data voltage to the pixel via an amplifier connected to the pixel via a data line during a first time period; receiving a reference voltage and a voltage of a light-emitting diode included in the pixel via the amplifier during a second time period, and outputting a comparison result between the reference voltage and the voltage of the light-emitting diode; and identifying a defect in the pixel based on the comparison result between the reference voltage and the voltage of the light-emitting diode.
[0013] According to this embodiment, the driving circuit for providing data voltage to drive each pixel can sense the voltage of the light-emitting diode included in each pixel (e.g., the voltage of the anode terminal or the forward voltage drop) and detect pixel defects (e.g., open circuit or short circuit). Therefore, it is not necessary to add a separate comparator to detect whether each pixel has defects.
[0014] Furthermore, the amplifier included in the driving circuit that provides the data voltage for driving each pixel can be reused as a comparator for pixel defect determination, which allows for a reduction in the area of the display circuit.
[0015] In addition, the display device simultaneously senses multiple pixels arranged in the same column among the multiple pixels arranged in the display panel and determines whether each pixel has a defect, which makes it possible to minimize the speed of pixel defect determination. Simple Explanation of the Diagram
[0016] Figure 1 is a configuration diagram of a display device according to an embodiment.
[0017] Figure 2 is a detailed configuration diagram of the display device according to an embodiment.
[0018] Figure 3 is a detailed configuration diagram of the display device according to an embodiment.
[0019] Figure 4 is a diagram illustrating the operation of the circuit according to an embodiment during the initialization period.
[0020] Figure 5 is a diagram illustrating the operation of the circuit according to an embodiment during a programmable period.
[0021] Figure 6 is a diagram illustrating the operation of the circuit according to an embodiment during the comparison period.
[0022] Figure 7A is a diagram showing the circuit in the normal state of the LED according to an embodiment.
[0023] Figure 7B is a graph showing the forward voltage drop under normal LED conditions according to an embodiment.
[0024] Figure 8A is a diagram showing the circuit in the LED open-circuit state according to an embodiment.
[0025] Figure 8B is a graph showing the forward voltage drop in the LED open-circuit state according to an embodiment.
[0026] Figure 9A is a diagram showing the circuit in the LED short-circuit state according to an embodiment.
[0027] Figure 9B is a graph showing the forward voltage drop in the LED short-circuit state according to an embodiment.
[0028] Figure 10 is a detailed configuration diagram of the display device according to an embodiment.
[0029] Figure 11 is a timing diagram showing the signals of a display device according to an embodiment for determining whether an LED is open-circuited.
[0030] Figure 12 is a timing diagram showing the signals of the display device according to an embodiment for determining whether an LED is short-circuited. Implementation
[0031] Figure 1 is a configuration diagram of a display device according to an embodiment.
[0032] Referring to Figure 1, the display device 100 may include a panel (or display panel) 110 and a panel driving circuit (or driving circuit) for driving the panel 110. The panel driving circuit may include a data driving circuit 120, a gate driving circuit 140, and a data processing circuit 150. The display device 100 may also include a detection circuit 130.
[0033] Panel 110 may include a plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P (or sub-pixels SP) arranged therein. In an embodiment, at least some of the plurality of data lines DL and the plurality of gate lines GL may be used as a plurality of sensing lines SL.
[0034] Circuits 120, 140, and 150 used to drive one or more components included in the panel 110 can be referred to as panel driving circuits or driving circuits. For example, at least one of the data driving circuit 120, gate driving circuit 140, and data processing circuit 150 can each be referred to as a panel driving circuit or driving circuit. The aforementioned circuits 120, 140, and 150 can each be referred to as panel driving circuits or driving circuits, and the entire circuit or multiple circuits can be referred to as panel driving circuits or driving circuits.
[0035] In the panel driving circuit, the gate driving circuit 140 can supply scan signals with on or off voltages to each pixel P via corresponding gate lines GL. When a scan signal with an on voltage is supplied to each pixel P, the corresponding pixel P is connected to the data line DL. When a scan signal with an off voltage is supplied to each pixel P, the corresponding pixel P is disconnected from the data line DL.
[0036] In the panel driving circuit, the data driving circuit 120 supplies a data voltage to the data line DL. The data voltage supplied to the data line DL (e.g., a voltage corresponding to the grayscale value of each pixel) can be transmitted to the pixel P connected to the data line DL according to the scan signal.
[0037] In an embodiment, the data driving circuit 120 may use at least some data lines DL as sensing lines SL. For example, the data driving circuit 120 may use the data lines DL to sense the voltage of a light-emitting diode (e.g., an LED) within a pixel P, wherein the data lines DL supply data voltage to each pixel P. Here, the voltage may be a forward voltage drop measured at the anode terminal of the light-emitting diode. When the display device 100 operates in a first mode (e.g., a display driving mode) during a first time period, the data driving circuit 120 may supply data voltage to each pixel P via the data lines DL. When the display device 100 operates in a second mode (e.g., a pixel defect detection mode) during a second time period, the data driving circuit 120 may use the data lines DL as sensing lines SL to sense the voltage of the light-emitting diode (e.g., an LED) within a pixel P. When the display device 100 operates in a second mode (e.g., pixel defect detection mode), the data driving circuit 120 can detect defects (e.g., open circuit or short circuit) in the pixel P by comparing the voltage of the light-emitting diode in the pixel P sensed by the data line DL (e.g., the forward voltage drop measured at the anode terminal of the light-emitting diode) with at least one reference voltage.
[0038] For example, when the display device 100 operates in a second mode (e.g., a pixel defect detection mode), the data driving circuit 120 can compare the voltage of the light-emitting diode in pixel P sensed by the data line DL (e.g., the forward voltage drop measured at the anode terminal of the light-emitting diode) with a first reference voltage and send the comparison result to the detection circuit 130. The detection circuit 130 can identify (or determine) whether the light-emitting diode included in pixel P is open-circuited based on the comparison result.
[0039] When the display device 100 operates in a second mode (e.g., pixel defect detection mode), the data driving circuit 120 compares the voltage of the light-emitting diode in pixel P sensed by the data line DL (e.g., the forward voltage drop measured at the anode terminal of the light-emitting diode) with a second reference voltage and sends the comparison result to the detection circuit 130. The detection circuit 130 can identify (or determine) whether the LED included in pixel P is short-circuited based on the comparison result. The detailed operation method of the pixel defect detection operation of the data driving circuit 120 and the detection circuit 130 will be described in detail below with reference to FIG4 and the following figures.
[0040] In the panel driving circuit, the data processing circuit 150 can supply various control signals to one or more of the data driving circuit 120, the detection circuit 130, and the gate driving circuit 140. The data processing circuit 150 can generate a gate control signal GCS for controlling the start of scanning according to the timing implemented in each frame, and send the generated gate control signal GCS to the gate driving circuit 140. The data processing circuit 150 can convert externally input image data into image data RGB suitable for the data signal format used in the data driving circuit 120, and output the image data RGB to the data driving circuit 120. Furthermore, the data processing circuit 150 can send a data control signal DCS for controlling the data driving circuit 120 to supply data voltage to each pixel P according to various timings.
[0041] The data driving circuit 120 may be referred to as a source driver. The gate driving circuit 140 may be referred to as a gate driver. The data processing circuit 150 may be referred to as a timing controller T-CON or a controller. The data driving circuit 120 and the detection circuit 130 may be included in an integrated circuit 125 and referred to as a source driver integrated circuit (IC). Furthermore, the data driving circuit 120, the detection circuit 130, and the data processing circuit 150 may be included in an integrated circuit and referred to as an IC. This embodiment is not limited to such names. However, in the following description, descriptions of some generally known components in the source driver, gate driver, and timing controller will be omitted. Therefore, for the purpose of understanding the embodiment, the omission of such components should be considered.
[0042] Panel (or display panel) 110 may be an LED panel. In this case, the pixels P (or sub-pixels SP) arranged in panel 110 may include LEDs and one or more transistors. Panel (or display panel) 110 may be an OLED panel. In this case, the pixels P arranged in panel 110 may include OLEDs and one or more transistors. When using a display device, the LEDs or OLEDs included in each pixel P may be damaged. For example, when the LEDs or OLEDs included in each pixel P are open-circuited or short-circuited, even if a preset normal current flows through the LEDs or OLEDs, the LEDs or OLEDs cannot emit light normally. In an embodiment, the data driving circuit 120 may sense the forward voltage drop (e.g., the voltage at the anode terminal of the light-emitting diode) of the light-emitting diode (e.g., LED or OLED) included in each pixel P, and compare the sensed forward voltage drop with one or more reference voltages to detect defects in the light-emitting diode. In the following embodiments, for ease of description, the case where the light-emitting diode is an LED will be used as an example. However, this embodiment is not limited to this.
[0043] Figure 2 is a detailed configuration diagram of the display device according to an embodiment.
[0044] Referring to FIG. 2, the display device 200 may include a controller 210, a driving circuit 220, a detection circuit 230, and a plurality of pixels P arranged in the display panel. The controller 210 may perform at least some or all of the functions of the data processing circuit 150 of FIG. 1, and control the pixel defect detection operation according to the embodiments described below. The driving circuit 220 may include the data driving circuit 120 of FIG. 1, and also includes the gate driving circuit 140 of FIG. 1. The detection circuit 230 may include the detection circuit 130 of FIG. 1. The driving circuit 220 and the detection circuit 230 may also be included in a single IC 225, and referred to as the source driver IC. Alternatively, the driving circuit 220, the detection circuit 230, and the controller 210 may be included in a single integrated circuit (IC), and referred to as IC.
[0045] Pixel P may include a conversion circuit 240, a light-emitting diode (e.g., an LED or an OLED), a first transistor TR1 (e.g., a driving transistor), a second transistor TR2 (e.g., a light-emitting control transistor), and a third transistor TR3 (e.g., a detection control transistor). In the following description, for ease of description, an LED is used as an example of a light-emitting diode. However, an LED can be replaced by various types of light-emitting diodes, including OLEDs. Pixel P may be formed in a silicon back plane, and the transistors TR1 to TR3 arranged in pixel P may be formed of complementary metal-oxide-semiconductor (CMOS) type.
[0046] An LED can be composed of an anode electrode, an organic layer, and a cathode electrode. Under the control of a first transistor TR1 and / or a second transistor TR2, the LED emits light when the anode electrode is connected to a driving voltage EVDD (or a high driving voltage) and the cathode electrode is connected to a ground voltage EVSS (or a low driving voltage).
[0047] The first transistor TR1 can control the brightness of the LED by controlling the drive current supplied to the LED. The first node N1 of the first transistor TR1 can be electrically connected to the anode electrode of the LED via the second transistor TR2, and serves as either a source node or a drain node. The second node N2 of the first transistor TR1 can be connected to the conversion circuit 240. The third node N3 of the first transistor TR1 can be electrically connected to the drive voltage line DVL for supplying the drive voltage EVDD, and serves as either a drain node or a source node. The conversion circuit 240 can be electrically connected between the drive circuit 220 and the second node N2 of the first transistor TR1, and the first transistor TR1 can be turned on or off according to the output of the conversion circuit 240. As shown in FIG. 3, which will be described below, the conversion circuit 240 may include one or more transistors and one or more capacitors, receive data voltage from the drive circuit 220, and convert the received data voltage using a PWM or PAM method. In an embodiment, the line through which the data voltage from the drive circuit 220 is supplied to the conversion circuit 240 may be referred to as the data line DL. In the embodiments, as will be described below, at least some data lines DL can also be used as sensing lines SL.
[0048] In an embodiment, when the display device 200 operates in a first mode (e.g., display driving mode) during a first time period, the driving circuit 220 can supply a data voltage to the conversion circuit 240 via the data line DL. As described above, the conversion circuit 240 can turn on the first transistor TR1 to allow current to flow through the LED, thereby causing the LED to emit light.
[0049] When the display device 200 operates in a second mode (e.g., pixel defect detection mode) during a second time period, the driving circuit 220 can sense the voltage of the LED within the pixel P (e.g., the voltage VA applied to the anode terminal of the LED, such as a forward voltage drop) by using at least some data lines DL as sensing lines SL. For example, the driving circuit 220 can share and use the line between the driving circuit 220 and the fourth node N4 as the sensing line SL.
[0050] In an embodiment, when the display device 200 operates in a second mode (e.g., pixel defect detection mode), the driving circuit 220 can turn on the third transistor TR3 according to the detection control signal DETECT_EN, and thus sense the voltage of the LED from the sixth node N6, for example, the voltage VA (e.g., forward voltage drop) applied to the anode terminal of the LED. More specifically, when the third transistor TR3 is turned on by the detection control signal DETECT_EN during operation of the display device 200 in the second mode (e.g., pixel defect detection mode), the voltage VA applied to the anode terminal of the LED can correspond to the voltage V_SOURCE applied to the fifth node N5 between the driving circuit 220 and the third transistor TR3. The driving circuit 220 can check the voltage VA of the sixth node N6 by sensing the voltage of the fifth node N5.
[0051] In an embodiment, the driving circuit 220 can detect LED defects by comparing the voltage of the LED sensed through at least some data lines DL (e.g., the voltage VA applied to the anode terminal of the LED, such as the forward voltage drop) with one or more reference voltages. For example, when the display device 200 operates in a second mode (e.g., pixel defect detection mode), the driving circuit 220 can compare the voltage of the LED sensed through at least some data lines DL with a first reference voltage and send the comparison result to the detection circuit 230. The detection circuit 230 can identify (or determine) whether the LED included in the pixel P is open-circuited based on the comparison result with the first reference voltage.
[0052] When the display device 200 operates in a second mode (e.g., pixel defect detection mode), the driving circuit 220 compares the voltage VA of the LED sensed by at least some data lines DL with a second reference voltage and sends the comparison result to the detection circuit 230. The detection circuit 230 can determine whether the LED included in the pixel P is short-circuited based on the comparison result with the second reference voltage. The pixel defect detection operation of the driving circuit 220 and the detection circuit 230 will be described in detail below with reference to FIG4 and the following figures.
[0053] Figure 3 is a detailed configuration diagram of a display device according to an embodiment. Referring to Figure 3, the conversion circuit 240 of Figure 2 may include a transistor and a capacitor. However, this is merely an example, and the conversion circuit 240 is not limited to the example of Figure 3. In an embodiment, the display device 200 including the conversion circuit 240 may operate according to an active matrix method.
[0054] In this embodiment, the conversion circuit 240 may include, but is not limited to, a fourth transistor TR4 and a storage capacitor Cstg. The first transistor TR1 can control the brightness of the LED by controlling the drive current supplied to the LED. A first node N1 of the first transistor TR1 can be electrically connected to the anode electrode of the LED via a second transistor TR2, and serves as a source node or drain node. A second node N2 of the first transistor TR1 can be electrically connected to the source node or drain node of the fourth transistor TR4 (e.g., a switching transistor SWT) of the conversion circuit 240, and serves as a gate node. A third node N3 of the first transistor TR1 can be electrically connected to the drive voltage line DVL for supplying the drive voltage EVDD, and serves as a drain node or source node.
[0055] The fourth transistor TR4 of the conversion circuit 240 can be electrically connected between the data line DL and the second node N2 of the first transistor TR1, and is turned on by the scan signal received through the gate line GL1. When the fourth transistor TR4 is turned on, the data voltage Vdata supplied from the drive circuit 220 through the data line DL can be transmitted to the second node N2 of the first transistor TR1.
[0056] The storage capacitor Cstg can be electrically connected between the first node N1 and the second node N2 of the first transistor TR1. The storage capacitor Cstg can be a parasitic capacitor existing between the first node N1 and the second node N2 of the first transistor TR1, or an external capacitor intentionally designed outside the first transistor TR1.
[0057] The third transistor TR3 can be connected to the sixth node N6 and the sensing line SL. When the third transistor TR3 is turned on by the detection control signal DETECT_EN supplied through the gate line GL2, the voltage VA formed in the anode electrode of the LED can be sensed by the drive circuit 220.
[0058] In one embodiment, the driving circuit 220 can compare a voltage VA formed in the anode electrode of the LED and sensed by at least some data lines DL with one or more reference voltages to detect defects in the LED.
[0059] For example, when the display device 200 operates in a second mode (e.g., pixel defect detection mode), the driving circuit 220 can compare the voltage VA of the LED sensed through at least some data lines DL (e.g., the voltage VA applied to the anode terminal of the LED, such as a forward voltage drop) with a first reference voltage and send the comparison result to the detection circuit 230. The detection circuit 230 can identify (or determine) whether the LED included in the pixel P is open-circuited based on the comparison result.
[0060] When the display device 200 operates in a second mode (e.g., pixel defect detection mode), the driving circuit 220 compares the voltage VA of the LED sensed through at least some data lines DL (e.g., the voltage VA applied to the anode terminal of the LED, such as a forward voltage drop) with a second reference voltage and sends the comparison result to the detection circuit 230. The detection circuit 230 can identify (or determine) whether the LED included in the pixel P is short-circuited based on the comparison result. The pixel defect detection operation of the driving circuit 220 and the detection circuit 230 will be described in detail below with reference to FIG4 and the following figures.
[0061] In this embodiment, the display device 100 may operate in display driving mode (e.g., in the first mode) during a first time period and in pixel defect detection mode (e.g., in the second mode) during a second time period. The operation periods of the first mode and the second mode may be divided as shown in Table 1 below.
[0062] [Table 1] Operating mode Operation period First Mode (Display driver mode) Initialization period Program-controlled time period Light-emitting period Reset period Second Mode (Pixel Defect Detection Mode) Initialization period Program-controlled time period Comparison period Logical processing period Reset period
[0063] Referring to Table 1, the operation period of display device 100 or 200 in a first mode (e.g., display driving mode) can be divided into an initialization period, a programming period (hereinafter referred to as a programmable period), a light emission period, and a reset period. The operation period of display device 100 or 200 in a second mode (e.g., pixel defect detection mode) can be divided into an initialization period, a programmable period, a comparison period, a logic processing period, and a reset period. The programmable period can be referred to as a pre-charging period. The operations in the reset period can be the same as or similar to the operations in the initialization period. The operations in the initialization period of the first mode can be the same as or similar to the operations in the initialization period of the second mode. The operations in the programmable period of the first mode can be the same as or similar to the operations in the programmable period of the second mode. The operations in the reset period of the first mode can be the same as or similar to the operations in the reset period of the second mode. The operations in the first mode can be the same as or similar to the operations of a general display device in display driving mode, and are performed according to the method described with reference to Figures 1 to 3. In the following description, the operation of the display device 100 or 200 in a second mode (e.g., a pixel defect detection mode) will be described with reference to Figures 4 to 6. In the operation of the second mode, the operation of Figure 4 may correspond to the initialization period, the operation of Figure 5 may correspond to the programming period, and the operation of Figure 6 may correspond to the comparison period and / or the logic processing period.
[0064] In an embodiment, the drive circuit 220 shown in Figures 4 to 6 may include an amplifier 221 (e.g., a source amplifier or output buffer), a first switch (SW1) 222, and a second switch (SW2) 223. However, the drive circuit 220 is not limited thereto. The first switch 222 may be located on the data line DL at the output terminal of the amplifier 221. The second switch 223 may be connected to the detection circuit 230 at the output terminal of the amplifier 221. The first switch 222 or the second switch 223 may be implemented by a switching element. Here, the switching element may include various types of transistors (such as field-effect transistors (FETs) or bipolar junction transistors (BJTs), etc.). However, the embodiments described below are not limited thereto.
[0065] The switching between the open and closed states of the first switch 222 and / or the second switch 223 can be performed under the control of the controller 210. In an embodiment, the amplifier 221 can operate as an output buffer in a first mode (e.g., display driving mode) and as a comparator in a second mode (e.g., pixel defect detection mode). When the amplifier 221 operates as an output buffer, it can output a voltage having the same or similar voltage level as the input voltage (e.g., data voltage corresponding to the grayscale value of each pixel). In the following description, the positive (+) terminal (e.g., non-inverting terminal) of the amplifier 221 will be referred to as the first input terminal, and the negative (-) terminal (e.g., inverting terminal) of the amplifier 221 will be referred to as the second input terminal. However, the default embodiment is not limited thereto. In an embodiment, when the first and second input terminals are set in reverse, the result of the amplifier 221 can be processed as the opposite of the result described below.
[0066] Figure 4 is a diagram illustrating the operation of the circuit according to an embodiment during the initialization period. Referring to Figure 4, the first switch 222 and the second switch 223 included in the drive circuit 220 can be controlled to be turned off during the initialization period. During the initialization period, the first transistor TR1 to the third transistor TR3 can be turned off. When the switches and transistors are controlled to be turned off or open during the initialization period, the nodes and capacitors (e.g., the storage capacitor Cstg of Figure 3) included in the pixel P of the display device can be reset and initialized.
[0067] Figure 5 is a diagram illustrating the operation of the circuit according to an embodiment during a programmable period. Referring to Figure 5, the first switch 222 of the drive circuit 220 can be switched from an open state to a closed state during the programmable period. During the programmable period, a test voltage for pixel defect detection can be input to the first input terminal of the amplifier 221. The amplifier 221 can operate as an output buffer during the programmable period, and a current corresponding to the test voltage input to the first input terminal of the amplifier 221 can be supplied to the conversion circuit 240 through the output terminal of the amplifier 221. During the programmable period, a transistor (e.g., a fourth transistor TR4) within the conversion circuit 240 can be turned on, and the current input to the conversion circuit 240 can be stored in a capacitor (e.g., a storage capacitor Cstg) within the conversion circuit 240.
[0068] Figure 6 is a diagram illustrating the operation of the circuit according to an embodiment during the comparison period. Referring to Figure 6, the first switch 222 of the drive circuit 220 can switch from a closed state to an open state during the comparison period. During the comparison period, the second switch 223 of the drive circuit 220 can switch from an open state to a closed state.
[0069] During the comparison period, the second transistor TR2 and the third transistor TR3 can be turned on. When the second transistor TR2 and the third transistor TR3 are turned on during the comparison period, the voltage VA at the anode terminal of the LED (e.g., the sixth node N6) can be sensed by the driver circuit 220. For example, when the third transistor TR3 is turned on, the sixth node N6 corresponding to the anode terminal of the LED can be connected to the fifth node N5 through the third transistor TR3, and the fifth node N5 can be connected to the data line DL at the fourth node N4. The voltage VA at the anode terminal of the LED (e.g., the sixth node N6) can be input to the second input terminal of the amplifier 221 through the feedback line of the driver circuit 220.
[0070] During the comparison period, one or more reference voltages (e.g., a first reference voltage or a second reference voltage) can be input to the first input terminal of amplifier 221. For example, amplifier 221 of driver circuit 220 can compare the first reference voltage input to the first input terminal with the sensed voltage VSOURCE of the LED input to the second input terminal, and send the comparison result to detection circuit 230 via second switch 223. Detection circuit 230 can determine whether the LED included in pixel P is open-circuited based on the comparison result. For example, when the comparison result indicates that the sensed voltage of the LED is greater than the first reference voltage, detection circuit 230 can identify (or determine) that the LED is open-circuited.
[0071] Furthermore, the amplifier 221 of the driving circuit 220 can compare the second reference voltage input to the first input terminal with the sensed voltage VSOURCE of the LED input to the second input terminal, and send the comparison result to the detection circuit 230 via the second switch 223. The detection circuit 230 can determine whether the LED included in pixel P is short-circuited based on the comparison result. For example, when the comparison result indicates that the sensed voltage of the LED is less than the second reference voltage, the detection circuit 230 can identify (or determine) that the LED is short-circuited.
[0072] In the following description, the voltage sensed by the drive circuit 220 when the LED is normal or abnormal (e.g., open circuit or short circuit) will be described with reference to Figures 7A, 7B, 8A, 8B, 9A, and 9B. Figures 7A and 7B show the equivalent circuit and the sensed voltage (e.g., forward voltage drop) of the LED when it is normal; Figures 8A and 8B show the equivalent circuit and the sensed voltage (e.g., forward voltage drop) of the LED when it is open circuit; and Figures 9A and 9B show the equivalent circuit and the sensed voltage (e.g., forward voltage drop) of the LED when it is short circuit.
[0073] Referring to Figures 7A and 7B, when a detection control signal is applied to the third transistor TR3 to turn it on under normal LED conditions, the voltage VSOURCE at the fifth node N5 sensed by the drive circuit 220 (e.g., amplifier 221) rises from its initial value to a value of 2V to 3V. For example, during normal LED operation, the anode terminal of the LED can maintain a voltage of 2V to 3V depending on the forward voltage.
[0074] Referring to Figures 8A and 8B, when a detection control signal is applied to the third transistor TR3 to turn it on in the case of an open-circuit defect in the LED, the voltage VSOURCE at the fifth node N5 sensed by the driving circuit 220 (e.g., amplifier 221) gradually rises and remains higher than the driving voltage EVDD, which is higher than the voltage under normal conditions (e.g., 2V to 3V). For example, since the LED is open-circuited, no current flows through it. Therefore, the driving voltage EVDD is applied to the sixth node N6 and the fifth node N5. In an embodiment, the voltage between the voltage under normal conditions (e.g., 2V to 3V) and the driving voltage EVDD can be set as a first reference voltage, and the first reference voltage can be compared with the voltage sensed through the fifth node N5 to determine whether the LED is open-circuited and thus defective. For example, when the voltage sensed through the fifth node N5 is higher than the first reference voltage, it can be determined that the LED is open-circuited.
[0075] Referring to Figures 9A and 9B, when a detection control signal is applied to the third transistor TR3 to turn it on in the event of a short circuit in the LED causing a defect, the voltage VSOURCE at the fifth node N5 sensed by the drive circuit 220 (e.g., amplifier 221) drops and remains below the voltage under normal conditions (e.g., 2V to 3V) at ground voltage EVSS or GND (e.g., 0V). For example, due to the LED short circuit, the voltage at the fifth node N5 becomes equal to the ground voltage EVSS. In an embodiment, the voltage between the voltage under normal conditions (e.g., 2V to 3V) and the ground voltage EVSS can be set as a second reference voltage, and the second reference voltage can be compared with the voltage sensed through the fifth node N5 to determine whether the LED short circuit has caused an error. For example, when the voltage sensed through the fifth node N5 is lower than the second reference voltage, it can be determined that the LED is short-circuited.
[0076] Figure 10 is a detailed configuration diagram of a display device according to an embodiment. Referring to Figure 10, the display device may include a controller 210, a plurality of driving circuits 1010 (e.g., n driving circuits), a plurality of pixels P (e.g., n pixels), a voltage level shifter 1020, and a detection circuit 1030. Each driving circuit 1010 may include an amplifier 1014, a first switch (SW1) 1011, a second switch (SW2) 1012, a third switch (SW3) 1013, and an output switch (OUT SW) 1015. For example, a first driving circuit 1010a for driving a first pixel P1 may include an amplifier 1014a, a first switch 1011a, a second switch 1012a, a third switch 1013a, and an output switch 1015a, and an nth driving circuit 1010n for driving an nth pixel Pn may include an amplifier 1014n, a first switch 1011n, a second switch 1012n, a third switch 1013n, and an output switch 1015n. For ease of description, the line connecting the output switch 1015 to the pixel P can be referred to as the first output line OUT1, and the line connecting the amplifier 1014 and the output switch 1015 can be referred to as the second output line OUT2. According to an embodiment, at least some of the multiple drive circuits 1010 can be connected to the first voltage level shifter 1021 of the voltage level shifter 1020, and other drive circuits can be connected to the second voltage level shifter 1022 of the voltage level shifter 1020.
[0077] In the following description, the operation of the display device according to the embodiment in a pixel defect detection mode (e.g., a second mode) will be described with reference to FIGS. 10 to 12. FIGS. 11 and 12 are timing diagrams of signals operating in the display device of FIG. 10 according to the embodiment.
[0078] Referring to Figure 11, the time period from T0 to T1 corresponds to the initialization time period, the time period from T1 to T4 corresponds to the programmable time period, the time period from T4 to T7 corresponds to the comparison time period, the time period from T7 to T11 corresponds to the logic processing time period, and the time period from T11 onwards corresponds to the reset time period (or initialization time period). During each time period, a clock signal CLK can be supplied to the drive circuit 220 according to a preset period or frequency (e.g., several MHz). The controller 210 can open / close the various switches included in the display device and supply control signals (e.g., gate control signals) to each pixel P, causing at least one transistor included in pixel P to be turned on or off.
[0079] During the initialization period from T0 to T1, the first switch (SW1) 1011 and the output switch (OUT SW) 1015 can be controlled to be closed, and the third switch 1013 can be controlled to be open. During the initialization period, a preset source voltage SOURCE IN can be input to the first input terminal of the amplifier 1014, and the output switch 1015 can be controlled to be closed. Therefore, the source voltage can be applied to the first output line OUT1 and the second output line OUT2.
[0080] Controller 210 can control the drive circuit to switch from the initialization period to the programmable period at T1. For example, controller 210 can close the first switch 1011 and the output switch 1015 at T1. During the programmable period, a test voltage for pixel defect detection can be input to the first input terminal (e.g., the positive (+) terminal) of amplifier 1014. Amplifier 1014 can operate as an output buffer during the programmable period, and a current corresponding to the test voltage input to the first input terminal of amplifier 1014 can be supplied to the conversion circuit 240 of each pixel P through the output terminal of amplifier 1014. During the programmable period, a transistor (e.g., the fourth transistor TR4) within the conversion circuit 240 can be turned on, and the current input to the conversion circuit 240 can be stored in a capacitor (e.g., a storage capacitor Cstg) within the conversion circuit 240.
[0081] Controller 210 can control the drive circuit to switch from the programmable period to the comparison period at T4. Controller 210 can disconnect output switch 1015 at T2 and disconnect first switch 1011 at T3 before switching from the programmable period to the comparison period at T4. When the drive circuit switches from the programmable period to the comparison period at T4, controller 210 closes third switch 1013.
[0082] To determine whether the LED is open-circuited, the controller 210 can supply a first reference voltage (SOURCE IN H) 1100 to the first input terminal. For example, when the LED is open-circuited, the voltage of the LED sensed by the drive circuit 1010 can correspond to the drive voltage EVDD. Therefore, the voltage between the voltage under normal conditions (e.g., 2V to 3V) and the drive voltage EVDD can be set as the first reference voltage. As shown in FIG11, when the LED is open-circuited during the comparison period, the voltage (SOURCE OUT1) 1101 of the first output line OUT1 can gradually rise and correspond to the drive voltage EVDD. As shown in FIG11, when the LED is normal during the comparison period, the voltage (SOURCE OUT1) 1102 of the first output line OUT1 can be maintained at a voltage of 2V to 3V. As shown in FIG11, when the LED is short-circuited during the comparison period, the voltage (SOURCE OUT1) 1103 of the first output line OUT1 can drop and correspond to the ground voltage EVSS or GND (e.g., 0V).
[0083] As shown in Figure 11, when the LED is open during the comparison period, the voltage 1101 of the first output line OUT1 gradually increases and becomes higher than the first reference voltage (SOURCE IN H) 1100 at T6. The amplifier 1014 can operate as a comparator during the comparison period. When the third switch 1013 is controlled to close during the comparison period, the voltage sensed for the LED can be input to the second input terminal (e.g., the negative (-) terminal) of the amplifier 1014 via a feedback line. For example, the voltage of the second output line OUT2 corresponds to the result obtained by comparing the first reference voltage 1100 input to the first input terminal with the voltage 1101 of the first output line OUT1 input to the second input terminal via the amplifier 1014. Therefore, the voltage of the second output line OUT2 can become a high-level signal during the period from T4 to T6 and a low-level signal during the period from T6 to T11.
[0084] The controller 210 can switch the comparison period to the logic processing period at T7. For example, the controller 210 can sequentially close the second switches 1012 of multiple pixels at T7, so that the signal of the second output line OUT2, which is the comparison result of the amplifier 1014 in each pixel, is sent to the voltage level shifter 1020 and the detection circuit 1030. The voltage level shifter 1020 may include a first voltage level shifter 1021 and a second voltage level shifter 1022. The voltage level shifter 1020 can convert the voltage level of the input signal into a voltage level that can be processed by the detection circuit 1030, for example, a voltage level corresponding to a digital signal. In an embodiment, multiple pixels included in the display panel can be classified into a first group of pixels and a second group of pixels. The voltage level of the first group of pixels can be converted by the first voltage level shifter 1021, and the voltage level of the second group of pixels can be converted by the second voltage level shifter 1022. The signal converted by the voltage level shifter 1020 can be input to the detection circuit 1030. The detection circuit 1030 can check the results received from each pixel (e.g., the signal of the second output line OUT2) at the timing of the closing of the second switch 1012. When the signal of the second output line OUT2 for a particular pixel is a low-level signal, the detection circuit 1030 can determine that the corresponding pixel is open, thereby detecting a defect. As shown in FIG11, the controller 210 can sequentially close the second switches 1012 of multiple pixels P (e.g., multiple pixels arranged in the same column among multiple pixels arranged in a panel) during a first mode operation period (e.g., a comparison period and a logic processing period), thereby simultaneously sensing the voltages of multiple LEDs included in each pixel (e.g., the voltage applied to the anode terminal of the light-emitting diode, such as a forward voltage drop). For example, multiple drive circuits 1010 can sequentially send the comparison results of the corresponding first reference voltages for multiple LEDs to the voltage level shifter 1020 and the detection circuit 1030 during a first mode operation period.
[0085] Referring to Figure 12, the time period from T0 to T1 corresponds to the initialization time period, the time period from T1 to T4 corresponds to the programmable time period, the time period from T4 to T7 corresponds to the comparison time period, the time period from T7 to T11 corresponds to the logic processing time period, and the time period from T11 onwards corresponds to the reset time period (or initialization time period). During each time period, a clock signal CLK can be supplied to the drive circuit 220 according to a preset period or frequency (e.g., several MHz). The controller 210 can open / close the various switches included in the display device and supply control signals (e.g., gate control signals) to each pixel P, causing at least one transistor included in pixel P to be turned on or off.
[0086] During the initialization period from T0 to T1, the first switch (SW1) 1011 and the output switch (OUT SW) 1015 can be controlled to be closed, and the third switch (SW3) 1013 can be controlled to be open. When the preset source voltage SOURCE IN is input to the first input terminal of the amplifier 1014 and the output switch 1015 is controlled to be closed, the source voltage can be applied to the first output line OUT1 and the second output line OUT2.
[0087] Controller 210 can control the drive circuit to switch from the initialization period to the programmable period at T1. For example, controller 210 can close the first switch 1011 and the output switch 1015 at T1. During the programmable period, a test voltage for pixel defect detection can be input to the first input terminal (e.g., the positive (+) terminal) of amplifier 1014. Amplifier 1014 can operate as an output buffer during the programmable period, and a current corresponding to the test voltage input to the first input terminal of amplifier 1014 can be supplied to the conversion circuit 240 of each pixel P through the output terminal of amplifier 1014. During the programmable period, a transistor (e.g., the fourth transistor TR4) within the conversion circuit 240 can be turned on, and the current input to the conversion circuit 240 can be stored in a capacitor (e.g., a storage capacitor Cstg) within the conversion circuit 240.
[0088] Controller 210 can control the drive circuit to switch from the programmable period to the comparison period at T4. Controller 210 can disconnect output switch 1015 at T2 and disconnect first switch 1011 at T3 before switching from the programmable period to the comparison period at T4. When switching from the programmable period to the comparison period at T4, controller 210 closes third switch 1013.
[0089] To determine if the LED is short-circuited, the controller 210 can supply a second reference voltage (SOURCE IN L) 1200 to the first input terminal. For example, when the LED is short-circuited, the voltage of the LED sensed by the drive circuit 1010 can correspond to the ground voltage EVSS. Therefore, the voltage between the voltage under normal conditions (e.g., 2V to 3V) and the ground voltage EVSS can be set as the second reference voltage. As shown in FIG12, when the LED is short-circuited during the comparison period, the voltage 1201 of the first output line OUT1 can drop and correspond to the ground voltage EVSS or GND (e.g., 0V). As shown in FIG12, when the LED is normal during the comparison period, the voltage (SOURCE OUT1) 1202 of the first output line OUT1 can be maintained at a value of 2V to 3V. As shown in FIG12, when the LED is open-circuited during the comparison period, the voltage 1201 of the first output line OUT1 can gradually rise and correspond to the drive voltage EVDD.
[0090] As shown in Figure 12, when the LED is short-circuited during the comparison period, the voltage 1203 of the first output line OUT1 drops and becomes lower than the second reference voltage (SOURCE IN L) 1200 at time T5. The amplifier 1014 can operate as a comparator during the comparison period. When the third switch 1013 is controlled to close during the comparison period, the voltage sensed for the LED can be input to the second input terminal (e.g., the negative (-) terminal) of the amplifier 1014 via a feedback line. For example, the voltage of the second output line OUT2 corresponds to the result obtained by comparing the second reference voltage 1200 input to the first input terminal with the voltage 1201 of the first output line OUT1 input to the second input terminal via the amplifier 1014. Therefore, the voltage of the second output line OUT2 can become a high-level signal during the period from T5 to T11.
[0091] The controller 210 can control the drive circuit to operate during the logic processing period at T7. For example, the controller 210 can sequentially close the second switch 1012 of multiple pixels (e.g., multiple pixels arranged in the same column among multiple pixels arranged in a panel) at T7, such that the signal of the second output line OUT2, which is the comparison result of the amplifier 1014 in each pixel, is sent to the voltage level shifter 1020 and the detection circuit 1030. The detection circuit 1030 can check the result received from each pixel (e.g., the signal of the second output line OUT2) at the timing of the closing of the second switch 1012. When the signal of the second output line OUT2 of a particular pixel is a high-level signal, the detection circuit 1030 can determine that the corresponding pixel is short-circuited, thereby detecting a defect.
[0092] Table 2 below shows the signals of the second output line OUT2 in normal, open-circuit, and short-circuit states when the input signal is at the first reference voltage SOURCE IN H as described in FIG11; and the signals of the second output line OUT2 in normal, open-circuit, and short-circuit states when the input signal is at the second reference voltage SOURCE IN L as described in FIG12.
[0093] [Table 2] Comparison voltage normal open circuit Short circuit First reference voltage (SOURCE IN H) high Low high Second reference voltage (SOURCE IN L) Low Low high
[0094] Referring to Table 2, an open-circuit LED can be detected using a first reference voltage, and a short-circuit LED can be detected using a second reference voltage. In an embodiment, the display device can simultaneously check whether multiple pixels (e.g., multiple pixels arranged in the same column among multiple pixels arranged in a panel) are open-circuited during a pixel defect detection mode period as shown in FIG. 11, and simultaneously check whether multiple pixels (e.g., multiple pixels arranged in the same column among multiple pixels arranged in a panel) are short-circuited during a pixel defect detection mode period as shown in FIG. 12. For example, the display device can simultaneously check whether multiple pixels (e.g., multiple pixels arranged in the same column among multiple pixels arranged in a panel) are normal, open-circuited, or short-circuited through two comparison periods. In the above embodiment, the case where the display panel operates in a first mode and a second mode is taken as an example. However, the display panel can operate in the second mode to perform its functions. [Cross-references to related applications]
[0095] This application claims priority to Korean Patent Application No. 10-2021-0134042, filed on October 8, 2021, the entire contents of which are incorporated herein by reference.
[0096] 100: Display device 110: Panel 120: Data drive circuit 125: Integrated circuits, ICs 130: Detection circuit 140: Gate drive circuit 150: Data processing circuit 200: Display device 210: Controller 220: Drive circuit 221: Amplifier 222: First switch, SW1 223: Second switch, SW2 225: Integrated circuits, ICs 230: Detection circuit 240: Conversion Circuit 1010: Drive circuit 1014: Amplifier 1011: First switch, SW1 1012: Second switch, SW2 1013: Third switch, SW3 1014: Amplifier 1015: Output switch, OUT SW 1020: Voltage level shifter 1021: First voltage level shifter 1022: Second voltage level shifter 1030: Detection Circuit 1010a: First driving circuit 1014a: Amplifier 1011a: First switch 1012a: Second switch 1013a: Third switch 1014a: Amplifier 1015a: Output switch 1010n: Drive circuit 1011n: First switch 1012n: Second switch 1013n: Third switch 1014n: Amplifier 1014n: Amplifier 1015n: Output switch
Claims
1. An integrated circuit, comprising: A driving circuit configured to provide a data voltage to a pixel via a data line connected to a pixel of a panel, sense a voltage of a light-emitting diode of the pixel via the data line, and compare the voltage of the light-emitting diode with a reference voltage; and a detection circuit configured to receive from the driving circuit a comparison result between the voltage of the light-emitting diode and at least one of the reference voltages, and determine a defect of the pixel based on the received comparison result, wherein the driving circuit includes a first driving circuit and a second driving circuit, each of the first driving circuit and the second driving circuit including an amplifier, a first switch connected to an output terminal of the amplifier, and a second switch connected to the detection circuit at the output terminal of the amplifier, and wherein the second switch of the first driving circuit and the second switch of the second driving circuit are connected to each other and connected to the detection circuit.
2. The integrated circuit according to claim 1, wherein, During the first switch being closed, the amplifier receives a source voltage through a first input terminal of the amplifier and provides the data voltage to the pixel through the data line connected to the output terminal of the amplifier. During the first switch being open, the amplifier receives the reference voltage through the first input terminal of the amplifier, receives the voltage of the light-emitting diode sensed through the data line through a second input terminal of the amplifier, and outputs the comparison result between the reference voltage and the voltage of the light-emitting diode to the output terminal.
3. The integrated circuit according to claim 2, wherein, During the period when the second switch is closed, the comparison result between the reference voltage output from the output terminal of the amplifier and the voltage of the light-emitting diode is sent to the detection circuit via the second switch.
4. The integrated circuit according to claim 2, wherein, The driving circuit includes a feedback line that branches off between the first switch and the pixel and connects to the second input terminal of the amplifier, wherein the voltage of the light-emitting diode sensed by the data line is input to the second input terminal through the feedback line.
5. The integrated circuit according to claim 4, wherein, The drive circuit includes a third switch connected to the feedback line, wherein the third switch is controlled to be closed while the first switch is open.
6. The integrated circuit according to claim 1, wherein, The reference voltage includes a first reference voltage, wherein when the received comparison result indicates that the voltage of the light-emitting diode is higher than the first reference voltage, the detection circuit determines that the light-emitting diode is in an open circuit state.
7. The integrated circuit according to claim 1, wherein, The reference voltage includes a second reference voltage, wherein when the comparison result indicates that the voltage of the light-emitting diode is lower than the second reference voltage, the detection circuit determines that the light-emitting diode is in a short-circuit state.
8. The integrated circuit according to claim 1, wherein, The voltage of the light-emitting diode is a forward voltage drop of the light-emitting diode measured at one anode terminal of the light-emitting diode.
9. The integrated circuit according to claim 1, wherein, The driving circuit provides the data voltage to the pixel through the data line during a first time period, and senses the voltage of the light-emitting diode through the data line during a second time period.
10. The integrated circuit according to claim 1, wherein, The driving circuit simultaneously senses the voltage of the multiple light-emitting diodes included in the multiple pixels arranged in the same column of the multiple pixels arranged in the panel.
11. The integrated circuit according to claim 10, wherein, The driving circuit sequentially sends the comparison results of the reference voltages corresponding to the plurality of light-emitting diodes to the detection circuit.
12. A pixel driving device, comprising: An amplifier configured to provide a data voltage to a pixel via a data line connected to a pixel of a panel; A first switch is connected between the pixel and an output terminal of the amplifier; and a second switch is connected to a detection circuit at the output terminal of the amplifier. During the period when the first switch is closed, the amplifier receives a source voltage through a first input terminal and provides the data voltage to the pixel through a data line connected to the output terminal of the amplifier. During the period when the first switch is open, the amplifier receives a reference voltage through the first input terminal, receives a voltage sensed by the data line from a light-emitting diode included in the pixel through a second input terminal, and outputs a comparison result between the reference voltage and the voltage of the light-emitting diode to the output terminal. During the period when the second switch is closed, the comparison result between the reference voltage output from the output terminal of the amplifier and the voltage of the light-emitting diode is sent to the detection circuit through the second switch. The pixel driving device includes a first driving circuit and a second driving circuit. The first driving circuit and the second driving circuit each include the amplifier, the first switch, and the second switch. The second switch of the first driving circuit and the second switch of the second driving circuit are connected to each other and connected to the detection circuit.
13. The pixel driving device according to claim 12, wherein, The pixel driving device includes a feedback line that branches off between the first switch and the pixel and connects to the second input terminal of the amplifier, wherein the voltage of the light-emitting diode sensed by the data line is input to the second input terminal through the feedback line.
14. The pixel driving device according to claim 13, wherein, The pixel driving device includes a third switch connected to the feedback line, wherein the third switch is controlled to be closed while the first switch is open.
15. The pixel driving device according to claim 12, wherein, A first reference voltage is input to the first input terminal of the amplifier to determine whether the light-emitting diode is in an open-circuit state.
16. The pixel driving device according to claim 12, wherein, A second reference voltage is input to the first input terminal of the amplifier to determine whether the light-emitting diode is in a short-circuit state.
17. The pixel driving device according to claim 12, wherein, The voltage of the light-emitting diode is a forward voltage drop of the light-emitting diode measured at one anode terminal of the light-emitting diode.
18. A pixel defect detection method, comprising: During a first time period, a data voltage is provided to the pixel via an amplifier connected to a pixel of a display panel via a data line; In a second time period, a reference voltage and a voltage of a light-emitting diode included in the pixel are received by the amplifier, and a comparison result between the reference voltage and the voltage of the light-emitting diode is output; and a defect of the pixel is identified based on the comparison result between the reference voltage and the voltage of the light-emitting diode, wherein a pixel driving device for detecting the defect of the pixel includes a first driving circuit and a second driving circuit, the first driving circuit and the second driving circuit each including the amplifier, a first switch connected between the pixel and an output terminal of the amplifier, and a second switch connected to a detection circuit at the output terminal of the amplifier, and wherein the second switch of the first driving circuit and the second switch of the second driving circuit are connected to each other and connected to the detection circuit.
19. The pixel defect detection method according to claim 18 further includes: The comparison result between a first reference voltage and the voltage of the light-emitting diode is used to determine whether the light-emitting diode is in an open circuit state; And determine whether the light-emitting diode is in a short-circuit state based on the comparison result between a second reference voltage and the voltage of the light-emitting diode.
Citation Information
Patent Citations
Circuitry and method for detecting failed pixel and display device
US10818207B2
