Solid-state bonding method for the manufacture of semiconductor chucks and heaters
Patent Information
- Application Number
- TW112105433
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-02-15
- Filing Date
- 2023-02-15
- Publication Date
- 2026-10-21
- Estimated Expiration
- 2043-02-14
AI Technical Summary
Semiconductor pedestals face challenges in withstanding harsh chemical environments and maintaining the integrity of embedded components like heaters, clamping electrodes, and RF antennas during processing and cleaning, while ensuring airtight sealing.
A layered assembly using nickel-based electrically functional layers and perimeter sealing strips is bonded via a solid-state process, integrating resistive heaters, RF antennas, and clamping electrodes, with dielectric regions for isolation, to secure and seal substrates in a controlled atmosphere.
The assembly provides a durable, airtight, and thermally stable structure that maintains component functionality and integrity under extreme conditions, with low leakage rates and temperature sensing capabilities.
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Abstract
Description
Solid-state bonding method for manufacturing semiconductor chucks and heaters This application claims priority and interest in U.S. Provisional Application No. 63 / 310,448, filed February 15, 2022. The disclosures of the above application are incorporated herein by reference in their entirety. This disclosure relates to pedestals and clamps for use in semiconductor manufacturing equipment, and more specifically, to methods for manufacturing such pedestals and clamps having embedded heaters, RF antennas and clamping electrodes. The statements in this section are provided only as background information in relation to this disclosure and do not constitute prior art. In semiconductor wafer processing, a pedestal is arranged within a processing chamber to support a semiconductor substrate. The pedestal is typically made of a ceramic material and usually includes a heater plate and a shaft secured to a lower portion of the heater plate. The shaft is hollow and is configured to receive various electrical connections to power the heater plate and to monitor various system parameters throughout the manufacturing process. Some mounts also include an embedded clamping electrode that electrostatically holds the semiconductor substrate to a top surface of the mount during processing. These types of mounts are called electrostatic chucks or ESCs and operate at potentials ranging from about 300 to several thousand volts. Other mounts include an embedded RF antenna that couples an RF power supply between the chamber wall and the mount or a clamping electrode. The environment within the processing chamber can be corrosive due to the type of gas used and the high temperatures throughout the deposition, etching, doping, and annealing processes. Accordingly, the stage must be able to withstand these harsh processing environments and the cleaning steps within the chamber after wafer removal, while maintaining the integrity of the operational components embedded or housed therein, such as heaters, clamping electrodes, and RF antennas. This disclosure addresses the challenges of manufacturing pedestals and other ceramic assemblies that operate in harsh chemical environments. This section provides a general overview of one of the contents of this disclosure and is not a complete disclosure of its full scope or all its features. In one form of this disclosure, a layered assembly for use in a controlled atmosphere chamber includes: a plurality of substrates; at least one electrical functional layer embedded between two adjacent substrates of the plurality of substrates, the electrical functional layer comprising a material assembled to secure the two adjacent substrates together using a solid-state bonding process; at least one electrical termination region integrated with the at least one electrical functional layer; and at least one peripheral sealing strip embedded between the inner surfaces of the two adjacent substrates and extending around one of the inner surfaces. The at least one peripheral sealing strip comprises a material assembled to secure and seal the two adjacent substrates together using a solid-state bonding process, and a plurality of dielectric regions exist between the two adjacent substrates and between several edge boundaries of the at least one electrical functional layer, the plurality of dielectric regions being sealed between the two adjacent substrates by the at least one peripheral sealing strip. In variations of this layered assembly, which may be implemented individually or in any combination: the material of the electrical functional layer comprises nickel, and in one form the nickel is in an amount greater than 50 at.% and in another form greater than 99 at.%; the material of the peripheral sealing strip comprises nickel, and in one form the nickel is in an amount greater than 50 at.% and in another form greater than 99 at.%; the material of the electrical functional layer is the same as the material of the peripheral sealing strip; the material of the electrical functional layer and the material of the peripheral sealing strip comprise nickel, and in one form the nickel is in an amount greater than 50 at.% and in another form greater than 99 at.%; The amount is at.%; the material of the electrical functional layer is graded and has variable material properties along at least one dimension; the electrical functional layer is selected from the group consisting of: a resistive heater, an RF antenna, and a clamping electrode; the electrical functional layer is a resistive heater and a temperature sensor; each of the plurality of substrates comprises a ceramic material; the two adjacent substrates comprise the same ceramic material; the layered assembly further comprises an upper substrate disposed on one of the two adjacent substrates, the upper substrate including A ceramic material comprising a ceramic material different from that of the two adjacent substrates; the two adjacent substrates being aluminum nitride (AlN) material and the upper substrate being an advanced AlN material; the plurality of substrates comprising beryllium oxide (BeO) material; the two adjacent substrates comprising a plurality of openings formed therethrough, and the layered assembly further comprising local sealing strips disposed around the periphery of each of the plurality of openings between the two adjacent substrates; the material of the local sealing strips comprising nickel, and in one form in an amount greater than 50 at.% and in another form greater than 99 at.The amount is %; the material of the electrical functional layer, the material of the peripheral sealing strip, and the material of the partial sealing strips are the same; it further includes an adhesive layer disposed between at least one of the two adjacent substrates and the at least one electrical functional layer; the adhesive layer is further disposed between at least one of the two adjacent substrates and the at least one peripheral sealing strip; the layered assembly further includes two electrical functional layers embedded between two adjacent substrates in the plurality of substrates, each electrical functional layer being applied to the two adjacent substrates prior to the solid bonding process. Each of the plurality of electrical functional layers includes a trace, and a trace of one electrical functional layer is wider than a trace of another electrical functional layer; the layered assembly further includes two peripheral sealing strips embedded between two adjacent substrates in the plurality of substrates, each peripheral sealing strip being applied to each of the two adjacent substrates prior to the solid-state bonding process; one of the peripheral sealing strips has a bandwidth wider than one of the other peripheral sealing strips; a plurality of material islands disposed within the dielectric regions, wherein the material islands are not electrically charged. (live); the at least one electrical functional layer is sputtered onto at least one of the two adjacent substrates; the at least one electrical functional layer is a foil material; a shaft is securely attached to the underside of one of the two adjacent substrates; a connecting layer is disposed between the shaft and the underside of the adjacent substrate, the connecting layer being made of nickel, wherein in one form the nickel is in an amount greater than 50 at.% and in another form greater than 99 at.%; the seal is hermetically tight; the at least one electrical functional layer includes a resistance heater having a plurality of partitions; the plurality of resistance heater partitions are disposed in different layers within the plurality of substrates. In another form of this disclosure, a heater assembly for use in a semiconductor processing chamber includes: an upper substrate; at least two adjacent substrates secured to a lower surface of the upper substrate; at least one resistive heater embedded between the two adjacent substrates, the at least one resistive heater comprising a nickel material configured to secure the two adjacent substrates together using a solid-state bonding process; at least one electrical termination region integrated with the at least one resistive heater; and at least one peripheral sealing strip embedded between the inner surfaces of the two adjacent substrates and extending around one of the inner surfaces, the at least one peripheral sealing strip comprising a nickel material configured to secure and seal the two adjacent substrates together using a solid-state bonding process. A plurality of dielectric regions exist between the two adjacent substrates and between several edge boundaries of the resistive heater, the plurality of dielectric regions being sealed between the two adjacent substrates by the at least one peripheral sealing strip. A shaft is secured to the underside of one of the two adjacent substrates by a connecting layer comprising a nickel material. In one variation of this heater assembly, an RF antenna is embedded between the upper substrate and one of the two adjacent substrates. The RF antenna comprises a nickel material that is assembled to secure the upper substrate to the adjacent substrate using a solid-state bonding process. In another form, a layered assembly for use in a controlled atmosphere chamber includes: at least two adjacent substrates; at least one peripheral sealing strip embedded between the inner surfaces of the two adjacent substrates and extending around one of the inner surfaces, the at least one peripheral sealing strip comprising a nickel material configured to secure and seal the two adjacent substrates together using a solid bonding process. In another embodiment, a heater assembly for use in a semiconductor processing chamber includes: a heater plate; a shaft secured to a lower side of the heater plate; and at least one peripheral sealing strip embedded between the inner surfaces of the heater plate and the shaft and extending around one periphery of the inner surfaces, the at least one peripheral sealing strip comprising a nickel material assembled to securely and seal the heater plate and the shaft together using a solid-state bonding process. According to another aspect of this disclosure, a method for forming a layered assembly for use in a controlled atmosphere chamber, the layered assembly comprising a plurality of substrates, the method comprising: applying a material to at least one surface of two adjacent substrates of the plurality of substrates; patterning the material into an electrical functional layer having an integrated electrical termination region and a peripheral sealing strip disposed around the periphery of one of the at least one surface of the two adjacent substrates; and bonding the plurality of substrates in a controlled environment using heat and pressure to solid-bond the material to the two adjacent substrates to secure the two adjacent substrates together to form the layered assembly, the layered assembly being sealed. A plurality of dielectric regions exist between the two adjacent substrates, within the electrical functional layer, the plurality of dielectric regions being sealed within the electrical functional layer by the peripheral sealing element. This method can be implemented individually or in any combination, and in its variations: the peripheral sealing strip is patterned in a step separate from patterning the electrical functional layer; the material is patterned using a laser; the material is patterned using a mask; the material is patterned using an additive manufacturing process; the material is patterned using an etching process; the material is patterned using a waterjet; the material is patterned using a hybrid laser-waterjet process; the material is nickel and is applied using a sputtering process; the nickel material is at least 50 at.%; the nickel material is at least 99 at.%; the material is applied to two faces of the two adjacent substrates; pressure is controlled to adjust the size of the dielectric regions; and an adhesive layer is applied to at least one face of the adjacent substrates before the material is applied. In yet another form of this disclosure, a layered assembly for use in a controlled atmosphere chamber comprises: a plurality of substrates; at least one electrical functional layer embedded between two adjacent substrates of the plurality of substrates, the electrical functional layer comprising a material assembled to secure the two adjacent substrates together using a solid-state bonding process; and at least one electrical termination region integrated with the at least one electrical functional layer. A plurality of dielectric regions exist between the two adjacent substrates and between the edge boundaries of the at least one electrical functional layer. In one variation of this layered assembly, at least one peripheral sealing strip is embedded between the inner surfaces of two adjacent substrates and extends around one of the inner surfaces. The at least one peripheral sealing strip comprises a material that is assembled to secure and seal the two adjacent substrates together using a solid bonding process. The plurality of dielectric regions are sealed between the two adjacent substrates by the at least one peripheral sealing strip. In another embodiment, a method for forming a layered assembly for use in a controlled atmosphere chamber, the layered assembly comprising a plurality of substrates, the method comprising: applying a material to at least one surface of two adjacent substrates of the plurality of substrates; patterning the material into an electrical functional layer having integrated electrical termination regions; and bonding the plurality of substrates in a controlled environment using heat and pressure to solid-bond the material to the two adjacent substrates to secure the two adjacent substrates together to form the layered assembly, the layered assembly being hermetically sealed. A plurality of dielectric regions exist between the two adjacent substrates and within the electrical functional layer. In variations of this method, which may be implemented individually or in any combination: the material applied to at least one side of the two adjacent substrates is also patterned and disposed around the periphery of one of the at least one surfaces of the two adjacent substrates as a peripheral sealing strip, and the plurality of dielectric regions are sealed within the electrical functional layer by the peripheral sealing element; the material is applied to each opposite surface of the two adjacent substrates, and a pattern of the electrical functional layer on one opposite surface is different from a pattern of the electrical functional layer on the other opposite surfaces; and the electrical functional layer is a resistance heater and a pattern on one opposite surface includes an unheated area. Further applicability will become apparent from the description provided herein. It should be understood that the descriptions and specific examples are intended for illustrative purposes only and are not intended to limit the scope of this disclosure. The following description is illustrative in nature and is not intended to limit the content, application, or purpose of this disclosure. It should be understood that in all drawings, corresponding reference numerals indicate similar or corresponding parts and features. Referring to Figures 1 and 2, an example of a heater assembly for use in a semiconductor processing chamber is shown, and is generally indicated by reference numeral 20. In this form, the heater assembly 20 is also referred to as a "pedestal". The heater assembly 20 includes an upper substrate 22, at least two adjacent substrates 24 and 26 fixed to a lower surface of the upper substrate 22, and a shaft 28 fixed to a lower side of one of the two adjacent substrates 26. In one form, each of the upper substrate 22 and the at least two adjacent substrates 24 and 26 is a ceramic material. The ceramic material may be the same for each of the substrates or may vary depending on the specific application requirements. For example, in one form, each of the substrates (22, 24, 26) and the shaft 28 are made of aluminum nitride (AlN). In another embodiment, the upper substrate 22 is an advanced aluminum nitride (AlN) material, possessing different material properties such as higher volume resistivity, and each of the two adjacent substrates 24 and 26 and the shaft 28 is an aluminum nitride (AlN) material. In yet another embodiment, the lower adjacent substrate 26 is a material having a lower thermal conductivity than the other / upper adjacent substrate 24, such as, for example, alumina (Al₂O₃). 2O 3) Materials. In another embodiment, each of the upper substrate 22, the two adjacent substrates 24 and 26, and the shaft 28 is made of beryllium oxide (BeO). These and other variations in the materials of each of the substrates (22, 24, 26) and the shaft 28 should be interpreted as falling within the scope of this disclosure. Referring now to Figure 3, at least one electrical functional layer is embedded between the substrates (e.g., 22 / 24 / 26), wherein the electrical functional layer is configured to secure the substrates together using a solid-state bonding process described in more detail below. Advantageously, in one form of this disclosure, the electrical functional layer has a dual function: securing the substrates together and providing an electrical function within the heater assembly 20. This electrical function may include, for example, a resistance heater, an antenna (e.g., an RF antenna), or a clamping electrode, etc. More generally, the teachings of this disclosure are applicable to any layered assembly (i.e., not limited to the heater assembly 20 illustrated and described herein) for use in a controlled atmosphere chamber while remaining within the scope of this disclosure. In one embodiment, the electrical functional layer is a resistance heater 30. In this embodiment, the resistance heater 30 is exemplified as two layers 30' and 30" and comprises a nickel material. The two layers 30' and 30" are separately applied to each inner surface 25 and 27 of two adjacent substrates 24 and 26 in a manufacturing process described in more detail below. However, it should be understood that the resistance heater 30 can be applied as a single layer to the inner surface 25 or 27 while remaining within the scope of this disclosure. As shown, the resistance heater 30 is typically in the form of a single trace or multiple traces, which are individual continuous tracks of a conductive / resistive material (e.g., nickel) providing a predetermined resistance per unit length. The specific design (material and dimensions) of these traces results in a customizable watt density for a given input power. These traces can also be arranged in multiple sections, as described in more detail below. As further shown, another electrical functional layer in this configuration is an RF antenna 40. Similar to the resistive heater 30, the RF antenna 40 is a two-layer structure 40' and 40" and comprises a nickel material. In a manufacturing process described in more detail below, the two layers 40' and 40" are separately applied to an upper surface 29 of one of two adjacent substrates, and a lower surface 23 of the upper substrate 22. However, it should be understood that the RF antenna 40 may be applied as a single layer to either the upper surface 29 or the lower surface 23, while remaining within the scope of this disclosure. Referring now to Figures 4 and 5, at least one electrical termination region 50 is integrated with the resistance heater 30 (for clarity, only one resistance heater layer 30' is shown). As used herein, the term "integrated" should be interpreted as meaning that the termination region is part of and electrically continuous with the resistance heater 30. In one form, this integrated construction includes the termination region and the resistance heater 30 being made of the same material; however, different materials may be used while remaining within the scope of this disclosure. In this form, the electrical termination region 50 is located in a central area of the resistance heater 30 layer and is configured to electrically connect the resistance heater 30 to a power lead (not shown) extending through a central portion of the shaft 28. In an alternative form, the electrical termination region 50 is not in the central portion of the shaft 28, but rather located in other areas of the resistance heater 30, particularly in those with multiple heater sections. In this exemplary form, the electrical termination region includes four (4) terminations for a two (2) zone heater, as shown. However, it should be understood that a single partition or multiple partitions may be used while remaining within the scope of this disclosure. Additionally, the heater assembly 20 may include an additional substrate (not shown) such that a plurality of heater partitions are disposed in different layers within such plurality of substrates. This configuration is shown in co-examined application No. 16 / 196,820, which is jointly assigned with this application, and the contents of which are incorporated herein by reference in their entirety. As further shown, at least one peripheral sealing strip 60 is embedded between the resistance heaters 30 and extends around one of their peripheries. The peripheral sealing strip 60 is configured to securely and seal the two adjacent substrates 24 and 26 together using a solid-state bonding process. Therefore, the peripheral sealing strip 60 also serves a dual purpose: securing the two adjacent substrates 24 and 26 and sealing the interface between them. In one embodiment, the seal is hermetically tight to meet the application requirements within the processing chamber. The hermetically tightness, or leakage rate, in one embodiment is less than approximately 1 x 10⁻⁶. -6 atm cc / sec (standard cubic centimeters per second) He. In another form, the leakage rate is less than about 1 x 10⁻⁶. -7 atm cc / sec He, and in yet another form, the leakage rate is less than about 1x10 -9 atm cc / sec He. Similar to the resistance heater 30 and the RF antenna 40, the peripheral sealing strip 60 is in the form of two layers 60' and 60" (FIG. 3) and contains a nickel material. The two layers 60' and 60" are applied separately to each of the inner surfaces 25 and 27 of the two adjacent substrates 24 and 26, as described in more detail below. However, it should be understood that the peripheral sealing strip 60 can be applied as a single layer to the inner surface 25 or 27 while remaining within the scope of this disclosure. Referring also to Figures 6 and 7, which show in more detail a layer 40' of the RF antenna 40, which also includes a peripheral sealing strip 60. The peripheral sealing strip 60 in the layer of the RF antenna 40 is applied and functions in the same manner as the peripheral sealing strip 60 described above for the resistive heater 30. The RF antenna 40 is typically a continuous material layer as shown, but other patterns may also be used, while remaining within the scope of this disclosure. For example, other patterns may include a grid pattern for the RF antenna. Additionally, the RF antenna 40 layer may include two or more electrically independent / isolated sections or partitions (not shown), or other patterns such as a grid, while remaining within the scope of this disclosure. In this form with two or more partitions, the electrical functional layer may also be a clamping electrode. As further shown in both the resistive heater 30 and the layer of the RF antenna 40, a partial sealing strip 70 is provided, which is disposed around the periphery of one of the openings extending through the substrate. More specifically, and referring to Figures 8A and 8B, a plurality of openings 90 extend through the substrates (22, 24, 26), and these openings are assembled to accommodate lifting pins (not shown). A partial sealing strip 70 in each of the layers (resistive heater layer 30 and RF antenna layer 40) acts to seal an interface between the substrates (22, 24, 26) where each of the openings 90 is located. The partial sealing strip 70, in one form being made of the same material as the layer it is in, also acts to secure the substrates (22, 24, 26) to each other where the openings 90 are located, thereby providing a dual function. Various methods of applying and patterning the partial sealing strip 70, the peripheral sealing strip 60, the resistive heater 30, and the RF antenna 40 will be described in more detail below. As further shown in Figures 8A and 8B, a plurality of dielectric regions 100 exist between two adjacent substrates 24 and 26 and between several edge boundaries 31 of the resistance heater 30. In another embodiment, the dielectric regions 100 also exist between the upper substrate 22 and one of the two adjacent substrates 24. The dielectric regions 100 are sealed between these substrates (22, 24, 26) by peripheral sealing strips 60 and, in some areas, by local sealing strips 70. The dielectric regions 100 generally function to dielectrically separate the traces of the resistance heater 30 from each other (to suppress arcing and short circuits), dielectrically separate the openings 90 and the peripheral sealing elements 60, and any other morphology in the layer that should not be "energized" when the resistance heater 30 is "energized". Similarly, for the RF antenna 40, the dielectric region 100 dielectrically separates the opening 90 and the surrounding sealing strip 60 to prevent the RF antenna 40 from being "energized" when it is "energized", and divides the electrically independent / isolated sections (not shown) of the RF antenna 40 into multiple sections / partitions. In one variation of this disclosure, a plurality of material islands 102 are disposed within a dielectric region 100, which is a region of non-electric material and thus facilitates bonding of substrates 22, 24 and 26. In the case of dielectric region 100 and various electrical functional layers (e.g., resistance heater 30, RF antenna 40), this disclosure also provides a layered assembly in which, in one form of this disclosure, the substrates (e.g., 22, 24, 26) do not physically contact each other. Referring back to Figure 3, the shaft 28 is secured to the underside of one of the two adjacent substrates 26 by a connecting layer 110. In one embodiment, the connecting layer 110 is also made of nickel; however, it should be understood that other materials may be used while maintaining the scope of this disclosure. As explained above, in one form of this disclosure, each of the resistive heater 30, RF antenna 40, peripheral sealing element 60, local sealing strip 70, material island 102, and connecting layer 110 for shaft 28 is made of nickel. Nickel is used in this form due to its material properties, compatibility with the specific design of the heater assembly 20, its manufacturing process as described in more detail below, and its ability to perform electrical functions for the resistive heater 30 and RF antenna 40 within a controlled atmosphere chamber. More specifically, nickel has electrical conductivity, which provides for easier integration of lower-profile electrical functional components (i.e., resistive heater 30, RF antenna 40, etc.) into the pedestal design. Nickel also has a relatively high TCR (temperature coefficient of resistance), which allows the electrical functional components (i.e., resistive heater 30, RF antenna 40, etc.) to also function as temperature sensors (as described in more detail below). Furthermore, nickel can operate at relatively high temperatures, i.e., up to about 1,400 °C, and in other forms at additional operating temperature targets of 650 °C, 800 °C, or 900 °C. Nickel is also a material compatible with controlled atmosphere chambers, such as semiconductor processing chambers. Nickel also exhibits a relatively compatible CTE (coefficient of thermal expansion) relative to ceramic substrates in controlled chamber environments, and more specifically, CTE mismatch and thermal cycling can be mitigated while maintaining its material properties. Additionally, nickel is compatible with innovative manufacturing processes for applying nickel materials, which are described in more detail below. In one form, the nickel material is an alloy composition having a nickel content greater than about 50 at.%. In another form, nickel is present in a content greater than about 99 at.%, and even more specifically, between 99 at.% and 99.999 at.%, and less than 0.1 at.% carbon. While nickel is used in conjunction with each of the elements described herein, it should be understood that other materials and combinations thereof may be employed while remaining within the scope of this disclosure. Additionally, a gradient material may be employed that has variable material properties (e.g., resistivity) along at least one dimension, such as, for example, by its thickness, across its width, or along its length. These variable material properties may be designed into such materials or may be the result of manufacturing processes such as hot pressing. For example, resistive layer 30 may be a nickel material, while RF antenna 40 may be an aluminum material, and further, peripheral sealing strip 60 and / or partial sealing strip 70 may be the same or different materials, such as titanium. These and other combinations of materials should be construed as falling within the scope of this disclosure. In yet another form, nickel (or another material of the electrical functional layer) acts as a sensor and provides temperature information. Typically, changes in the material's resistance are monitored, and the temperature is calculated (or determined from a lookup table) based on these changes. Exemplary methods, systems, and controllers for this dual-function electrical functional layer are described in more detail in U.S. Patent No. 7,196,295, which is commonly owned by us and is incorporated herein by reference in its entirety. Referring now to Figure 9, and also to Figure 3, one method of manufacturing the heater assembly 20 is illustrated and generally indicated by reference numeral 200. In a first step 210, substrates 22, 24, and 26 are prepared. More specifically, substrates 22, 24, and 26 are ground or surface-finished to a predetermined flatness and parallel dimension on the order of approximately 0.0004 in. (0.01 mm). Next, in step 230, each of the layers for the resistance heater 30, the RF electrode 40, and the connecting layer 110 for the shaft 28 is applied to the surfaces of the substrates (22, 24, 26) and the shaft 28. In an alternative step as shown in step 220, depending on specific material and processing requirements, an adhesive layer (not shown) may be applied to the surfaces of the substrates. For example, if the surface roughness of the adjacent substrate 24 / 26 is low, or if BeO is used as the material for these substrates (22, 24, 26), and nickel does not adhere to it as readily as it does to other substrate materials (e.g., AlN), then an adhesive layer will be used. In a specific example of a BeO substrate, a titanium (Ti) adhesive layer will be used between the nickel and BeO. Therefore, an adhesive layer will be used if the bonding surface of the substrate is mechanically too smooth or if one of the substrate materials does not easily adhere to the bonding / joining material. Materials used for the adhesive layer may include, for example, nickel (Ni), aluminum (Al), zirconium (Zr), titanium (Ti), and hafnium (Hf), etc. In one embodiment, a continuous material layer (e.g., nickel) is applied to each of the inner surfaces 25 and 27 of adjacent substrates 24 and 26, as well as the upper surface 29 of one of the two adjacent substrates 24 and the lower surface 23 of the upper substrate 22. As explained above, in one embodiment, the two layers 30' and 30" forming the resistance heater 30 are applied to each of the inner surfaces 25 and 27 of the two adjacent substrates 24 and 26, respectively, and are mirror images of each other. Similarly, the two layers 40' and 40" forming the RF antenna 40 are applied to an upper surface 29 of one of the two adjacent substrates 24 and the lower surface 23 of the upper substrate 22, respectively. This application method is also referred to as a "double-sided" or "two-sided" application. As explained above, a single-sided application for the entire layer is within the teachings of this disclosure. Preliminary tests have shown that the "double-sided" application provides an improved hermetic seal for the entire heater assembly 20. In one form of this disclosure, the connecting layer 110 is applied as a single layer to the upper surface of the shaft 28, as a continuous layer without patterning. Advantageously, the material is applied using a sputtering process. However, it should be understood that other application methods, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), thick films, thin films, sol-gels, thermal spraying, continuous foils and patterned foils, and combinations thereof, are considered to be within the scope of this disclosure. In one embodiment, each material layer is applied as a continuous layer and subsequently patterned (step 240) to form various elements of the layer, namely, a resistance heater 30, an RF antenna 40, a peripheral sealing strip 60 and / or a local sealing strip 70, and material islands 102. In one embodiment, this patterning is achieved by laser stripping or laser removal. Other forms of material removal should be construed as falling within the scope of this disclosure, such as, for example, chemical etching, water jetting, hybrid water jetting (water jetting and laser), and mechanical polishing, etc. In another embodiment, a mask may be used for one or more layers, and material is applied to the mask to form one or more of the elements. In one variation of this disclosure, one trace of the resistance heater layer 30' is wider than one trace of the other resistance heater layer 30" to provide improved alignment or trace matching when adjacent substrates 24 and 26 are assembled together. This approach can also be used in conjunction with peripheral sealing strips 60 and partial sealing strips 70, as well as other elements, and can be used in conjunction with "double-sided" application of material. After each of the layers is applied and patterned, the substrates (22, 24, 26) are assembled together in step 250 and held together in a securing tool (not shown). The assembled substrates 22, 24, and 26 are then joined by heat and pressure in a controlled environment (step 260) for a predetermined amount of time to solid-state bond the material of each layer to secure the substrates (22, 24, 26) together. For example, a vacuum autoclave can be used at about 1,000 °C and about 1,000 psi for about two (2) hours to solid-state bond the substrates (22, 24, 26). As used herein, it should be understood that "solid-state" bonding (or bonding) means that the temperature of the material (e.g., nickel) remains below its liquidus temperature throughout the application of heat and pressure during the bonding process. This process should be distinguished from other methods, such as brazing, in which the temperature of the material exceeds its liquidus temperature. Solid-state bonding may also be referred to as diffusion bonding; however, the teachings of this disclosure do not necessarily require the material of each electrical functional layer (e.g., nickel) to diffuse into another electrical functional layer (applied on both sides) or into the substrate material. Additionally, it should be understood that the term "liquid phase" as used herein should be interpreted to include transient liquid phase bonding (TLP). Although shaft 28 can be joined to the assembled substrates (22, 24, 26) in the same procedure as described above, in one embodiment, shaft 28 is joined to the substrates (22, 24, 26) in a separate procedure after the substrates (22, 24, 26) are solid-jointed. In another embodiment, shaft 28 is also solid-jointed to the substrates (22, 24, 26) using a similar procedure as described above, thus resulting in a two-step solid-jointing procedure to complete the entire heater assembly 20 / base. For example, at least one peripheral sealing strip is embedded between the inner surfaces of the adjacent substrate 26 (or more typically, a heater plate) and shaft 28 and extends around one periphery of the inner surfaces. In one embodiment, the peripheral sealing strip contains a nickel material, which, as described above, is assembled to securely and seal the heater plate and shaft 28 together using a solid-jointing procedure. However, it should be understood that other connection / joining techniques can be used to connect the shaft 28 while remaining within the scope of this disclosure. Additionally, the shaft 28 can be integrated with one of the adjacent substrates 26 while remaining within the scope of this disclosure. In one variation of this disclosure, the pressure applied during the solid-state bonding process is further controlled to adjust the size of the dielectric region 100. In the solid-state bonding process, typically for nickel materials, the temperature is between about 600 °C and about 1,455 °C, the pressure is between about 10 psi and about 10,000 psi, and the total time at the bonding temperature ("soak time") is between about 0.25 hours and about 24 hours. The vacuum level is between about 1 and about 1E. -7 Between Torr, and may include an inert gas, such as N. Nitrogen (Nitrogen), He (Helium), and Ar (Ar), etc. Additionally, reducing atmospheres can be used to reduce oxides, such as, for example, hydrogen or carbon monoxide. It should be understood that these processing parameters will vary depending on the size and construction of the layered assembly and therefore should not be construed as limiting the scope of this disclosure. In yet another form of this disclosure, a method for repair is provided, wherein a layered assembly comprises at least two adjacent substrates (24 / 26) and at least one peripheral sealing strip 60, the peripheral sealing strip being embedded between the internal surfaces of the two adjacent substrates (24 / 26) and extending around the periphery of one of the internal surfaces, similar to the peripheral sealing strip 60 previously described. In one form, the peripheral sealing strip 60 comprises a nickel material, which is assembled to securely and seal the two adjacent substrates (24 / 26) together using the solid bonding process described above. Furthermore, the peripheral sealing strip 60 can be used in a different geometric configuration for this repair application, for example, as a continuous monolayer or a plurality of sealing strips disposed throughout the layer, which may or may not be "peripheral". Typically, a pedestal requiring rework is surface-refined or ground to a specified flatness and surface roughness. In one example, a surface-refined substrate would be represented by the adjacent substrate 24 as illustrated and described above. A peripheral sealing strip 60 (or other sealing configuration) is then applied to one or both internal surfaces of the surface-refined substrate and a new upper substrate (i.e., the adjacent substrate 22 as illustrated and described above), and the assembly is then solid-bonded as described herein. While nickel is used as a material for the peripheral sealing strip 60 in this variation, it should be understood that other materials, such as aluminum, silicon, and their alloys, may be used, while remaining within the scope of this disclosure. Furthermore, the surface-refining process can extend further into the assembly, for example, even to the adjacent substrate 26 or shaft 28, while remaining within the scope of this disclosure. Referring now to Figures 10A and 10B in conjunction with Figure 3, another form of the disclosure is illustrated, in which a region of a resistance heater layer 30''' on one adjacent substrate 26 is thermally decoupled from a region of another resistance heater layer 30'' on another adjacent substrate 24. More specifically, in this example, the resistance heater layer 30' applied to the lower surface of the adjacent substrate 24 remains unchanged. The second resistance heater layer 30''' applied to the upper surface of the adjacent substrate 26 defines a different trace pattern as shown, wherein the traces (also referred to as "circuits") are omitted near the electrical termination region 50, creating an unheated region 300 near the portion above the shaft 28. Accordingly, heat conduction from a central region 310 of the resistance heater layer 30' to the unheated region 300 is suppressed, thereby providing a further means of locally controlling the temperature and reducing heat loss near the shaft 28. These and other alternative trace pattern variations used for the resistance heater layer and other electrical functional layers, which are not mirror images of each other as described above, should be interpreted as falling within the scope of this disclosure. For example, the thickness of the traces may be reduced rather than omitted in certain areas, thereby creating gaps between adjacent traces (in the case of the aforementioned bilateral application), thereby decoupling adjacent traces from each other thermally. Unless otherwise expressly stated herein, all values indicating mechanical / thermal properties, percentages of composition, dimensions and / or tolerances or other characteristics in describing the scope of this disclosure shall be understood as modified by the terms "about" or "approximately". Such modifications are made for various reasons, including: industrial practice; material, manufacturing and assembly tolerances; and testing capabilities. When used in this document, the sentence pattern "at least one of A, B, and C" should be interpreted as using a non-exclusive logical "or" to represent a logic (A or B or C), and should not be interpreted as meaning "at least one A, at least one B, and at least one C". The descriptions in this disclosure are illustrative in nature only; therefore, any changes that do not depart from the substance of this disclosure are intended to fall within its scope. Such changes are not to be considered as departing from the spirit and scope of this disclosure. 20: Heater assembly 22: (Upper) Substrate 23: Lower surface 24: (Upper) Adjacent substrate, substrate 25, 27: Internal surface 26: (Lower) Adjacent substrate, substrate 28: Shaft 29: Upper surface 30: Resistance heater, resistance layer 30': Resistance heater layer, layer 30: Resistance heater layer, layer 30''': (Second) Resistance heater layer 31: Edge boundary 40: RF antenna, RF electrode 40', 40", 60', 60: Layer 50: Electrical termination area 60: Peripheral sealing strip, peripheral sealing element 70: Local sealing strip 90: Opening 100: Dielectric region 102: Material island 110: Connecting layer 200: Method 210, 220, 230, 240, 250, 260: Step 300: Unheated area 310: Central area To facilitate a good understanding of this disclosure, its various forms will now be illustrated by way of example and with reference to the accompanying drawings, wherein: Figure 1 is a perspective view of a platform constructed according to the teachings of this disclosure for use in a semiconductor processing chamber; Figure 2 is a side view of the pedestal in Figure 1; Figure 3 is an exploded view of the pedestal in Figure 1; Figure 4 is a perspective view of one of the resistance heater layers in Figure 3, and is constructed based on the teachings of this disclosure; Figure 5 is a top view of the resistance heater layer in Figure 4; Figure 6 is a perspective view of one of the RF antenna layers in Figure 3, and is constructed based on the teachings of this disclosure; Figure 7 is a top view of the RF antenna layer in Figure 6; Figure 8A is a cross-sectional view taken along line 8A-8A in Figure 1; Figure 8B is a detailed view taken from Figure 8A, illustrating an opening extending through the base and various layers of the pedestal as taught in accordance with the contents of this disclosure. Figure 9 is a flowchart of a manufacturing method taught according to the present disclosure; Figure 10A is a top view of a resistance heater layer with a trace pattern constructed according to the teachings of this disclosure; and Figure 10B is a top view of another resistance heater layer with a different trace pattern, which was formed together with the resistance heater layer of Figure 10A and constructed in accordance with the teachings of this disclosure. The diagrams described herein are for illustrative purposes only and are not necessarily to scale, nor are they intended to limit the scope of this disclosure in any way. 22: (upper) matrix 24: (Above) Adjacent to the matrix, matrix 26: (Below) Adjacent to the matrix, matrix 30: Resistance heater, resistance layer 31: Edge Boundary 40: RF antenna, RF electrode 70: Local sealing strip 90: Opening 100: Dielectric region 102: Material island
Claims
1. A layered assembly for use in a controlled atmosphere chamber, the layered assembly comprising: a plurality of substrates; two electrical functional layers embedded between two adjacent substrates in the plurality of substrates, the electrical functional layers comprising materials configured to secure the two adjacent substrates together using a solid-state bonding process, each electrical functional layer being applied to each of the two adjacent substrates prior to the solid-state bonding process; at least one electrical termination region integrated with the electrical functional layers; and at least one peripheral sealing strip embedded between internal surfaces of the two adjacent substrates and extending around a periphery of one of the internal surfaces, the at least one peripheral sealing strip comprising materials configured to secure and seal the two adjacent substrates together using the solid-state bonding process, wherein a plurality of dielectric regions are present between the two adjacent substrates and between several edge boundaries of the electrical functional layers, the plurality of dielectric regions being sealed between the two adjacent substrates by the at least one peripheral sealing strip.
2. A layered assembly for use in a controlled atmosphere chamber, the layered assembly comprising: a plurality of substrates; at least one electrical functional layer embedded between two adjacent substrates of the plurality of substrates, the electrical functional layer comprising a material configured to secure the two adjacent substrates together using a solid-state bonding process; at least one electrical termination region integrated with the electrical functional layer; and at least one peripheral sealing strip embedded between internal surfaces of the two adjacent substrates and extending around one of the internal surfaces, the at least one peripheral sealing strip comprising a material configured to secure and seal the two adjacent substrates together using a solid-state bonding process, wherein a plurality of dielectric regions exist between the two adjacent substrates and between several edge boundaries of the electrical functional layer, the plurality of dielectric regions being sealed between the two adjacent substrates by the at least one peripheral sealing strip; and a plurality of material islands disposed within the dielectric regions, the material islands being non-electric.
3. The layered assembly of claim 1 or 2, wherein the material of at least one of the electrical functional layer and the peripheral sealing strip comprises nickel.
4. The layered assembly of claim 1 or 2, wherein the material of the electrical functional layer is gradient and has variable material properties along at least one dimension.
5. The layered assembly as claimed in claim 1 or 2, wherein the electrical functional layer is selected from the group consisting of: a resistance heater, an RF antenna, and a clamping electrode.
6. The layered assembly as requested in item 1 or 2, wherein the electrical functional layer comprises a resistance heater and a temperature sensor.
7. The layered assembly of claim 1 or 2, wherein each of the plurality of substrates comprises a ceramic material.
8. The layered assembly of claim 7 further includes an upper substrate disposed on one of the two adjacent substrates, the upper substrate comprising a ceramic material different from the ceramic material of the two adjacent substrates.
9. The layered assembly of claim 8, wherein the two adjacent substrates are of aluminum nitride (AlN) material and the upper substrate is of advanced AlN material.
10. The layered assembly of claim 7, wherein the plurality of substrates comprises a beryllium oxide (BeO) material.
11. The layered assembly of claim 1 or 2, wherein the two adjacent substrates include a plurality of openings formed therethrough, and the layered assembly further includes a partial sealing strip disposed around the periphery of one of the plurality of openings between the two adjacent substrates.
12. The layered assembly as claimed in claim 11, wherein the material of the partial sealing strips comprises nickel.
13. The layered assembly of claim 1 or 2 further includes an adhesive layer disposed between at least one of the two adjacent substrates and the electrical functional layer.
14. The layered assembly of claim 13, wherein the adhesive layer is further disposed between at least one of the two adjacent substrates and the at least one peripheral sealing strip.
15. The layered assembly of claim 1, wherein each of the electrical functional layers comprises a trace, and a trace of one electrical functional layer is wider than a trace of another electrical functional layer.
16. The layered assembly of claim 1 or 2 further includes two peripheral sealing strips embedded between two adjacent substrates in the plurality of substrates, each peripheral sealing strip being applied to each of the two adjacent substrates prior to the solid bonding process.
17. As in the layered assembly of claim 16, one of the peripheral sealing strips has a wider bandwidth than the other peripheral sealing strip.
18. The layered assembly of claim 1 or 2 further includes a shaft secured to one side below one of the two adjacent substrates.
19. The layered assembly as requested in item 1 or 2, wherein the seal is airtight.
20. The layered assembly as claimed in claim 1 or 2, wherein the electrical functional layer includes a resistance heater having one of a plurality of partitions.
21. The layered assembly of claim 1 or 2 further includes a plurality of resistance heater zones disposed in different layers of the plurality of substrates.
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