Substrate structuring methods

Abstract

This disclosure relates to methods and apparatus for structuring semiconductor substrates. In one embodiment, a substrate structuring method includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by microjet printing to form desired features in the substrate, while unexposed or unablated portions of the resist layer cover the remainder of the substrate. The substrate is then exposed to etching and stripping processes to remove the resist layer and release the carrier.

Description

Substrate structuring method Embodiments of the present disclosure generally relate to methods and apparatus for structuring semiconductor substrates. More particularly, embodiments described herein relate to methods and apparatus for structuring semiconductor substrates using micro-spraying and laser ablation techniques. Driven by the ever-increasing demand for miniaturized electronic components and elements, integrated circuits have evolved into complex 2.5D and 3D devices, potentially containing millions of transistors, capacitors, and resistors on a single chip. Advances in chip design have led to greater circuit density, thereby increasing the processing power and speed of integrated circuits. The demand for faster processing power with greater circuit density has placed corresponding demands on the materials, structures, and processes used in the manufacture of these integrated circuit chips. However, alongside this trend toward higher integration and higher performance, there is a constant pursuit of reducing manufacturing costs. Traditionally, integrated circuit chips have been fabricated on organic packaging substrates due to the ease of forming features and connections through these features, as well as the relatively low packaging manufacturing costs associated with organic composites. However, with increasing circuit density and further miniaturization of electronic components, the use of organic packaging substrates has become impractical due to limitations in the material structure resolution required to maintain device scale and associated performance requirements. Recently, passive silicon interposers placed on organic packaging substrates have been utilized as redistribution layers to fabricate 2.5D and 3D integrated circuits, compensating for some of the limitations associated with organic packaging substrates. The use of silicon interposers is driven by the potential for high bandwidth density, low-power inter-die communications, and heterogeneous integration requirements in advanced packaging applications. However, forming features (such as through-silicon vias (TSVs)) in silicon interposers remains difficult and costly. In particular, high-aspect-ratio silicon leads to high costs for etching, chemical mechanical planarization, and semiconductor back-end-of-line (BEOL) interconnects. Therefore, there is a need in the art for improved substrate structuring methods for advanced packaging applications. In one embodiment, a method for structuring a substrate is provided. The method includes: bonding the substrate to a carrier with a first adhesive layer; bonding a resist layer to the substrate with a second adhesive layer; and patterning the resist layer using electromagnetic radiation. The method also includes propelling powder particles onto the patterned resist layer to form a structured pattern in the substrate, and exposing the substrate to an etching process to remove debris from the structured pattern and smooth one or more surfaces thereof. The resist layer is peeled off from the substrate by releasing the second adhesive layer, and the substrate is peeled off from the carrier by releasing the first adhesive layer. In one embodiment, a method for structuring a substrate is provided. The method includes forming a resist layer on a silicon solar substrate, patterning the resist layer by exposing the resist layer to electromagnetic radiation, propelling a stream of powder particles at high pressure toward the substrate to dislodge and remove material from the substrate and form a structured pattern, and exposing the substrate to an etching process to remove debris from the structured pattern and smooth one or more surfaces of the substrate. In one embodiment, a method for structuring a substrate is provided. The method includes: adhering a first resist layer to a first surface of the substrate with a first adhesive layer; adhering a second resist layer to a second surface of the substrate with a second adhesive layer; and patterning the first resist layer and the second resist layer. The method also includes advancing powder particles toward the first surface of the substrate to form one or more patterned structures therein, advancing powder particles toward the second surface of the substrate to extend the one or more patterned structures across the entire thickness of the substrate between the first and second surfaces, and exposing the substrate to an etching process to remove debris from the substrate and smooth one or more surfaces of the substrate. This disclosure relates to methods and apparatus for structuring semiconductor substrates. In one embodiment, a method for structuring a substrate includes applying a resist layer to a substrate, optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portion of the resist layer is then transferred to the substrate by microspraying, while the unexposed or unablated portion of the resist layer masks the remainder of the substrate. The substrate is then exposed to an etching process and a stripping process to remove the resist layer and release the carrier. In another embodiment, desired features are formed in the substrate by laser ablation. FIG1 illustrates a flow chart of a representative method 100 for structuring a substrate 102. FIG2A-2F and FIG3A-3F illustrate schematic cross-sectional views of the substrate 102 at various stages of the structuring process of FIG1 . Therefore, references to FIG2A-2F and FIG3A-3F will be included in the discussion of FIG1 and method 100, where necessary. Furthermore, method 100 for structuring a substrate 102 has multiple operations. These operations may be performed in any order or concurrently (unless the context precludes this possibility), and the method may include one or more additional operations that may precede any defined operation, occur between two defined operations, or occur after all defined operations (unless the context precludes this possibility). Generally, method 100 includes applying a resist film to substrate 102 at operation 110. In some embodiments, substrate 102 may be optionally coupled to a carrier prior to applying the resist film. At operation 120, method 100 includes exposing substrate 102 to electromagnetic or laser radiation to pattern the resist film. At operation 130, substrate 102 is micro-blasted to form structures such as blind holes, through holes, or cavities in substrate 102. The method also includes etching substrate 102 at operation 140 to remove debris and surface microcracks formed during the micro-blasting process, while the patterned resist film remains intact. Subsequently, the patterned resist layer is removed at operation 150, after which the substrate may be further exposed to a carrier stripping process at operation 160. Substrate 102 is formed from any suitable substrate material, including but not limited to III-V compound semiconductor materials, silicon, crystalline silicon (e.g., Si<100> or Si<111>), silicon oxide, silicon germanium, doped or undoped silicon, doped or undoped polycrystalline silicon, silicon nitride, quartz, borosilicate glass, glass, sapphire, aluminum oxide, and ceramics. In one embodiment, substrate 102 is a packaging substrate. In one embodiment, substrate 102 is a single-crystalline p-type or n-type silicon substrate. In one embodiment, substrate 102 is a polycrystalline p-type or n-type silicon substrate. In another embodiment, substrate 102 is a p-type or n-type silicon solar substrate. Unless otherwise specified, the embodiments and examples described herein are performed using a substrate having a thickness between about 50 μm and about 1000 μm, for example, between about 90 μm and about 780 μm. For example, the substrate 102 has a thickness between about 100 μm and about 300 μm, such as between about 110 μm and about 200 μm. In embodiments where substrate 102 has a thickness less than approximately 200 μm (e.g., approximately 50 μm), substrate 102 is coupled to carrier 106 during the substrate structuring process. Carrier 106 provides mechanical support to substrate 102 during the substrate structuring process and prevents cracking of substrate 102. Carrier 106 is formed from any suitable chemically and thermally stable, rigid material, including but not limited to glass, ceramic, metal, etc. Carrier 106 has a thickness between approximately 1 mm and approximately 10 mm, such as between approximately 2 mm and approximately 5 mm. In one embodiment, carrier 106 has a textured surface to which substrate 102 is coupled. In another embodiment, carrier 106 has a polished surface to which substrate 102 is coupled. In one embodiment, substrate 102 is coupled to carrier 106 via adhesive layer 108. Adhesive layer 108 is formed from any suitable temporary adhesive material, including but not limited to wax, glue, and similar adhesives. Adhesive layer 108 can be applied to carrier 106 by mechanical rolling, pressing, laminating, spin coating, doctor blade coating, and the like. In one embodiment, adhesive layer 108 is a water- or solvent-soluble adhesive layer. In other embodiments, adhesive layer 108 is a UV-release adhesive layer. In other embodiments, adhesive layer 108 is a heat-release adhesive layer. In such embodiments, the adhesive properties of adhesive layer 108 decrease upon exposure to elevated temperatures, such as temperatures above 110°C, for example, temperatures above 150°C. Adhesive layer 108 may further include one or more films (not shown), such as a liner, a heat-release adhesive film, a base film, a pressure-sensitive film, and other suitable layers. In operation 110, corresponding to Figures 2A and 3A, a resist film is applied to substrate 102 to form resist layer 104. Resist layer 104 is used to transfer a desired pattern to substrate 102 during subsequent processing operations. After being patterned in operation 120, resist layer 104 protects selected areas of underlying substrate 102 during micro-sandblasting in operation 130. Substrate 102 has one or more substantially planar surfaces on which resist layer 104 may be formed. In one embodiment, such as the embodiment shown in FIG. 3A , resist layer 104 is bonded to substrate 102 via a resist adhesive layer 109. Resist adhesive layer 109 is formed from any suitable temporary bonding material, including but not limited to polyvinyl alcohol, triesters with 2-ethyl-2-(hydroxymethyl)-1,3-propanediol, and other water- or solvent-soluble materials. In one embodiment, resist adhesive layer 109 is formed from a different material than adhesive layer 108. In one embodiment, resist adhesive layer 109 has a composition substantially similar to adhesive layer 108. Resist adhesive layer 109 may be applied to substrate 102 by mechanical rolling, pressing, lamination, spin coating, doctor blade coating, or the like. In another embodiment, such as that shown in FIG. 2A , resist layer 104 is formed from a temporary bonding material such as polyvinyl alcohol, thereby enabling resist layer 104 to be applied and bonded directly to the surface of substrate 102. The resist layer 104 may further include one or more layers, for example, a first resist layer and a second resist layer (not shown). In one embodiment, such as the embodiment shown in Figure 2A, the resist layer 104 is a photoresist. The resist layer 104 may include a solvent, a photoresist resin, and a photoacid generator. The photoresist resin may be any positive photoresist resin or any negative photoresist resin. Representative photoresists include acrylates, novolac resins, poly(methyl methacrylate), and poly(olefin sulfone). Other photoresists may also be used. Upon exposure to electromagnetic radiation, the photoacid generator produces charged species, such as acidic cations and anions. The photoacid generator may also produce polarized species. The photoacid generator sensitizes the resin to electromagnetic radiation. Representative photoacid generators include sulfonate compounds, such as sulfonated salts, sulfonated esters, and sulfonyloxyketones. Other suitable photoacid generators include onium salts, such as aryl diazonium salts, halogenated onium salts, aromatic stibium salts, and sulfoxide salts or selenium salts. Other representative photoacid generators include nitrobenzyl esters, s-triazine derivatives, ionic iodonium sulfonates, perfluoroalkane sulfonates, aryl trifluoromethanesulfonic acids and their derivatives and analogs, pyrogallol derivatives, and alkyl disulfones. Other photoacid generators may also be used. In one embodiment, such as the embodiment shown in FIG. 3A , the resist layer 104 is a laser-sensitive resist. The resist layer 104 can be formed from any material having a hardness suitable for laser ablation. For example, the resist layer 104 is formed from a material having a Shore A hardness value between approximately 40 and approximately 90 (e.g., between approximately 60 and approximately 70). In one embodiment, the resist layer 104 is formed from a material having a Shore A hardness value of approximately 65. In a further embodiment, the resist layer 404 is formed from a material having a tensile strength between approximately 0.5 MPa and approximately 10 MPa (e.g., between approximately 1 MPa and approximately 8 MPa). For example, the resist layer 104 is formed from a material having a tensile strength of approximately 7 MPa. In some embodiments, the resist layer 104 is formed from a polydimethylsiloxane material. In other embodiments, the laser-sensitive resist layer 104 is formed from polyvinyl alcohol, a triester with 2-ethyl-2-(hydroxymethyl)-1,3-propanediol, or the like. At operation 120, corresponding to Figures 2B and 3B, the substrate 102 having the resist layer 104 formed thereon is exposed to electromagnetic radiation to pattern the resist layer 104. In the embodiment shown in Figure 2B, the substrate 102 having the resist layer 404 formed thereon is exposed to electromagnetic radiation in the ultraviolet (UV) range. Portions of the resist layer 104 are selectively exposed, while portions of the resist layer 104 are selectively not exposed to the UV radiation. As shown in Figure 2B, upon exposure to UV radiation, the selectively exposed portions of the resist layer 104 become structurally weakened, while the selectively unexposed portions maintain their structural integrity. In one embodiment, prior to exposure to UV radiation, a photomask 112 having a desired pattern is formed on or adjacent to the resist layer 104. In some embodiments, the photomask 112 is a reticle positioned between the resist layer 104 and the UV radiation source. The photomask 112 is configured to transfer a desired UV radiation pattern to the resist layer 104 and is formed of any suitable polymer material including, but not limited to, PTFE, PVDF, FEP, polyimide, and the like. In the embodiment shown in FIG3B , the substrate 102 having the resist layer 104 formed thereon is exposed to electromagnetic radiation generated by a laser source 303 rather than a UV radiation source. Thus, patterning is accomplished by targeted laser ablation without the use of a mask. The laser source 303 can be any suitable type of laser source for patterning the laser-sensitive resist layer 104. In some examples, the laser source 303 is a femtosecond green laser. In other examples, the laser source 303 is a femtosecond UV laser. The laser source 303 generates a continuous or pulsed laser beam to pattern the resist layer 104. For example, the laser source 303 can generate a pulsed laser beam having a frequency between approximately 100 kHz and approximately 1200 kHz, such as between approximately 200 kHz and approximately 1000 kHz. It is further contemplated that in some embodiments, the electromagnetic radiation at operation 120 may alternatively or additionally include an electron beam or an ion beam. At operation 130, corresponding to Figures 2C and 3C, the substrate 102 having the resist layer 104 formed thereon is subjected to a micro-sandblasting process to form a desired pattern in the substrate 102. During the micro-sandblasting process, a stream of powder particles 205 is propelled toward the substrate 102 under high pressure to remove exposed portions of the substrate 102 and / or layers formed thereon. The micro-sandblasting process is performed using any suitable substrate polishing system. In one embodiment, the powder particles 205 are propelled using a fluid stream of an inert gas, including but not limited to helium, argon, and nitrogen. In another embodiment, the powder particles 205 are propelled using a fluid stream of air. The microspraying process is determined by the material properties of the powder particles 205, the momentum of the powder particles 205 striking the exposed surface of the substrate 102, the material properties of the substrate 102, and (if applicable) the selectively exposed portions of the resist layer 104. To achieve the desired substrate patterning characteristics, the type and size of the powder particles 205, the size and distance of the applicator nozzle of the milling system from the substrate 102, the pressure used to propel the powder particles 205, and the density of the powder particles 205 in the fluid stream are adjusted. For example, the desired fluid pressure of the carrier gas used to propel the powder particles 205 toward the substrate 102 for a desired fixed microspray element nozzle orifice size can be determined based on the materials of the substrate 102 and the powder particles 205. In one embodiment, the fluid pressure for micro-blasting the substrate 102 is typically between about 50 psi and about 150 psi, such as between about 75 psi and about 125 psi, to achieve a carrier gas and particle velocity between about 300 meters per second (m / s) and about 1000 m / s, and / or a flow rate of about 0.001 cubic meters per second (m 3 / s) and about 0.002m 3 For example, the inert gas (e.g., nitrogen (N)) used to propel the powder particles 205 during microspraying is 2), CDA (argon) fluid pressure is approximately 95 psi to achieve a carrier gas and particle velocity of approximately 2350 m / s. In one embodiment, the applicator nozzle used for micro-sandblasting substrate 102 has an inner diameter of approximately 0.1 millimeter (mm) to approximately 2.5 mm, which is positioned at a distance from substrate 102 of approximately 1 mm to approximately 5 mm, such as between approximately 2 mm and approximately 4 mm. For example, during micro-sandblasting, the applicator nozzle is positioned at a distance of approximately 3 mm from substrate 102. Typically, the micro-sandblasting process is performed using powder particles 205 having sufficient hardness and a high melting point to prevent the particles from adhering to the substrate 102 and / or any layers formed thereon when in contact. For example, the micro-sandblasting process is performed using powder particles 205 formed of a ceramic material. In one embodiment, the powder particles 205 used in the micro-sandblasting process are composed of aluminum oxide (Al2O3). 2O 3). In another embodiment, powder particles 205 are formed from silicon carbide (SiC). Other suitable materials for powder particles 205 are also contemplated. Powder particles 205 typically have a size between approximately 15 μm and approximately 60 μm in diameter, such as between approximately 20 μm and approximately 40 μm in diameter. For example, the average particle size of powder particles 205 is approximately 27.5 μm in diameter. In another example, the average particle size of powder particles 205 is approximately 23 μm in diameter. The effectiveness of the microblasting process at operation 120 further depends on the material properties of the resist layer 104. Using a material with a Shore A hardness that is too high may cause the powder particles 205 to undesirably bounce between the sidewalls of the resist layer 104, thereby reducing the rate at which the powder particles 205 strike the substrate 102 and ultimately reducing the effectiveness of the powder particles 205 in eroding or displacing exposed areas of the substrate 102. Conversely, using a material with a Shore A hardness that is too low may result in unwanted adhesion of the powder particles 205 to the resist layer 104. It is contemplated that, as described above, the resist layer 104 material will have a Shore A hardness value between about 40 and about 90. In an embodiment where the resist layer 104 is a photoresist such as that shown in FIG2C , the substrate 102 remains unexposed at the start of operation 130 . Therefore, the powder particles 205 first bombard the surface of the resist layer 104, thereby displacing and removing material from the UV-exposed and structurally weakened portions of the photoresist. The powder particles 205 eventually penetrate and remove the brittle UV-exposed portions, thereby forming voids in the resist layer 104, thereby exposing the desired areas of the substrate 102 while other areas remain shielded by the UV-unexposed portions of the photoresist. Micro-sandblasting is then continued until the powder particles 205 are removed from the exposed areas of the substrate 102 and the desired amount or depth of material is removed, thereby forming the desired pattern in the substrate 102. In an embodiment where the resist layer 104 is patterned by laser ablation, as shown in FIG3C , the desired areas of the substrate 102 are already exposed through voids in the resist layer 104 prior to microblasting at operation 130. Therefore, minimal or no removal of the resist layer 104 is expected during the microblasting process at operation 130. In one embodiment, the microblasting process is optional, and laser ablation alone can be used to pattern the substrate 102. At operation 140, corresponding to Figures 2D and 3D, after the desired pattern has been micro-blasted into substrate 102, substrate 102 is exposed to an etching process. The etching process at operation 140 is used to smooth the surface of substrate 102 and remove any unwanted mechanical defects thereon. The etching process is performed for a predetermined duration to flatten the surface of substrate 102, particularly the surface exposed to the micro-blasting process at operation 130. In one aspect, the etching process at operation 140 is used to remove unwanted debris remaining from the micro-blasting process at operation 130. During the etching process at operation 140, residual powder particles 205 adhering to substrate 102 may be removed. In one embodiment, the etching process at operation 140 is a wet etching process using a buffered etching process that preferentially etches the substrate surface above the material of the resist layer 104. For example, the buffered etching process can be selective for polyvinyl alcohol. In one embodiment, the etching process is a wet etching process using an aqueous etching process. Any suitable wet etchant or combination of wet etchants can be used for the wet etching process. In one embodiment, the substrate 102 is immersed in an aqueous HF etching solution for etching. In other embodiments, the substrate 102 is immersed in an aqueous KOH etching solution for etching. In one embodiment, the etching solution is heated to a temperature between approximately 40° C. and approximately 80° C., for example, between approximately 50° C. and approximately 70° C., during the etching process. For example, the etching solution is heated to a temperature of approximately 60° C. The etching process can further be isotropic or anisotropic. In one embodiment, the etching process at operation 140 is a dry etching process. Examples of dry etching processes include plasma-based dry etching processes. At operation 150, corresponding to Figures 2E and 3E, the substrate 102 is exposed to a resist stripping process. The stripping process at operation 150 is used to strip the resist layer 104 from the substrate 102. In one embodiment, a wet process is used to strip the resist layer 104 from the substrate 102 by dissolving / solubilizing the resist adhesion layer 109 and / or the resist layer 104. Other types of etching processes are also contemplated for releasing the resist adhesion layer 109 and / or the resist layer 104. In one embodiment, a mechanical roller press process is used to strip the resist layer 104 from the substrate 102 by physically stripping the resist layer 104 or the resist adhesion layer 109. In one embodiment, an ashing process is used to remove the resist layer 104 from the substrate 102 using, for example, an oxygen plasma-assisted process. At operation 160, corresponding to Figures 2F and 3F, the substrate 102 is exposed to an optional carrier peeling process. The use of a carrier peeling process depends on whether the substrate 102 is coupled to a carrier 106 and on the type of bonding material used to couple the substrate 102 thereto. As described above, as shown in Figures 2A to 2F and Figures 3A to 3F, in embodiments where the thickness of the substrate 102 is less than approximately 200 μm, the substrate is coupled to the carrier 106 for mechanical support during the substrate structuring process. In some embodiments, the substrate 102 is coupled to the carrier 106 via an adhesive layer 108. Therefore, at operation 160, the substrate 102 coupled to the carrier 106 is exposed to a carrier peeling process to peel the substrate 102 from the carrier 106 by releasing the adhesive layer 108. In one embodiment, the adhesive layer 108 is released by exposing the substrate 102 to a baking process. In one embodiment, the substrate 102 is exposed to a temperature between about 50° C. and about 300° C., such as between about 100° C. and about 250° C. For example, the substrate 102 is exposed to a temperature between about 150° C. and about 200° C., such as about 160° C., for a desired time to release the adhesive layer 108. In other embodiments, the adhesive layer 108 is released by exposing the substrate 102 to UV radiation. Figures 2F and 3F illustrate the structured substrate 102 after completion of method 100. The substrate 102 depicted in Figures 2F and 3F has three structures 220 formed therethrough. Method 100 is used to form patterned structures 220 having various desired depths, sizes, and shapes in substrate 102. In one embodiment, the depth of structures 220 is equal to the thickness of substrate 102, thereby forming holes through two opposing surfaces of substrate 102. In one embodiment, the depth of structures 220 is less than the thickness of substrate 102, thereby forming holes on only one surface of substrate 102. For example, depending on the thickness of substrate 102, structures 220 formed in substrate 102 may have a depth between approximately 10 μm and approximately 600 μm, such as between approximately 25 μm and approximately 200 μm. In one embodiment, depending on the size of substrate 102, structures 220 have lateral dimensions between approximately 20 μm and approximately 15 mm, such as approximately 50 μm and approximately 5 mm. In one embodiment, the structure 220 formed in the substrate 102 has an ellipsoidal or conical shape. In another embodiment, the structure 220 formed in the substrate 102 has a rectangular parallelepiped shape. It is contemplated that the structure 220 formed by the method 100 can have any desired shape, size, and depth as allowed by the substrate 102. Figures 4A through 4E illustrate schematic cross-sectional views of substrate 102 during an alternative structuring sequence similar to the above-described embodiments. The alternative sequence depicted in Figures 4A through 4E involves patterning substrate 102 on two primary, opposing surfaces, as opposed to just one surface, thereby enabling improved efficiency during structuring of substrate 102. The substrate structuring sequence depicted in Figures 4A through 4E substantially includes all of the features and operations described with reference to Figures 1 , 2A through 2F, and 3A through 3F. For example, Figure 4A corresponds to operation 110 in conjunction with Figures 2A and 3A; Figure 4B corresponds to operation 120 in conjunction with Figures 2B and 3B; Figure 4C corresponds to operation 130 in conjunction with Figures 2C and 3C; Figure 4D corresponds to operation 140 in conjunction with Figures 2D and 3D; and Figure 4E corresponds to operation 150 in conjunction with Figures 2F and 3F. However, unlike the previous embodiments, the embodiment shown in FIG. 4A to FIG. 4E includes a substrate 102 having two resist layers 104 formed on opposing surfaces 405 , 407 thereof, thereby enabling structuring operations to be performed on both surfaces 405 , 407 . For example, after the resist layer 104 formed on the surface 405 of the substrate 102 is exposed to electromagnetic radiation for patterning at operation 120, the substrate 102 is optionally flipped (e.g., inverted) so that the resist layer 104 on the opposite surface 407 of the substrate 102 can be exposed to electromagnetic radiation for patterning (as shown in FIG. 4B ). Similarly, after the micro-sandblasting process of operation 130 is performed on the surface 405 of the substrate 102, the substrate 102 can be optionally flipped again so that the opposite surface 407 of the substrate 102 can be micro-sandblasted, as shown in FIG. 4C . By using two resist layers 104 on the opposite surfaces 405, 407 of the substrate 102 and by performing the micro-sandblasting process on both surfaces, the taper of the structures formed throughout the thickness of the substrate 102 during micro-sandblasting can also be reduced or eliminated. FIG5 illustrates a flow chart of another representative method 500 for structuring a substrate 102. FIG6A through FIG6D illustrate schematic cross-sectional views of the substrate 102 at various stages of the structuring process of FIG5. Therefore, the discussion of FIG5 and method 500 will include references to FIG6A through FIG6D as necessary. Similar to the methods described above, method 500 for structuring a substrate 102 has multiple operations. These operations may be performed in any order or concurrently (unless the context precludes this possibility), and the method may include one or more additional operations that may precede any defined operation, occur between two defined operations, or occur after all defined operations (unless the context precludes this possibility). Generally, method 500 includes placing substrate 102 on a support 606 of a laser ablation system at operation 510. In some embodiments, substrate 102 is optionally coupled to a carrier prior to placement on support 606. At operation 520, substrate 102 is exposed to laser radiation to pattern substrate 102 and form desired features therein. At operation 530, substrate 102 is exposed to an etching process to remove debris and surface microcracks caused by the laser patterning. In embodiments where substrate 102 is coupled to a carrier, substrate 102 is further debonded from the carrier after the etching process is performed. As depicted in FIG6A and corresponding to operation 510, a substrate 102 (e.g., a solar substrate) is placed on a support 606 of a laser ablation system (not shown). Support 606 can be any suitable rigid and flat surface to provide mechanical support for substrate 102 during laser ablation. In some embodiments, support 606 includes an electrostatic chuck for electrostatically attaching substrate 102 to support 606. In some embodiments, support 606 includes a vacuum chuck for vacuuming substrate 102 to support 606. As shown in FIG6B and corresponding to operation 520 , after the substrate 102 is placed on a support 606 , a desired pattern is formed in the substrate 102 by laser ablation. The laser ablation system can include any suitable type of laser source 603 for patterning the substrate 102 . In some examples, the laser source 603 is an infrared (IR) laser. In some examples, the laser source 603 is a picosecond UV laser. In other examples, the laser source 603 is a femtosecond UV laser. In other examples, the laser source 603 is a femtosecond green laser. The laser source 603 generates a continuous or pulsed laser beam 607 for patterning the substrate 102 . For example, the laser source 603 can generate a pulsed laser beam 607 having a frequency between 100 kHz and 1200 kHz, such as a frequency between 200 kHz and approximately 1000 kHz. The laser source 603 is configured to form any desired patterns and features in the substrate 102 , including cavities and vias. Similar to micro-sandblasting, performing direct laser patterning on the substrate 102 may cause undesirable mechanical defects, including chipping and cracking, on the surface of the substrate 102. Therefore, after the desired features are formed in the substrate 102 by direct laser patterning, the substrate 102 is exposed to an etching process in operation 530, which is substantially similar to the etching process described with reference to operation 140, to remove any remaining debris and smooth the surface of the substrate 102. Figures 6C-6D illustrate the substrate 102 before and after performing the etching process, which completes the structured substrate 102 with three features 620 (e.g., through-holes) formed in the structured substrate. The embodiments described herein advantageously provide improved substrate structuring methods for advanced integrated circuit packaging. By utilizing the above-described methods, high aspect ratio features can be formed on glass and / or silicon substrates while significantly reducing manufacturing costs, which can serve as an economical alternative to silicon interposers. While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, which is to be determined by the claims that follow. 102: Substrate 100: Method 110: Operation 130: Operation 140: Operation 150: Operation 160: Operation 106: Carrier 108: Adhesion Layer 110: Operation 104: Resist Layer 120: Operation 109: Resist Adhesion Layer 112: Mask 303: Laser Source 205: Powder Particles 106: Carrier 220: Structure 405: Surface 407: Surface 500: Method 510: Operation 606: Support 520: Operation 530: Operation 603: Laser Source 607: Laser Beam 620: Feature 404: Resist Layer Thus, the manner in which the above-described features of the present disclosure can be understood in detail, the present disclosure may be described in more detail by reference to embodiments, the detailed description of which is briefly summarized above, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, as other equally effective embodiments may be admitted. FIG1 illustrates a flow chart of a substrate structuring process according to embodiments described herein. 2A to 2F schematically illustrate cross-sectional views of a substrate at different stages of a substrate structuring process according to embodiments described herein. 3A to 3F schematically illustrate cross-sectional views of a substrate at different stages of a substrate structuring process according to embodiments described herein. 4A to 4E schematically illustrate cross-sectional views of a substrate at different stages of a substrate structuring process according to embodiments described herein. FIG5 illustrates a flow chart of a substrate structuring process according to embodiments described herein. 6A to 6D schematically illustrate cross-sectional views of a substrate at different stages of a substrate structuring process according to embodiments described herein. To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. 100: Method 110: Operation 120: Operation 130: Operation 140: Operation 150: Operation 160: Operation

Claims

1. A method for structuring a substrate, comprising the steps of: bonding a substrate to a carrier plate, the substrate being bonded to the carrier plate by means of a first adhesive layer; forming a resist layer on the substrate; patterning the resist layer; patterning the substrate to form one or more cavities and one or more vias therein; exposing the substrate to an etching process to remove debris from the cavities and vias, the etching process further smoothing one or more surfaces of the substrate; removing the resist layer from the substrate; and peeling the substrate from the carrier plate by releasing the first adhesive layer.

2. The method as described in claim 1, wherein the substrate is patterned by microblasting or laser ablation.

3. The method as described in claim 2, wherein the microblasting comprises using a fluid of inert gas to propel a plurality of powder particles toward the substrate at a velocity between about 300 m / s and about 1000 m / s.

4. The method as described in claim 3, wherein the inert gas comprises helium, argon or nitrogen.

5. The method as described in claim 3, wherein the powder particles comprise a ceramic material.

6. The method as described in claim 5, wherein the powder particles comprise alumina or silicon carbide.

7. The method as described in claim 3, wherein the size of the powder particles is between about 15 μm and about 60 μm in diameter.

8. The method as described in claim 2, wherein the laser ablation is performed using an infrared (IR) laser.

9. The method as described in claim 2, wherein the laser ablation is performed using a picosecond UV laser.

10. The method as described in claim 2, wherein the laser ablation is performed using a femtosecond UV laser.

11. The method as described in claim 2, wherein the laser ablation is performed using a femtosecond green laser.

12. The method as described in claim 2, wherein the laser ablation is performed using a pulsed laser beam with a frequency between approximately 100 kHz and approximately 1200 kHz.

13. The method as described in claim 12, wherein the laser ablation is performed using a pulsed laser beam with a frequency between approximately 200 kHz and approximately 1000 kHz.

14. A method for structuring a substrate, comprising the steps of: bonding a substrate to a carrier plate, the substrate being bonded to the carrier plate by means of a first adhesive layer; forming and patterning a resist layer on the substrate; patterning the substrate through the resist layer by laser ablation to form one or more structured patterns therein; exposing the substrate to an etching process to remove debris from the structured patterns in the substrate; and peeling the substrate from the carrier plate by releasing the first adhesive layer.

15. The method of claim 14, wherein the resist layer is a photoresist patterned by selectively exposing it to UV radiation through a mask.

16. The method as described in claim 14, wherein the resist layer is patterned by laser ablation.

17. The method as described in claim 14, wherein the laser ablation is performed using an infrared (IR) laser.

18. The method as described in claim 14, wherein the laser ablation is performed using a picosecond or femtosecond UV laser.

19. The method as described in claim 14, wherein the laser ablation is performed using a femtosecond green laser.

20. A method for structuring a substrate, comprising the steps of: bonding a substrate to a carrier plate by means of a first adhesive layer; forming and patterning a resist layer on the substrate by means of a second adhesive layer; patterning the substrate by means of infrared (IR) laser ablation to form one or more cavities and one or more vias therein; exposing the substrate to an etching process to remove debris from the cavities and vias, the etching process further smoothing one or more surfaces of the substrate; removing the resist layer from the substrate by releasing the second adhesive layer; and peeling the substrate from the carrier plate by releasing the first adhesive layer.

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