Interposer structure and manufacturing method thereof

Abstract

An intermediate structure and its manufacturing method are disclosed, wherein a first circuit portion and a second circuit portion are formed on opposite sides of the intermediate body to balance the stress of the intermediate structure and avoid warping problems in subsequent applications.

Claims

1. An intermediary structure comprising: An intermediate having opposing first and second sides, a dielectric layer, and a wiring layer bonded to the dielectric layer; A first wiring portion is disposed on a first side of the intermediate and includes a first insulating layer and a first wiring layer bonded to the first insulating layer and electrically connected to the wiring layer; and a second wiring portion is disposed on a second side of the intermediate and includes a second insulating layer and a second wiring layer bonded to the second insulating layer and electrically connected to the wiring layer, wherein the line width / line spacing of the first wiring layer and the second wiring layer is greater than the line width / line spacing of the wiring layer.

2. The intermediary structure as described in claim 1, wherein, The line width / spacing of this wiring layer is 0.6 / 0.6 micrometers.

3. The intermediary structure as described in claim 1, wherein, The intermediary is the back-end process wafer.

4. A method for constructing an intermediary structure, comprising: An intermediary is formed on a carrier of a full-size layout, wherein the intermediary system has opposing first and second sides, and the intermediary is disposed on the carrier with its second side. The intermediary includes a dielectric layer and a wiring layer bonded to the dielectric layer. A first circuit portion is formed on the first side of the intermediary, and the intermediary is electrically connected to the first circuit portion, wherein the first circuit portion includes a first insulating layer and a first wiring layer bonded to the first insulating layer and electrically connected to the wiring layer. The carrier is removed. A second circuit portion is formed on the second side of the intermediary to form an intermediary structure, wherein the second circuit portion includes a second insulating layer and a second wiring layer bonded to the second insulating layer and electrically connected to the wiring layer.

5. The method for constructing the intermediary structure as described in claim 4, wherein, The line width / spacing of this wiring layer is 0.6 / 0.6 micrometers.

6. The method for constructing the intermediary structure as described in claim 4, wherein, The line width / spacing of the first line layer is greater than that of the wiring layer.

7. The method for constructing the intermediary structure as described in claim 4, wherein, The line width / spacing of the second line layer is greater than that of the wiring layer.

8. The method for constructing the intermediary structure as described in claim 4, wherein, The intermediary is the back-end process wafer.

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