Flip chip bonding structure and circuit board thereof

Abstract

A flip-chip bonding structure includes a circuit board and a chip. The circuit board includes a light-transmitting carrier, a circuit layer, and a support layer. The circuit layer is disposed on an upper surface of the light-transmitting carrier, and the support layer is disposed on a lower surface of the light-transmitting carrier. The chip is bonded to the circuit layer with a plurality of bumps. The support layer has a body and at least one pair of alignment marks. The body has at least one opening, and the alignment marks are located in the opening. The alignment marks correspond to a reference mark of the chip. Along the alignment marks toward the reference mark, the opening is used to inspect the overlap between a first contour of the alignment mark and a second contour of the reference mark penetrating the light-transmitting carrier, so as to determine whether the bumps are accurately bonded to the circuit layer.

Claims

1. A circuit board comprising: a light-transmitting carrier having an upper surface and a lower surface, the upper surface including a circuit setting area and a chip bonding area; a circuit layer disposed on the upper surface, the circuit layer including a plurality of circuits, each circuit being disposed in the circuit setting area, the chip bonding area being used to set a chip having a reference mark; and a support layer disposed on the lower surface, the support layer having a body and at least one pair of alignment marks, the body having an opening, the alignment marks being located in the opening, the alignment marks being used to correspond to the reference mark, and along the alignment mark toward the reference mark, the opening being used to view the overlap state of a first contour of the alignment mark and a second contour of the reference mark penetrating through the light-transmitting carrier.

2. The circuit board as requested in item 1, wherein the alignment mark is connected to the body.

3. The circuit board of claim 1, wherein the opening has an opening shadow that penetrates the light-transmitting carrier, the opening shadow being projected onto the upper surface via the lower surface, and the opening shadow being located in the wafer bonding area.

4. The circuit board as claimed in claim 3, wherein the opening shadow is located in a corner of the chip bonding area.

5. The circuit board of claim 4, wherein the chip having the chip bonding area has a first side along a first axial direction and a second side along a second axial direction intersecting the first axial direction, the corner being adjacent to the first side and the second side.

6. The circuit board of any one of claims 3 to 5, wherein each of the lines includes at least one inner pin located in the wafer bonding area, each inner pin having a bump bonding area located outside the opening shadow, the bump bonding area being used to bond a bump of the wafer.

7. The circuit board of claim 6, wherein the chip has a first side along a first axial direction and a second side along a second axial direction intersecting the first axial direction, a first width of the first side is not less than a second width of the second side, and the distance from the opening shadow projected onto the upper surface along the first axial direction or the second axial direction to the bump engagement area is not greater than 0.5 times the second width.

8. The circuit board of claim 7, wherein the chip is bonded to each of the bump bonding areas by a plurality of bumps, the bumps including a shortest bump, the width of a second edge of the shortest bump being less than the width of a first edge of any of the other bumps, the first edge and / or the second edge facing the first side or the second side at a distance not less than the width of the second edge of the shortest bump.

9. A flip-chip bonding structure, comprising: a circuit board including a light-transmitting carrier, a circuit layer and a support layer, the light-transmitting carrier having an upper surface and a lower surface, the upper surface including a circuit placement area and a wafer bonding area, the circuit layer being disposed on the upper surface, the circuit layer including a plurality of circuits being disposed in the circuit placement area, the support layer being disposed on the lower surface, the support layer having a body and at least one pair of alignment marks, the body having an opening, the alignment marks being located in the opening; and a wafer being disposed in the wafer bonding area, the wafer having a reference mark, the reference mark being formed on a surface of the wafer, the alignment mark corresponding to the reference mark, and along the alignment mark toward the reference mark, the reference mark having a gap with the upper surface of the light-transmitting carrier, the opening being for viewing the overlap state of a first contour of the alignment mark and a second contour of the reference mark penetrating through the light-transmitting carrier.

10. The flip-chip bonding structure of claim 9, wherein the alignment mark is connected to the body.

11. The flip-chip bonding structure of claim 9, wherein the opening has an opening shadow that penetrates the light-transmitting carrier, the opening shadow being projected onto the upper surface via the lower surface, and the opening shadow being located in the wafer bonding area.

12. The flip-chip bonding structure of claim 11, wherein the opening shadow is located at a corner of the wafer bonding area.

13. The flip-chip bonding structure of claim 12, wherein the wafer having the wafer bonding region has a first side along a first axial direction and a second side along a second axial direction intersecting the first axial direction, the corner being adjacent to the first side and the second side.

14. The flip-chip bonding structure of any one of claims 11 to 13, wherein each of the lines includes at least one inner pin, each inner pin is located in the wafer bonding region, the wafer has a plurality of bumps formed on the surface, each bump is engaged with a bump engagement region of each inner pin, the bump engagement region being located outside the opening shadow.

15. The flip-chip bonding structure of claim 14, wherein the wafer has a first side along a first axial direction and a second side along a second axial direction intersecting the first axial direction, a first width of the first side being not less than a second width of the second side, and the distance from the opening shadow projected onto the upper surface to the bump bonding area being not greater than 0.5 times the second width.

16. The flip-chip bonding configuration of claim 15, wherein the wafer is bonded to each of the bump bonding regions by a plurality of bumps, the bumps including a shortest bump, the width of a second edge of the shortest bump being less than the width of a first edge of any of the other bumps, the first edge and / or the second edge facing the first side or the second side at a distance not less than the width of the second edge of the shortest bump.

17. The flip-chip bonding structure of claim 9, wherein the reference mark protrudes from the surface.

18. The flip-chip bonding structure of claim 9, wherein the alignment mark has a first side along a first axial direction and a second side along a second axial direction intersecting the first axial direction, and the reference mark has a first reference side along the first axial direction and corresponding to the first side and a second reference side along the second axial direction and corresponding to the second side.

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