Package structure

TWM686263UActive Publication Date: 2026-08-11ADVANCED SEMICON ENG INC
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Patent Information

Application Number
TW115201449
Authority / Receiving Office
TW · TW
Patent Type
Utility models
Current Assignee / Owner
Filing Date
2026-02-11
Publication Date
2026-08-11
Estimated Expiration
2036-02-10

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Abstract

The package structure includes a circuit layer, electronic components, and a molding layer, wherein the electronic components are disposed on the circuit layer; the molding layer covers the electronic components and the circuit layer, and the sidewalls of the circuit layer include recesses and protrusions that protrude relative to the recesses.
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Claims

1. A packaging structure comprising: a circuit layer; an electronic component disposed on the circuit layer; and a molding layer covering the electronic component and the circuit layer, wherein the sidewall of the circuit layer includes a recess and a protrusion protruding relative to the recess.

2. The package structure as described in claim 1 further includes solder balls, wherein the solder balls are disposed on the circuit layer corresponding to the protrusion.

3. The package structure as described in claim 1 further includes a plurality of solder balls, wherein the plurality of solder balls are disposed on the circuit layer and the recess is located between the plurality of solder balls.

4. The encapsulation structure as described in claim 1, wherein the protrusion has an arcuate or rectangular cross-section, and the bottom surface of the recess is a plane or an arcuate surface.

5. The packaging structure as described in claim 1, wherein the molding layer further covers the recess and the protrusion of the sidewall.

6. The package structure as described in claim 1, wherein the protrusion is located at a corner of the circuit layer.

7. The packaging structure as described in claim 1, wherein a plurality of the recesses and a plurality of the protrusions are staggered along the periphery of the circuit layer.

8. The packaging structure as described in claim 7, wherein the length of the periphery of the circuit layer is greater than or equal to the length of the periphery of the molding layer.

9. A packaging structure comprising: a circuit layer; an electronic component disposed on the circuit layer; and a molding layer covering the electronic component and the circuit layer, wherein the molding layer further covers a sidewall of the circuit layer, and the sidewall of the circuit layer and the molding layer have an uneven interface.

10. The package structure as described in claim 9 further includes solder balls, wherein the solder balls are disposed on the circuit layer and correspond to the convex surface of the interface.

11. The package structure as described in claim 9 further includes a plurality of solder balls, wherein the plurality of solder balls are disposed on the circuit layer and are located on opposite sides of the concave surface of the interface.

12. The encapsulation structure as described in claim 9, wherein the convex surface of the interface comprises an arcuate or rectangular surface, and the concave surface of the interface comprises a plane or an arcuate surface.

13. The packaging structure as described in claim 9, wherein the interface is disposed along the periphery of the circuit layer.

14. The packaging structure as described in claim 13, wherein the length of the periphery of the circuit layer is greater than or equal to the length of the periphery of the molding layer.

15. A packaging structure comprising: a circuit layer; an electronic component disposed on the circuit layer; and a molding layer covering the electronic component and the circuit layer, wherein the molding layer further covers the outer periphery of the circuit layer, and the length of the periphery of the circuit layer is greater than or equal to the length of the periphery of the molding layer.

16. The packaging structure as described in claim 15, wherein a plurality of recesses and a plurality of protrusions are staggered along the periphery of the circuit layer.

17. The package structure as described in claim 16 further includes a plurality of solder balls, wherein the plurality of solder balls are disposed on the circuit layer corresponding to the plurality of bumps.

18. The package structure as described in claim 16 further includes a plurality of solder balls, wherein the plurality of solder balls are disposed on the circuit layer and the plurality of solder balls are spaced apart by the plurality of recesses.