Flip-chip integrated circuit chips and light-emitting devices

Abstract

This invention discloses a flip-chip integrated circuit chip and a light-emitting device. The flip-chip integrated circuit chip includes a chip body, a plurality of metal pads, a circuit reconfiguration layer, a plurality of flip-chip pads, and at least one dummy pad. The plurality of metal pads are disposed on a surface of the chip body. The plurality of metal pads have a first layout. The circuit reconfiguration layer is formed on the surface of the chip body. The plurality of flip-chip pads are disposed on the circuit reconfiguration layer and electrically coupled to the plurality of metal pads through the circuit reconfiguration layer. The plurality of flip-chip pads have a second layout. The dummy pad is disposed on the circuit reconfiguration layer and spaced apart from any flip-chip pad. The dummy pad is not electrically coupled to any metal pad. The dummy pad and the plurality of flip-chip pads have a third layout. The third layout is more average than the second layout, and the second layout is more average than the first layout.

Claims

1. A flip-chip integrated circuit chip, characterized in that the flip-chip integrated circuit chip comprises: One chip body; Multiple metal pads are disposed on one surface of the chip body, and the multiple metal pads have a first layout distribution; A circuit reconfiguration layer is formed on the surface of the chip body; a plurality of flip-chip pads are disposed on the circuit reconfiguration layer and electrically coupled to the plurality of metal pads respectively through the circuit reconfiguration layer, the plurality of flip-chip pads having a second layout distribution; and at least one dummy pad is disposed on the circuit reconfiguration layer and spaced apart from any of the flip-chip pads, the at least one dummy pad is not electrically coupled to any of the metal pads, and the at least one dummy pad and the plurality of flip-chip pads have a third layout distribution; wherein the third layout distribution is more average than the second layout distribution, and the second layout distribution is more average than the first layout distribution.

2. The flip-chip integrated circuit chip according to claim 1, characterized in that the circuit reconfiguration layer has an annular predetermined region, the annular predetermined region defining a first direction and a second direction perpendicular to the first direction; the plurality of flip-chip pads and the at least one dummy pad are located within the annular predetermined region.

3. The flip-chip integrated circuit chip according to claim 2, characterized in that the spacing between adjacent flip-chip pads along the first direction includes a first spacing distance and a second spacing distance, the second spacing distance being greater than the first spacing distance and the width of the at least one dummy pad along the first direction, and the at least one dummy pad being located between two adjacent flip-chip pads having the second spacing distance.

4. The flip-chip integrated circuit chip according to claim 3, characterized in that there is a third spacing distance between adjacent flip-chip pads and the at least one dummy pad along the first direction, and the difference between the third spacing distance and the first spacing distance does not exceed 10% of the first spacing distance.

5. The flip-chip integrated circuit chip according to claim 1, characterized in that the circuit reconfiguration layer has an annular predetermined region, the annular predetermined region defining a first direction and a second direction perpendicular to the first direction; the plurality of flip-chip pads further include a plurality of flip-chip pads and at least one amplified flip-chip pad, the plurality of flip-chip pads and the at least one dummy pad are located within the annular predetermined region, the at least one amplified flip-chip pad is surrounded by the annular predetermined region, and the at least one amplified flip-chip pad is electrically coupled to one of the metal pads through the circuit reconfiguration layer.

6. The flip-chip integrated circuit chip according to claim 5, characterized in that the plurality of flip-chip pads and the at least one dummy pad are projected onto the surface of the chip body to form a plurality of projection areas, and the position of each projection area is not in a central area of ​​the first layout.

7. The flip-chip integrated circuit chip according to claim 1, characterized in that the circuit reconfiguration layer includes a plurality of bridging traces, and the plurality of metal pads are electrically coupled to the plurality of flip-chip pads respectively through the plurality of bridging traces.

8. The flip-chip integrated circuit chip according to claim 7, characterized in that the circuit reconfiguration layer further includes a reinforcement trace, the reinforcement trace being connected to the at least one dummy pad.

9. The flip-chip integrated circuit chip according to claim 8, characterized in that the reinforced trace is not electrically coupled to any of the metal pads.

10. The flip-chip integrated circuit chip according to claim 9, characterized in that the total projected area of ​​the plurality of bridging traces and the reinforcement traces projected onto the surface of the chip body is not less than the surface of the chip body.

11. The flip-chip integrated circuit chip according to claim 2 or 5, characterized in that the third layout is divided into three rows and N columns, the three rows are parallel to the first direction, and each of the N columns is parallel to the second direction, where N is a positive integer not less than 3.

12. The flip-chip integrated circuit chip according to claim 11, characterized in that the plurality of flip-chip pads and the at least one dummy pad are divided into a first row group, a third row group, and a second row group located between the first row group and the third row group according to the three rows, wherein the area of ​​the second row group is smaller than the area of ​​the first row group and the area of ​​the third row group.

13. The flip-chip integrated circuit chip according to claim 2 or 5, characterized in that the third layout is divided into two rows and N columns, the two rows being parallel to the first direction, and each of the N columns being parallel to the second direction, where N is a positive integer not less than 4.

14. The flip-chip integrated circuit chip according to claim 13, characterized in that the plurality of flip-chip pads and the at least one dummy pad are divided into a first row group and a second row group according to the two rows, wherein the area of ​​the second row group is equal to the area of ​​the first row group.

15. A light-emitting device, characterized in that the light-emitting device comprises: A substrate having a first side and a second side opposite to each other, the substrate including a plurality of carrier pads and at least one amplification pad located on the first side, a plurality of solder pads located on the second side, and a connection line electrically coupling the plurality of carrier pads and the plurality of solder pads; a flip-chip integrated circuit chip as described in any one of claims 1 to 14, disposed on the first side, the plurality of metal pads electrically coupling a portion of the plurality of carrier pads through the plurality of flip-chip pads, the at least one dummy pad connecting the at least one amplification pad; and at least one light-emitting diode chip disposed at a distance from the flip-chip integrated circuit chip, the at least one light-emitting diode chip connecting another portion of the plurality of carrier pads to electrically couple the flip-chip integrated circuit chip through the substrate.

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