Semiconductor wafer work disk

Abstract

A semiconductor wafer carrier, used in pairs, includes an outer frame, connecting ribs, a support frame, and a flexible cover. The connecting ribs and the outer frame together define a carrier area. The support frame includes two first support ribs and two second support ribs, each having a first limiting member and a first abutment member, a second limiting member and a second abutment member. Each flexible cover covers a portion of a first support rib, a first limiting member, a first abutment member, a portion of a second support rib, a second limiting member, and a second abutment member. A first surface of the outer frame is provided with an annular protrusion, the annular protrusion having a plurality of misaligned anti-fooling portions protruding into the carrier area and arranged asymmetrically. A second surface is provided with a plurality of snap-fit ​​blocks, which, when stacked in pairs, respectively snap into the misaligned portions of the other semiconductor wafer carrier.

Claims

1. A semiconductor wafer work carrier, used in pairs for stacking to carry a plurality of semiconductor wafers, the semiconductor wafer work carrier comprising: an outer frame including two first borders and two second borders, the two second borders being respectively connected to the two first borders; a plurality of connecting ribs, each connecting rib being substantially parallel to the two second borders and connected to the two first borders, the connecting ribs and the outer frame together defining a plurality of carrying areas; A plurality of support frames, each support frame being respectively installed in one of the load-bearing areas, and connected to at least one of the outer frame and the connecting ribs via a plurality of connectors. Each support frame includes two first support ribs and two second support ribs, the two first support ribs being respectively connected to the two second support ribs. At the junction of each of the first support ribs and each of the second support ribs, each first support rib has a first limiting member and a first abutting member, and each second support rib has a second limiting member and a second abutting member. The first limiting member and the second limiting member extend in a direction perpendicular to a normal to the outer frame, and the first abutting member and the second abutting member extend toward the interior of the load-bearing area. A plurality of flexible coverings are also provided, each flexible covering located at a corner of the support frame, covering a portion of the first support rib, the first limiting member, the first abutting member, a portion of the second support rib, the second limiting member, and the second abutting member. A first surface of the outer frame is provided with an annular protrusion, and an annular groove is formed between the edge of the first surface of the outer frame and the annular protrusion. The annular protrusion has a plurality of anti-fooling parts, which protrude from the annular groove toward the bearing area and are asymmetrically arranged with respect to a center point of the outer frame. A second surface of the outer frame is provided with a plurality of locking blocks. When the semiconductor wafer work trays are stacked in pairs, the locking blocks are correspondingly locked into the anti-fooling parts of the other semiconductor wafer work tray.

2. The semiconductor wafer work carrier as claimed in claim 1, wherein a second surface of the outer frame is further provided with a plurality of bumps, wherein when the semiconductor wafer work carriers are stacked in pairs, the bumps are correspondingly stacked on the annular channel of the other semiconductor wafer work carrier.

3. The semiconductor wafer work tray as claimed in claim 1, wherein the outer frame further includes a groove corresponding to one of the foolproof features, located on one side surface of the outer frame, extending from the first surface to the second surface.

4. The semiconductor wafer work tray as described in claim 1, wherein one of the four corners formed by the intersection of the two first borders and the two second borders of the outer frame includes a tangent.

5. The semiconductor wafer work carrier as described in claim 1 further includes a first gripping portion and a second gripping portion, the first gripping portion and the second gripping portion extending outward from the two second frame edges respectively.

6. The semiconductor wafer work carrier as described in claim 5, wherein the first gripping portion and the second gripping portion have different shapes.

7. The semiconductor wafer work tray as described in claim 6, wherein the first gripping portion includes two card slots, and two identification card blocks are respectively engaged in the two card slots.

8. The semiconductor wafer work tray as described in claim 7, wherein the two card slots are of different sizes.

9. The semiconductor wafer work carrier as claimed in claim 1, wherein adjacent to the junction of the two first support ribs and the two second support ribs, each first support rib further includes a third limiting member, and each second support rib further includes a fourth limiting member, the third limiting member and the fourth limiting member extending in a direction opposite to the first limiting member and the second limiting member, and each third limiting member and the first limiting member at the same junction do not overlap in a vertical projection direction, and each fourth limiting member and the second limiting member at the same junction do not overlap in a vertical projection direction, and the flexible covering member is located further covering the third limiting member and the fourth limiting member.

10. The semiconductor wafer work carrier as claimed in claim 1, wherein a positioning bump is formed on the first surface of the outer frame, between the two first side frames and the two first support ribs, or between the two second side frames and the second support ribs, or on the connecting ribs, and on the second surface, each positioning bump has a positioning groove at its position, wherein when the semiconductor wafer work carriers are stacked in pairs, the positioning bumps are correspondingly stacked in the positioning groove of the other semiconductor wafer work carrier.

11. The semiconductor wafer work carrier as claimed in claim 1, wherein a plurality of conductive particles are added to the material of the outer frame.

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