Semiconductor package

Description

[0001] FIG. 1 is a top perspective view of a semiconductor package;

[0002] FIG. 2 is a bottom perspective view of the semiconductor package of FIG. 1;

[0003] FIG. 3 is a top view of the semiconductor package of FIG. 1;

[0004] FIG. 4 is a bottom view of the semiconductor package of FIG. 1;

[0005] FIG. 5 is a side view of the semiconductor package of FIG. 1;

[0006] FIG. 6 is an opposing side view of the semiconductor package of FIG. 1;

[0007] FIG. 7 is an end view of the semiconductor package of FIG. 1; and,

[0008] FIG. 8 is an opposing end view of the semiconductor package of FIG. 1.

[0009] The broken lines shown in the drawings depict portions of the semiconductor package that form no part of the claimed design.

Claims

The ornamental design for a semiconductor package, as shown and described.

Images