Power module package
Patent Information
- Application Number
- US29/861844
- Authority / Receiving Office
- US · United States
- Patent Type
- Designs(United States)
- Current Assignee / Owner
- Filing Date
- 2022-12-02
- Publication Date
- 2025-10-14
- Estimated Expiration
- 2040-10-14
Smart Images

Figure USD1098055-D00000_ABST
Description
[0001] FIG. 1 is a perspective view of a first embodiment of a power module package showing our new design;
[0002] FIG. 2 is a top plan view thereof;
[0003] FIG. 3 is a bottom plan view thereof;
[0004] FIG. 4 is a front view thereof;
[0005] FIG. 5 is a rear view thereof;
[0006] FIG. 6 is a side view thereof;
[0007] FIG. 7 is an opposite side view thereof;
[0008] FIG. 8 is a perspective view of a second embodiment of a power module package showing our new design;
[0009] FIG. 9 is a top plan view thereof;
[0010] FIG. 10 is a bottom plan view thereof;
[0011] FIG. 11 is a front view thereof;
[0012] FIG. 12 is a rear view thereof;
[0013] FIG. 13 is a side view thereof; and,
[0014] FIG. 14 is an opposite side view thereof.
[0015] Evenly spaced broken lines depict unclaimed portions of the environmental structure, and form no part of the claimed design. Dot-dash lines depict boundaries of the claimed design, and form no part of the claimed design.
[0016] The shading in FIGS. 1-14 indicates claimed surface areas on the power module package.
Claims
The ornamental design for a power module package, as shown and described.
Citation Information
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