Thermal processing chamber for a semiconductor

Description

[0001] FIG. 1 is a front, top and right side perspective view of a thermal processing chamber for a semiconductor, showing our new design;

[0002] FIG. 2 is a front elevational view thereof;

[0003] FIG. 3 is a right side elevational view thereof;

[0004] FIG. 4 is a left side elevational view thereof;

[0005] FIG. 5 is a rear elevational view thereof;

[0006] FIG. 6 is a top plan view thereof;

[0007] FIG. 7 is a bottom plan view thereof;

[0008] FIG. 8 is a cross sectional view taken along line 8-8 in FIG. 2; and,

[0009] FIG. 9 is an enlarged portion view taken from encircled portion labeled, “FIG. 9,” in FIG. 8.

[0010] The dot-dashed broken lines shown in FIGS. 8 and 9 represent the boundaries of the enlarged portion view of FIG. 9 and form no part of the claimed design.

Claims

The ornamental design for a thermal processing chamber for a semiconductor, as shown and described.

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