MEMORY FOR MACHINE LEARNING AND MACHINE LEARNING APPLICATIONS, AND METHODS OF OPERATION FOR NEURONS

Abstract

This study discusses memory-based computing for machine learning and machine learning applications, and the operating method for neurons. An in-memory computing array is proposed, in which each neuron consists of a capacitor and an output transistor. During the evaluation phase, the filter-weighted voltage and the binary state of the input bit control whether or not to turn off the output transistor, thereby affecting the voltage of the read bit line connected to the output transistor.