DISPLAY PLATFORM AND DISPLAY DEVICE

Abstract

The invention relates to a display plate and display device, and the display plate has component pixels arranged in an array, and comprises a substrate (101), a control circuit layer (102) on the substrate (101), a pixel determination layer (108) and a light-transmitting element layer on the face of the control circuit layer (102) away from the substrate (101), and a black matrix layer (113) on the face of the light-transmitting element layer away from the substrate (101). Each pixel in the component pixels comprises a pixel control circuit in the control circuit layer (102) and a light-transmitting element (EM) in the light-transmitting element layer, and the pixel control circuit is configured to control the light-transmitting element (EM). The black matrix layer (113) comprises first-pass light-transmitting openings (1031) which in turn expose the light-transmitting elements (EM) of the component pixels in a direction perpendicular to the surface of the substrate (101).The pixel-defining layer (108) consists of component pixel holes (1081), at least part of the component pixel holes (1081) correspond one-to-one with and at least partially overlap with the first-pass light-transmitting holes (1031), and at least one of the first-pass light-transmitting holes (1031) has an arc-shaped edge. The display panel has a better display effect.

Description

Display substrate and display device

[0001] This application claims priority to international application No. PCT / CN2021 / 094676 filed on May 19, 2021 and priority to Chinese patent application No. 202110726472.5 filed on June 29, 2021. The contents of the above-mentioned Chinese patent application disclosure are hereby cited in their entirety as part of this application. Technical Field

[0002] Embodiments of the present disclosure relate to a display substrate and a display device. Background Art

[0003] OLED (Organic Light Emitting Diode) display devices have a series of advantages such as self-luminescence, high contrast, high clarity, wide viewing angle, low power consumption, fast response speed, and low manufacturing cost. They have become one of the key development directions of the new generation of display devices and are therefore receiving increasing attention.

[0004] Summary of the Invention

[0005] At least one embodiment of the present disclosure provides a display substrate having a plurality of sub-pixels arranged in an array, and comprising a base substrate, a driving circuit layer disposed on the base substrate, a pixel defining layer disposed on a side of the driving circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer disposed on a side of the light-emitting device layer away from the base substrate, wherein each of the plurality of sub-pixels comprises a pixel driving circuit disposed in the driving circuit layer and a light-emitting device disposed in the light-emitting device layer, the pixel driving circuit being configured to drive the light-emitting device, the pixel defining layer comprising a plurality of sub-pixel openings, and the light-emitting device comprising a pixel defining layer disposed on a side away from the base substrate. A first electrode layer, a light-emitting material layer and a second electrode layer are stacked in sequence in the direction of the base substrate, the pixel defining layer is arranged on a side of the first electrode layer away from the base substrate, and the multiple sub-pixel openings respectively expose the first electrode layer of the light-emitting devices of the multiple sub-pixels, the black matrix layer has multiple first light-transmitting openings respectively exposing the light-emitting devices of the multiple sub-pixels in a direction perpendicular to the plate surface of the base substrate, at least one of the multiple first light-transmitting openings has an arc-shaped edge, and in the direction perpendicular to the plate surface of the base substrate, at least part of the multiple sub-pixel openings correspond one-to-one to the multiple first light-transmitting openings and at least partially overlap.

[0006] For example, in the display substrate provided in at least one embodiment of the present disclosure, in the direction parallel to the plate surface of the base substrate, the planar shape of at least one of the multiple first light-transmitting openings is elliptical, semi-elliptical, circular, semi-circular, racetrack-shaped or semi-racetrack-shaped.

[0007] For example, in the display substrate provided in at least one embodiment of the present disclosure, in the direction parallel to the plate surface of the base substrate, the planar shape of at least one of the multiple sub-pixel openings is elliptical, semi-elliptical, circular, semi-circular, racetrack-shaped or semi-racetrack-shaped.

[0008] For example, in the display substrate provided in at least one embodiment of the present disclosure, in a corresponding sub-pixel opening and a first light-transmitting opening, in a direction parallel to the plate surface of the base substrate, the planar shape of the sub-pixel opening is the same as the planar shape of the first light-transmitting opening.

[0009] For example, in the display substrate provided by at least one embodiment of the present disclosure, the orthographic projection of the sub-pixel opening on the base substrate is located within the orthographic projection of the first light-transmitting opening on the base substrate.

[0010] For example, in the display substrate provided by at least one embodiment of the present disclosure, the minimum distance between the edge of the orthographic projection of the sub-pixel opening on the base substrate and the edge of the orthographic projection of the first light-transmitting opening on the base substrate is 1 μm-3 μm.

[0011] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first electrode layer includes a main body portion and a connecting portion, the connecting portion is configured to be electrically connected to the pixel driving circuit, and at least a portion of the main body portion is exposed by the sub-pixel opening; in a direction parallel to the plate surface of the base substrate, the planar shape of the main body portion is at least partially the same as the planar shape of the sub-pixel opening.

[0012] For example, in the display substrate provided by at least one embodiment of the present disclosure, the orthographic projection of the sub-pixel opening on the base substrate is located within the orthographic projection of the main body on the base substrate.

[0013] For example, in the display substrate provided by at least one embodiment of the present disclosure, the minimum distance between the edge of the orthographic projection of the sub-pixel opening on the base substrate and the edge of the orthographic projection of the main body on the base substrate is 1 μm-5 μm.

[0014] For example, in the display substrate provided by at least one embodiment of the present disclosure, the orthographic projection of the first light-transmitting opening corresponding to the sub-pixel opening on the base substrate is located within the orthographic projection of the main body on the base substrate.

[0015] For example, in the display substrate provided by at least one embodiment of the present disclosure, the orthographic projection of the main body on the base substrate is located within the orthographic projection of the first light-transmitting opening corresponding to the sub-pixel opening on the base substrate.

[0016] For example, the display substrate provided in at least one embodiment of the present disclosure further includes a color filter layer, the color filter layer includes a plurality of color filter patterns, and the plurality of color filter patterns are respectively arranged in the plurality of first light-transmitting openings.

[0017] For example, in the display substrate provided in at least one embodiment of the present disclosure, the black matrix layer further has a plurality of second light-transmitting openings, and the plurality of second light-transmitting openings are respectively arranged between the plurality of first light-transmitting openings, and the driving circuit layer includes a plurality of light-transmitting portions; at least part of the plurality of second light-transmitting openings and at least part of the plurality of light-transmitting portions are arranged in a one-to-one correspondence and are configured to transmit light within a predetermined angle range with respect to the surface of the base substrate.

[0018] For example, in the display substrate provided in at least one embodiment of the present disclosure, in the corresponding second light-transmitting opening and light-transmitting portion, in the direction parallel to the plate surface of the base substrate, the planar size of the second light-transmitting opening is smaller than the planar size of the light-transmitting portion.

[0019] For example, in the display substrate provided by at least one embodiment of the present disclosure, in the corresponding second light-transmitting opening and light-transmitting portion, the orthographic projection of the second light-transmitting opening on the base substrate at least partially overlaps with the orthographic projection of the light-transmitting portion on the base substrate.

[0020] For example, in the display substrate provided by at least one embodiment of the present disclosure, the multiple sub-pixels include red sub-pixels, green sub-pixels and blue sub-pixels, the first light-transmitting opening exposing the light-emitting device of the red sub-pixel is basically in the shape of a first ellipse, the first light-transmitting opening exposing the light-emitting device of the green sub-pixel is basically in the shape of a second ellipse, the length of the major axis of the second ellipse is smaller than the length of the major axis of the first ellipse, and the length of the minor axis of the second ellipse is smaller than the length of the minor axis of the first ellipse; or, the first light-transmitting opening exposing the light-emitting device of the green sub-pixel is basically in the shape of a semi-ellipse, and the first light-transmitting opening exposing the light-emitting device of the blue sub-pixel is basically in the shape of a third ellipse, the length of the major axis of the third ellipse is smaller than the length of the major axis of the first ellipse, and the length of the minor axis of the third ellipse is larger than the length of the minor axis of the first ellipse.

[0021] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first light-transmitting opening exposing the light-emitting device of the red sub-pixel includes a first arcuate edge and a second arcuate edge relative to each other and a first tip and a second tip at the intersection of the first arcuate edge and the second arcuate edge, and the first tip and the second tip are relative to each other; the first light-transmitting opening exposing the light-emitting device of the blue sub-pixel includes a third arcuate edge and a fourth arcuate edge relative to each other and a third tip and a fourth tip at the intersection of the third arcuate edge and the fourth arcuate edge, and the third tip and the fourth tip are relative to each other; and the first light-transmitting opening exposing the light-emitting device of the green sub-pixel includes a fifth arcuate edge and a fifth tip located at one end of the fifth arcuate edge.

[0022] For example, in the display substrate provided by at least one embodiment of the present disclosure, the sub-pixel opening corresponding to the green sub-pixel includes a sixth arc-shaped edge and a sixth tip located at one end of the sixth arc-shaped edge, and the main body of the first electrode layer of the light-emitting device of the green sub-pixel includes a seventh arc-shaped edge, and the seventh arc-shaped edge does not include a tip.

[0023] For example, in the display substrate provided by at least one embodiment of the present disclosure, the multiple sub-pixels include red sub-pixels, green sub-pixels and blue sub-pixels, the first light-transmitting opening exposing the light-emitting device of the red sub-pixel is basically in a first runway shape, the first light-transmitting opening exposing the light-emitting device of the green sub-pixel is basically in a second runway shape, the length of the long axis of the second runway shape is smaller than the length of the long axis of the first runway shape, and the length of the short axis of the second runway shape is smaller than the length of the short axis of the first runway shape; or, the first light-transmitting opening exposing the light-emitting device of the green sub-pixel is basically in a half-runway shape, and the first light-transmitting opening exposing the light-emitting device of the blue sub-pixel is basically in a third runway shape, the length of the long axis of the third runway shape is smaller than the length of the long axis of the first runway shape, and the length of the short axis of the third runway shape is larger than the length of the short axis of the first runway shape.

[0024] For example, in the display substrate provided in at least one embodiment of the present disclosure, one red sub-pixel, two green sub-pixels, and one blue sub-pixel constitute a pixel unit, and the multiple pixel units composed of the multiple sub-pixels are arranged in an array on the base substrate.

[0025] At least one embodiment of the present disclosure provides a display device, which includes the display substrate provided by an embodiment of the present disclosure.

[0026] For example, the display device provided by at least one embodiment of the present disclosure also includes a textured touch surface and an image sensor array, wherein the image sensor array is arranged on a side of the driving circuit layer away from the light-emitting device layer, and includes a plurality of image sensors, and the plurality of image sensors are configured to receive light emitted from a plurality of light-emitting devices in the light-emitting device layer and reflected to the plurality of image sensors through the texture on the textured touch surface for texture acquisition. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.

[0028] FIG1 is a partial cross-sectional schematic diagram of a display substrate;

[0029] FIG2 is a schematic plan view of a sub-pixel opening of a pixel defining layer and a sub-pixel light emitting opening of a black matrix layer of a display substrate;

[0030] FIG3 is a partial cross-sectional schematic diagram of a display substrate provided by at least one embodiment of the present disclosure;

[0031] 4A is a plan view schematically showing a sub-pixel opening of a pixel defining layer, a first light-transmitting opening of a black matrix layer, and a first electrode layer of a light-emitting device of a display substrate provided by at least one embodiment of the present disclosure;

[0032] 4B is another plan view schematically illustrating a sub-pixel opening of a pixel defining layer, a first light-transmitting opening of a black matrix layer, and a first electrode layer of a light-emitting device of a display substrate provided by at least one embodiment of the present disclosure;

[0033] FIG5 is another partial cross-sectional schematic diagram of a display substrate provided by at least one embodiment of the present disclosure;

[0034] FIG6 is a planar arrangement diagram of a plurality of sub-pixels of a display substrate provided by at least one embodiment of the present disclosure;

[0035] 7 is a planar arrangement diagram of a plurality of first light-transmitting openings in a black matrix layer corresponding to a plurality of sub-pixels of the display substrate in FIG. 6 ;

[0036] FIG8A is another planar arrangement diagram of a plurality of sub-pixels of a display substrate provided by at least one embodiment of the present disclosure;

[0037] 8B is a planar arrangement diagram of a plurality of first light-transmitting openings in the black matrix layer corresponding to a plurality of sub-pixels of the display substrate in FIG. 8A ;

[0038] FIG9 is another planar arrangement diagram of a plurality of sub-pixels of a display substrate provided by at least one embodiment of the present disclosure;

[0039] 10 is a planar arrangement diagram of a plurality of first light-transmitting openings in a black matrix layer corresponding to a plurality of sub-pixels of the display substrate in FIG. 9 ;

[0040] FIG11A is another planar arrangement diagram of a plurality of sub-pixels of a display substrate provided by at least one embodiment of the present disclosure;

[0041] 11B is a planar arrangement diagram of a plurality of first light-transmitting openings in a black matrix layer corresponding to a plurality of sub-pixels of the display substrate in FIG. 11A ;

[0042] FIG12 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure;

[0043] FIG13 is a plan view of a black matrix layer and a color filter layer of a display substrate provided by at least one embodiment of the present disclosure;

[0044] FIG14A is a schematic diagram of a pixel driving circuit of a display substrate provided by at least one embodiment of the present disclosure;

[0045] FIG14B is a schematic diagram of another pixel driving circuit of a display substrate provided by at least one embodiment of the present disclosure;

[0046] 15 to 21B are partial plan views of various functional layers of a display substrate provided by at least one embodiment of the present disclosure, and partial plan views of the functional layers after being stacked in sequence;

[0047] as well as

[0048] FIG22 is a schematic cross-sectional view of a display device provided by at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0049] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0050] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0051] To prevent screen glare, traditional OLED display substrates typically incorporate a polarizer to improve viewing comfort in ambient light. However, the inventors of this disclosure have discovered that the transmittance of polarizers is typically only around 40%, resulting in low light extraction efficiency and, in turn, high power consumption.

[0052] In some embodiments, COE (Cover Film On Encapsulation) technology, which uses color film (CF) to replace polarizers, can be used to improve the light extraction efficiency of the display substrate. This technology is conducive to the development of display substrates towards high integration and thinness.

[0053] For example, FIG1 shows a partial cross-sectional schematic diagram of an exemplary display substrate using COE technology. As shown in FIG1 , the display substrate has a structure including a pixel defining layer E, a light-emitting device, a black matrix layer C, and an encapsulation layer F. The pixel defining layer E has a sub-pixel opening E1, which exposes the anode D of the light-emitting device. The light-emitting layer B1 and cathode B2 of the light-emitting device are formed within the sub-pixel opening E1 and on the anode D. Within the range defined by the sub-pixel opening E1, the light-emitting layer B1 contacts the anode D. The light-emitting layer B1 can be driven by the anode D and the cathode B2 to emit light. Thus, the area defined by the sub-pixel opening E1 is the effective light-emitting area of ​​the sub-pixel. The encapsulation layer F is disposed on the light-emitting device, and the black matrix layer C is disposed on the encapsulation layer F. The black matrix layer C has a sub-pixel light-emitting opening C1 for exposing the effective light-emitting area of ​​the sub-pixel so that light emitted by the light-emitting device of the sub-pixel can be emitted. For example, a color film A is formed in the sub-pixel light-emitting opening C1, and the color of the color film A is the same as the color of the light emitted by the light-emitting layer of the light-emitting device, thereby improving the light purity of the display substrate and the light extraction rate of the display substrate; or, the light-emitting layer of the light-emitting device emits white light, and after adding the color film A, monochromatic light can be formed.

[0054] However, the inventors of the present disclosure discovered that, as shown in FIG1 , external light (indicated by the arrows in FIG1 ) passing through the edge of the sub-pixel light exit opening C1 will be diffracted, and the light reflected from the anode and cathode of the light-emitting device will also be diffracted when passing through the edge of the sub-pixel light exit opening C1, thereby causing color separation on the display substrate, that is, the external light and the light reflected from the anode and cathode of the light-emitting device produce colors at the edge of the sub-pixel light exit opening C1. Through research, it was found that the range of diffracted light (the shape of the diffracted light) produced by the above diffraction phenomenon is correlated with the shape and size of the sub-pixel light exit opening C1.

[0055] For example, FIG2 shows a schematic plan view of the sub-pixel opening of the pixel defining layer and the sub-pixel light exit opening of the black matrix layer corresponding to a sub-pixel of an exemplary display substrate. As shown in FIG2, the planar shape of the area defined by the sub-pixel opening E1 of the pixel defining layer E is hexagonal, and correspondingly, the planar shape of the area defined by the sub-pixel light exit opening C1 of the black matrix layer C is also hexagonal. Since the sub-pixel light exit opening C1 of the black matrix layer C in the display substrate using COE technology is relatively small, for example, at λ*10 2 On the order of magnitude, in the current sub-pixel arrangement, for example, in a sub-pixel arrangement with red sub-pixels, green sub-pixels and blue sub-pixels, at the hexagonal sub-pixel light-emitting opening C1, the display substrate will inevitably produce a diffraction effect of monochromatic light (red, green and blue, etc.) under external light (such as a point light source), and because the luminous efficiency of the light-emitting devices of sub-pixels of different colors is different, the shape and size of the sub-pixel opening E1 of the pixel defining layer E corresponding to sub-pixels of different colors are usually different. Among them, the diffraction phenomenon generated by sub-pixels with narrower opening sizes and sub-pixels with shorter opening sizes is more serious, and these diffraction phenomena further aggravate the degree of color separation.

[0056] It should be noted that in the embodiments of the present disclosure, the color separation phenomenon refers to the phenomenon that when the display substrate is in the off state, the reflected light appears to be separated in color (such as red, green and blue) under external light (such as point light source or line light source).

[0057] At least one embodiment of the present disclosure provides a display substrate and a display device, wherein the display substrate has a plurality of sub-pixels arranged in an array and includes a base substrate, a driving circuit layer disposed on the base substrate, a pixel defining layer disposed on a side of the driving circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer disposed on a side of the light-emitting device layer away from the base substrate. Each of the plurality of sub-pixels includes a pixel driving circuit disposed in the driving circuit layer and a light-emitting device disposed in the light-emitting device layer, the pixel driving circuit being configured to drive the light-emitting device. The pixel defining layer includes a plurality of sub-pixel openings. The light-emitting device includes a first electrode layer, a light-emitting material layer, and a second electrode layer stacked in sequence in a direction away from the base substrate. The pixel defining layer is disposed on a side of the first electrode layer away from the base substrate, and the plurality of sub-pixel openings respectively expose the first electrode layers of the light-emitting devices of the plurality of sub-pixels. The black matrix layer includes a plurality of first light-transmitting openings respectively exposing the light-emitting devices of the plurality of sub-pixels in a direction perpendicular to a surface of the base substrate. At least one of the plurality of first light-transmitting openings has an arc-shaped edge. In a direction perpendicular to the surface of the base substrate, at least some of the plurality of sub-pixel openings correspond one-to-one with and at least partially overlap with the plurality of first light-transmitting openings.

[0058] In the above-mentioned display substrate provided in at least one embodiment of the present disclosure, at least one of the multiple first light-transmitting openings has an arc-shaped edge, which can reduce or even eliminate the diffraction of external light at the edge of the first light-transmitting opening of the black matrix layer, causing color separation on the display substrate, thereby improving the display effect of the display substrate.

[0059] The display substrate and the display device provided by the embodiments of the present disclosure are described in detail below through several specific embodiments.

[0060] Figure 3 shows a cross-sectional schematic diagram of a display substrate provided by at least one embodiment of the present disclosure. As shown in Figure 3, the display substrate has a plurality of sub-pixels arranged in an array, and Figure 3 shows one sub-pixel as an example. The display substrate includes a base substrate 101, a driving circuit layer 102 arranged on the base substrate 101, a light-emitting device layer arranged on a side of the driving circuit layer 102 away from the base substrate 101, and a black matrix layer 113 arranged on a side of the light-emitting device layer away from the base substrate 101.

[0061] As shown in FIG3 , each sub-pixel includes a pixel driving circuit disposed in the driving circuit layer 102 and a light-emitting device EM disposed in the light-emitting device layer. The pixel driving circuit is configured to drive the light-emitting device EM. The black matrix layer 113 has a plurality of first light-transmitting openings 1131 perpendicular to the surface of the substrate 101 (i.e., in the vertical direction in the figure), respectively exposing the light-emitting devices EM of the plurality of sub-pixels, thereby transmitting light emitted by the light-emitting devices EM of the plurality of sub-pixels. For example, FIG4A shows a plan view of the first light-transmitting openings 1131, i.e., a plan view parallel to the surface of the substrate 101. As shown in FIG4A , at least one first light-transmitting opening 1131 has an arcuate edge. For example, each first light-transmitting opening 1131 has an arcuate edge.

[0062] For example, in some embodiments, as shown in FIG4A , in a direction parallel to the surface of the base substrate 101, the planar shape of at least one first light-transmitting opening 1131 (for example, each first light-transmitting opening 1131) is basically elliptical (or mango-shaped), semi-elliptical, circular, semi-circular, runway-shaped (as shown in the figure) or semi-runway-shaped or a deformed shape thereof.

[0063] It should be noted that in the embodiments of the present disclosure, the "runway shape" refers to a shape similar to a runway formed by a rectangle and two arcs on opposite sides of the rectangle, with the runway shape having two parallel straight sides and two arcs arranged opposite each other. The "mango shape" can be considered a modified ellipse with two arcs arranged opposite each other. For details, please refer to Figures 6 and 7 described later.

[0064] For example, as shown in FIG3 , the pixel driving circuit of each sub-pixel includes at least one thin-film transistor (TFT) and a storage capacitor (Cst). The thin-film transistor (TFT) includes an active layer 1021, a gate electrode 1022, a source electrode 1023, and a drain electrode 1024. The source electrode 1023 of the thin-film transistor (TFT) is electrically connected to the first electrode layer 104 of the light-emitting device EM. For example, the storage capacitor (Cst) includes a first capacitor electrode (C1) and a second capacitor electrode (C2). For example, the first capacitor electrode (C1) of the storage capacitor (Cst) is disposed on the same layer as the gate electrode 1022 of the thin-film transistor (TFT).

[0065] For example, the pixel driving circuit can be formed into a structure such as 2T1C (two thin film transistors and one storage capacitor), 6T1C (six thin film transistors and one storage capacitor), etc., thereby including multiple thin film transistors, and the multiple thin film transistors have a structure similar to or the same as the stacked structure shown in Figure 3. Figure 3 only shows the thin film transistor directly connected to the light-emitting device. The thin film transistor can be a driving thin film transistor or a light-emitting control thin film transistor, etc.

[0066] It should also be noted that, in the embodiments of the present disclosure, “same-layer arrangement” means that two functional layers or structural layers are in the same layer and are formed of the same material in the hierarchical structure of the display substrate, that is, in the preparation process, the two functional layers or structural layers can be formed by the same material layer, and the required patterns and structures can be formed by the same composition process.

[0067] In addition, as shown in Figure 3, the display panel may also include a buffer layer 103 arranged on the base substrate 101, a first gate insulation layer 1024 arranged on the active layer 1021, a second gate insulation layer 1025 arranged on the gate 1022 and the first capacitor electrode C1, an interlayer insulation layer 1026 arranged on the second capacitor electrode CE2, a passivation layer 1027 arranged on the source 1023 and the drain 1024, and a planarization layer 109 arranged on the passivation layer 1027.

[0068] For example, in some embodiments, as shown in FIG3 , the display substrate may further include a pixel defining layer 108 disposed on a side of the drive circuit layer 102 away from the base substrate 101. For example, the pixel defining layer 108 is disposed on the planarization layer 109. The pixel defining layer 108 includes a plurality of sub-pixel openings 1081. The light-emitting device EM includes a first electrode layer 104, a light-emitting material layer 105, and a second electrode layer 106 stacked in sequence in a direction away from the base substrate 101. The pixel defining layer 108 is disposed on a side of the first electrode layer 104 away from the base substrate 101. The plurality of sub-pixel openings 1081 expose the first electrode layer 104 of the light-emitting device EM of each sub-pixel. In a direction perpendicular to the surface of the base substrate 101 (i.e., the vertical direction in the figure), the plurality of sub-pixel openings 1081 correspond one-to-one with the plurality of first light-transmitting openings 1131 and at least partially overlap. As a result, light emitted by the light-emitting device EM can be emitted from the first light-transmitting openings 1131, thereby achieving a display effect.

[0069] For example, in some embodiments, as shown in FIG4A , in a direction parallel to the surface of the base substrate 101 , the planar shape of at least one sub-pixel opening 1081 is basically elliptical (or mango-shaped), semi-elliptical, circular, semi-circular, racetrack-shaped (as shown in the figure) or semi-racetrack-shaped or a deformed shape thereof.

[0070] For example, in some embodiments, as shown in FIG4A , in a corresponding sub-pixel opening 1081 and a first light-transmitting opening 1131 , in a direction parallel to the plate surface of the base substrate 101 , the planar shape of the sub-pixel opening 1081 is the same as the planar shape of the first light-transmitting opening 1131 , and are shown in the figure as being runway-shaped.

[0071] For example, in some embodiments, as shown in FIG4A , the orthographic projection of the sub-pixel opening 1081 on the base substrate 101 is located within the orthographic projection of the first light-transmitting opening 1131 on the base substrate 101 ; that is, the planar size of the sub-pixel opening 1081 is smaller than the planar size of the first light-transmitting opening 1131 .

[0072] Because the light-emitting material layer 105 contacts the first electrode layer 104 within the range defined by the sub-pixel opening 1081, the light-emitting material layer 105 can be driven by both the first electrode layer 104 and the second electrode layer 106 to emit light. Therefore, the area defined by the sub-pixel opening 1081 is the effective light-emitting area of ​​the sub-pixel. By designing the planar shape of the sub-pixel opening 1081 to be substantially identical to the planar shape of the first light-transmitting opening 1131, and by designing the planar dimensions of the sub-pixel opening 1081 to be smaller than the planar dimensions of the first light-transmitting opening 1131, the effective light-emitting area of ​​the sub-pixel is fully exposed by the first light-transmitting opening 1131. Light emitted by the light-emitting device of the sub-pixel can be fully emitted from the first light-transmitting opening 1131. As a result, the display substrate can fully utilize the light emitted by the light-emitting device of the sub-pixel for display, thereby improving the light extraction efficiency of the display substrate and saving energy.

[0073] For example, in some embodiments, as shown in Figure 4A, the minimum distance D1 between the edge of the orthographic projection of the sub-pixel opening 1081 on the base substrate 101 and the edge of the orthographic projection of the first light-transmitting opening 1131 on the base substrate 101 is 1 μm-3 μm, for example, 1.5 μm, 2 μm or 2.5 μm, etc., that is, the sub-pixel opening 1081 is retracted by 1 μm-3 μm relative to the first light-transmitting opening 1131, so that the effective light-emitting area defined by the sub-pixel opening 1081 is fully exposed by the first light-transmitting opening 1131.

[0074] For example, in some embodiments, as shown in FIG3 and FIG4A , the first electrode layer 104 includes a main portion 1041 and a connecting portion 1042, wherein the connecting portion 1042 is configured to be electrically connected to the pixel driving circuit, and at least a portion of the main portion 1041 is exposed by the sub-pixel opening 1081. For example, in a direction parallel to the surface of the base substrate 101, the planar shape of the main portion 1041 is the same as the planar shape of the sub-pixel opening 1081.

[0075] For example, in some embodiments, as shown in FIG4A , the orthographic projection of the sub-pixel opening 1081 on the base substrate 101 is located within the orthographic projection of the main portion 1041 on the base substrate 101. Thus, the shape and size of the main portion 1041 exposed by the sub-pixel opening 1081 are equal to the shape and size of the sub-pixel opening 1081. Therefore, during the manufacturing process, the effective light-emitting area of ​​each sub-pixel can be obtained by designing the size of the sub-pixel opening 1081. Furthermore, the larger main portion 1041 also allows for possible positional deviation of the sub-pixel opening 1081 during the manufacturing process.

[0076] For example, in some embodiments, as shown in FIG4A , a minimum distance D2 between an edge of an orthographic projection of the sub-pixel opening 1081 on the base substrate 101 and an edge of an orthographic projection of the main body portion 1041 on the base substrate 101 is 1 μm-5 μm, such as 2.5 μm, 3 μm or 3.5 μm, etc., that is, the sub-pixel opening 1081 is retracted by 1 μm-5 μm relative to the main body portion 1041 .

[0077] For example, in some embodiments, as shown in FIG4A , the orthographic projection of the first light-transmitting opening 1131 corresponding to the sub-pixel opening 1081 on the substrate 101 is located within the orthographic projection of the main body 1041 on the substrate 101. That is, in a direction parallel to the surface of the substrate 101, the planar dimensions of the main body 1041, the first light-transmitting opening 1131, and the sub-pixel opening 1081 gradually decrease. This design is beneficial for improving the manufacturing yield of the display substrate, increasing the light extraction efficiency of the display substrate, and reducing or even eliminating the color separation phenomenon on the display substrate.

[0078] For example, in other embodiments, as shown in FIG4B , the orthographic projection of the main body portion 1041 on the base substrate 101 is located within the orthographic projection of the first light-transmitting opening 1131 on the base substrate 101, which is arranged corresponding to the sub-pixel opening 1081. In this case, the first light-transmitting opening 1131 has substantially the same shape as the main body portion 1041, and the first light-transmitting opening 1131 is expanded outward relative to the main body portion 1041. This solution can also improve the light extraction efficiency of the display substrate and reduce or even eliminate the phenomenon of color separation on the display substrate.

[0079] For example, in some embodiments, as shown in FIG3 , the display substrate may further include a spacer 107 provided on the pixel defining layer 108 and an encapsulation layer EN provided on the light-emitting device EM of the sub-pixel. For example, the encapsulation layer EN may include multiple sub-encapsulation layers to improve its encapsulation effect. For example, the encapsulation layer EN may be a composite encapsulation layer, including a first inorganic encapsulation layer 110, a second organic encapsulation layer 111, and a third inorganic encapsulation layer 112. For example, the first inorganic encapsulation layer 110 and the second inorganic encapsulation layer 112 may be formed of inorganic materials such as silicon nitride, silicon oxide, and silicon oxynitride, and the first organic encapsulation layer 111 may be formed of organic materials such as polyimide (PI) and epoxy resin. The composite encapsulation layer can form multiple protections for the functional structures on the display panel and has a better encapsulation effect.

[0080] For example, in other embodiments, as shown in FIG5 , the display substrate may further include a connecting electrode 1043, through which the first electrode layer 104 of the light-emitting device EM of the sub-pixel is electrically connected to the source electrode 1023 of the thin-film transistor TFT. For example, another planarization layer 1091 is further formed on the connecting electrode 1043, and in this case, the pixel defining layer 108 is disposed on the planarization layer 1091. For other structures of the display substrate shown in FIG5 , reference may be made to the description of the display substrate shown in FIG3 and FIG4A , and will not be repeated here.

[0081] For example, in embodiments of the present disclosure, the base substrate 101 may include a flexible insulating material such as polyimide (PI) or a rigid insulating material such as a glass substrate. For example, in some examples, the base substrate 101 may include a stacked structure of multiple flexible layers and multiple barrier layers alternately arranged. In this case, the flexible layer may include polyimide, and the barrier layer may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. For example, the buffer layer 103 may include an inorganic material such as silicon nitride, silicon oxide, or silicon oxynitride. The active layer 1021 can be made of materials such as polysilicon and metal oxide, the first gate insulating layer 1024 and the second gate insulating layer 1025 can be made of inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride, the gate 1022 and the first capacitor electrode C1 can be made of metal materials such as copper, aluminum, titanium, cobalt, etc., for example, they can be formed into a single-layer structure or a multi-layer structure, such as a multi-layer structure of titanium / aluminum / titanium, molybdenum / aluminum / molybdenum, etc. The second capacitor electrode C2 can be made of metal or alloy materials such as copper, aluminum, titanium, cobalt, etc., the interlayer insulating layer 1026 can be made of inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride, and the passivation layer 1027 can be made of inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride. For example, in some embodiments, the display substrate may also not have the passivation layer shown in Figures 3 and 5. The source and drain electrodes 1023 and 1024 can be made of metal materials such as copper, aluminum, titanium, and cobalt. For example, they can be formed into a single-layer structure or a multi-layer structure, such as a multi-layer structure of titanium / aluminum / titanium, molybdenum / aluminum / molybdenum, etc. The first electrode layer 104 is, for example, an anode layer, including a metal oxide such as ITO or IZO, or a metal such as Ag, Al, Mo, or an alloy thereof. The material of the light-emitting material layer 105 can be an organic light-emitting material. For example, the material of the light-emitting material layer 105 can be a light-emitting material that can emit a certain color of light (such as red light, blue light, or green light, etc.) as required. The second electrode layer 106 is, for example, a cathode layer, including a metal such as Mg, Ca, Li, or Al, or an alloy thereof, or a metal oxide such as IZO or ZTO, or an organic material with conductive properties such as PEDOT / PSS (poly(3,4-ethylenedioxythiophene) / polystyrene sulfonate). The planarization layer 109 (and the planarization layer 1091), the pixel definition layer 108, and the spacer 107 can be made of an organic insulating material such as polyimide. The embodiments of the present disclosure do not specifically limit the materials of each functional layer.

[0082] For example, in some embodiments, as shown in FIG3 , the display substrate may further include a color filter layer 114, wherein the color filter layer 114 includes a plurality of color filter patterns 1141. The plurality of color filter patterns 1141 are respectively disposed in the plurality of first light-transmitting openings 1131. Thus, light emitted by the light-emitting device EM of the sub-pixel can be emitted through the color filter patterns 1141, thereby improving the purity of the emitted light.

[0083] For example, as shown in FIG3 , the display substrate may further include a protective cover plate 115 disposed on the black matrix layer 113 and the color filter layer 114 to protect the structure of the display substrate. For example, the protective cover plate 115 may be a glass cover plate and may be bonded to the display substrate via an optically transparent adhesive (not shown).

[0084] For example, in some embodiments, as shown in FIG3 , the black matrix layer 113 may further include a plurality of second light-transmitting openings 1132 , each disposed between the plurality of first light-transmitting openings 1131 . The driving circuit layer includes a plurality of light-transmitting portions 1020 . At least some of the second light-transmitting openings 1132 correspond one-to-one with at least some of the plurality of light-transmitting portions 1020 , and are configured to transmit light within a predetermined angle range relative to the surface of the base substrate 101 , such as the light ray L shown in the figure. Thus, the light ray L can pass through the display substrate from the display side (upper side in the figure) of the display substrate to the non-display side (lower side in the figure) of the display substrate, thereby providing light sensing for a light-sensing device (e.g., an image sensor, etc.) that may be disposed on the non-display side of the display substrate.

[0085] For example, the plurality of light-transmitting portions 1020 include a light-transmitting insulating material, which includes the light-transmitting insulating material of the first gate insulating layer 1024 , the second gate insulating layer 1025 , the interlayer insulating layer 1026 , the passivation layer 1027 and other insulating layers.

[0086] For example, in some embodiments, in the corresponding second light-transmitting opening 1132 and the light-transmitting portion 1020, in the direction parallel to the plate surface of the base substrate 101, the planar size of the second light-transmitting opening 1132 is smaller than the planar size of the light-transmitting portion 1020, which will be described in detail later.

[0087] For example, in some embodiments, in the corresponding second light-transmitting opening 1132 and light-transmitting portion 1020 , the orthographic projection of the second light-transmitting opening 1132 on the base substrate 101 at least partially overlaps with the orthographic projection of the light-transmitting portion 1020 on the base substrate 101 , which will be described in detail later.

[0088] For example, in some embodiments, as shown in Figure 6, the multiple sub-pixels of the display substrate include a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B, the pixel defining layer includes a red sub-pixel opening 11, a green sub-pixel opening 12 and a blue sub-pixel opening 13, and the light-emitting devices EM of the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are respectively formed in the red sub-pixel opening 11, the green sub-pixel opening 12 and the blue sub-pixel opening 13 of the pixel defining layer.

[0089] For example, Figure 7 shows multiple first light-transmitting openings 1131 of the black matrix layer 113 corresponding to the multiple sub-pixels in Figure 6. As shown in Figure 7, the first light-transmitting opening 1131 exposing the light-emitting device EM of the red sub-pixel R is basically in the shape of a first ellipse 11-1 (or a mango shape, formed by two symmetrical arcs), and the first light-transmitting opening 1131 exposing the light-emitting device of the green sub-pixel G is basically in the shape of a second ellipse 12-1 (or a mango shape), the length L2 of the major axis of the second ellipse 12-1 is less than the length L1 of the major axis of the first ellipse 11-1, and the length W2 of the minor axis of the second ellipse 12-1 is less than the length L1 of the minor axis of the first ellipse 11-1; the first light-transmitting opening 1131 exposing the light-emitting device of the blue sub-pixel B is basically in the shape of a third ellipse 13-1, the length L3 of the major axis of the third ellipse 13-1 is less than the length L1 of the major axis of the first ellipse 11-1, and the length W3 of the minor axis of the third ellipse 13-1 is greater than the length L1 of the minor axis of the first ellipse.

[0090] For example, as shown in Figures 6 and 7, the first light-transmitting opening 1131 of the light-emitting device EM exposing the red sub-pixel R has the same shape as the red sub-pixel opening 11 of the pixel defining layer corresponding to the red sub-pixel R, and the planar size of the red sub-pixel opening 11 is smaller than the planar size of the first light-transmitting opening 1131 of the light-emitting device EM exposing the red sub-pixel R; the first light-transmitting opening 1131 of the light-emitting device EM exposing the green sub-pixel G has the same shape as the green sub-pixel opening 12 of the pixel defining layer corresponding to the green sub-pixel G, and the planar size of the green sub-pixel opening 12 is smaller than the planar size of the first light-transmitting opening 1131 of the light-emitting device EM exposing the green sub-pixel G; the first light-transmitting opening 1131 of the light-emitting device EM exposing the blue sub-pixel B has the same shape as the blue sub-pixel opening 13 of the pixel defining layer corresponding to the blue sub-pixel B, and the planar size of the blue sub-pixel opening 13 is smaller than the planar size of the first light-transmitting opening 1131 of the light-emitting device EM exposing the blue sub-pixel B.

[0091] By performing Lab color space detection on the display substrate with the above-mentioned elliptical (or mango-shaped) sub-pixels, for example, using a color analyzer to detect the display substrate in a dark state, it was found that the Lab value was 7.68, while the display substrate with hexagonal sub-pixels (as shown in Figure 2) had a Lab value of 28.3. The lower the Lab value, the less color separation occurs on the display substrate. It can be seen that the display substrate provided by the embodiment of the present disclosure significantly reduces the degree of color separation on the display substrate.

[0092] For example, in other examples, as shown in Figures 8A and 8B , the green subpixel opening 12 of the pixel-defining layer corresponding to the green subpixel G is substantially semi-elliptical, and the first light-transmitting opening 1311 of the light-emitting device exposing the green subpixel G is also substantially semi-elliptical 12-2, i.e., half of an ellipse. For example, the length L21 of the semi-ellipse 12-2 is less than the length L1 of the major axis of the first ellipse 11-1, and the width W21 of the semi-ellipse 12-2 is less than or equal to the length W1 of the minor axis of the first ellipse 11-1. For example, the first light-transmitting opening 1311 and subpixel openings of the other subpixels in this example are the same as those in Figures 6 and 7 and are not further described here.

[0093] For example, in some examples, as shown in Figures 6-8B , one red sub-pixel R, two green sub-pixels G, and one blue sub-pixel B constitute one pixel unit, and multiple sub-pixels constitute multiple pixel units and are arranged in an array on the base substrate 101. For example, in other embodiments, one red sub-pixel R, one green sub-pixel G, and one blue sub-pixel B may constitute one pixel unit, and multiple sub-pixels constitute multiple pixel units and are arranged in an array on the base substrate 101. The embodiments of the present disclosure do not limit the specific form of the pixel unit.

[0094] For example, in other embodiments, as shown in Figures 9 and 10, the multiple sub-pixels include a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B, and the first light-transmitting opening 1131 of the light-emitting device exposing the red sub-pixel R is basically in the shape of a first runway 21-1, and the first light-transmitting opening 1131 of the light-emitting device exposing the green sub-pixel G is basically in the shape of a half-runway 22-1. For example, the length L5 of the half-runway shape 22-1 is less than the length L4 of the long axis of the first runway shape, and the width W5 of the half-runway shape 22-1 is greater than or equal to the length W4 of the short axis of the first runway shape; the first light-transmitting opening 1131 of the light-emitting device exposing the blue sub-pixel B is basically in the shape of a third runway 23-1, the length L6 of the long axis of the third runway shape 23-1 is less than the length L4 of the long axis of the first runway shape 21-1, and the length W6 of the short axis of the third runway shape 23-1 is greater than the length W4 of the short axis of the first runway shape 21-1.

[0095] By performing Lab color space detection on the display substrate with the above-mentioned racetrack-shaped (or half-racetrack-shaped) sub-pixels, it was found that the Lab value was 5.18, which is much lower than the Lab value of 28.3 of the display substrate with the sub-pixels in the hexagonal shape (as shown in FIG. 2 ).

[0096] For example, in other embodiments, as shown in Figures 11A and 11B, the first light-transmitting opening 1131 of the light-emitting device that exposes the green sub-pixel G is substantially in the shape of a second racetrack 22-2. The length L7 of the major axis of the second racetrack 22-2 is less than the length L4 of the major axis of the first racetrack 21-1, and the length W7 of the minor axis of the second racetrack 22-2 is less than or equal to the length W4 of the minor axis of the first racetrack 21-1. Accordingly, the green sub-pixel opening 22 of the pixel-defining layer corresponding to the green sub-pixel G also has a second racetrack shape. The first light-transmitting opening 1311 and sub-pixel openings of the other sub-pixels in this example are the same as those in Figures 9 and 10 and are not further described here.

[0097] For example, in some examples, as shown in Figures 9 to 11B , one red sub-pixel R, two green sub-pixels G, and one blue sub-pixel B constitute one pixel unit, and multiple sub-pixels constitute multiple pixel units and are arranged in an array on the base substrate 101. For example, in other embodiments, one red sub-pixel R, one green sub-pixel G, and one blue sub-pixel B may constitute one pixel unit, and multiple sub-pixels constitute multiple pixel units and are arranged in an array on the base substrate 101. The embodiments of the present disclosure do not limit the specific form of the pixel unit.

[0098] For example, Figure 12 shows a planar schematic diagram of a display substrate provided by at least one embodiment of the present disclosure. As shown in Figure 12, in this example, a red sub-pixel R, two green sub-pixels G and one blue sub-pixel B constitute a pixel unit, and the first light-transmitting opening 1131 of the black matrix layer corresponding to each sub-pixel, the sub-pixel opening 1081 of the pixel defining layer, and the main body 1041 of the first electrode layer 104 are all elliptical (or mango-shaped).

[0099] For example, as shown in FIG7 , the first light-transmitting opening 1131 of the light-emitting device exposing the red sub-pixel includes a first arc-shaped edge RL1 and a second arc-shaped edge RL2 opposite to each other, and a first tip RO1 and a second tip RO2 at the intersection of the first arc-shaped edge RL1 and the second arc-shaped edge RL2 , the first tip RO1 and the second tip RO2 being opposite to each other, thereby forming a mango shape.

[0100] For example, the first light-transmitting opening 1131 of the light-emitting device exposing the blue sub-pixel includes opposite third and fourth arcuate edges BL1 and BL2 and third and fourth tips BO1 and BO2 at the intersection of the third and fourth arcuate edges BL1 and BL2, and the third and fourth tips BO1 and BO2 are opposite to each other.

[0101] For example, the first light-transmitting opening 1131 exposing the light-emitting device of the green sub-pixel includes a fifth curved edge GL1 and a fifth pointed end GO1 located at one end of the fifth curved edge GL1 .

[0102] At this time, the first light-transmitting opening of the light-emitting device exposing the red sub-pixel and the first light-transmitting opening of the light-emitting device exposing the blue sub-pixel both have two oppositely arranged tips, and the first light-transmitting opening of the light-emitting device exposing the green sub-pixel has only one tip; this setting can reduce the degree of color separation on the display substrate.

[0103] It should be noted that in the embodiments of the present disclosure, due to actual process accuracy and process errors, the formed tip may not have a pointed shape, but the curvature of the tip varies relative to the curvature of the arc edge, for example, the curvature suddenly changes at the tip.

[0104] For example, as shown in FIG6 , the green subpixel opening 12 of the pixel-defining layer corresponding to the green subpixel G includes a sixth curved edge GL3 and a sixth pointed end GO3 located at one end of the sixth curved edge GL3. As shown in FIG12 , the main portion of the first electrode layer of the light-emitting device of the green subpixel includes a seventh curved edge GL4, which does not include a pointed end. This arrangement can reduce the degree of color separation that occurs at the green subpixel on the display substrate.

[0105] For example, as shown in FIG12 , the black matrix layer includes a plurality of second light-transmitting openings 1132, and the driving circuit layer includes a plurality of light-transmitting portions 1020. One second light-transmitting opening 1132 corresponds to one light-transmitting portion 1020, and in the corresponding second light-transmitting openings 1132 and light-transmitting portions 1020, in a direction parallel to the surface of the base substrate 101, the planar dimensions of the second light-transmitting openings 1132 are smaller than the planar dimensions of the light-transmitting portions 1020. For example, in some examples, in the corresponding second light-transmitting openings 1132 and light-transmitting portions 1020, the orthographic projection of the second light-transmitting openings 1132 on the base substrate 101 at least partially overlaps with the orthographic projection of the light-transmitting portions 1020 on the base substrate 101. For example, the orthographic projection of the second light-transmitting openings 1132 on the base substrate 101 is located within the orthographic projection of the light-transmitting portions 1020 on the base substrate 101. 3 and 5 , light L can pass through the second light-transmitting opening 1132 and the light-transmitting portion 1020 from the display side of the display substrate (the upper side in the figure) to reach the non-display side of the display substrate (the lower side in the figure), so as to be used by a photosensitive device (such as an image sensor, etc.) that may be provided on the non-display side of the display substrate for photosensitive operation.

[0106] For example, in some embodiments, as shown in FIG12 , the driving circuit layer 102 includes first signal lines S1 and second signal lines S2 that are parallel to each other and arranged periodically. The first signal lines S1 and the second signal lines S2 are configured to provide different electrical signals to the plurality of sub-pixels SP. For example, the orthographic projections of the plurality of second light-transmitting openings 1132 on the base substrate 101 are respectively located between the orthographic projection of a first signal line S1 on the base substrate 101 and the orthographic projection of a second signal line S2 that is closest to the first signal line S1 on the base substrate 101.

[0107] For example, in some embodiments, the first signal line S1 is a light emitting control signal line EMT, and the second signal line is a reset voltage line VNT, which will be described in detail later.

[0108] It should be noted that, taking into account the process errors and structural errors in actual production, the signal lines formed may not be straight lines, for example, they may have uneven parts. In the embodiments of the present disclosure, the first signal line S1 and the second signal line S2 are "parallel to each other" may mean that the angle formed between the extension directions of the first signal line S1 and the second signal line S2 is within 15 degrees, and is not necessarily parallel in a strict sense.

[0109] For example, as shown in Figure 12, the driving circuit layer may further include a third signal line S3 and a fourth signal line S4 that are arranged parallel to each other and periodically, and the third signal line S3 and the fourth signal line S4 respectively intersect with the first signal line S1 and the second signal line S2, for example, perpendicularly, and the third signal line S3 and the fourth signal line S4 are configured to provide different electrical signals to multiple sub-pixels, and the orthographic projections of the multiple second light-transmitting openings 1032 on the base substrate 101 are respectively located between the orthographic projection of a third signal line S3 on the base substrate 101 and the orthographic projection of a fourth signal line S4 adjacent to the third signal line on the base substrate 101.

[0110] For example, in some embodiments, the third signal line S3 is the first power line VDD1 , and the fourth signal line S4 is the data line DT, which will be described in detail later.

[0111] For example, as shown in Figure 12, the first signal line S1, the second signal line S2, the third signal line S3 and the fourth signal line S4 define multiple first regions RG, that is, the areas circled by dotted boxes in the figure, and the orthographic projections of the multiple second light-transmitting openings 1032 on the base substrate 101 are respectively located within the orthographic projections of the multiple first regions RG on the base substrate 101.

[0112] For example, Figure 13 shows a partial plan view of the black matrix layer and color filter layer of a display substrate, and illustrates a plan view of a plurality of first light-transmitting openings 1131, a plurality of second light-transmitting openings 1132, and a plurality of color filter patterns 1141. As shown in Figure 13, in a direction perpendicular to the surface of the base substrate 101, the plurality of color filter patterns 1141 include a first color filter pattern 1141A that at least partially overlaps with the light-emitting device of a first sub-pixel (e.g., a red sub-pixel), and a second color filter pattern 1141B that at least partially overlaps with the light-emitting device of a second sub-pixel (e.g., a green sub-pixel). In a direction parallel to the surface of the base substrate 101, the planar shape of the first color filter pattern 1141A is different from the planar shape of the second color filter pattern 1141B, and the area of ​​the first color filter pattern 1141A is larger than the area of ​​the second color filter pattern 1141B.

[0113] For example, as shown in FIG13 , the first color filter pattern 1141A is substantially rectangular in plan view, such as a rectangle with a notch, and the second color filter pattern 1141B is substantially semi-elliptical in plan view. For example, the areas of the first and second color filter patterns 1141A and 1141B are each larger than the area of ​​the first light-transmitting opening 1131 they cover, thereby fully achieving a light filtering effect.

[0114] For example, in some examples, the ratio of the area of ​​the first color filter pattern 1141A to the area of ​​the second color filter pattern 1141B is in the range of (1-1.5):1, such as 1.2:1 or 1.4:1.

[0115] For example, as shown in FIG13 , the plurality of color filter patterns 1141 further include a third color filter pattern 1141C, perpendicular to the surface of the base substrate 101, that at least partially overlaps with the light-emitting device of a third sub-pixel (e.g., a blue sub-pixel). Parallel to the surface of the base substrate 101, the planar shape of the third color filter pattern 1141C differs from the planar shapes of the first color filter pattern 1141A and the second color filter pattern 1141B. The area of ​​the third color filter pattern 1141C is larger than both the area of ​​the first color filter pattern 1141A and the area of ​​the second color filter pattern 1141B. For example, the planar shape of the third color filter pattern 1141C is irregular to fully achieve a light filtering effect.

[0116] For example, in some embodiments, the ratio of the area of ​​the first color filter pattern 1141A, the area of ​​the second color filter pattern 1141B, and the area of ​​the third color filter pattern 1141C is in the range of (1-1.5):1:(1-1.6), such as 1.2:1:1.1 or 1.4:1:1.3.

[0117] For example, as shown in FIG13 , the plurality of color filter patterns 1141 further include a fourth color filter pattern 1141D that at least partially overlaps with the light-emitting device of a fourth sub-pixel (e.g., a green sub-pixel) in a direction perpendicular to the surface of the base substrate 101. In a direction parallel to the surface of the base substrate 101, the planar shape of the fourth color filter pattern 1141D is substantially identical to the planar shape of the second color filter pattern 1141B, and the area of ​​the fourth color filter pattern 1141D is substantially equal to the area of ​​the second color filter pattern 1141D.

[0118] For example, the plane shape of the fourth color filter pattern 1141D is basically semi-elliptical, and its area is basically equal to the area of ​​the second color filter pattern 1141D. For example, the difference between the area of ​​the fourth color filter pattern 1141D and the area of ​​the second color filter pattern 1141D is no more than 10% of the area of ​​the second color filter pattern 1141D.

[0119] In the embodiments of the present disclosure, the black matrix layer 113 can absorb light incident on the display substrate, reducing the reflectivity of the display substrate to external light and improving the display effect of the display substrate. By covering the black matrix layer 113 with a color filter layer 114, the color filter layer 114 can perform a secondary absorption of light incident on the display substrate, further reducing the reflectivity of the display substrate to external light and improving the display effect of the display substrate. After testing the multiple color filter patterns 1141 shown in Figure 13, it was found that when the multiple color filter patterns 1141 have the shape and size distribution shown in Figure 13, the multiple color filter patterns 1141 can fully achieve light filtering and light reflection effects, resulting in a better display effect of the display substrate.

[0120] For example, in some embodiments, as shown in FIG. 13 , in a direction perpendicular to the surface of the base substrate 101 , the fourth color filter pattern 1141D partially overlaps with the fourth light-transmitting sub-opening 1132D.

[0121] For example, in some examples, as shown in FIG13 , the lateral size 1141A-1 of the first color filter pattern 1141A corresponding to the first sub-pixel P1 is 27 μm to 33 μm, such as 28 μm, 29 μm or 30 μm, and the longitudinal size 1141A-2 is 30 μm to 35 μm, such as 32 μm, 33 μm or 34 μm, etc.; the lateral size 1141B-1 of the second color filter pattern 1141B corresponding to the second sub-pixel P2 is 20 μm to 25 μm, such as 21 μm, 22 μm or 23 μm, and the longitudinal size 1141B-2 is 23 μm to 28 μm, such as 25 μm, 26 μm or 28 μm. m or 27μm, etc.; the lateral size 1141C~1 of the third color filter pattern 1141C corresponding to the third sub-pixel P3 is 32μm~38μm, for example, 34μm, 35μm or 36μm, etc., and the longitudinal size 1141C~2 is 35μm~45μm, for example, 38μm, 40μm or 42μm, etc.; the lateral size 1141D~1 of the fourth color filter pattern 1141D corresponding to the fourth sub-pixel P4 is 20μm~25μm, for example, 21μm, 22μm or 23μm, etc., and the longitudinal size 1141D~2 is 23μm~28μm, for example, 25μm, 26μm or 27μm, etc.

[0122] For example, in some embodiments, the minimum distance between the edges of the plurality of color filter patterns 1141 and the edges of the plurality of second light-transmitting openings 1132 is 1 μm-5 μm. For example, as shown in FIG13 , for at least partially adjacent color filter patterns 1141 and second light-transmitting openings 1132, there is a gap between the color filter patterns 1141 and the second light-transmitting openings 1132, and the minimum distance between the edges of the color filter patterns 1141 and the edges of the second light-transmitting openings 1132 is 1 μm-5 μm, so as to prevent the color filter patterns 1141 from filtering light passing through the second light-transmitting openings 1132.

[0123] For example, referring to FIG13 and FIG8A , for a color filter pattern 1141 and a sub-pixel opening 1081 corresponding to the same sub-pixel, the planar shape of the color filter pattern 1141 is different from the planar shape of the sub-pixel opening 1081. For example, at least portions of the edges of the plurality of second light-transmitting openings 1132 are parallel to at least portions of the edges of the adjacent color filter patterns 1141. For example, in the portion indicated by the dotted line in FIG13 , portions of the edges of the second light-transmitting openings 1132 are parallel to portions of the edges of the adjacent color filter patterns 1141.

[0124] The structure and circuit arrangement of each functional layer of the display substrate provided by the embodiment of the present disclosure are described in detail below by using a specific example. In this example, a 7T1C pixel driving circuit is used to drive the light emitting device EM in a sub-pixel.

[0125] For example, FIG14A shows a circuit diagram of a 7T1C pixel circuit. As shown in FIG14A , the pixel circuit includes a driving circuit 122 , a data writing circuit 126 , a compensation circuit 128 , a storage circuit 127 , a first light emitting control circuit 123 , a second light emitting control circuit 124 , and a reset circuit 129 .

[0126] For example, the driving circuit 122 includes a control terminal 131, a first terminal 132, and a second terminal 133, which is configured to control the driving current flowing through the light-emitting device EM, and the control terminal 131 of the driving circuit 122 is connected to the first node N1, the first terminal 132 of the driving circuit 122 is connected to the second node N2, and the second terminal 133 of the driving circuit 122 is connected to the third node N3.

[0127] For example, the data write circuit 126 includes a control terminal, a first terminal, and a second terminal. The control terminal is configured to receive a first scan signal, the first terminal is configured to receive a data signal, and the second terminal is connected to the first terminal 132 (the second node N2) of the driving circuit 122 and is configured to write the data signal to the first terminal 132 of the driving circuit 122 in response to the first scan signal Ga1. For example, the first terminal of the data write circuit 126 is connected to the data line 12 to receive the data signal, and the control terminal is connected to the scan line 11 to receive the first scan signal Ga1.

[0128] For example, in the data writing stage, the data writing circuit 126 can be turned on in response to the first scanning signal Ga1, so that the data signal can be written to the first end 132 (the second node N2) of the driving circuit 122, and the data signal can be stored in the storage circuit 127, so that in the light-emitting stage, for example, a driving current can be generated according to the data signal to drive the light-emitting device EM to emit light.

[0129] For example, the compensation circuit 128 includes a control end, a first end, and a second end, wherein the control end is configured to receive a second scanning signal Ga2, and the first end and the second end are electrically connected to the control end 131 and the second end 133 of the driving circuit 122, respectively. The compensation circuit is configured to perform threshold compensation on the driving circuit 120 in response to the second scanning signal.

[0130] For example, the storage circuit 127 is electrically connected to the control terminal 131 and the first voltage terminal VDD of the driving circuit 122, and is configured to store the data signal written by the data writing circuit 126. For example, during the data writing and compensation phase, the compensation circuit 128 can be turned on in response to the second scanning signal Ga2, thereby storing the data signal written by the data writing circuit 126 in the storage circuit 127. For example, during both the data writing and compensation phases, the compensation circuit 128 can electrically connect the control terminal 131 and the second terminal 133 of the driving circuit 122, thereby storing information related to the threshold voltage of the driving circuit 122 in the storage circuit. For example, during the light-emitting phase, the stored data signal and threshold voltage can be used to control the driving circuit 122, so that the output of the driving circuit 122 is compensated.

[0131] For example, the first light emission control circuit 123 is connected to the first terminal 132 (the second node N2) of the driving circuit 122 and the first voltage terminal VDD, and is configured to apply the first power supply voltage of the first voltage terminal VDD to the first terminal 132 of the driving circuit 122 in response to the first light emission control signal. For example, as shown in FIG14A , the first light emission control circuit 123 is connected to the first light emission control terminal EM1, the first voltage terminal VDD, and the second node N2.

[0132] For example, the second light emitting control circuit 124 is connected to the second light emitting control terminal EM2, the first terminal 510 of the light emitting device EM and the second terminal 132 of the driving circuit 122, and is configured to apply a driving current to the light emitting device EM in response to a second light emitting control signal.

[0133] For example, in the light-emitting stage, the second light-emitting control circuit 123 is turned on in response to the second light-emitting control signal provided by the second light-emitting control terminal EM2, so that the driving circuit 122 can apply a driving current to the light-emitting device EM through the second light-emitting control circuit 123 to make it emit light; while in the non-light-emitting stage, the second light-emitting control circuit 123 is turned off in response to the second light-emitting control signal, thereby preventing current from flowing through the light-emitting device EM and causing it to emit light, which can improve the contrast of the corresponding display device.

[0134] For another example, in the initialization phase, the second light emitting control circuit 124 may also be turned on in response to the second light emitting control signal, so that the reset circuit may be combined to perform a reset operation on the driving circuit 122 and the light emitting device EM.

[0135] For example, the second light emitting control signal EM2 may be the same as or different from the first light emitting control signal EM1 . For example, the two may be connected to the same or different signal output terminals.

[0136] For example, the reset circuit 129 is connected to the reset voltage terminal Vinit and the first terminal 134 (fourth node N4) of the light-emitting device EM, and is configured to apply a reset voltage to the first terminal 134 of the light-emitting device EM in response to a reset signal. In other examples, as shown in FIG14A , the reset signal may also be applied to the control terminal 131 of the driver circuit, i.e., the first node N1. For example, the reset signal may be the second scan signal, or may be another signal synchronized with the second scan signal, which is not limited in the embodiments of the present disclosure. For example, as shown in FIG14A , the reset circuit 129 is connected to the first terminal 134 of the light-emitting device EM, the reset voltage terminal Vinit, and the reset control terminal Rst (reset control line), respectively. For example, during the initialization phase, the reset circuit 129 may be turned on in response to the reset signal, thereby applying a reset voltage to the first terminal 134 of the light-emitting device EM and the first node N1, thereby resetting the driver circuit 122, the compensation circuit 128, and the light-emitting device EM, eliminating the effects of the previous light-emitting phase.

[0137] For example, the light-emitting device EM includes a first terminal 134 and a second terminal 135. The first terminal 134 of the light-emitting device EM is configured to receive a driving current from the second terminal 133 of the driving circuit 122, and the second terminal 135 of the light-emitting device EM is configured to be connected to the second voltage terminal VSS. For example, in one example, as shown in FIG14A , the first terminal 134 of the light-emitting device EM can be connected to the third node N3 via the second light-emitting circuit 124. Embodiments of the present disclosure include but are not limited to this scenario. For example, the light-emitting device EM can be various types of OLEDs, such as top-emitting, bottom-emitting, or double-sided emitting, and can emit red, green, blue, or white light. The first electrode layer and the second electrode layer of the OLED serve as the first terminal 134 and the second terminal 135 of the light-emitting device, respectively. The embodiments of the present disclosure are not limited to the specific structure of the light-emitting device.

[0138] It should be noted that in the description of the embodiments of the present disclosure, the first node N1, the second node N2, the third node N3 and the fourth node N4 do not necessarily represent actual components, but represent the junction points of related circuit connections in the circuit diagram.

[0139] It should be noted that in the description of the embodiments of the present disclosure, the symbol Vd can represent both a data signal terminal and a data signal level. Similarly, Ga1 and Ga2 can represent both a first scan signal and a second scan signal, or both a first scan signal terminal and a second scan signal terminal. Rst can represent both a reset control terminal and a reset signal. The symbol Vinit can represent both a reset voltage terminal and a reset voltage. The symbol VDD can represent both a first voltage terminal and a first power supply voltage. The symbol VSS can represent both a second voltage terminal and a second power supply voltage. The following embodiments are the same and will not be described in detail.

[0140] FIG14B is a circuit diagram of a specific implementation example of the pixel circuit shown in FIG14A . As shown in FIG14B , the pixel circuit includes first to seventh transistors T1, T2, T3, T4, T5, T6, and T7, and a storage capacitor Cst. For example, the first transistor T1 is used as a driving transistor, and the other second to seventh transistors are used as switching transistors.

[0141] For example, as shown in FIG14B , the driving circuit 122 may be implemented as a first transistor T1. The gate of the first transistor T1 serves as a control terminal 131 of the driving circuit 122 and is connected to a first node N1. The first electrode of the first transistor T1 serves as a first terminal 132 of the driving circuit 122 and is connected to a second node N2. The second electrode of the first transistor T1 serves as a second terminal 133 of the driving circuit 122 and is connected to a third node N3.

[0142] For example, as shown in FIG14B , the data write circuit 126 can be implemented as a second transistor T2. The gate of the second transistor T2 is connected to the first scan line (first scan signal terminal Ga1) to receive the first scan signal, the first electrode of the second transistor T2 is connected to the data line (data signal terminal Vd) to receive the data signal, and the second electrode of the second transistor T2 is connected to the first terminal 132 (second node N2) of the drive circuit 122. For example, the second transistor T2 is a P-type transistor, such as a thin film transistor whose active layer is low-temperature doped polysilicon.

[0143] For example, as shown in FIG14B , the compensation circuit 128 can be implemented as a third transistor T3. The gate of the third transistor T3 is configured to be connected to the second scan line (the second scan signal terminal Ga2) to receive the second scan signal, the first electrode of the third transistor T3 is connected to the control terminal 131 (the first node N1) of the driving circuit 122, and the second electrode of the third transistor T3 is connected to the second terminal 133 (the third node N3) of the driving circuit 122.

[0144] For example, as shown in Figure 14B, the storage circuit 127 can be implemented as a storage capacitor Cst, which includes a first capacitor electrode C1 and a second capacitor electrode C2. The first capacitor electrode C1 is connected to the first voltage terminal VDD, and the second capacitor electrode C2 is connected to the control terminal 131 of the driving circuit 122.

[0145] For example, as shown in FIG14B , the first light emission control circuit 123 may be implemented as a fourth transistor T4. A gate of the fourth transistor T4 is connected to the first light emission control line (first light emission control terminal EM1) to receive a first light emission control signal, a first electrode of the fourth transistor T4 is connected to the first voltage terminal VDD to receive a first power supply voltage, and a second electrode of the fourth transistor T4 is connected to the first terminal 132 (second node N2) of the driving circuit 122.

[0146] For example, the light-emitting device EM may be specifically implemented as a light-emitting diode (OLED), wherein a first electrode layer (herein, an anode) of the light-emitting device EM is connected to the fourth node N4 and configured to receive a driving current from the second terminal 133 of the driving circuit 122 via the second light-emitting control circuit 124. A second electrode layer (herein, a cathode) of the light-emitting device EM is configured to be connected to a second voltage terminal VSS to receive a second power supply voltage. For example, the second voltage terminal may be grounded, that is, VSS may be 0V.

[0147] For example, the second light emission control circuit 124 can be implemented as a fifth transistor T5. A gate of the fifth transistor T5 is connected to the second light emission control line (the second light emission control terminal EM2) to receive the second light emission control signal, a first electrode of the fifth transistor T5 is connected to the second terminal 133 (the third node N3) of the driving circuit 122, and a second electrode of the fifth transistor T5 is connected to the first terminal 134 (the fourth node N4) of the light emitting device EM.

[0148] For example, the reset circuit 129 may include a first reset circuit and a second reset circuit. The first reset circuit is configured to apply a first reset voltage Vini1 to the first node N1 in response to a first reset signal Rst1, and the second reset circuit is configured to apply a second reset voltage Vini2 to the fourth node N4 in response to a second reset signal Rst2. For example, as shown in FIG14B , the first reset circuit is implemented as a sixth transistor T6, and the second reset circuit is implemented as a seventh transistor T7. The gate of the sixth transistor T6 is connected to the first reset control terminal Rst1 to receive the first reset signal Rst1, the first electrode of the sixth transistor T6 is connected to the first reset voltage terminal Vinit1 to receive the first reset voltage Vinit1, and the second electrode of the sixth transistor T6 is connected to the first node N1. The gate of the seventh transistor T7 is connected to the second reset control terminal Rst2 to receive the second reset signal Rst2, the first electrode of the seventh transistor T7 is connected to the second reset voltage terminal Vinit2 to receive the second reset voltage Vinit2, and the second electrode of the seventh transistor T7 is connected to the fourth node N4.

[0149] It should be noted that the transistors used in the embodiments of the present disclosure may be thin film transistors, field effect transistors, or other switching devices with the same characteristics. The embodiments of the present disclosure are described using thin film transistors as examples. The source and drain of the transistors used here may be symmetrical in structure, so the source and drain may be structurally indistinguishable. In the embodiments of the present disclosure, in order to distinguish the two poles of the transistor other than the gate, one pole is directly described as the first pole and the other pole is directly described as the second pole.

[0150] For example, with reference to FIG12 , the first signal line S1 is a light-emission control line EMT, which is used to transmit the first light-emission control signal EM1 and the second light-emission control signal EM2. The second signal line S2 is a reset voltage line VNT, which is used to transmit the first reset voltage Vinit1 and the second reset voltage Vini2. For example, the reset voltage line VNT further includes a reset control line RST on a side away from the light-emission control line EMT, which is used to transmit the first reset signal Rst1 and the second reset signal Rst2.

[0151] The following is a detailed description of the layout design of the above pixel driving circuit.

[0152] For example, Figure 15 shows a schematic diagram of the semiconductor layer of the display substrate, which is used to form the active layer of thin-film transistors T1 to T7 of the pixel driving circuit of multiple sub-pixels. Figure 12 shows the pixel driving circuit of two rows of sub-pixels. The pixel driving circuit of four directly adjacent sub-pixels (i.e., the first sub-pixel 100a, the second sub-pixel 100b, the third sub-pixel 100c and the fourth sub-pixel 100d) is introduced below as an example. The dotted boxes in the figure show the areas where the pixel driving circuits of each sub-pixel are located. The embodiments of the present disclosure are not limited to this layout.

[0153] For example, a first gate insulating layer is further provided on the semiconductor layer, which is not shown in the figures, and reference may be made to the first gate insulating layer 1024 in FIG. 3 or FIG. 5 .

[0154] For example, FIG16A shows a schematic diagram of a first gate metal layer of a display substrate, where the first gate metal layer is disposed on a first gate insulating layer. FIG16B shows a schematic diagram of a stack of the first gate metal layer and a semiconductor layer of the display substrate.

[0155] For example, as shown in Figures 16A and 16B, the first gate metal layer includes multiple emission control lines EMT, multiple reset control lines RST, multiple scan lines GATE, and multiple first capacitor electrodes C1 of storage capacitors Cst. For example, the portions where the emission control lines EMT, reset control lines RST, scan lines GATE, and first capacitor electrodes C1 of storage capacitors Cst overlap with the active layers of thin-film transistors T1-T7 constitute the gates of thin-film transistors T1-T7. The multiple emission control lines EMT, multiple reset control lines RST, and multiple scan lines GATE are electrically connected to multiple rows of sub-pixels in a one-to-one correspondence to provide corresponding electrical signals.

[0156] For example, a second gate insulating layer is further disposed on the first gate metal layer, which is not shown in the figures. Please refer to the second gate insulating layer 1025 in FIG. 3 and FIG. 5 .

[0157] 17A is a schematic diagram showing a second gate metal layer of a display substrate, where the second gate metal layer is disposed on a second gate insulating layer. FIG17B is a schematic diagram showing a stack of the second gate metal layer, the first gate metal layer, and the semiconductor layer of the display substrate.

[0158] For example, as shown in Figures 17A and 17B, the second gate metal layer includes a second capacitor electrode C2 of a storage capacitor Cst and a plurality of reset voltage lines VNT. The second capacitor electrode C2 of the storage capacitor Cst at least partially overlaps with the first capacitor electrode C1 to form a capacitor. The plurality of reset voltage lines VNT are electrically connected to the rows of sub-pixels in a one-to-one correspondence to provide corresponding electrical signals.

[0159] For example, an interlayer insulating layer is further provided on the second gate metal layer, which is not shown in the figures. Please refer to the interlayer insulating layer 1026 in Figures 3 and 5.

[0160] Figure 18A shows a schematic diagram of the first source-drain metal layer of the display substrate, which is arranged on the interlayer insulating layer. Figure 18B shows a schematic diagram of the first source-drain metal layer of the display substrate, the second gate metal layer, the first gate metal layer and the semiconductor layer stack.

[0161] As shown in Figures 18A and 18B, the first source-drain metal layer includes a plurality of first power lines VDD1. For example, the plurality of first power lines VDD1 are electrically connected to the plurality of columns of sub-pixels in a one-to-one correspondence to provide a first power supply voltage. For example, the first source-drain metal layer also includes a plurality of data lines DT. The plurality of data lines DT are electrically connected to the plurality of columns of sub-pixels in a one-to-one correspondence to provide data signals. For example, the first source-drain metal layer also includes a plurality of connection electrodes CL for connecting the second capacitor electrode C2 to the first electrode of the third transistor T3, or connecting the first electrode of the sixth transistor T6 to the reset voltage line VNT, or connecting the second electrode of the fifth transistor T5 to the first electrode layer of the light-emitting device, etc.

[0162] For example, a passivation layer and a planarization layer are further provided on the first source / drain metal layer, which are not shown in the figures. Please refer to the passivation layer 1027 and the planarization layer 1091 in FIG. 3 and FIG. 5 .

[0163] Figure 19A shows a schematic diagram of the second source-drain metal layer of the display substrate, which is arranged on the planarization layer 1091. Figure 19B shows a schematic diagram of the second source-drain metal layer of the display substrate and the first source-drain metal layer, the second gate metal layer, the first gate metal layer and the semiconductor layer stack.

[0164] As shown in Figures 19A and 19B , the second source-drain metal layer includes a second power line VDD2, which is arranged in a grid pattern. For example, the second power line VDD2 is electrically connected to the first power line VDD1, thereby reducing resistance on the power line and thus reducing voltage drop across the power line, and facilitating uniform transmission of the first power voltage to each sub-pixel of the display substrate. For example, the second source-drain metal layer may further include a connecting electrode 1043 for connecting the first electrode layer of the light-emitting device and the first electrode of the first transistor T1. For example, in a direction perpendicular to the surface of the substrate, the second power line VDD2 at least partially overlaps with the main portion 1042 of the first electrode layer 104.

[0165] For example, another planarization layer, namely, planarization layer 109, is further provided on the second source / drain metal layer. FIG20 shows a schematic planar view of the planarization layer. In conjunction with FIG3 and FIG5 , the planarization layer 109 has a plurality of vias VA. In this case, the first electrode layer 104 is connected to the connection electrode 1043 through the vias VA in the planarization layer 109.

[0166] For example, the multiple vias VA of the planarization layer 109 corresponding to the multiple sub-pixels in the same row are not in a straight line. For example, as shown in FIG20 , a first sub-pixel (e.g., a red sub-pixel), a second sub-pixel (e.g., a green sub-pixel), a third sub-pixel (e.g., a blue sub-pixel), and a fourth sub-pixel (e.g., a green sub-pixel) in the same row correspond to vias VA1 to VA4, respectively, and the vias VA1 to VA4 are not in the same straight line.

[0167] By designing the plurality of vias VA of the planarization layer 109 to be not in a straight line, the wiring of the pixel driving circuit can avoid a larger light-transmitting area, thereby forming a light-transmitting portion with a sufficient area.

[0168] Figure 21A shows a schematic diagram of the first electrode material layer of the display substrate, which is arranged on the passivation layer 109. Figure 21B shows a schematic diagram of the first electrode material layer of the display substrate and the second source and drain metal layer, the first source and drain metal layer, the second gate metal layer, the first gate metal layer and the semiconductor layer stack.

[0169] As shown in Figures 21A and 21B, the first electrode material layer includes the first electrode layers of the light-emitting devices EM of the multiple sub-pixels, and the first electrode layers of the light-emitting devices EM of the multiple sub-pixels are respectively connected to the connection electrode 1043 through a plurality of via holes VA in the planarization layer 109. For example, the light-emitting material layer of the light-emitting device EM is disposed on the first electrode layer, and the second electrode layer is disposed on the light-emitting material layer.

[0170] For example, other functional layers such as an encapsulation layer, a black matrix layer, and a protective cover plate 115 are formed above the light-emitting device EM, which will not be described in detail here.

[0171] At least one embodiment of the present disclosure further provides a display device. FIG22 shows a cross-sectional schematic diagram of the display device. As shown in FIG22 , the display device includes a display substrate provided in an embodiment of the present disclosure. FIG22 shows the display substrate shown in FIG3 as an example.

[0172] For example, as shown in FIG22 , the display device further includes a textured touch surface S and an image sensor array 30. For example, the surface of the protective cover 115 is implemented as the textured touch surface S. The image sensor array is disposed on a side of the driving circuit layer 102 away from the light-emitting device layer and includes a plurality of image sensors 31 (one is shown as an example). The plurality of image sensors 31 are configured to receive light emitted from the plurality of light-emitting devices EM in the light-emitting device layer and reflected from textures (e.g., fingerprints, palm prints, etc.) on the textured touch surface S to the plurality of image sensors 31 for texture acquisition.

[0173] For example, referring to FIG12 , the black matrix layer includes multiple second light-transmitting openings 1132, and the driving circuit layer includes multiple light-transmitting portions 1020, with one second light-transmitting opening 1132 corresponding to one light-transmitting portion 1020. In this case, the multiple image sensors 31 are configured to receive light emitted from the multiple light-emitting devices EM in the light-emitting device layer, reflected by the texture on the textured touch surface S, and then passing through the multiple second light-transmitting openings 1132 in the black matrix layer 113 and the multiple light-transmitting portions 1020 in the driving circuit layer to reach the multiple image sensors 31 for texture acquisition. Thus, through the multiple second light-transmitting openings 1132 and the multiple light-transmitting portions 1020, the multiple image sensors 31 can fully receive the light reflected by the texture, thereby improving texture recognition speed and accuracy.

[0174] The display device provided by the embodiment of the present disclosure may also have other structures. For details, please refer to the relevant technology and will not be described here.

[0175] There are a few points to note:

[0176] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure. Other structures may refer to conventional designs.

[0177] (2) For the sake of clarity, the thickness of layers or regions in the drawings used to describe the embodiments of the present disclosure are exaggerated or reduced, i.e., these drawings are not drawn to scale. It is understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or intervening elements may be present.

[0178] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to form new embodiments.

[0179] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. The protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A display substrate having a plurality of sub-pixels arranged in an array, comprising a base substrate, a drive circuit layer disposed on the base substrate, a pixel defining layer disposed on a side of the drive circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer disposed on a side of the light-emitting device layer away from the base substrate. in, Each of the plurality of sub-pixels includes a pixel driving circuit provided in the driving circuit layer and a light emitting device provided in the light emitting device layer, wherein the pixel driving circuit is configured to drive the light emitting device. The pixel defining layer includes a plurality of sub-pixel openings, the light-emitting device includes a first electrode layer, a light-emitting material layer, and a second electrode layer stacked in sequence in a direction away from the base substrate, the pixel defining layer is arranged on a side of the first electrode layer away from the base substrate, and the plurality of sub-pixel openings respectively expose the first electrode layers of the light-emitting devices of the plurality of sub-pixels. The black matrix layer has a plurality of first light-transmitting openings respectively exposing the light-emitting devices of the plurality of sub-pixels in a direction perpendicular to the plate surface of the base substrate, and at least one of the plurality of first light-transmitting openings has an arc-shaped edge. In a direction perpendicular to the surface of the base substrate, at least some of the sub-pixel openings correspond to the first light-transmitting openings one by one and at least partially overlap.

2. The display substrate according to claim 1, wherein In a direction parallel to the plate surface of the base substrate, a planar shape of at least one of the plurality of first light-transmitting openings is elliptical, semi-elliptical, circular, semi-circular, racetrack-shaped, or semi-racetrack-shaped.

3. The display substrate according to claim 1, wherein In a direction parallel to the plane of the base substrate, a planar shape of at least one of the plurality of sub-pixel openings is elliptical, semi-elliptical, circular, semi-circular, racetrack-shaped, or semi-racetrack-shaped.

4. The display substrate according to any one of claims 1 to 3, wherein: In a corresponding sub-pixel opening and a first light-transmitting opening, in a direction parallel to the plate surface of the base substrate, a planar shape of the sub-pixel opening is the same as a planar shape of the first light-transmitting opening.

5. The display substrate according to claim 4, wherein: The orthographic projection of the sub-pixel opening on the base substrate is located within the orthographic projection of the first light-transmitting opening on the base substrate. The display substrate according to claim 5 , wherein: The minimum distance between the edge of the orthographic projection of the sub-pixel opening on the base substrate and the edge of the orthographic projection of the first light-transmitting opening on the base substrate is 1 μm-3 μm.

7. The display substrate according to any one of claims 1 to 3, wherein: The first electrode layer includes a main portion and a connecting portion, the connecting portion is configured to be electrically connected to the pixel driving circuit, and at least a portion of the main portion is exposed by the sub-pixel opening; In a direction parallel to the plate surface of the base substrate, a planar shape of the main body portion is at least partially identical to a planar shape of the sub-pixel opening.

8. The display substrate according to claim 7, wherein: The orthographic projection of the sub-pixel opening on the base substrate is located within the orthographic projection of the main body on the base substrate.

9. The display substrate according to claim 8, wherein: A minimum distance between an edge of an orthographic projection of the sub-pixel opening on the base substrate and an edge of an orthographic projection of the main body on the base substrate is 1 μm-5 μm.

10. The display substrate according to claim 9, wherein: An orthographic projection of a first light-transmitting opening corresponding to the sub-pixel opening on the base substrate is located within an orthographic projection of the main body on the base substrate.

11. The display substrate according to claim 9, wherein: The orthographic projection of the main body on the base substrate is located within the orthographic projection of a first light-transmitting opening corresponding to the sub-pixel opening on the base substrate. 12 . The display substrate according to claim 1 , further comprising a color filter layer, wherein the color filter layer comprises a plurality of color filter patterns, and the plurality of color filter patterns are respectively arranged in the plurality of first light-transmitting openings.

13. The display substrate according to any one of claims 1 to 3, wherein: The black matrix layer further has a plurality of second light-transmitting openings, the plurality of second light-transmitting openings are respectively arranged between the plurality of first light-transmitting openings, and the driving circuit layer includes a plurality of light-transmitting portions; At least part of the plurality of second light-transmitting openings is disposed in one-to-one correspondence with at least part of the plurality of light-transmitting portions, and is configured to transmit light within a predetermined angle range relative to the surface of the base substrate.

14. The display substrate according to claim 13, wherein: In the corresponding second light-transmitting opening and the light-transmitting portion, in a direction parallel to the plate surface of the base substrate, a planar dimension of the second light-transmitting opening is smaller than a planar dimension of the light-transmitting portion.

15. The display substrate according to claim 14, wherein: In the correspondingly arranged second light-transmitting opening and light-transmitting portion, an orthographic projection of the second light-transmitting opening on the base substrate at least partially overlaps with an orthographic projection of the light-transmitting portion on the base substrate.

16. The display substrate according to any one of claims 1 to 3, wherein: The plurality of sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, The first light-transmitting opening of the light-emitting device exposing the red sub-pixel is substantially in a first elliptical shape. The first light-transmitting opening of the light-emitting device exposing the green sub-pixel is substantially in the shape of a second ellipse, wherein the length of the major axis of the second ellipse is shorter than the length of the major axis of the first ellipse, and the length of the minor axis of the second ellipse is shorter than the length of the minor axis of the first ellipse; or, the first light-transmitting opening of the light-emitting device exposing the green sub-pixel is substantially in the shape of a semi-ellipse, and The first light-transmitting opening of the light-emitting device exposing the blue sub-pixel is basically a third ellipse, the length of the major axis of the third ellipse is smaller than the length of the major axis of the first ellipse, and the length of the minor axis of the third ellipse is greater than the length of the minor axis of the first ellipse.

17. The display substrate according to claim 16, wherein: A first light-transmitting opening of the light-emitting device exposing the red sub-pixel includes a first arc-shaped edge and a second arc-shaped edge facing each other, and a first tip and a second tip at an intersection of the first arc-shaped edge and the second arc-shaped edge, the first tip and the second tip facing each other; The first light-transmitting opening exposing the light-emitting device of the blue sub-pixel includes a third arc-shaped edge and a fourth arc-shaped edge facing each other, and a third tip and a fourth tip at the intersection of the third arc-shaped edge and the fourth arc-shaped edge, the third tip and the fourth tip facing each other; as well as The first light-transmitting opening exposing the light-emitting device of the green sub-pixel includes a fifth arc-shaped edge and a fifth tip located at one end of the fifth arc-shaped edge.

18. The display substrate according to claim 17, wherein: The sub-pixel opening corresponding to the green sub-pixel includes a sixth arc-shaped edge and a sixth tip located at one end of the sixth arc-shaped edge. The main portion of the first electrode layer of the light-emitting device of the green sub-pixel includes a seventh curved edge, and the seventh curved edge does not include a tip.

19. The display substrate according to any one of claims 1 to 3, wherein: The plurality of sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, The first light-transmitting opening of the light-emitting device exposing the red sub-pixel is substantially in a first racetrack shape. The first light-transmitting opening exposing the light-emitting device of the green sub-pixel is substantially in a second racetrack shape, wherein the length of the major axis of the second racetrack shape is shorter than the length of the major axis of the first racetrack shape, and the length of the minor axis of the second racetrack shape is shorter than the length of the minor axis of the first racetrack shape; or, the first light-transmitting opening exposing the light-emitting device of the green sub-pixel is substantially in a half-racetrack shape, and The first light-transmitting opening of the light-emitting device exposing the blue sub-pixel is basically in a third racetrack shape, the length of the long axis of the third racetrack shape is shorter than the length of the long axis of the first racetrack shape, and the length of the short axis of the third racetrack shape is longer than the length of the short axis of the first racetrack shape.

20. The display substrate according to claim 16, wherein One red sub-pixel, two green sub-pixels and one blue sub-pixel form a pixel unit, and the multiple pixel units formed by the multiple sub-pixels are arranged in an array on the substrate.

21. A display device comprising the display substrate according to any one of claims 1 to 20.

22. The display device according to claim 21, further comprising a textured touch surface and an image sensor array, in, The image sensor array is arranged on a side of the driving circuit layer away from the light-emitting device layer, and includes a plurality of image sensors. The plurality of image sensors are configured to receive light emitted from a plurality of light-emitting devices in the light-emitting device layer and reflected to the plurality of image sensors by the texture on the textured touch surface for texture acquisition.

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