ELECTROCHEMICAL COPPER PLATING SOLUTION AND DEFECTIVE FILL-IN PLATING PROCESS FOR THROUGH-SUBSTATION SILICON METALS AND PRINTED CIRCUIT BOARDS

Abstract

The invention relates to an electrochemical copper plating solution system and a void-free, seam-free filling process for microstructures such as silicon wafer through-substrate (TSV) and vias on printed circuit boards (PCBs). The solution system comprises a sulfuric acid base solution, copper sulfate, Cl⁻ ions, combined with a three-component additive system consisting of a booster, an inhibitor, and a new generation leveling agent (or leveling agent) selected from the guanidine derivative group (such as PHMG, PHMB) or a mixture of guanidine derivatives and 2-pyrrolidone ring derivatives (such as PVP). The plating process employs a hydrodynamic regime combined with a 2- or 3-stage pulsed current (PRC) (plating stop, plating, dissolution) with strictly controlled time and charge parameters. The invention increases current efficiency, significantly shortens the plating time for filling micrometer-sized TSV / via grooves with a large depth-to-diameter ratio, and completely eliminates internal voids or cracks.