Integrated circuits and methods for fabricating integrated circuits.

Abstract

The invention relates to an integrated circuit and a method for fabricating an integrated circuit. Conductive and vertically aligned dummy materials in the layers of an integrated circuit (IC) reduce capacitance and bias independence. The dummy materials are material islands in regions of the metal and semiconductor IC layers without the characteristics of the circuit to avoid uneven polishing (“dishing”). Conductive diffusion layer dummy materials in the diffusion layer and conductive polysilicon dummy materials in the polysilicon layer above the diffusion layer reduce bias dependence and nonlinear operation of the circuit when a varying voltage is applied. ICs having vertically aligned metal dummy materials in at least one metal layer above the polysilicon dummy materials and diffusion dummy materials reduce cross-coupled capacitance compared to ICs in which the dummy materials are dispersed in a non-overlapping arrangement by a molded layout tool.Avoiding horizontal resistance-capacitance (RC) ladder networks created by dispersive dummy objects improves signal latency and power consumption in radio-frequency (RF) ICs.

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