Emulation of an analog circuit by means of programmable digital logic
By dividing analog circuits into functional blocks and using programmable digital logic to replicate their behavior, the method achieves efficient and accurate emulation of complex analog circuits, addressing the challenges of high calculation efforts and precise timing demands in existing technologies.
Patent Information
- Application Number
- PCT/EP2024/065732
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-16
- Filing Date
- 2024-06-07
- Publication Date
- 2024-12-19
AI Technical Summary
Existing methods for emulating complex analog circuits using digital logic are hindered by complex mathematical modeling requirements, which can lead to impractical implementation due to high calculation efforts and difficulty in finding accurate models, especially for circuits with many state-oriented components that demand precise timing control.
The method involves dividing the analog circuit into functional blocks, assigning dedicated state spaces, determining mathematical descriptions of their behavior, and generating calculation units to replicate these blocks using programmable digital logic, allowing for real-time emulation with configurable digital logic devices like FPGAs.
This approach enables fast and accurate emulation with minimal delay, enabling real-time capability and precise control, suitable for complex analog circuits like energy converters, by simplifying the digital logic implementation and using fixed-point representation for efficient signal processing.
Smart Images
Figure EP2024065732_19122024_PF_FP_ABST
Abstract
Description
[0001] Description
[0002] Emulation of an analog circuit using programmable digital logic
[0003] The present invention relates to the emulation of an analog circuit. In particular, the invention relates to the emulation of a complex analog circuit in real time.
[0004] An analog circuit can be controlled by a digital control device. The control device can comprise a microcomputer, a microcontroller, or a programmable digital logic device, for example in the form of an FPGA. The control device can perform closed-loop control of the analog circuit, wherein an analog signal from the circuit can be fed back to the digital control device via an analog-to-digital converter.
[0005] To develop the control device, the analog circuit can be emulated by another device that behaves like the analog circuit. Emulation can be achieved using configurable digital logic, which can be configured relatively easily.
[0006] Analog circuitry can be complex and include a large number of active or passive electronic components. Furthermore, analog circuitry can place high demands on timing control.
[0007] Known approaches to emulating an analog circuit require complex mathematical modeling, the computational effort of which can increase with the second power of the number of state-oriented components considered. It can be difficult to find a correct model for a given analog circuit. Even if a model is found, the complexity of the digital logic required to implement it can be so great that it is practically impossible to implement. An object underlying the invention is therefore to provide an improved technique for emulating an analog circuit using configurable digital logic. The invention solves this problem by means of the subject matter of the independent claims. Subclaims specify preferred embodiments.
[0008] According to a first aspect of the present invention, a method for emulating a predetermined analog circuit by means of programmable digital logic comprises steps of dividing the analog circuit into functional blocks; assigning a dedicated state space to each functional block; determining mathematical descriptions of the behavior of the functional blocks in the respective state spaces; describing or generating calculation units based on the mathematical descriptions, wherein the calculation units functionally emulate the functional blocks; and determining description data for configuring a programmable digital logic such that it implements functional blocks that are interconnected in the manner of the analog circuit.
[0009] The dedicated state space can be described in terms of voltages and / or currents for each functional block.
[0010] A state space can, for example, represent linear voltages and currents of an analog circuit, as well as switching states of transistor switches or non-linear components such as diodes.
[0011] For example, a control room can represent frequency-dependent behavior as well as time-varying behavior.
[0012] The mathematical descriptions represent the electrical behavior of the functional blocks in the respective state spaces, as can be expressed, for example, as network diagrams, reflection or transfer functions of circuits, or parts thereof.
[0013] The mathematical descriptions can be, for example, linear equations, approximations or differential equations, and can be defined in the time domain or in the frequency domain, as well as being discrete in time or continuous.
[0014] The calculation units simulate a digital equivalent circuit of the respective functional blocks based on the mathematical descriptions of the analog circuit or parts thereof.
[0015] By implementing the method, a fast and precise emulator for the analog circuit can be provided. The emulator can operate with very low delays through the use of digital logic, allowing the emulation to be real-time capable. The time span within which the emulator adapts its behavior to the behavior of the analog model can be very short, in the range of microseconds; in a preferred embodiment, in the range of nanoseconds. The accuracy of the emulator compared to the analog circuit can be controlled within the configuration.
[0016] Steps of the method can be carried out automatically. Starting from a description of an analog circuit, the method can step by step generate a configuration with which a configurable digital logic component can be configured to perform virtually the same function. Checks can be inserted between conversion steps to ensure that the respective conversion is correct and sufficiently accurate. The emulation by the digital logic component can be used as a digital twin of the analog circuit, for example, to develop a controller for the analog circuit, with the emulated circuit then being manufactured and operated accordingly as a digital logic component.
[0017] Using this method, high-quality emulation can be achieved even for complex analog circuits, for example, a circuit that includes many state-oriented components, requires highly precise implementation of temporal signal waveforms, or processes very fast signals. Such an analog circuit can, for example, comprise a transmitting or receiving stage for electromagnetic signals or an electrical energy converter. The energy converter can be used, for example, on board a motor vehicle, a locomotive, an aircraft, or in a decentralized energy supply. If the control is not sufficiently precise, the efficiency of the energy conversion can be impaired. In the worst case, considerable energy can be released, damaging or even destroying the circuit.
[0018] The subdivision of the analog circuit can be done manually, but systematic approaches that can be performed automatically are also known. For example, tools such as Matlab / Simulink can be used for extraction. The state space of a function block can also be determined using another tool, such as PLECS.
[0019] An electrical connection between two functional blocks can be modeled using a current-controlled current source and a voltage-controlled voltage source between two corresponding computation units. This allows the individual functional blocks to be modeled separately and then placed in context with each other.
[0020] More specifically, an electrical connection between a first and a second functional block of the analog circuit can be modeled by a current source in the first functional block that is controlled based on a current in the second functional block; and by a voltage source in the second functional block that is controlled based on a voltage in the first functional block.
[0021] Known approaches use floating-point representation for processing signals within a calculation unit. While this representation is very precise, it is complex to handle. Therefore, in one embodiment, it is preferable to use a fixed-point representation to represent these signals. For this purpose, range limits can be determined for a signal present within a calculation unit. Based on these limits, a fixed-point representation can be determined for the signal, allowing the calculation unit to determine the signal as a fixed-point value. The calculation unit can thus be simpler in design and require fewer resources. Calculations by the calculation unit can be accelerated.
[0022] In one embodiment, corresponding functional blocks of the analog circuit are determined. A calculation unit can then be determined that is configured to implement the corresponding functional blocks sequentially.
[0023] This allows the digital logic calculation unit to perform a very fast determination, allowing it to perform determinations for a large number of functional blocks in succession in multiplexed mode. This can be particularly useful for an analog circuit in which certain circuit components are used repeatedly.
[0024] For example, an analog circuit that processes acoustic data from multiple sources in parallel may have separate processing channels, each containing the same analog components. Such components may include a frequency-dependent filter, an automatically controlled amplifier, a modulator, or a demodulator.
[0025] The circuit can be subdivided such that a boundary between two functional blocks passes through a node that, during circuit operation, carries a signal with as few spectral frequency components as possible. This condition can be passed to an automatic segmenter as a target function, so that the resulting functional blocks can be easily handled with regard to emulation. In particular, a mathematical description of the behavior of a functional block in its state space can be improved.
[0026] The analog circuit can be digitally controllable, and a digital control input of the circuit can be emulated by a digital control input of the configurable digital logic. Emulation can be used, in particular, to develop or test a digital control of the analog circuit.
[0027] The configurable digital logic can emulate an analog-to-digital converter (ADC) for digitally providing an analog value of the analog circuit. In one embodiment, an ADC is included in the configurable logic as a component whose electrical connection to other elements can be configured. A digital value provided by the ADC can be evaluated by a digital controller in a feedback manner, in particular to perform closed-loop control of the analog circuit.
[0028] In a further embodiment, the description data is converted into configuration data for configuring a predetermined programmable digital logic in order to emulate the analog circuit using the programmable digital logic. A specific programmable logic can be specified to which the provided configuration data can be applied. LS_EPJ
[0029] In one embodiment, the method comprises configuring the programmable digital logic based on the configuration data. The logic can thereby be configured into an emulator that can emulate the analog circuit.
[0030] According to a further aspect of the present invention, a device for emulating a predetermined analog circuit by means of programmable digital logic comprises: a first device for dividing the analog circuit into functional blocks, each functional block being assigned a dedicated state space in the form of voltages and / or currents; a second device for determining mathematical descriptions of the electrical behavior of the functional blocks in the respective state spaces; a third device for describing or generating calculation units which, on the basis of the mathematical descriptions, form a digital equivalent circuit of the respective functional blocks; and a fourth device for determining description data for configuring a programmable digital logic such that it implements functional blocks which are interconnected in the manner of the analog circuit.
[0031] The device is further configured to carry out the method according to the invention
[0032] According to yet another aspect of the present invention, description data for describing a programmable digital logic for emulating a predetermined analog circuit are created using a method described herein. Similarly, configuration data for configuring a programmable digital logic for emulating a predetermined analog circuit can be created using a method described herein. The description or configuration data can be stored on a computer-readable data carrier.
[0033] According to yet another aspect of the present invention, an application-specific integrated circuit (ASIC) comprises digital logic configured based on configuration data described herein. For this purpose, the configuration data can be created using a method described herein. In another embodiment, digital logic can be used that is programmable only once, for example, as OTP (one-time programmable) logic.
[0034] According to yet another aspect of the present invention, a programmable digital logic is configured by means of a method described herein for emulating a predetermined analog circuit. A programmable digital logic mentioned herein can be implemented, in particular, by an FPGA (Field Programmable Gate Array). The FPGA can be configured using configuration data to form a predetermined logic circuit. Unlike the programming of computers, microcontrollers, or control systems, the configuration can include the definition of a desired circuit structure. This can be formulated using a hardware description language and translated by generation software into a configuration file that specifies how physical elements comprised by the FPGA are to be electrically interconnected. Without configuration, an FPGA typically has no usable function.
[0035] The above-described properties, features and advantages of this invention, as well as the manner in which they are achieved, will become clearer and more clearly understood in connection with the following description of the embodiments, which are explained in more detail in connection with the drawings, in which
[0036] Figure 1 shows a control system;
[0037] Figure 2 shows a schematic model of an analog circuit;
[0038] Figure 3 shows a schematic model of an analog circuit with several identical functional blocks;
[0039] Figure 4 shows a model of a linear time-invariant system;
[0040] Figure 5 shows a modeling of several identical linear time-invariant
[0041] systems; and
[0042] Figure 6 shows a flow diagram of a method.
[0043] Figure 1 shows a control system 100 comprising a digital control device 105 that controls an analog circuit 110. For this purpose, the control device 105 can provide a digital control value to the analog circuit 110. A digital control value can also be converted into an analog value using a digital-to-analog converter (DAC), which can then be used to control the analog circuit 110. The control device 105 is preferably electronically constructed and can, for example, comprise a programmable microcomputer, a microcontroller, a discrete digital circuit, or a configurable logic component, such as an FPGA.
[0044] The analog circuit 110 can comprise any desired combination of active and / or passive electronic components. The components can, in particular, comprise resistors, capacitors, inductors, or semiconductors such as diodes, Zener diodes, or transistors. The analog circuit 110 serves a predetermined purpose, for example, converting a direct voltage into an alternating voltage or transmitting or receiving electromagnetic radiation.
[0045] The analog circuit 110 can provide an analog value that can be converted into a digital value by an ADC and used by the control device 105 to control the analog circuit 110. This allows the analog circuit 110 to be controlled with respect to a predetermined control target.
[0046] For example, for the purpose of developing or testing the control device 105, the analog circuit 110 is to be replaced by an emulator 120. The emulator 120 preferably also includes the ADC 115. The emulator 120 is to be created, in particular, on the basis of configurable logic. For this purpose, one or more interconnected logic modules can be provided, which can be configured into an arrangement of calculation units using configuration data. The calculation units are designed and interconnected in such a way that the emulator 120 behaves like the analog circuit 110 with respect to the control device 105.
[0047] Figure 2 shows a schematic model of an exemplary analog circuit 110. The analog circuit 110 can be divided into interconnected functional blocks. Figure 2 shows a first functional block 205 and a second functional block 210, each of which includes, for example, several electrical or electronic components of the circuit 110. Connections between the functional blocks 205 run through nodes 215.
[0048] As shown in the lower part of Figure 2, the functional blocks 205 and 210 can be modeled independently of one another using a first and a second calculation unit 218. The connection between the functional blocks can be modeled by a first virtual circuit 220 on the first functional block 205 and a second virtual circuit 225 on the second functional block 210. The first virtual circuit 220 comprises a voltage source 230, which is connected in series with an ammeter 235 at terminals of the first functional block 205 to the nodes 215. The second virtual circuit 225 comprises a current source 240, which is connected in parallel with a voltmeter 245 at terminals of the second functional block 210 to the nodes 215. The current source 240 is controlled based on a current determined by the ammeter 235; and the voltage source 230 is controlled based on a voltage determined by the voltmeter 245.
[0049] The circuit shown in the lower part of Figure 2 can be used to model the functional blocks 205, 210 of the analog circuit 110, to describe them mathematically, and to determine a suitable digital logic to represent them. On this basis, for each functional block 205, 210, a calculation unit 218 can be determined from elements of a configurable digital logic that emulates the respective functional block 205, 210.
[0050] Figure 3 shows a schematic model of an analog circuit 110 with several identical or very similar second function blocks 210. Instead of emulating the second function blocks 210 one-to-one by calculation units 218, they can be modeled as a single function block 210 that executes different functions one after the other. For this purpose, a state memory can be inserted that stores a state of a second function block 210 until this second function block is executed on the calculation unit 218. An accumulator 250 can form a sum of all currents for feedback to the first virtual circuit 220. The calculation unit 218 can emulate the second function blocks 210 one after the other and exchange respective input and output values with connected additional function blocks or calculation units 218.
[0051] Figure 4 shows a model of a functional component 205 as a linear time-invariant system. The functional component 205 generally receives an input signal u and provides an output signal y. The following relationships exist:
[0052] X = Ax + Xu. y = C'x + Du
[0053] The functional component 205 can be modeled as a linear time invariant system LZI (linear time invariant system, LTI) in an associated state space.
[0054] A complex analog circuit 110 can also be modeled as an LZI interconnection. To emulate the analog circuit 110, each functional component 205 can be implemented as an LZI using suitable digital logic. To emulate a functional component 205, suitable matrices A, B, C, and D can be found for the corresponding LZI representation.
[0055] To implement functional component 205 as a digital logic configuration, it is advantageous to determine the calculation of the output signal y based on the input signal u with values in fixed-point representation instead of floating-point representation. For this purpose, range limits for the input signal u and the outputs of matrices A to D can be determined during operation of functional component 205. Knowing the range limits, a floating-point representation can then be replaced by a fixed-point representation. The fixed-point representation can allow for significantly faster calculation of matrix operations, for example.
[0056] Figure 5 shows a modeling of several identical linear time-invariant systems in the manner of Figure 3. The LZI modeling of a functional component 210 is extended by a state memory 250, which comprises a memory in which state values for a predetermined number of functional components 210 to be emulated can be stored. A state of a functional component 210 to be emulated can be retrieved from the memory and fed into the LZI representation. In this way, a calculation unit 218 can be determined that can sequentially emulate several functional components 210. For adjacent calculation units 218, the sequential emulation may not be recognizable, so that the multiply used calculation unit 218 in the emulator 120 for the analog circuit 110 can behave like a number of individual calculation units 218.
[0057] Figure 6 shows a flowchart of an exemplary method 600 for providing an emulator 120 for emulating a predetermined analog circuit 110. The method 600 can be run iteratively to provide an emulator 120 implemented by means of configurable digital logic that behaves like the analog circuit 110 with respect to input and output signals.
[0058] In a step 605, the analog circuit 110 can be created or modified. The circuit 110 is present in a computer-processable description 610, for example, as a Simscape file of the Simulink software from The MathWorks. If other software is used, for example, PLECS, the description 610 can be provided in a different digital format.
[0059] Optionally, the equivalence of the description 610 with the circuit 110 can be verified. Furthermore, the stability of the created system can be tested.
[0060] In a step 615, the analog circuit 110 can be divided into functional blocks 205, 210. This step can be performed manually, semi-automatically, or automatically. As a result, a segmented description 620 can be created. The format of the description 620 can depend on the software used for segmentation. Optionally, the equivalence of the segmented description 620 with the single-part description 610 can be verified. The created system can also be tested for stability at this point.
[0061] In a step 625, a model of a digital arithmetic unit can be determined semi-automatically or automatically to create a digitized functional unit executable in logic modules. The modeled functional blocks 205, 210 are initially specified in floating-point representation 630. A state space 635 can be assigned to each functional block 205, 210. The equivalence of the created representation 630 with the segmented description 620 can be verified in a corresponding test.
[0062] Based on the segmented description 620, signals 640 of the function blocks 205, 210 can be traced. In a step 645, a fixed-point conversion can be performed based on the floating-point representation 630 and the signals 640. For this purpose, range limits of the signals 640 can first be determined. The result of the conversion is a fixed-point representation 650 of the signals 640. Within the scope of the conversion, data types 655 for the state space can be determined.
[0063] The equivalence of the fixed-point representation 650 with the floating-point representation 630 can be verified. Furthermore, it can be determined whether the conversion of the floating-point representation 650 to the floating-point representation 630 is sufficiently accurate.
[0064] In a step 660, a plurality of second functional components 210 can be serialized. For this purpose, identical or sufficiently similar second functional components 210 are identified and replaced by a single functional component 210 with a state memory 250 and a controller for sequentially emulating the individual functional components 210. As a result of this step, a fully digitized system 665 can be created, which includes a description of a digital logic that can be used to emulate the analog circuit 110. Here, too, a verification of the correctness of the implementation performed is optionally performed.
[0065] In a step 670, HDL code 675 (HDL: Hardware Description Language) can be generated from the description of the system 665, which code can be used to configure a specific component with configurable digital logic.
[0066] Although the invention has been illustrated and described in detail by means of embodiments, the invention is not limited by the disclosed examples and other variations can be derived therefrom by those skilled in the art without departing from the scope of the invention.
[0067] Regardless of the grammatical gender of a particular term used herein, persons with male, female or other gender identity are included.
Claims
Patent claims 1. A method (600) for emulating a predetermined analog circuit (110) using configurable digital logic, the method (600) comprising the following steps: - dividing (615) the analog circuit (110) into functional blocks (205, 210); - Assigning (625) a dedicated state space (635) in the form of voltages and / or currents to each functional block (205, 210); - determining (625) mathematical descriptions of the electrical behavior of the functional blocks (205, 210) in the respective state spaces (635); - generating (625) calculation units (218) which, on the basis of the mathematical descriptions, form a digital equivalent circuit of the respective functional blocks (205, 210); and - Determining (660) description data for configuring a configurable digital logic component such that it implements functional blocks (205, 210) that are interconnected in the manner of the analog circuit (110), wherein an electrical connection between two functional blocks (205, 210) is modeled by a current-controlled current source (240) and a voltage-controlled voltage source (230) between two corresponding calculation units (218), and an electrical connection between a first and a second functional block (205, 210) of the analog circuit (110) is modeled by a current source (240) in the first functional block (205) that is controlled on the basis of a current in the second functional block (210); and by a voltage source (230) in the second functional block (210) that is controlled on the basis of a voltage in the first functional block (205).
2. Method (600) according to one of the preceding claims, wherein range limits for a within a calculation unit (218) present- REVISED SHEET (RULE 91) ISA / EP of the signal are determined (645); wherein a fixed-point representation is determined for the signal; and wherein the calculation unit (218) determines the signal as a fixed-point value.
3. The method (600) according to any one of the preceding claims, wherein corresponding functional blocks (210) of the analog circuit (110) are determined; wherein a calculation unit (218) is determined (660) which is configured to implement the corresponding functional blocks (210) sequentially.
4. Method (600) according to one of the preceding claims, wherein the circuit (110) is divided such that a boundary between two functional blocks (205, 210) passes through a node (215) which, during operation of the circuit (110), carries a signal with as few spectral frequency components as possible.
5. The method (600) according to any one of the preceding claims, wherein the analog circuit (110) is digitally controllable and a digital control input of the circuit (110) is simulated by a digital control input of the configurable digital logic.l$Epj 6. The method (600) of any one of the preceding claims, wherein the configurable digital logic additionally emulates an analog-to-digital converter for digitally providing an analog value of the analog circuit (110).
7. The method (600) according to any one of the preceding claims, wherein the description data are converted (670) into configuration data for configuring a predetermined programmable digital logic in order to emulate the analog circuit (110) by means of the programmable digital logic, SEP] 8. The method (600) of claim 7, wherein the programmable digital logic is configured based on the configuration data. REVISED SHEET (RULE 91) ISA / EP 9. Apparatus for emulating a predetermined analog circuit (110) by means of programmable digital logic, the apparatus comprising: - a first device for dividing the analog circuit (110) into functional blocks (205, 210), each functional block (205, 210) being assigned a dedicated state space (635) in the form of voltages and / or currents; - a second device for determining mathematical descriptions of the electrical behavior of the functional blocks (205, 210) in the respective state spaces (635); - a third device for generating calculation units (218) which, on the basis of the mathematical descriptions, form a digital equivalent circuit of the respective functional blocks (205, 210); and - a fourth device for determining description data for configuring a programmable digital logic such that it implements functional blocks (205, 210) which are interconnected in the manner of the analog circuit (110), and the device is designed to carry out the method according to one of the preceding claims.
10. Configuration data for configuring a programmable digital logic for emulating a predetermined analog circuit (110), wherein the configuration data are created by means of a method (600) according to claim 7.
11. An application-specific integrated circuit comprising digital logic configured based on configuration data according to claim 10.
12. Programmable digital logic configured to emulate a predetermined analog circuit (110) by a method (600) according to claim 8. REVISED SHEET (RULE 91) ISA / EP 13. FPGA comprising a programmable digital logic according to claim 12. REVISED SHEET (RULE 91) ISA / EP