Display panel and manufacturing method therefor, and display device

Abstract

A display panel, comprising: a driving back plate; a first electrode layer comprising a plurality of first electrodes distributed at intervals; a pixel definition layer, wherein a plurality of pixel openings are formed in the pixel definition layer, the first electrodes are exposed at the pixel openings, a plurality of separation slots are further formed in the side of the pixel definition layer facing away from the driving back plate, and the orthographic projections of the separation slots on the driving back plate do not overlap the orthographic projections of the first electrodes on the driving back plate; a light-emitting layer, wherein the orthographic projection of the light-emitting layer on the driving back plate covers the pixel definition layer and the first electrode layer; a second electrode located on the side of the light-emitting layer facing away from the driving back plate, wherein the orthographic projection of the second electrode on the driving back plate covers the light-emitting layer; and an auxiliary electrode located on the side of the second electrode facing away from the driving back plate and in contact with and electrically connected to the second electrode, wherein the orthographic projection of the auxiliary electrode on the driving back plate is located within the range of the orthographic projection of the pixel definition layer on the driving back plate, and the orthographic projection of the auxiliary electrode on the driving back plate at least covers the separation slots.

Description

Display panel, manufacturing method thereof, and display device Technical Field

[0001] The embodiments of the present disclosure belong to the field of display technology, and particularly relate to a display panel, a manufacturing method thereof, and a display device. Background Art

[0002] Compared to DLP (Digital Light Porsessor) and LCOS (Liquid Crystal On Silicon) microdisplays, silicon-based OLED (Organic Light Emitting Diode) microdisplays possess superior display characteristics. Silicon-based OLEDs offer high brightness, rich colors, low drive voltage, fast response speed, and low power consumption, providing an excellent user experience. Furthermore, silicon-based OLEDs are all-solid-state devices with excellent shock resistance and a wide operating temperature range (between -40°C and 85°C), making them suitable for military and special applications. They are also self-luminous devices, requiring no backlight, offering a wide viewing angle and thinness, which facilitates system size reduction and makes them particularly suitable for near-eye display systems.

[0003] Summary of the Invention

[0004] Embodiments of the present disclosure provide a display panel, a method for manufacturing the same, and a display device.

[0005] In a first aspect, an embodiment of the present disclosure provides a display panel, comprising:

[0006] Driver backplane;

[0007] A first electrode layer is provided on a side surface of the driving back plate and includes a plurality of first electrodes distributed at intervals;

[0008] a pixel definition layer located on a side of the first electrode layer facing away from the driving backplane, the pixel definition layer having a plurality of pixel openings, each of the first electrodes being exposed at the pixel openings; the pixel definition layer also having a plurality of separation grooves on a side facing away from the driving backplane, wherein the orthographic projections of the separation grooves on the driving backplane do not overlap with the orthographic projections of the first electrodes on the driving backplane;

[0009] a light-emitting layer, located on a side of the pixel definition layer away from the driving backplane, wherein the orthographic projection of the light-emitting layer on the driving backplane covers the pixel definition layer and the first electrode layer;

[0010] a second electrode, located on a side of the light-emitting layer away from the driving backplane, wherein the orthographic projection of the second electrode on the driving backplane covers the light-emitting layer;

[0011] An auxiliary electrode is located on a side of the second electrode away from the driving backplane, and is in contact with and electrically connected to the second electrode. The orthographic projection of the auxiliary electrode on the driving backplane is located within the orthographic projection area of ​​the pixel definition layer on the driving backplane, and the orthographic projection of the auxiliary electrode on the driving backplane at least covers the separation groove.

[0012] In some embodiments, the auxiliary electrode includes a first portion and a second portion, wherein the first portion and the second portion are connected as one body.

[0013] The second portion is located on opposite sides of the first portion,

[0014] The orthographic projection of the first portion on the driving backplane coincides with the orthographic projection of the separation groove on the driving backplane,

[0015] The orthographic projection of the second portion on the driving backplane does not overlap with the orthographic projection of the separation groove on the driving backplane,

[0016] The thickness of the first portion is greater than the thickness of the second portion.

[0017] In some embodiments, a surface of the first portion facing away from the driving backplate transitions smoothly to a surface of the second portion facing away from the driving backplate.

[0018] In some embodiments, a distance between a surface of the first portion facing away from the driving backplate and the driving backplate is greater than or equal to a distance between a surface of the second portion facing away from the driving backplate and the driving backplate.

[0019] In some embodiments, a surface of the second electrode facing away from the driving backplate transitions smoothly to a surface of the second portion facing away from the driving backplate.

[0020] In some embodiments, a distance between a surface of the second portion facing away from the driving backplate and the driving backplate is greater than or equal to a distance between a surface of the second electrode facing away from the driving backplate and the driving backplate.

[0021] In some embodiments, the thickness of the first portion is greater than the thickness of the second electrode,

[0022] The thickness of the second portion is smaller than the thickness of the second electrode.

[0023] In some embodiments, the ratio of the thickness of the first portion to the thickness of the second electrode is in the range of 4:1 to 7:1.

[0024] The ratio of the thickness of the second portion to the thickness of the second electrode is in a range of 1:3 to 1:2.

[0025] In some embodiments, an orthographic projection of the second portion on the driving backplane partially overlaps with an orthographic projection of the first electrode on the driving backplane.

[0026] In some embodiments, an orthographic projection of the second portion on the driving backplane does not overlap with an orthographic projection of the first electrode on the driving backplane.

[0027] In some embodiments, the shortest distance between the orthographic projection edge of the auxiliary electrode on the driving backplane and the orthographic projection edge of the adjacent pixel opening on the driving backplane is in the range of 0.3 to 0.5 μm.

[0028] In some embodiments, the pixel definition layer includes a first insulating layer and a second insulating layer,

[0029] The first insulating layer and the second insulating layer are stacked in sequence away from the driving back plate,

[0030] The separation groove runs through the thickness of the second insulating layer, and the first insulating layer is exposed at the separation groove;

[0031] The second insulating layer includes a first sublayer, a second sublayer and a third sublayer, wherein the first sublayer, the second sublayer and the third sublayer are stacked in sequence away from the driving backplane.

[0032] The side surfaces of the second sub-layer serving as the separation groove walls are retracted inwardly toward the pixel opening relative to the side surfaces of the first sub-layer and the third sub-layer serving as the separation groove walls, so as to form a suspended groove between the first sub-layer and the third sub-layer.

[0033] The light-emitting layer includes a plurality of light-emitting sublayers stacked in sequence, and at least part of the light-emitting sublayers are disconnected at the suspended groove.

[0034] In some embodiments, the depth of the suspended groove is the thickness of the second sub-layer.

[0035] The width of the suspended groove is the distance between the orthographic projection of the side surface of the second sub-layer serving as the wall of the separation groove on the driving backplane and the orthographic projection of the side surface of the third sub-layer serving as the wall of the separation groove on the driving backplane.

[0036] The thickness of the first portion is greater than the depth of the suspended groove,

[0037] The thickness of the first portion is greater than the width of the suspension groove.

[0038] In some embodiments, the thickness of the first portion is 1 to 2 times the depth of the suspended groove.

[0039] The thickness of the first portion is 0.5 to 1 times the width of the suspension groove.

[0040] In some embodiments, the thickness of the first insulating layer is less than the thickness of the first electrode layer.

[0041] The thickness of the first insulating layer is smaller than the thickness of the second insulating layer.

[0042] In some embodiments, the sidewall of the pixel opening is a slope that expands in a direction away from the driving backplane.

[0043] The slope angle of the slope is no greater than 90°.

[0044] In some embodiments, the orthographic projection of the auxiliary electrode on the driving backplane surrounds the orthographic projection of the pixel opening on the driving backplane.

[0045] In some embodiments, the auxiliary electrodes are connected in a mesh shape.

[0046] In a second aspect, an embodiment of the present disclosure further provides a display device, which includes the above-mentioned display panel.

[0047] In a third aspect, an embodiment of the present disclosure further provides a method for manufacturing a display panel, comprising:

[0048] Prepare a driver backplane;

[0049] A first electrode layer, a pixel definition layer, a light-emitting layer, and a second electrode are sequentially prepared on one side of the driving backplane to form a substrate to be plated;

[0050] preparing an auxiliary electrode on a side of the second electrode facing away from the driving back plate;

[0051] The preparation of the auxiliary electrode comprises:

[0052] The auxiliary electrode film is formed on the light-absorbing and heat-conducting substrate.

[0053] The evaporation light source irradiates the side of the light-absorbing and heat-conducting substrate away from the auxiliary electrode film layer, and evaporates the auxiliary electrode film layer on the substrate to be plated to form the pattern of the auxiliary electrode.

[0054] In some embodiments, preparing the auxiliary electrode comprises:

[0055] forming a light absorbing layer on a transparent substrate;

[0056] forming a light-heat conducting layer on a side of the light-absorbing layer facing away from the transparent substrate;

[0057] forming the auxiliary electrode film layer on a side of the light and heat conductive layer away from the transparent substrate;

[0058] A liquid crystal light-shielding and light-transmitting layer is provided on a side of the transparent substrate away from the auxiliary electrode film layer;

[0059] The substrate to be plated is placed on the side of the auxiliary electrode film layer away from the transparent base, and the substrate to be plated and the auxiliary electrode film layer are arranged opposite to each other. The evaporation light source is placed on the side of the liquid crystal light-shielding and light-transmitting layer away from the transparent base. The light emitted by the evaporation light source passes through the light-transmitting area in the liquid crystal light-shielding and light-transmitting layer, so that the auxiliary electrode film layer corresponding to the light-transmitting area evaporates and is evaporated to the corresponding area of ​​the substrate to be plated.

[0060] Beneficial effects of this embodiment: The display panel provided by the embodiment of the present disclosure, on the one hand, can reduce the impedance of the second electrode by providing an auxiliary electrode on the second electrode that is in contact with and electrically connected to the second electrode, thereby reducing the driving voltage loss of the light-emitting unit caused by the large impedance of the second electrode, thereby making the display brightness of the light-emitting units at different positions of the display panel tend to be uniform, thereby improving the display effect of the display panel; on the other hand, by providing an auxiliary electrode at least at the position of the separation groove in the corresponding pixel definition layer, the depth morphology difference of the separation groove and the suspended groove in the pixel definition layer of the OLED display panel of the related technology can be repaired and improved, thereby repairing and improving the puncture difference of the second electrode in different OLED display panels, thereby improving or eliminating the display color deviation of the OLED display panels at different positions on the same silicon wafer, making the display picture color of the OLED display panels at different positions on the same silicon wafer tend to be consistent, and reducing the quality difference of the display panels in the same batch.

[0061] The display device provided by the embodiment of the present disclosure adopts the display panel of the above embodiment. On the one hand, it makes the display brightness of different positions of the display device tend to be uniform, thereby improving the display effect of the display device; on the other hand, it improves or eliminates the display color deviation of the display devices of the same batch, thereby reducing the quality differences of the display devices of the same batch. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] The accompanying drawings are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed exemplary embodiments with reference to the accompanying drawings, in which:

[0063] FIG. 1 a is a partial cross-sectional view of an embodiment of a silicon-based OLED display panel in the related art.

[0064] FIG1b is a schematic diagram of OLED display panels located at different positions on the same silicon wafer.

[0065] FIG1c is a circuit diagram of a pixel circuit in a silicon-based OLED display panel.

[0066] FIG1d is an equivalent circuit diagram of the pixel circuit in FIG1c.

[0067] FIG1e is a schematic diagram showing the display brightness of the central area within the display area of ​​an OLED display panel in the related art;

[0068] FIG. 2 a is a partial cross-sectional view of an implementation of a display panel in an embodiment of the present disclosure.

[0069] FIG2b is a partial enlarged view of portion A in FIG2a.

[0070] FIG2c is another partial enlarged view of portion A in FIG2a.

[0071] FIG2 d is a schematic structural diagram of a light-emitting unit in a display panel according to an embodiment of the present disclosure.

[0072] FIG2e is a partial cross-sectional view of a portion of a film layer in a display panel according to an embodiment of the present disclosure.

[0073] FIG. 2 f is a partial top view of the display panel in an embodiment of the present disclosure.

[0074] FIG. 3 a is a comparison curve of display brightness effects at the center and edge of the display area of ​​the display panel by setting auxiliary electrodes in an embodiment of the present disclosure.

[0075] FIG3 b is a comparison diagram of actual display effects of the display panel by setting auxiliary electrodes in an embodiment of the present disclosure.

[0076] FIG4 a is a schematic diagram of preparing a display panel according to an embodiment of the present disclosure.

[0077] FIG4 b is a schematic diagram of a specific process for preparing a display panel according to an embodiment of the present disclosure.

[0078] FIG4 c is a schematic diagram of adjusting the position of the light-transmitting area of ​​the liquid crystal light-shielding and light-transmitting layer to achieve auxiliary electrode evaporation at different positions in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0079] To enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, a display panel, a manufacturing method thereof, and a display device provided by the embodiments of the present disclosure are further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0080] The embodiments of the present disclosure will be described more fully below with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully enable those skilled in the art to understand the scope of this disclosure.

[0081] The embodiments of the present disclosure are not limited to the embodiments shown in the drawings, but include modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings are schematic in nature, and the shapes of the regions shown in the drawings illustrate specific shapes of the regions, but are not intended to be limiting.

[0082] The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0083] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0084] Silicon-based OLED microdisplays use single-crystal silicon as a substrate and integrate CMOS driver circuitry. They are a microdisplay technology that combines semiconductors and OLEDs. Silicon-based OLEDs place pixels directly on a silicon wafer, enabling smaller pixels and higher pixel density. Therefore, one of the advantages of silicon-based OLEDs in the microdisplay field is the ability to achieve extremely high pixel density within a very small physical size, effectively achieving ultra-high PPI (pixel-per-inch) resolution.

[0085] Silicon-based OLEDs usually produce multiple OLED display panels on a silicon wafer to achieve mass production of silicon-based OLED display panels.

[0086] In the related art, the silicon-based OLED display panel includes a driving backplane and a light-emitting layer, wherein: the light-emitting layer is arranged on one side of the driving backplane and includes a plurality of light-emitting units, the light-emitting unit may include one or more light-emitting devices connected in series, the light-emitting device may be an organic light-emitting diode, which may include a first electrode (anode), a light-emitting layer and a second electrode (cathode) stacked in sequence in a direction away from the driving backplane. By applying an electrical signal to the first electrode and the second electrode, the light-emitting layer can be driven to emit light. The specific light-emitting principle of the light-emitting device will not be described in detail here.

[0087] Furthermore, the light-emitting layers of each light-emitting device can be directly deposited using a fine mask (FMM), with the light-emitting layers of each light-emitting device spaced apart and independently emitting light, enabling color display. However, due to limitations in the fine mask manufacturing process, achieving high PPI (pixel density) is difficult. Therefore, color display can also be achieved by combining monochromatic light or white light with a color filter. That is, each light-emitting device shares a single, continuous light-emitting layer, which can emit white light or other monochromatic light. The color filter layer has multiple filters corresponding to the light-emitting units. A filter and the corresponding light-emitting unit constitute a sub-pixel, and multiple sub-pixels constitute a pixel. Different filters can transmit different colors of light, resulting in different sub-pixels emitting different colors. The same pixel can include multiple sub-pixels of different colors. For example, a pixel can include three sub-pixels emitting red, green, and blue, respectively. In this way, color display can be achieved using multiple pixels.

[0088] However, if the light-emitting layer is a continuous, whole-layer structure, leakage current may easily occur between a light-emitting unit and the surrounding light-emitting units, resulting in cross-color. Each light-emitting unit may include multiple light-emitting devices connected in series. The light-emitting devices of the same light-emitting unit share a first electrode and a second electrode. There are multiple light-emitting sublayers between the first electrode and the second electrode. At least two adjacent light-emitting sublayers can be connected in series through a charge generation layer. Positive charges (holes) can be transferred between two adjacent light-emitting units through the charge generation layer. For example, when the light-emitting unit in the red filter portion of the corresponding color filter layer emits light, the light-emitting unit in the green filter portion of the corresponding color filter layer will also emit light due to leakage current, resulting in a decrease in the purity of the light emission of a single pixel and a decrease in the color gamut of the entire display panel.

[0089] In the related art, FIG1a shows a partial cross-sectional view of an embodiment of a silicon-based OLED display panel. The display panel may include a driving backplane BP, a first electrode layer FE, a pixel definition layer PDL, a light-emitting layer OL, and a second electrode CAT. The first electrode layer FE is disposed on a side of the driving backplane BP and includes a plurality of first electrodes ANO spaced apart from each other. The pixel definition layer PDL and the first electrode layer FE are disposed on the same side of the driving backplane BP, exposing each first electrode ANO. The pixel definition layer PDL includes a first insulating layer PBR and a second insulating layer PCL stacked in a direction away from the driving backplane BP. The first insulating layer PBR is thinner than the first electrode layer FE and is located outside the first electrode ANO. The second insulating layer PCL has a separation trench SES outside the first electrode ANO, and the sidewalls of the separation trench SES have an overhanging trench CUS1. The light-emitting layer OL covers the second insulating layer PCL and the first electrode layer FE. The second electrode CAT covers the light-emitting layer OL.

[0090] As shown in Figure 1a, any first electrode ANO and its corresponding light-emitting layer OL and second electrode CAT in a silicon-based OLED display panel can form a light-emitting unit SUP. The pixel definition layer PDL can separate and define the range of each light-emitting unit SUP. Because the sidewall of the separation groove SES is provided with a suspended groove CUS1, even if the light-emitting layer OL is recessed into the separation groove SES, it is difficult to form continuously in the suspended groove CUS1. In other words, at least part of the film layer of the light-emitting layer OL can be disconnected at the suspended groove CUS1, thereby reducing the risk of leakage between adjacent light-emitting units SUP and improving color crosstalk.

[0091] In some embodiments, as shown in Figure 1a, the driving backplane BP may include a pixel area and a peripheral area, the peripheral area is located outside the pixel area, and may be arranged around the pixel area. The driving backplane BP is used to form a driving circuit that drives the light-emitting unit SUP to emit light. The driving circuit may include a pixel circuit and a peripheral circuit, wherein: the number of pixel circuits and the light-emitting unit SUP can be multiple, and at least a portion of the pixel circuits is located in the pixel area. The pixel circuit can be an nTmC pixel circuit, such as a 2T1C, 4T1C or other pixel circuits. As long as it can drive the light-emitting unit SUP to emit light, its structure is not specifically limited here. The number of pixel circuits is the same as the number of first electrodes ANO, and is connected to the first electrode ANO in a one-to-one correspondence so as to control the light emission of each light-emitting unit SUP respectively. Among them, nTmC means that a pixel circuit includes n transistors (represented by the letter "T") and m capacitors (represented by the letter "C"). Of course, the same pixel circuit can also drive multiple light-emitting units SUP.

[0092] The peripheral circuit is located in the peripheral area and is connected to the pixel circuit. The peripheral circuit may include a light-emitting control circuit, a gate drive circuit, a source drive circuit, etc. In addition, it may also include a power supply circuit connected to the second electrode CAT for inputting a power supply signal to the second electrode CAT. The peripheral circuit can input a signal to the first electrode ANO and the second electrode CAT through the pixel circuit, thereby causing the light-emitting unit SUP to emit light.

[0093] In some embodiments, as shown in FIG1a , the driving backplane BP may include a substrate SU, which may be a silicon substrate. The aforementioned driving circuit may be formed on the silicon substrate through a semiconductor process. For example, both the pixel circuit and the peripheral circuit may include multiple transistors. A well region WL may be formed in the silicon substrate through a doping process. The well region WL may have two doped regions DR spaced apart. Taking one well region WL as an example, a gate GATE is provided on one side of the driving backplane BP. The orthographic projection of the gate GATE on the driving backplane BP is located between the two doped regions DR. The well region WL and the gate GATE may form a transistor. The doped regions DR of the well region WL serve as the first and second electrodes of the transistor, respectively. The well region WL between the two doped regions DR serves as the channel region of the transistor.

[0094] The driving backplane BP may further include at least one routing layer TL and a planar layer PLN. The routing layer TL is provided on one side of the substrate SU. The planar layer PLN covers the routing layer TL. At least one routing layer TL is connected to each doping region DR.

[0095] For example, as shown in FIG1a , there are two trace layers TL, both located within the planar layer PLN. For example, the trace layer TL includes a first trace layer TL1 and a second trace layer TL2. The first trace layer TL1 is disposed on one side of the substrate SU, with a portion of the planar layer PLN disposed between the first trace layer TL1 and the substrate SU. The second trace layer TL2 is disposed on a side of the first trace layer TL1 facing away from the substrate SU. The second trace layer TL2 is separated from the first trace layer TL1 by a portion of the planar layer PLN, and at least a portion of the second trace layer TL2 is connected to the first trace layer TL1.

[0096] Each trace layer TL can be formed by a sputtering process. The material of the planar layer PLN can be silicon oxide, silicon oxynitride or silicon nitride, and formed layer by layer through multiple deposition and polishing processes. In other words, the planar layer PLN can be formed by stacking multiple insulating film layers.

[0097] As shown in Figure 1a, the display panel's light-emitting units SUP are arrayed on one side of the driver backplane BP. For example, each light-emitting unit SUP is located on the surface of the planar layer PLN facing away from the substrate SU. Each light-emitting unit SUP may include a first electrode ANO, a second electrode CAT, and a light-emitting layer OL located between the first electrode ANO and the second electrode CAT. The first electrode ANO and the second electrode CAT can both be connected to the trace layer TL. The driver backplane BP applies a drive signal to the first electrode ANO and a power signal to the second electrode CAT, thereby driving the light-emitting layer OL to emit light.

[0098] In order to achieve color display, each light-emitting unit SUP can emit light of the same color, and cooperate with the color filter layer CF located on the side of the second electrode CAT away from the driving backplane BP to achieve color display. The embodiment of the present disclosure is explained using this color display solution as an example.

[0099] In some embodiments of the present disclosure, as shown in FIG1a , a plurality of light-emitting units SUP may be formed by a first electrode layer FE, a pixel definition layer PDL, a light-emitting layer OL, and a second electrode CAT, wherein the first electrode layer FE is disposed on a side of the driving backplane BP, for example, on a surface of the planar layer PLN facing away from the substrate SU. The first electrode layer FE may include a plurality of first electrodes ANO spaced apart from each other, with the orthographic projection of each first electrode ANO on the driving backplane BP being located in a pixel region and connected to a pixel circuit, with each first electrode ANO connected to one pixel circuit.

[0100] The first electrode layer FE can be a single layer or multi-layer structure, and its material is not particularly limited. For example:

[0101] As shown in FIG1a , in some embodiments of the present disclosure, the first electrode ANO may include a first conductive layer ANO1, a second conductive layer ANO2, and a third conductive layer ANO3 stacked in sequence in a direction away from the driving backplane BP, wherein the first conductive layer ANO1 and the third conductive layer ANO3 may both be made of metal or metal oxide, such as titanium or titanium nitride, and the materials of the two may be the same or different. The second conductive layer ANO2 may be made of a different metal material than the first conductive layer ANO1 and the third conductive layer ANO3, and have a lower resistivity than the first conductive layer ANO1 and the third conductive layer ANO3. For example, the material of the second conductive layer ANO2 may be aluminum.

[0102] In other embodiments of the present disclosure, the first electrode ANO may further include a fourth conductive layer, which may be provided on a surface of the third conductive layer facing away from the driving backplane BP, and the fourth conductive layer may be made of a transparent conductive material such as ITO (indium tin oxide).

[0103] As shown in Figure 1a, the pixel definition layer (PDL) and the first electrode layer (FE) are disposed on the same surface of the driving backplane (BP), that is, the surface of the planar layer (PLN) facing away from the substrate (SU). The pixel definition layer (PDL) exposes the first electrodes (ANO). Specifically, the pixel definition layer (PDL) may have a plurality of pixel openings (PO) that expose the first electrodes (ANO).

[0104] The positive projection of any pixel opening PO on the driving backplane BP can be located within the exposed first electrode ANO, that is, the pixel opening PO is not larger than the exposed first electrode ANO. For example, the boundary of the pixel opening PO is located on the inner side of the boundary of the exposed first electrode ANO, that is, the area of ​​the pixel opening PO is smaller than the area of ​​the exposed first electrode ANO.

[0105] The shape of the pixel opening PO can be a polygon such as a rectangle, a pentagon, or a hexagon, but is not necessarily a regular polygon. The shape of the pixel opening PO can also be other shapes such as an ellipse, which is not particularly limited here.

[0106] As shown in Figure 1a, the light-emitting layer OL covers the pixel definition layer PDL and the first electrode ANO. The area where the light-emitting layer OL overlaps the first electrode ANO forms a light-emitting unit SUP. In other words, each light-emitting unit SUP can share the same light-emitting layer OL, while the portions of the light-emitting layer OL overlapping different first electrodes ANO belong to different light-emitting units SUP. In addition, because each light-emitting unit SUP shares the light-emitting layer OL, the light emitted by each light-emitting unit SUP is the same color.

[0107] As shown in Figure 1a, the second electrode CAT covers the light-emitting layer OL, and its orthographic projection on the driving backplane BP covers the pixel area and extends into the peripheral area. Each light-emitting unit SUP can share the same second electrode CAT. The light-emitting layer OL can be controlled by controlling the voltage of the power signal input to the second electrode CAT and the drive signal input to the first electrode ANO.

[0108] As shown in FIG1a , the display panel may further include a color filter layer CF, which may be disposed on the side of the second electrode CAT facing away from the driving backplane BP and includes a plurality of filter units CFU. Each first electrode ANO is disposed opposite each filter unit CFU in a direction perpendicular to the driving backplane BP, i.e., the orthographic projection of a filter unit CFU on the driving backplane BP at least partially overlaps with a first electrode ANO. Each filter unit CFU includes at least three color filter units CFU, for example, a filter unit CFU that transmits red light, a filter unit CFU that transmits green light, and a filter unit CFU that transmits blue light. Light emitted by each light-emitting unit SUP is filtered by the filter unit CFU to produce monochromatic light of different colors, thereby achieving color display. A filter unit CFU and its corresponding light-emitting unit SUP may constitute a sub-pixel. The color emitted by any sub-pixel is the color of the light transmitted by its filter unit CFU. Multiple sub-pixels may constitute a pixel, and each sub-pixel within the same pixel may emit light of different colors.

[0109] The color filter layer CF may also include a light-shielding portion separating the filter unit (CFU). The light-shielding portion is opaque and blocks the area between the two light-emitting units (SUP). The filter unit (CFU) can be directly separated from the filter unit (CFU) by a light-shielding material. Alternatively, as shown in FIG1a , in some embodiments of the present disclosure, adjacent filter units (CFUs) can be stacked in the area corresponding to the area between two adjacent light-emitting units (SUPs), with the two units transmitting different colors of light, thereby rendering the stacked area opaque.

[0110] In addition, in some embodiments of the present disclosure, on the basis of the light-emitting layer OL emitting white light, in order to improve the brightness of the picture, the color filter layer CF may also include a transparent portion. In the direction perpendicular to the substrate, a transparent portion may be arranged opposite to a light-emitting unit SUP, so that the color filter layer CF can also transmit white light and increase the brightness through the white light.

[0111] In order to improve light extraction efficiency, a light extraction layer may be covered on the side of the second electrode CAT away from the driving backplane BP to improve brightness. Furthermore, the light extraction layer may directly cover the surface of the second electrode CAT away from the driving backplane BP.

[0112] To facilitate connecting the second electrode CAT to the drive circuit, in some embodiments of the present disclosure, the first electrode layer FE further includes an adapter ring, the orthographic projection of which on the driver backplane BP is located in the peripheral area. The adapter ring can be connected to the peripheral circuit and surrounds the outside of the pixel area. The second electrode CAT can be connected to the adapter ring, thereby connecting the second electrode CAT to the peripheral circuit via the adapter ring so that the peripheral circuit can apply a drive signal to the second electrode CAT. The pattern of the adapter ring can be the same as the pattern of the first electrode ANO in the pixel area to improve the uniformity of the pattern of the first electrode layer FE.

[0113] In some embodiments of the present disclosure, as shown in FIG1a , the display panel of the present disclosure may further include a first encapsulation layer TFE1, which may be provided on the side of the second electrode CAT away from the driving backplane BP and between the color filter layer CF and the second electrode CAT to block corrosion from external water and oxygen. The first encapsulation layer TFE1 may be a single-layer or multi-layer structure. For example, the first encapsulation layer TFE1 may include a first encapsulation sublayer, a second encapsulation sublayer, and a third encapsulation sublayer stacked in sequence in a direction away from the driving backplane BP, wherein the materials of the first encapsulation sublayer and the second encapsulation sublayer may be inorganic insulating materials such as silicon nitride and silicon oxide, and the second encapsulation sublayer may be formed using an ALD (Atomic layer deposition) process; the material of the third encapsulation sublayer may be an organic material, which may be formed using an MLD (Molecular Layer Deposition) process. Of course, the first encapsulation layer TFE1 may also adopt other structures, and the structure of the first encapsulation layer TFE1 is not specifically limited here.

[0114] In some embodiments of the present disclosure, as shown in FIG1a , the display panel may further include a second encapsulation layer TFE2, which may cover the surface of the color filter layer CF facing away from the driver backplane BP to achieve planarization, facilitate covering with a transparent cover, and enhance the encapsulation effect, further blocking water and oxygen. The second encapsulation layer may be a single-layer or multi-layer structure and may include inorganic materials such as silicon nitride and silicon oxide, or organic materials. The structure of the second encapsulation layer is not particularly limited herein.

[0115] In addition, the display panel may further include a transparent cover plate, which may cover the side of the second encapsulation layer TFE2 away from the driving backplane BP. The transparent cover plate may be a single-layer or multi-layer structure, and its material is not particularly limited.

[0116] In the related art, because the second insulating layer PCL is relatively thin at the location of the suspended groove CUS1 within the separation groove SES, the second electrode CAT is easily punctured at this location and contacts the light-emitting layer OL (such as the charge generation layer CGL within the light-emitting layer OL), resulting in leakage and cross-color at low grayscales. As shown in Figure 1b, a schematic diagram of OLED display panels located at different locations on the same silicon wafer is shown. Due to manufacturing process limitations, the depth and morphology of the separation groove SES vary between different OLED display panels located at the center and edge of the same silicon wafer, resulting in different punctures of the second electrode CAT in different OLED display panels. This results in a bluish display image for the silicon-based OLED display panel located at the center of the same silicon wafer, while a yellowish display image for the silicon-based OLED display panel located at the edge of the same silicon wafer.

[0117] In addition, in the related art, in order to ensure the high PPI display effect of the silicon-based OLED display panel, the pixel circuit that drives the sub-pixels (i.e., light-emitting units) to emit light in the silicon-based OLED display panel generally adopts a voltage driving method. The so-called voltage driving method is to achieve display grayscale by controlling the driving voltage between the first electrode and the second electrode of the light-emitting unit. The voltage driving method has high restrictions and requirements on the voltage drop between the first electrode (i.e., anode) and the second electrode (i.e., cathode) of large-size products due to the large impedance of the second electrode (i.e., cathode) itself. The greater the voltage drop caused by the large impedance of the second electrode (i.e., cathode) itself, the greater the voltage loss between the first electrode (i.e., anode) and the second electrode (i.e., cathode). This will cause the display brightness of the light-emitting units at different positions of the silicon-based OLED display panel to be uneven, affecting the display effect.

[0118] As shown in Figures 1c and 1d, Figure 1c is a circuit diagram of a pixel circuit in a silicon-based OLED display panel, and Figure 1d is an equivalent circuit diagram of the pixel circuit in Figure 1c. The driving principle of the pixel circuit in the silicon-based OLED display panel is as follows: different grayscale displays of the OLED light-emitting unit EL are achieved through the source-following of the driving transistor DTFT in the pixel circuit. The prerequisite for source following is that a large resistor is connected in series in the closed loop formed by the driving transistor DTFT and the OLED light-emitting unit EL, so that the current flowing through the OLED light-emitting unit EL is in the nA to pA range. Since the resistance of the OLED light-emitting unit EL itself is in the MΩ range, the source s voltage of the driving transistor DTFT changes with the gate b voltage, and thus the drain a voltage of the driving transistor DTFT changes with the gate b voltage. The voltage difference VEL between the drain a voltage Va (i.e., the anode voltage of the OLED light-emitting unit EL) and the cathode voltage Vss of the OLED light-emitting unit EL causes the OLED light-emitting unit EL to produce different brightness grayscales.

[0119] As shown in Figure 1e, it is a schematic diagram of the display brightness of area B in the display area of ​​the OLED display panel in the related art; if the cathode voltage of the OLED light-emitting unit in the OLED display panel is input from the lower edge S1, according to the voltage driving principle, the cathode voltage drop along the long side direction Y of the display area AA in Figure 1e is the largest. Therefore, the voltage drop and voltage loss caused by the impedance of the cathode itself in the center position area P of the display area AA in Figure 1e along the long side direction Y of the display area AA are the largest, and the brightness of the OLED light-emitting unit in the center position area P of the display area AA along the long side direction Y of the display area AA is the lowest, so it is necessary to lower the impedance of the entire cathode of the OLED light-emitting unit in the display area AA.

[0120] Taking a 0.71" OLED display panel as an example, if a single-layer light-emitting device (i.e., an OLED light-emitting device consisting of a hole transport layer, a light-emitting layer, and an electron transport layer stacked together) is used, when the brightness reaches 2000 nits, the current density will reach 100 mA / cm 2 If the OLED light-emitting unit uses a top-emission (Top EM) light-emitting method and the cathode is made of a solid-surface IZO (indium-doped zinc oxide) material, its impedance can reach Rs = 40 / □, resulting in a voltage loss of nearly 2V. Within the limited data signal voltage range, the grayscale required to drive the OLED light-emitting unit cannot be achieved. If the size of the silicon-based OLED display panel is large, the voltage loss caused by the cathode impedance will be even greater. For example, a 1.3" OLED display panel has a cathode voltage loss equivalent to nearly four 0.71" OLED display panels.

[0121] In this context, it is necessary to minimize the cathode impedance of the OLED light-emitting unit in the silicon-based OLED display panel.

[0122] In order to solve the above-mentioned problems existing in the related art, on the first aspect, the embodiment of the present disclosure provides a display panel, refer to Figure 2a, which is a partial cross-sectional view of an embodiment of the display panel in the embodiment of the present disclosure, wherein it includes: a driving backplane BP; a first electrode layer FE, which is arranged on one side of the driving backplane BP and includes a plurality of first electrodes ANO distributed at intervals; a pixel definition layer PDL, which is located on the side of the first electrode layer FE away from the driving backplane BP, and a plurality of pixel openings PO are opened in the pixel definition layer PDL, and each first electrode ANO is exposed at the pixel opening PO; a plurality of separation grooves SES are further opened on the side of the pixel definition layer PDL away from the driving backplane BP, and the orthographic projection of the separation grooves SES on the driving backplane BP is aligned with the first electrode ANO on the driving backplane The orthographic projections on the backplane BP do not overlap; the light-emitting layer OL is located on the side of the pixel definition layer PDL facing away from the driving backplane BP, and the orthographic projection of the light-emitting layer OL on the driving backplane BP covers the pixel definition layer PDL and the first electrode layer FE; the second electrode CAT is located on the side of the light-emitting layer OL facing away from the driving backplane BP, and the orthographic projection of the second electrode CAT on the driving backplane BP covers the light-emitting layer OL; the auxiliary electrode FZ is located on the side of the second electrode CAT facing away from the driving backplane BP, and is in contact with and electrically connected to the second electrode CAT, the orthographic projection of the auxiliary electrode FZ on the driving backplane BP is located within the orthographic projection area of ​​the pixel definition layer PDL on the driving backplane BP, and the orthographic projection of the auxiliary electrode FZ on the driving backplane BP at least covers the separation groove SES.

[0123] In the display panel of this embodiment, any first electrode ANO and its corresponding light-emitting layer OL and second electrode CAT can form a light-emitting unit SUP. The pixel definition layer PDL can separate and define the range of each light-emitting unit SUP. The first electrode ANO can serve as the anode of the light-emitting unit SUP, and the second electrode CAT can serve as the cathode of the light-emitting unit SUP.

[0124] Among them, on the one hand, by setting an auxiliary electrode FZ on the second electrode CAT in contact with and electrically connected to it, the impedance of the second electrode CAT can be reduced, thereby reducing the driving voltage loss of the light-emitting unit SUP caused by the large impedance of the second electrode CAT, and thus making the display brightness of the light-emitting units SUP at different positions of the display panel tend to be uniform, thereby improving the display effect of the display panel; on the other hand, by setting the auxiliary electrode FZ at least at the position of the separation groove SES in the corresponding pixel definition layer PDL, the depth morphology difference of the separation groove and the suspended groove in the pixel definition layer of the OLED display panel of the related technology can be repaired and improved, thereby repairing and improving the puncture difference of the second electrode CAT in different OLED display panels, and thus improving or eliminating the display color deviation of the OLED display panels at different positions on the same silicon wafer, making the display picture color of the OLED display panels at different positions on the same silicon wafer tend to be consistent, and reducing the quality difference of the display panels in the same batch.

[0125] In some embodiments, referring to Figure 2b, which is a partial enlarged view of part A in Figure 2a; the auxiliary electrode FZ includes a first part FZ1 and a second part FZ2, the first part FZ1 and the second part FZ2 are connected as a whole, the second part FZ2 is located on opposite sides of the first part FZ1, the orthographic projection of the first part FZ1 on the driving back plate BP coincides with the orthographic projection of the separation groove SES on the driving back plate BP, the orthographic projection of the second part FZ2 on the driving back plate BP does not overlap with the orthographic projection of the separation groove SES on the driving back plate BP, and the thickness of the first part FZ1 is greater than the thickness of the second part FZ2.

[0126] 2b , the surface of the first portion FZ1 facing away from the driving back plate BP and the surface of the second portion FZ2 facing away from the driving back plate BP are smoothly transitioned to avoid sharp corners on the side of the second electrode CAT and the auxiliary electrode FZ facing away from the driving back plate BP.

[0127] 2B , a distance h1 between a surface of the first portion FZ1 facing away from the driving back plate BP and the driving back plate BP is greater than or equal to a distance h2 between a surface of the second portion FZ2 facing away from the driving back plate BP and the driving back plate BP. That is, the surface of the first part FZ1 away from the driving backplane BP is higher than the surface of the second part FZ2 away from the driving backplane BP, or the surface of the first part FZ1 away from the driving backplane BP is flush with the surface of the second part FZ2 away from the driving backplane BP; such a setting, on the one hand, can repair and improve the depth morphology differences of the separation grooves and the suspended grooves in the pixel definition layer of the OLED display panel in the related technology, thereby repairing and improving the puncture differences of the second electrode CAT in different OLED display panels, and then improving or eliminating the display color deviation of the OLED display panels at different positions on the same silicon wafer, so that the display screen colors of the OLED display panels at different positions on the same silicon wafer tend to be consistent; on the other hand, the surface of the side of the auxiliary electrode FZ away from the driving backplane BP is made basically flat or tends to be flat with the surface of the side of the second electrode CAT away from the driving backplane BP, thereby avoiding sharp edges and corners on the side of the second electrode CAT and the auxiliary electrode FZ away from the driving backplane BP.

[0128] In some embodiments, referring to FIG2b , the surface of the second electrode CAT facing away from the driving back plate BP and the surface of the second portion FZ2 facing away from the driving back plate BP form a smooth transition. This configuration allows the surface of the auxiliary electrode FZ facing away from the driving back plate BP to be substantially flush with or substantially even with the surface of the second electrode CAT facing away from the driving back plate BP, thereby preventing sharp corners from forming on the sides of the second electrode CAT and the auxiliary electrode FZ facing away from the driving back plate BP.

[0129] In some embodiments, referring to FIG2 b , a distance h2 between a surface of the second portion FZ2 facing away from the driving back plate BP and the driving back plate BP is greater than or equal to a distance h3 between a surface of the second electrode CAT facing away from the driving back plate BP and the driving back plate BP. This arrangement allows the surface of the auxiliary electrode FZ facing away from the driving back plate BP to be substantially flush with or substantially even with the surface of the second electrode CAT facing away from the driving back plate BP, thereby preventing sharp corners from forming on the sides of the second electrode CAT and the auxiliary electrode FZ facing away from the driving back plate BP.

[0130] In some embodiments, referring to FIG2b , the thickness of the first portion FZ1 is greater than the thickness of the second electrode CAT, and the thickness of the second portion FZ2 is less than the thickness of the second electrode CAT. This configuration, on the one hand, can repair and improve the depth morphology differences between the separation trenches and the overhanging trenches in the pixel definition layer of the related art OLED display panel, thereby repairing and improving the puncture differences of the second electrode CAT in different OLED display panels, thereby improving or eliminating the display color shift of OLED display panels at different locations on the same silicon wafer, making the display colors of OLED display panels at different locations on the same silicon wafer tend to be consistent. On the other hand, the surface of the auxiliary electrode FZ facing away from the driving backplate BP is made substantially flat or tends to be flat with the surface of the second electrode CAT facing away from the driving backplate BP, thereby avoiding sharp edges and corners on the sides of the second electrode CAT and the auxiliary electrode FZ facing away from the driving backplate BP.

[0131] In some embodiments, referring to FIG. 2 b , the ratio of the thickness of the first portion FZ1 to the thickness of the second electrode CAT ranges from 4:1 to 7:1, and the ratio of the thickness of the second portion FZ2 to the thickness of the second electrode CAT ranges from 1:3 to 1:2. The first portion FZ1 having such a thickness is more conducive to filling the separation trench SES in the pixel definition layer PDL and is also more conducive to repairing and improving the puncture variation of the second electrode CAT in different OLED display panels, thereby improving or eliminating the display color shift of OLED display panels at different locations on the same silicon wafer. The second portion FZ2 having such a thickness is more conducive to making the surface of the auxiliary electrode FZ facing away from the driving backplane BP substantially flush with or approaching the surface of the second electrode CAT facing away from the driving backplane BP, thereby further helping to avoid sharp edges and corners on the sides of the second electrode CAT and the auxiliary electrode FZ facing away from the driving backplane BP.

[0132] In some embodiments, referring to FIG2 b , the orthographic projection of the second portion FZ2 on the driver backplane BP partially overlaps with the orthographic projection of the first electrode ANO on the driver backplane BP. Since the auxiliary electrode FZ is made of a low-resistivity metal material, the auxiliary electrode FZ can block light. The partial overlap of the orthographic projection of the second portion FZ2 and the first electrode ANO can improve or avoid color mixing between adjacent light-emitting units SUP that are relatively close. For example, if light emitted by one of two adjacent light-emitting units SUP enters the red color resistor, and light emitted by the other light-emitting unit SUP enters the green color resistor, if the light entering the red color resistor also enters the green color resistor, it will cause poor color mixing between the two adjacent light-emitting units SUP.

[0133] In some embodiments, referring to FIG. 2c , which is another partially enlarged view of portion A in FIG. 2a , the orthographic projection of the second portion FZ2 on the driver backplane BP does not overlap with the orthographic projection of the first electrode ANO on the driver backplane BP. This arrangement can also improve or prevent color mixing between distant adjacent light-emitting units SUP.

[0134] In some embodiments, referring to FIG. 2 a , the shortest distance s between the orthographic projection edge of the auxiliary electrode FZ on the driving backplane BP and the orthographic projection edge of the adjacent pixel opening PO on the driving backplane BP is in the range of 0.3 to 0.5 μm. This arrangement can, on the one hand, ensure the light extraction efficiency of the light-emitting unit SUP, and on the other hand, improve or avoid color mixing between adjacent light-emitting units SUP.

[0135] In some embodiments, referring to FIG. 2a , the pixel definition layer (PDL) includes a first insulating layer (PBR) and a second insulating layer (PCL). The first insulating layer (PBR) and the second insulating layer (PCL) are stacked in sequence away from the driving backplate (BP). A separation slot (SES) extends through the thickness of the second insulating layer (PCL), leaving the first insulating layer (PBR) exposed at the separation slot (SES). The provision of the first insulating layer (PBR) limits the depth of the separation slot (SES), preventing the separation slot (SES) from extending into the driving backplate (BP). Specifically, the depth of the separation slot (SES) is limited by the first insulating layer (PBR), which helps improve the structural uniformity of different driving backplates (BP).

[0136] In some embodiments, referring to Figure 2a, the second insulating layer PCL includes a first sublayer CL1, a second sublayer CL2 and a third sublayer CL3. The first sublayer CL1, the second sublayer CL2 and the third sublayer CL3 are stacked in sequence away from the driving backplane BP, and the side surface of the second sublayer CL2 serving as the wall of the separation groove SES is retracted inwardly toward the pixel opening PO relative to the side surfaces of the first sublayer CL1 and the third sublayer CL3 serving as the wall of the separation groove SES to form a suspended groove CUS1 between the first sublayer CL1 and the third sublayer CL3. The light-emitting layer OL includes a plurality of light-emitting sublayers OLP stacked in sequence, and at least some of the light-emitting sublayers OLP are disconnected at the suspended groove CUS1.

[0137] In some embodiments, referring to Figures 2a and 2d, Figure 2d is a schematic diagram of the structure of a light-emitting unit in a display panel according to an embodiment of the present disclosure. A light-emitting unit SUP may include multiple light-emitting devices LD connected in series, each light-emitting unit SUP including a first electrode ANO, a second electrode CAT, and multiple light-emitting sublayers OLP between the first electrode ANO and the second electrode CAT. The light-emitting devices LD of the same light-emitting unit SUP may share the same first electrode ANO and the same second electrode CAT. That is, the same light-emitting unit SUP may have only one first electrode ANO and one second electrode CAT.

[0138] For example, referring to Figures 2a and 2d, the light-emitting layer OL may include multiple light-emitting sublayers OLP connected in series, facing away from the driving backplane BP. At least one light-emitting sublayer OLP is connected in series with an adjacent light-emitting sublayer OLP via a charge generation layer CGL. When an electrical signal is applied to the first electrode ANO and the second electrode CAT, each light-emitting sublayer OLP can emit light, and different light-emitting sublayers OLP can be used to emit light of different colors.

[0139] In some embodiments, referring to FIG. 2 d , any light-emitting sublayer OLP may include a hole injection layer HIL, a hole transport layer HTL, a light-emitting material layer EML, an electron transport layer ETL, and an electron injection layer EIL, arranged in a direction away from the driving backplane BP. The specific light-emitting principle is not described in detail herein. The number of hole injection layers HIL, hole transport layers HTL, electron transport layers ETL, and electron injection layers EIL is not specifically limited, and adjacent light-emitting sublayers OLP may share one or more of the hole injection layer HIL, hole transport layer HTL, electron transport layer ETL, and electron injection layer EIL. Furthermore, a charge generation layer CGL may be provided between at least two adjacent light-emitting sublayers OLP, thereby connecting the two light-emitting sublayers OLP in series.

[0140] In some embodiments, referring to FIG. 2d , the light-emitting layer OL may include three light-emitting sublayers OLP of different colors: a first light-emitting sublayer OLPr emitting red light, a second light-emitting sublayer OLPg emitting green light, and a third light-emitting sublayer OLPb emitting blue light. When the first, second, and third light-emitting sublayers OLPr, OLPg, and OLPb emit light simultaneously, the light-emitting layer OL emits white light. The first and second light-emitting sublayers OLPr and OLPg share a hole injection layer HIL, a hole transport layer HTL1, an electron transport layer ETL2, and an electron injection layer EIL. The light-emitting material layer G-EML of the second light-emitting sublayer OLPg is disposed on a surface of the light-emitting material layer R-EML of the first light-emitting sublayer OLPr facing away from the driving backplate BP. This allows the first and second light-emitting sublayers OLPr and OLPg to be directly connected in series without requiring a dedicated charge generation layer. A charge generation layer CGL may be disposed on the surface of the second light-emitting sublayer OLPg facing away from the driving backplate BP. The third luminescent sublayer OLPb shares a common electron injection layer EIL with the first and second luminescent sublayers OLPr and OLPg. Its hole injection layer HIL2 is located on the surface of the charge generation layer CGL facing away from the driving backplane BP. Its hole transport layers HTL2 and HTL3 are stacked on the side of the charge generation layer CGL facing away from the driving backplane BP. The charge generation layer CGL connects the third luminescent sublayer OLPb in series with the second and first luminescent sublayers OLPg and OLPr. Furthermore, a hole first insulating layer HBL can be provided between the electron transport layer HYL and the luminescent material layer BEML of the third luminescent sublayer OLPb.

[0141] The light-emitting layer OL structure in FIG2d is for illustrative purposes only and does not constitute a limitation on its film layer. It may include only two light-emitting sub-layers OLP, or more, or only one light-emitting sub-layer OLP, as long as it can cooperate with the color filter layer CF to achieve color display.

[0142] In some embodiments, since the light-emitting units SUP share the light-emitting layer OL, carriers (e.g., holes) of one light-emitting unit SUP may migrate through layers such as the charge generation layer CGL to other light-emitting units SUP, particularly to adjacent light-emitting units SUP, resulting in leakage, which affects the purity of the light emission and causes cross-color. Therefore, referring to FIG2a , by providing a separation groove SES in the second insulating layer PCL and providing a suspended groove CUS1 between the first sublayer CL1 and the third sublayer CL3 of the second insulating layer PCL, it is difficult for at least a portion of the light-emitting sublayer OLP in the light-emitting layer OL to be continuous at the suspended groove CUS1, that is, at least a portion of the light-emitting sublayer OLP in the light-emitting layer OL is disconnected at the suspended groove CUS1, thereby preventing carriers from migrating between the light-emitting units SUP and thus avoiding cross-color caused by leakage.

[0143] In some embodiments, referring to Figures 2b and 2c, the depth L of the suspended groove CUS1 is the thickness of the second sub-layer CL2, the width M of the suspended groove CUS1 is the distance between the orthographic projection of the side surface of the second sub-layer CL2 as the separation groove SES groove wall on the driving backplane BP and the orthographic projection of the side surface of the third sub-layer CL3 as the separation groove SES groove wall on the driving backplane BP, the thickness of the first part FZ1 is greater than the depth L of the suspended groove CUS1, and the thickness of the first part FZ1 is greater than the width M of the suspended groove CUS1.

[0144] In some embodiments, the thickness of the first portion FZ1 is 1 to 2 times the depth L of the suspension groove CUS1 , and the thickness of the first portion FZ1 is 0.5 to 1 times the width M of the suspension groove CUS1 . The thickness of the first part FZ1 is too large relative to the depth L of the suspended groove CUS1, which may easily lead to poor packaging of the light-emitting unit SUP. At the same time, if the depth L of the suspended groove CUS1 is too large, it will cause serious puncture leakage of the second electrode CAT (i.e., the cathode). If the depth L of the suspended groove CUS1 is too small, it will easily lead to luminous crosstalk between adjacent light-emitting units SUP. In addition, the thickness of the first part FZ1 is too large relative to the width M of the suspended groove CUS1, which may easily break the upper wall of the suspended groove CUS1 (i.e., the third sub-layer CL3). Therefore, the above-mentioned proportion setting can not only ensure the good packaging of the light-emitting unit SUP, but also improve or avoid the puncture leakage of the second electrode CAT (i.e., the cathode) and the luminous crosstalk between adjacent light-emitting units SUP. In addition, it can also prevent the auxiliary electrode FZ from breaking the upper wall of the suspended groove CUS1 (i.e., the third sub-layer CL3).

[0145] 2b and 2c , in some embodiments, the thickness of the first insulating layer PBR is smaller than that of the first electrode layer FE, and the thickness of the first insulating layer PBR is smaller than that of the second insulating layer PCL, thereby providing sufficient recessed space for the separation groove SES in the second insulating layer PCL.

[0146] For example, for the first electrode ANO including the first conductive layer ANO1, the second conductive layer ANO2 and the third conductive layer ANO3, the thickness of the first insulating layer PBR may be greater than the thickness of the first conductive layer ANO1, but less than the sum of the thicknesses of the second conductive layer ANO2 and the first conductive layer ANO1, that is, the surface of the first insulating layer PBR facing away from the driving backplane BP is located between the surface of the second conductive layer ANO2 facing away from the driving backplane BP and the first conductive layer ANO1. In addition, the material of the first insulating layer PBR can be an inorganic insulating material such as silicon oxide, silicon nitride, or of course other insulating materials. In addition, the first insulating layer PBR can contact the side wall of the first electrode ANO. Since the material of the first insulating layer PBR is an insulating material, it will not be electrically connected to the first electrode ANO, thereby avoiding a short circuit between adjacent first electrodes ANO.

[0147] 2a , the second insulating layer PCL may be stacked on the surface of the first insulating layer PBR away from the driving backplane BP, exposing each first electrode ANO, and the sum of the thicknesses of the second insulating layer PCL and the first insulating layer PBR may be greater than the thickness of the first electrode layer FE.

[0148] In some embodiments, referring to FIG. 2e , which is a partial cross-sectional view of a portion of a film layer in a display panel according to an embodiment of the present disclosure, the sidewalls of the pixel opening PO are sloped surfaces that expand in a direction away from the driving backplate BP. That is, the distance between the sidewalls of the pixel opening PO gradually increases in a direction away from the driving backplate BP, and the slope angle θ of the slope is no greater than 90°. Furthermore, the sidewalls of the separation slot SES may be sloped surfaces that expand in a direction away from the driving backplate BP. That is, the distance between the sidewalls of the separation slot SES gradually increases in a direction away from the driving backplate BP, and the slope angle α of the sidewalls of the separation slot SES is less than or equal to 90°.

[0149] In some embodiments, referring to FIG. 2e , a portion of the second insulating layer PCL may extend to the surface of the first electrode ANO facing away from the driving backplate BP, but does not completely cover the first electrode ANO. Accordingly, the second insulating layer PCL may include a truncation portion PDLc and an extension portion PDLe. The truncation portion PDLc may be located outside the first electrode ANO, and the extension portion PDLe is located on the surface of the first electrode ANO facing away from the driving backplate BP. The pixel definition layer PDL and the orthographic projection of the first electrode ANO on the driving backplate BP have an overlapping area. The pixel opening PO may be opened in the extension portion PDLe to expose the first electrode ANO. Because the thickness of the first electrode ANO is greater than that of the first insulating layer PBR, the second insulating layer PCL needs to climb a slope when extending from the truncation portion PDLc to the extension portion PDLe, that is, the surface of the extension portion PDLe facing away from the first electrode ANO is located on the side of the surface of the truncation portion PDLc facing away from the driving backplate BP facing away from the driving backplate BP.

[0150] In some embodiments, the second insulating layer PCL may not include the extension portion PDLe, but may include only the truncation portion PDLc. The truncation portion PDLc may separate the first electrodes ANO. In other words, the boundaries of the projections of the truncation portion PDLc and the first insulating layer PBR on the driving backplane BP may overlap. The pixel opening PO may be a through hole that penetrates the truncation portion PDLc and the first insulating layer PBR. The orthographic projections of the pixel definition layer PDL and the first electrode ANO on the driving backplane BP do not overlap.

[0151] In some embodiments, referring to FIG. 2 f , which is a partial top view of a display panel in an embodiment of the present disclosure, the orthographic projection of the auxiliary electrode FZ on the driving backplane BP surrounds the orthographic projection of the pixel opening PO on the driving backplane BP.

[0152] In some embodiments, referring to FIG. 2f , a separation groove SES is defined in the second insulating layer PCL, and the separation groove SES is located outside the first electrode ANO. The separation groove SES may be an annular groove surrounding the first electrode ANO, and each first electrode ANO may be surrounded by a separation groove SES. The separation grooves SES surrounding two adjacent first electrodes ANO may share a portion of the area, so that there may be only one separation groove SES between two adjacent first electrodes ANO. Of course, the separation grooves SES surrounding two adjacent first electrodes ANO may also be independently defined without sharing any portion.

[0153] In some embodiments, referring to FIG. 2f , the auxiliary electrodes FZ are connected in a mesh configuration. The auxiliary electrodes FZ are made of a low-resistivity metal material such as Mo, Al, or Ti, and the second electrode CAT is made of indium-doped zinc oxide (IZO). By connecting the auxiliary electrodes FZ and the second electrode CAT in parallel, the impedance of the second electrode CAT (i.e., the cathode) can be minimized, thereby reducing the driving voltage loss of the light-emitting unit SUP caused by the high impedance of the second electrode CAT. This in turn makes the display brightness of the light-emitting units SUP at different positions on the display panel more uniform, thereby improving the display quality of the display panel.

[0154] In some embodiments, referring to Figure 3a, there is a comparison curve of the display brightness effects at the center and edge positions of the display area of ​​the display panel by setting auxiliary electrodes in the embodiment of the present disclosure, and Figure 3b is a comparison diagram of the actual display effects of the display panel by setting auxiliary electrodes in the embodiment of the present disclosure. It can be seen from Figures 3a and 3b that when the second electrode (i.e., cathode) voltage of the display panel is input from the four edges of the display area, the setting of the auxiliary electrodes can reduce the brightness of the edge area of ​​the display area of ​​the display panel, and make the overall brightness uniformity of the display area reach more than 80%.

[0155] The other structures of the display panel in the embodiment of the present disclosure are the same as those of the display panel in FIG. 1 a , and are not described again here.

[0156] Based on the above structure of the display panel, the embodiment of the present disclosure further provides a method for preparing the display panel. Referring to FIG4 a , which is a schematic diagram of preparing the display panel in the embodiment of the present disclosure, the preparation method includes: Step S01: preparing a driving backplane.

[0157] Step S02: a first electrode layer, a pixel definition layer, a light-emitting layer and a second electrode are sequentially prepared on one side of the driving backplane to form a substrate 1 to be plated.

[0158] Step S03: preparing an auxiliary electrode FZ on a side of the second electrode facing away from the driving back plate.

[0159] The preparation of the auxiliary electrode FZ includes forming an auxiliary electrode film layer 2 on the light-absorbing and heat-conductive substrate 3 .

[0160] The evaporation light source 4 illuminates the side of the light-absorbing and heat-conductive substrate 3 away from the auxiliary electrode film layer 2, and evaporates the auxiliary electrode film layer 2 onto the substrate to be plated 1 to form a pattern of the auxiliary electrode FZ.

[0161] In some embodiments, referring to FIG. 4 b , which is a schematic diagram of a specific preparation process of a display panel in an embodiment of the present disclosure, the preparation of the auxiliary electrode FZ includes: Step S031 : forming a light absorbing layer 31 on a transparent substrate 30 .

[0162] In this step, the light absorbing layer 31 can be prepared by a conventional process such as a coating process. The light absorbing layer 31 has a strong light absorbing effect.

[0163] Step S032 : forming a light-heat conducting layer 32 on the side of the light absorbing layer 31 facing away from the transparent substrate 30 .

[0164] In this step, the optical heat conduction layer 32 can be prepared by conventional processes such as coating processes. The optical heat conduction layer 32 has a good vertical heat conduction effect.

[0165] Step S033 : forming an auxiliary electrode film layer 2 on the side of the light and heat conductive layer 32 away from the transparent substrate 30 .

[0166] In this step, a high-conductivity metal material is formed on the side of the light-heat conductive layer 32 facing away from the transparent substrate 30 by conventional processes such as coating, evaporation, sputtering or printing.

[0167] Step S034 : disposing a liquid crystal light-shielding and light-transmitting layer 33 on the side of the transparent substrate 30 away from the auxiliary electrode film layer 2 .

[0168] In this step, the liquid crystal light-shielding and light-transmitting layer 33 controls the deflection direction of the liquid crystal in the liquid crystal light-shielding and light-transmitting layer 33 through the active driving electrodes, thereby achieving the liquid crystal transmission and light-shielding functions in different areas of the liquid crystal light-shielding and light-transmitting layer 33 .

[0169] Step S035: Place the substrate 1 to be plated on the side of the auxiliary electrode film layer 2 away from the transparent base 30, and the substrate 1 to be plated and the auxiliary electrode film layer 2 are arranged opposite to each other, and place the evaporation light source 4 on the side of the liquid crystal light-shielding and light-transmitting layer 33 away from the transparent base 30. The light emitted by the evaporation light source 4 passes through the light-transmitting area in the liquid crystal light-shielding and light-transmitting layer 33, so that the auxiliary electrode film layer 2 corresponding to the light-transmitting area evaporates and is evaporated to the corresponding area of ​​the substrate 1 to be plated, thereby forming a pattern of the auxiliary electrode FZ on the substrate 1 to be plated.

[0170] In this step, the evaporation light source 4 can be a UV light source or a laser light source. The light emitted by the evaporation light source 4 passes through the light-transmitting area of ​​the liquid crystal light-shielding and light-transmitting layer 33, causing the metal material corresponding to the light-transmitting area to evaporate and then evaporate to the corresponding position on the substrate 1 to be plated in a vertical direction.

[0171] Referring to FIG4c, there is shown a schematic diagram of adjusting the position of the light-transmitting area of ​​the liquid crystal light-shielding and light-transmitting layer in an embodiment of the present disclosure to achieve auxiliary electrode evaporation at different positions; wherein, by adjusting the driving position of the liquid crystal light-shielding and light-transmitting layer, that is, changing the position of the light-transmitting area and the light-shielding area of ​​the liquid crystal light-shielding and light-transmitting layer, the entire auxiliary electrode film layer can be used to form the pattern of the auxiliary electrode on the substrate to be plated, thereby achieving auxiliary electrode patterning while minimizing material waste, and also reducing the difficulty of the auxiliary electrode preparation process. For example, to achieve the evaporation of auxiliary electrodes at evaporation position 1, evaporation position 2, and evaporation position 3 on the substrate to be plated 1 as shown in FIG4c, the driving position of the liquid crystal light-shielding and light-transmitting layer can be adjusted, and after three evaporation depositions, the auxiliary electrode film layers at different positions on the transparent substrate are sequentially evaporated to the three evaporation positions on the substrate to be plated 1. In theory, the distribution of the auxiliary electrodes can be adjusted. By adjusting the driving position of the liquid crystal light-shielding and light-transmitting layer and setting the number of evaporation depositions, the auxiliary electrode film layer on the transparent substrate can be fully utilized, thereby achieving maximum material utilization and saving material costs.

[0172] The driving backplane and the film layers on the driving backplane in the embodiment of the present disclosure are prepared using traditional processes, which will not be described in detail here.

[0173] The display panel provided in the embodiment of the present disclosure, on the one hand, can reduce the impedance of the second electrode by providing an auxiliary electrode on the second electrode that is in contact with and electrically connected to the second electrode, thereby reducing the driving voltage loss of the light-emitting unit caused by the large impedance of the second electrode, thereby making the display brightness of the light-emitting units at different positions of the display panel tend to be uniform, thereby improving the display effect of the display panel; on the other hand, by providing an auxiliary electrode at least at the position of the separation groove in the corresponding pixel definition layer, the depth morphology difference of the separation groove and the suspended groove in the pixel definition layer of the OLED display panel of the related technology can be repaired and improved, thereby repairing and improving the puncture difference of the second electrode in different OLED display panels, thereby improving or eliminating the display color deviation of the OLED display panels at different positions on the same silicon wafer, making the display picture color of the OLED display panels at different positions on the same silicon wafer tend to be consistent, and reducing the quality difference of the display panels in the same batch.

[0174] In a second aspect, an embodiment of the present disclosure further provides a display device, comprising the display panel in the above embodiment.

[0175] By adopting the display panel in the above embodiment, on the one hand, the display brightness at different positions of the display device is made uniform, thereby improving the display effect of the display device; on the other hand, the display color deviation of the display devices in the same batch is improved or eliminated, thereby reducing the quality differences of the display devices in the same batch.

[0176] The display device provided in the embodiments of the present disclosure may be any product or component with a display function, such as an OLED panel, an OLED TV, an OLED billboard, a display, a mobile phone, a navigator, or the like.

[0177] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel, wherein: include: Driver backplane; A first electrode layer is disposed on a side of the driving backplane and includes a plurality of first electrodes distributed at intervals; a pixel definition layer, located on a side of the first electrode layer away from the driving backplane, wherein a plurality of pixel openings are formed in the pixel definition layer, and each of the first electrodes is exposed at the pixel openings; a plurality of separation grooves are also formed on a side of the pixel definition layer away from the driving backplane, and the orthographic projections of the separation grooves on the driving backplane do not overlap with the orthographic projections of the first electrodes on the driving backplane; A light-emitting layer is located on a side of the pixel definition layer away from the driving backplane, and the orthographic projection of the light-emitting layer on the driving backplane covers the pixel definition layer and the first electrode layer; A second electrode is located on a side of the light-emitting layer away from the driving backplane, and an orthographic projection of the second electrode on the driving backplane covers the light-emitting layer; An auxiliary electrode is located on the side of the second electrode away from the driving backplane, and is in contact with and electrically connected to the second electrode. The orthographic projection of the auxiliary electrode on the driving backplane is located within the orthographic projection area of ​​the pixel definition layer on the driving backplane, and the orthographic projection of the auxiliary electrode on the driving backplane at least covers the separation groove.

2. The display panel according to claim 1, wherein: The auxiliary electrode includes a first portion and a second portion, wherein the first portion and the second portion are connected as a whole. The second portion is located on opposite sides of the first portion, The orthographic projection of the first portion on the driving backplane coincides with the orthographic projection of the separation groove on the driving backplane, The orthographic projection of the second portion on the driving backplane does not overlap with the orthographic projection of the separation groove on the driving backplane, The thickness of the first portion is greater than the thickness of the second portion.

3. The display panel according to claim 2, wherein: A surface of the first portion facing away from the driving back plate and a surface of the second portion facing away from the driving back plate are smoothly transitioned.

4. The display panel according to claim 3, wherein: A distance between a surface of the first portion facing away from the driving back plate and the driving back plate is greater than or equal to a distance between a surface of the second portion facing away from the driving back plate and the driving back plate.

5. The display panel according to claim 3, wherein: A surface of the second electrode facing away from the driving back plate transitions smoothly to a surface of the second portion facing away from the driving back plate.

6. The display panel according to claim 5, wherein: A distance between a surface of the second portion facing away from the driving backplate and the driving backplate is greater than or equal to a distance between a surface of the second electrode facing away from the driving backplate and the driving backplate.

7. The display panel according to any one of claims 2 to 4, wherein: The thickness of the first portion is greater than the thickness of the second electrode, The thickness of the second portion is smaller than the thickness of the second electrode.

8. The display panel according to claim 7, wherein: The ratio of the thickness of the first portion to the thickness of the second electrode is in the range of 4:1 to 7:

1. The ratio of the thickness of the second portion to the thickness of the second electrode is in the range of 1:3 to 1:

2.

9. The display panel according to claim 2, wherein: An orthographic projection of the second portion on the driving backplane partially overlaps with an orthographic projection of the first electrode on the driving backplane.

10. The display panel according to claim 2, wherein: An orthographic projection of the second portion on the driving backplane does not overlap with an orthographic projection of the first electrode on the driving backplane.

11. The display panel according to claim 1, wherein: The shortest distance between the orthographic projection edge of the auxiliary electrode on the driving backplane and the orthographic projection edge of the pixel opening adjacent to the auxiliary electrode on the driving backplane is in the range of 0.3 to 0.5 μm.

12. The display panel according to claim 2, wherein: The pixel definition layer includes a first insulating layer and a second insulating layer, The first insulating layer and the second insulating layer are stacked in sequence away from the driving backplane, The separation groove runs through the thickness of the second insulating layer, and the first insulating layer is exposed at the separation groove; The second insulating layer includes a first sublayer, a second sublayer and a third sublayer, wherein the first sublayer, the second sublayer and the third sublayer are stacked in sequence away from the driving backplane. The side surface of the second sub-layer serving as the groove wall of the separation groove is retracted inwardly toward the pixel opening relative to the side surfaces of the first sub-layer and the third sub-layer serving as the groove wall of the separation groove, so as to form a suspended groove between the first sub-layer and the third sub-layer. The light-emitting layer includes a plurality of light-emitting sub-layers stacked in sequence, and at least part of the light-emitting sub-layers are disconnected at the suspended groove.

13. The display panel according to claim 12, wherein: The depth of the suspended groove is the thickness of the second sub-layer, The width of the suspended groove is the distance between the orthographic projection of the side surface of the second sub-layer as the groove wall of the separation groove on the driving backplane and the orthographic projection of the side surface of the third sub-layer as the groove wall of the separation groove on the driving backplane. The thickness of the first portion is greater than the depth of the suspended groove, The thickness of the first portion is greater than the width of the suspension groove.

14. The display panel according to claim 13, wherein: The thickness of the first portion is 1 to 2 times the depth of the suspended groove. The thickness of the first portion is 0.5 to 1 times the width of the suspended groove.

15. The display panel according to claim 12, wherein: The thickness of the first insulating layer is smaller than the thickness of the first electrode layer, The thickness of the first insulating layer is smaller than the thickness of the second insulating layer.

16. The display panel according to claim 1, wherein: The side wall of the pixel opening is a slope that expands in a direction away from the driving backplane. The slope angle of the slope surface is not greater than 90°.

17. The display panel according to claim 1, wherein: The orthographic projection of the auxiliary electrode on the driving backplane surrounds the orthographic projection of the pixel opening on the driving backplane.

18. The display panel according to claim 17, wherein: The auxiliary electrodes are connected in a mesh shape.

19. A display device, wherein: A display panel comprising any one of claims 1-18.

20. A method for preparing a display panel, wherein: include: preparing a drive backplane; A first electrode layer, a pixel definition layer, a light-emitting layer, and a second electrode are sequentially prepared on one side of the driving backplane to form a substrate to be plated; preparing an auxiliary electrode on a side of the second electrode away from the driving back plate; The preparation of the auxiliary electrode comprises: The auxiliary electrode film is formed on the light-absorbing and heat-conducting substrate. The evaporation light source irradiates the side of the light-absorbing and heat-conductive substrate away from the auxiliary electrode film layer, and evaporates the auxiliary electrode film layer on the substrate to be plated to form the pattern of the auxiliary electrode.

21. The method for preparing a display panel according to claim 20, wherein: The preparation of the auxiliary electrode comprises: forming a light absorbing layer on a transparent substrate; forming a light-heat conducting layer on a side of the light-absorbing layer away from the transparent substrate; forming the auxiliary electrode film layer on a side of the light-heat conductive layer away from the transparent substrate; A liquid crystal light-shielding and light-transmitting layer is disposed on a side of the transparent substrate away from the auxiliary electrode film layer; The substrate to be plated is placed on the side of the auxiliary electrode film layer away from the transparent substrate, and the substrate to be plated and the auxiliary electrode film layer are arranged opposite to each other. The evaporation light source is placed on the side of the liquid crystal light-shielding and light-transmitting layer away from the transparent substrate. The light emitted by the evaporation light source passes through the light-transmitting area in the liquid crystal light-shielding and light-transmitting layer, so that the auxiliary electrode film layer corresponding to the light-transmitting area evaporates and is evaporated to the corresponding area of ​​the substrate to be plated.

Images