Multilevel inverter
The multilevel inverter incorporates a bootstrap circuit with capacitors and diodes to reduce switching losses by optimizing charging and discharging, addressing the inefficiencies in existing designs and improving efficiency.
WO2025004696A1PCT designated stage expired Publication Date: 2025-01-02PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
Patent Information
- Application Number
- PCT/JP2024/020138
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-27
- Filing Date
- 2024-06-03
- Publication Date
- 2025-01-02
AI Technical Summary
Technical Problem
The existing multilevel neutral point clamp type inverter experiences significant switching losses in its switching elements, which affect efficiency.
Method used
A multilevel inverter design incorporating a bootstrap circuit with capacitors and diodes connected in parallel to gate drivers, allowing for controlled charging and discharging to optimize switching states and reduce switching losses, along with a control unit that manages the switching elements to minimize energy wastage.
Benefits of technology
The solution effectively reduces switching losses by optimizing the charging and discharging of capacitors and managing switching states, enhancing the overall efficiency of the multilevel inverter.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure JP2024020138_02012025_PF_FP_ABST
Abstract
The present invention reduces switching loss. A control unit (60) of this multilevel inverter (100) has the function of performing an initial charge control for initially charging a first capacitor (C17), a second capacitor (C27) and a third capacitor (C37) at startup. During the initial charge control, the control unit (60) performs a first control for turning on only a third switching element (Q3) and a fourth switching element (Q4) after turning on only the fourth switching element (Q4), or a second control for turning on only the third switching element (Q3) and the fourth switching element (Q4), and thereafter, alternatingly repeats a third control for turning on only the second switching element (Q2) and the third switching element (Q3), and a fourth control for turning on only the third switching element (Q3) and the fourth switching element (Q4).
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Citation Information
Patent Citations
Switching element drive circuit of three-level neutral point clamped type inverter
JP2018133876A
Semiconductor switching element drive circuit and multi-level power converter
JP2020182338A
Device for avoiding hard switching in resonant converter and related method
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WO2024053452A1
Multi-level inverter
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