Film structure, solar cell, photovoltaic module and electric device

Abstract

A film structure, a solar cell and a photovoltaic module. The film structure comprises a first transparent conductive layer and a second transparent conductive layer which are sequentially stacked, wherein the first transparent conductive layer comprises IWO; and the indium doping proportion of the second transparent conductive layer is greater than 97%, and the thickness of the second transparent conductive layer is 50-60 nm.

Description

Film structures, solar cells, photovoltaic modules and electrical devices

[0001] Related applications

[0002] This application claims priority to Chinese patent application number 2023111644834, filed on September 8, 2023, entitled “Membrane structure, solar cell, photovoltaic module and electrical device,” the entire text of which is hereby incorporated by reference. Technical Field

[0003] The present application relates to the field of photovoltaic technology, and in particular to a film structure, a solar cell, a photovoltaic module, and an electrical device. Background Art

[0004] With the development of photovoltaic technology, solar cells, with their dual-sided power generation and simple structure, have gradually come into the public eye. In solar cells, the ITO (Indium Tin Oxide) transparent conductive layer is a key film structure that improves solar cell performance.

[0005] However, indium is a rare element with a small natural storage amount, which makes ITO expensive. Providing an ITO transparent conductive layer on both sides of a single-crystal silicon wafer further increases the amount of indium used. In addition, due to the single structure of the existing solar cell film layer, it is impossible to effectively improve the photoelectric conversion efficiency. Therefore, it is difficult for the above-mentioned solar cells to achieve low indium content and high photoelectric conversion efficiency at the same time.

[0006] Summary of the Invention

[0007] In a first aspect, the present application provides a film structure, which includes a first transparent conductive layer and a second transparent conductive layer stacked in sequence, wherein the first transparent conductive layer includes an IWO material, the indium doping ratio of the second transparent conductive layer is greater than 97%, and the thickness of the second transparent conductive layer is 50nm to 60nm.

[0008] In one embodiment, the second transparent conductive layer includes indium oxide material and tin oxide material, and the mass ratio of the indium oxide in the second transparent conductive layer is greater than 1%.

[0009] In one embodiment, the thickness of the first transparent conductive layer is 2 nm to 3 nm.

[0010] In a second aspect, the present application further provides a solar cell, comprising:

[0011] substrate silicon wafer;

[0012] a first doped crystalline silicon layer, wherein the first doped crystalline silicon layer is provided on the front surface of the substrate silicon wafer;

[0013] a second doped crystalline silicon layer, wherein the second doped crystalline silicon layer is provided on the back side of the substrate silicon wafer;

[0014] a first film layer structure and a second film layer structure, wherein the first film layer structure is the film layer structure as described in the first aspect, the second film layer structure includes a third transparent conductive layer, the indium doping ratio of the third transparent conductive layer is greater than 97%, one of the first film layer structure and the second film layer structure is disposed on a side of the first doped crystalline silicon layer facing away from the substrate silicon wafer, and the other is disposed on a side of the second doped crystalline silicon layer facing away from the substrate silicon wafer; and

[0015] An electrode is in ohmic contact with at least one of the first membrane layer structure and the second membrane layer structure.

[0016] In one embodiment, the substrate silicon wafer is an N-type silicon wafer, the first doped crystalline silicon layer is an N-type microcrystalline silicon layer, the second doped crystalline silicon layer is a P-type microcrystalline silicon layer, and the solar cell includes:

[0017] N-type silicon wafer;

[0018] A first intrinsic layer and an N-type microcrystalline silicon layer are sequentially stacked on the front surface of the N-type silicon wafer;

[0019] A second intrinsic layer and a P-type microcrystalline silicon layer are sequentially stacked on the back side of the N-type silicon wafer;

[0020] a first film layer structure and a second film layer structure, wherein one of the first film layer structure and the second film layer structure is disposed on a side of the N-type microcrystalline silicon layer facing away from the N-type silicon wafer, and the other is disposed on a side of the P-type microcrystalline silicon layer facing away from the N-type silicon wafer; and

[0021] An electrode is in ohmic contact with at least one of the first membrane layer structure and the second membrane layer structure.

[0022] In one embodiment, when the first film layer structure is provided on the side of the N-type microcrystalline silicon layer facing away from the N-type silicon wafer, the second transparent conductive layer is provided on the side of the N-type microcrystalline silicon layer facing away from the N-type silicon wafer, and the second film layer structure includes a third transparent conductive layer, a fourth transparent conductive layer and a fifth transparent conductive layer stacked in sequence on the side of the P-type microcrystalline silicon layer facing away from the N-type silicon wafer, the fifth transparent conductive layer is in ohmic contact with the electrode, the third transparent conductive layer includes VTTO material, the fourth transparent conductive layer includes FTO material and AZO material, and the fifth transparent conductive layer includes ITO material.

[0023] In one embodiment, the thickness of the third transparent conductive layer is 10 nm to 15 nm.

[0024] In one embodiment, the thickness of the fourth transparent conductive layer is 55 nm to 75 nm.

[0025] In one embodiment, the thickness of the fifth transparent conductive layer is 20 nm to 30 nm.

[0026] In one embodiment, the fourth transparent conductive layer includes a first sublayer, a second sublayer and a third sublayer stacked in sequence, the first sublayer is arranged on the side of the third transparent conductive layer away from the N-type silicon wafer, the first sublayer includes FTO material, the second sublayer includes FTO material and AZO material, and the third sublayer includes AZO material.

[0027] In one embodiment, the second sub-layer is prepared by simultaneous magnetron sputtering of an FTO target and an AZO target.

[0028] In one embodiment, the thickness of the second sub-layer is 3 nm to 7 nm.

[0029] In one embodiment, the second film layer structure further includes a sixth transparent conductive layer, which is arranged on a side of the fifth transparent conductive layer facing away from the N-type silicon wafer. The electrode penetrates the sixth transparent conductive layer and makes ohmic contact with the fifth transparent conductive layer. The indium doping ratio of the sixth transparent conductive layer is greater than 97%, and the thickness of the sixth transparent conductive layer is 10 nm to 25 nm.

[0030] In one embodiment, the solar cell further includes a passivation layer, which is provided on a side of the first transparent conductive layer away from the N-type silicon wafer. The passivation layer is a SiO2 layer or a SiN layer, and has a thickness of 35 nm to 50 nm.

[0031] In one embodiment, the first film layer structure further includes a seventh transparent conductive layer, the seventh transparent conductive layer is provided on a side of the first transparent conductive layer away from the N-type silicon wafer, and the seventh transparent conductive layer includes an ITO material;

[0032] The electrodes include a first electrode and a second electrode, the first electrode is in ohmic contact with the fifth transparent conductive layer, and the second electrode is in ohmic contact with the seventh transparent conductive layer.

[0033] In one embodiment, when the first film layer structure is arranged on the side of the P-type microcrystalline silicon layer facing away from the N-type silicon wafer, the first film layer structure also includes an eighth transparent conductive layer, and the eighth transparent conductive layer is arranged on the side of the first transparent conductive layer facing away from the N-type silicon wafer. The eighth transparent conductive layer includes ITO material, and the electrode is in ohmic contact with the eighth transparent conductive layer.

[0034] In one embodiment, the second film layer structure includes a fourth transparent conductive layer and a third transparent conductive layer sequentially stacked on a side of the N-type microcrystalline silicon layer facing away from the N-type silicon wafer, and the fourth transparent conductive layer includes FTO material and AZO material.

[0035] In one embodiment, the fourth transparent conductive layer includes a third sublayer, a second sublayer and a first sublayer stacked in sequence, the third sublayer is arranged on the side of the N-type microcrystalline silicon layer away from the N-type silicon wafer, the third sublayer includes AZO material, the second sublayer includes FTO material and AZO material, and the first sublayer includes FTO material.

[0036] In a third aspect, the present application further provides a photovoltaic module, wherein the photovoltaic module includes a solar cell, and the solar cell is the solar cell as described in the second aspect.

[0037] In a fourth aspect, the present application further provides an electrical device, which includes a photovoltaic component, and the photovoltaic component is the photovoltaic component described in the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the disclosed drawings without any creative work.

[0039] FIG1 is a schematic structural diagram of a first solar cell according to one or more embodiments.

[0040] FIG2 is a schematic structural diagram of a second solar cell according to one or more embodiments.

[0041] FIG3 is a schematic structural diagram of a third solar cell according to one or more embodiments.

[0042] Explanation of the accompanying symbols: 100, solar cell; 1, N-type silicon wafer; 2, first intrinsic layer; 3, N-type microcrystalline silicon layer; 4, second intrinsic layer; 5, P-type microcrystalline silicon layer; 6, first film layer structure; 61, first transparent conductive layer; 62, second transparent conductive layer; 63, seventh transparent conductive layer; 64, eighth transparent conductive layer; 71, third transparent conductive layer; 72, fourth transparent conductive layer; 721, first sublayer; 722, second sublayer, 723, third sublayer; 73, fifth transparent conductive layer; 74, sixth transparent conductive layer; 8, electrode; 81, first electrode; 82, second electrode; 9, passivation layer. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0044] Where the terms "first," "second," "third," through "eighth" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include at least one of such features. In the description of this application, where the term "plurality" appears, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0045] In this application, unless otherwise specified or limited, the terms "ohmic contact," "stack," and "disposed on" should be interpreted broadly. For example, ohmic contact can be direct or indirect through an intermediary, and stacking can be direct or stacking through an intermediary, unless otherwise specified. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0046] The technical solution of the present invention will be described in detail below with reference to some embodiments:

[0047] Heterojunction solar cells primarily consist of depositing an intrinsic layer, a doped microcrystalline silicon layer, an ITO (Indium Tin Oxide) transparent conductive layer, and printed electrodes on both sides of a single-crystal silicon wafer. The ITO transparent conductive layer is a key layer in the copper electroplating step of electrode production. However, the ITO transparent conductive layer requires a high amount of the expensive element indium, making it difficult to reduce production costs. Furthermore, the relatively simple film structure of related heterojunction solar cells makes it difficult to achieve improved overall photovoltaic performance.

[0048] Based on this, in the first aspect, the present application provides a film structure, which includes a first transparent conductive layer and a second transparent conductive layer stacked in sequence, the first transparent conductive layer includes an IWO material, the second transparent conductive layer includes a VTTO material, and the thickness of the second transparent conductive layer is 50nm to 60nm. The indium doping ratio of the second transparent conductive layer is greater than 97%, and the indium doping ratio refers to the mass ratio of indium oxide to the second transparent conductive layer. The second transparent conductive layer may also be doped with transition metal elements such as molybdenum or metal elements such as tin. The film quality is relatively higher, which can improve the carrier mobility and improve the interface contact of the film layer, thereby achieving effective contact with the first transparent conductive layer. The first transparent conductive layer includes an IWO material. The IWO material can provide a high work function, which can make up for the defect of insufficient long-wave absorption of a single film structure. Combined with the high carrier mobility of the second transparent conductive layer, the two can achieve a better light absorption effect. Since the second transparent conductive layer is superimposed on the first transparent conductive layer, the comprehensive performance of the two is improved, so the second transparent conductive layer can be thinned and its thickness can be controlled to 50nm to 60nm, which is much smaller than the thickness of the traditional ITO transparent conductive layer of nearly 100nm. The total indium content is lower than that of the traditional ITO transparent conductive layer, which can reduce the use of indium elements, achieve cost reduction and efficiency improvement, and improve the photoelectric conversion efficiency while reducing indium.

[0049] For example, the indium doping ratio may be 97%, 97.2%, 97.5%, 99.7%, 98%, 98.2%, 98.5%, 98.7%, 99%, 99.2%, 99.5%, 99.7%, etc. In some embodiments, the second transparent conductive layer includes an indium oxide material and a tin oxide material, and the mass ratio of indium oxide to the second transparent conductive layer is greater than 99%, which can enable the second transparent conductive layer to obtain a higher film quality.

[0050] The IWO, FTO, AZO, and ITO materials used in the technical solution of this application can all be purchased commercially. Among them, IWO is tungsten-doped indium oxide, FTO is fluorine-doped tin oxide, AZO is aluminum-doped zinc oxide, and ITO is a combination of indium oxide and tin, where the mass ratio of indium oxide to tin is 97:3. Although some of these materials contain the same indium element, the differences in doping elements, element ratios, lattice positions, and crystal structures result in significant differences in the final material properties.

[0051] Related technologies often reduce costs by improving the manufacturing process of solar cells 100. This application uses a second transparent conductive layer with a higher indium doping ratio. However, through the specific film layer position and film layer structure, the overall performance of the solar cell 100 can be greatly improved. It has also been found that by thinning the film layer without affecting the photovoltaic performance, the amount of indium used in the entire solar cell can be reduced. The materials selected in this application can take into account the bonding of the film layers and can also better match the manufacturing processes of the transparent conductive layer, intrinsic layer, and doped crystalline silicon layer, thereby achieving cost reduction and efficiency improvement.

[0052] Illustratively, the thickness of the second transparent conductive layer may be any value within the above range, for example, 50 nm, 51 nm, 52 nm, 53 nm, 54 nm, 55 nm, 56 nm, 57 nm, 58 nm, 59 nm, 60 nm, etc.

[0053] In some embodiments, since the IWO material has high long-wave transmittance and is more sensitive to changes in film thickness, setting the thickness of the first transparent conductive layer to 2nm to 3nm can capture more long waves and provide a shorter migration channel to further assist carrier migration. In addition, since the thickness of the first transparent conductive layer is reduced to 2nm to 3nm, the indium content is further reduced. On the basis of improving the photoelectric conversion efficiency of the solar cell, it can also further achieve indium reduction.

[0054] Illustratively, the thickness of the first transparent conductive layer may be any value within the above range, for example, 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, 2.5 nm, 2.6 nm, 2.7 nm, 2.8 nm, 2.9 nm, 3.0 nm, etc.

[0055] In a second aspect, the present application further provides a solar cell, comprising:

[0056] substrate silicon wafer;

[0057] A first doped crystalline silicon layer, the first doped crystalline silicon layer is provided on the front surface of the substrate silicon wafer;

[0058] a second doped crystalline silicon layer, the second doped crystalline silicon layer being arranged on the back side of the substrate silicon wafer;

[0059] a first film layer structure and a second film layer structure, wherein the first film layer structure is the film layer structure of the first aspect, the second film layer structure includes a third transparent conductive layer, the indium doping ratio of the third transparent conductive layer is greater than 97%, one of the first film layer structure and the second film layer structure is disposed on a side of the first doped crystalline silicon layer facing away from the substrate silicon wafer, and the other is disposed on a side of the second doped crystalline silicon layer facing away from the substrate silicon wafer; and

[0060] The electrode is in ohmic contact with at least one of the first film layer structure and the second film layer structure.

[0061] In this embodiment, the solar cell may be a heterojunction solar cell, a back-contact solar cell, or the like. The substrate silicon wafer may be an N-type silicon wafer or a P-type silicon wafer. The doped crystalline silicon layer may be an N-type crystalline silicon layer or a P-type crystalline silicon layer, wherein the N-type crystalline silicon layer may be an N-type microcrystalline silicon layer or an N-type amorphous silicon layer, and the P-type crystalline silicon layer may be a P-type microcrystalline silicon layer or a P-type amorphous silicon layer. This embodiment does not limit the types of the substrate silicon wafer, the first doped crystalline silicon layer, and the second doped crystalline silicon layer; these types may be selected based on the type of solar cell.

[0062] In this embodiment, the front surface may be the light incident surface or the backlight surface of the solar cell, and correspondingly, the back surface may be the backlight surface or the light incident surface of the solar cell.

[0063] In some embodiments, a second transparent conductive layer is disposed on the side of the first doped crystalline silicon layer facing away from the substrate silicon wafer, while a third transparent conductive layer is disposed on the side of the second doped crystalline silicon layer facing away from the substrate silicon wafer. The indium doping ratio of the third transparent conductive layer is greater than 99%. Thus, the surfaces of the first doped crystalline silicon layer and the second doped crystalline silicon layer are both provided with the second and third transparent conductive layers with high indium doping levels. The first and second doped crystalline silicon layers can significantly improve the surface passivation of the silicon wafer and increase the open-circuit voltage. The high indium content of the second and third transparent conductive layers can enhance the quantum mechanical effect of electrons in the first and second doped crystalline silicon layers in direct contact with them, allowing more electrons to tunnel through them. This allows more electrical energy to be diverted and converted when an electric field is formed at the PN junction, resulting in better passivation, anti-reflection properties, and conductivity. The second and third transparent conductive layers have higher film quality and superior structural stability, effectively protecting the first and second doped crystalline silicon layers in contact with them during subsequent photolithography processes, reducing film damage and effectively improving the anti-attenuation performance of the solar cell.

[0064] In some embodiments, the second transparent conductive layer and the third transparent conductive layer are both disposed on the side of the doped microcrystalline silicon layer facing away from the substrate silicon wafer. Since the manufacturing process of the doped microcrystalline silicon layer is more compatible with the manufacturing process of the transparent conductive layer, a higher photoelectric conversion efficiency can be achieved.

[0065] Heterojunction solar cells using the film structure of this application have more excellent photoelectric performance. The following will further introduce the technical solution of this application in conjunction with heterojunction solar cells:

[0066] Referring to Figures 1 to 3 , in some embodiments, the heterojunction solar cell 100 includes: an N-type silicon wafer 1, a first intrinsic layer 2, an N-type microcrystalline silicon layer 3, a second intrinsic layer 4, a P-type microcrystalline silicon layer 5, a first film structure 6, a second film structure (not shown), and an electrode 8. The first intrinsic layer 2 and the N-type microcrystalline silicon layer 3 are sequentially stacked on the light-incident side of the N-type silicon wafer 1; the second intrinsic layer 4 and the P-type microcrystalline silicon layer 5 are sequentially stacked on the light-reflecting side of the N-type silicon wafer 1; the first film structure 6 is a film structure as described in the first aspect; one of the first film structure 6 and the second film structure is disposed on the side of the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1, and the other is disposed on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1; and the electrode 8 is in ohmic contact with at least one of the first film structure 6 and the second film structure 7.

[0067] The stacking relationship between the first transparent conductive layer 61 and the second transparent conductive layer 62 can be as follows: Referring to Figures 1 and 2 , when the first film structure 6 is disposed on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1, the second transparent conductive layer 62 is disposed between the N-type microcrystalline layer 3 and the first transparent conductive layer 61, or the first transparent conductive layer 61 is disposed between the N-type microcrystalline layer 3 and the second transparent conductive layer 62. Referring to Figure 3 , when the first film structure 6 is disposed on the side of the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1, the second transparent conductive layer 62 is disposed between the P-type microcrystalline silicon layer 5 and the first transparent conductive layer 61, or the first transparent conductive layer 61 is disposed between the P-type microcrystalline silicon layer 5 and the second transparent conductive layer 62.

[0068] In some embodiments, referring to Figures 1 to 3, the N-type microcrystalline silicon layer 3 and the P-type microcrystalline silicon layer 5 are also doped with oxygen elements, which can further increase the band gap width, increase the spectral response, increase the current density, improve the battery conversion efficiency, and can better cooperate with other film layers to achieve higher open circuit voltage and carrier mobility.

[0069] Please refer to Figure 1, which shows a first heterojunction solar cell 100 provided in some embodiments. The heterojunction solar cell 100 includes: an N-type silicon wafer 1, a first intrinsic layer 2, an N-type microcrystalline silicon layer 3, a second intrinsic layer 4, a P-type microcrystalline silicon layer 5, a first film layer structure 6, a second film layer structure 7 and an electrode 8. Among them, the first intrinsic layer 2 and the N-type microcrystalline silicon layer 3 are stacked in sequence on the light incident surface of the N-type silicon wafer 1; the second intrinsic layer 4 and the P-type microcrystalline silicon layer 5 are stacked in sequence on the backlight surface of the N-type silicon wafer 1; the first film layer structure 6 includes a second transparent conductive layer 62 and a first transparent conductive layer 61 stacked in sequence on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1, the indium doping ratio of the second transparent conductive layer 62 is greater than 97%, and the first transparent conductive layer 61 comprises an IWO material; the second film layer structure includes a third transparent conductive layer 71, a fourth transparent conductive layer 72, and a fifth transparent conductive layer 73 stacked in sequence on the side of the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1, the indium doping ratio of the third transparent conductive layer 71 is greater than 97%, the fourth transparent conductive layer 72 comprises an FTO material and an AZO material, and the fifth transparent conductive layer 73 comprises an ITO material; the electrode 8 is in ohmic contact with the fifth transparent conductive layer 73.

[0070] It should be noted that the heterojunction solar cell 100 in Figure 1 has a single-sided gridline structure. The first film layer structure 6 disposed on the light-incident surface can already significantly improve the photovoltaic performance of the front side of the solar cell 100. Therefore, the gridline electrode 8 can be omitted from the light-incident surface to further increase the light-incident area and improve the front-side illumination efficiency.

[0071] On the side of the N-type microcrystalline silicon layer 3 and the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1, a second transparent conductive layer 62 and a third transparent conductive layer 71 are simultaneously provided. This can improve the bonding of the film layers on both sides, improve the performance of the N-type microcrystalline silicon layer 3 and the P-type microcrystalline silicon layer 5, and enable the solar cell 100 to have higher carrier mobility and open circuit voltage.

[0072] In some embodiments, the thickness of the third transparent conductive layer 71 is 10 nm to 15 nm. The third transparent conductive layer 71 is thinned on the basis of improving the above-mentioned performance, and can further achieve indium reduction.

[0073] Illustratively, the third transparent conductive layer 71 may be any point value within the above range, for example, 10 nm, 10.5 nm, 11 nm, 11.5 nm, 12 nm, 12.5 nm, 13 nm, 13.5 nm, 14 nm, 14.5 nm, 15 nm, etc.

[0074] In some embodiments, the FTO and AZO materials in the fourth transparent conductive layer 72 are inexpensive and environmentally friendly, making them suitable for cost reduction in solar cells 100. During the preparation of heterojunction solar cells 100, the permeation of a reducing atmosphere can reduce the tin oxide in the FTO material to a low-valent state of stannous oxide or elemental tin, accelerating the deterioration of the photoelectric performance of the FTO material. The zinc oxide in the AZO material has a stable crystal structure and high thermal and chemical stability. Combining AZO with the FTO material can utilize the stable AZO film layer to reduce the permeation of FTO, thereby improving the photoelectric performance to achieve a low resistivity similar to that of ITO materials. This can further reduce the use of indium and further achieve indium reduction.

[0075] Furthermore, during the composite process of AZO and FTO materials, light reflection loss will inevitably occur, resulting in reduced light transmittance. In related technologies, other elements such as Ag are usually doped to solve this problem. This application solves this problem by optimizing the film structure of the fourth transparent conductive layer 72.

[0076] In some embodiments, the fourth transparent conductive layer 72 includes a first sublayer 721, a second sublayer 722, and a third sublayer 723 stacked in sequence. The first sublayer 721 is disposed on the side of the third transparent conductive layer 71 facing away from the N-type silicon wafer 1. The first sublayer 721 comprises an FTO material, the second sublayer 722 comprises an FTO material and an AZO material, and the third sublayer 723 comprises an AZO material. Providing the second sublayer 722, which is a mixture of FTO and AZO materials, between the first sublayer 721 and the third sublayer 723 can improve film contact, enhance current transport, and reduce light reflection losses.

[0077] In some embodiments, the second sub-layer 722 can be prepared by mixing using methods such as spray pyrolysis, sol-gel method, chemical vapor deposition method, and magnetron sputtering method.

[0078] In some embodiments, the second sublayer 722 is prepared by simultaneous magnetron sputtering of FTO target material and AZO target material, thereby increasing the atomic permeability of the FTO material and the AZO material, so that the first sublayer 721 and the third sublayer 723 can better complement each other in properties, thereby improving light transmittance and reducing light reflection.

[0079] In some embodiments, the fourth transparent conductive layer 72 may be thinned to further reduce indium content, and the thickness of the fourth transparent conductive layer 72 may be 55 nm to 75 nm. For example, the thickness of the fourth transparent conductive layer 72 may be any value within the aforementioned range, such as 55 nm, 57 nm, 59 nm, 61 nm, 63 nm, 65 nm, 67 nm, 69 nm, 71 nm, 73 nm, 75 nm, etc.

[0080] In some embodiments, the thickness of the second sublayer 722 is 3 nm to 7 nm, thereby improving the contact between the first sublayer 721 and the third sublayer 723 and increasing carrier mobility. For example, the thickness of the second sublayer 722 can be any value within the above range, such as 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, etc.

[0081] During the electrode manufacturing process, the electrode is prone to falling off, causing the solar cell to fail. In order to improve the contact and ductility between the electrode and the film layer, a fifth transparent conductive layer 73 including ITO material is provided to make ohmic contact with the electrode 8, which can reduce the occurrence of phenomena such as electrode falling off.

[0082] In some embodiments, the fifth transparent conductive layer 73 is thinned to a thickness of 20 nm to 30 nm, which can reduce the use of indium while ensuring contact with the electrode 8. For example, the thickness of the fifth transparent conductive layer 73 can be any value within the above range, such as 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, 25 nm, 26 nm, 27 nm, 28 nm, 29 nm, 30 nm, etc.

[0083] Although the ITO material in the fifth transparent conductive layer 73 can improve contact with the electrode 8, ITO is difficult to etch and difficult to groove. In some embodiments, a sixth transparent conductive layer 74 with an indium doping ratio greater than 97% is provided. This sixth transparent conductive layer 74 is used to groove the gate lines, allowing the electrode fabrication process to proceed within the grooves. This improves electrode contact while also ensuring etching resistance. Furthermore, it enhances film matching and short-circuit current. In some embodiments, the indium doping ratio of the sixth transparent conductive layer 74 is greater than 99%.

[0084] In some embodiments, the sixth transparent conductive layer 74 is further thinned to a thickness of 10 nm to 25 nm. For example, the thickness of the sixth transparent conductive layer 74 can be any value within the aforementioned range, such as 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, 25 nm, etc.

[0085] In some embodiments, the solar cell 100 further includes a passivation layer 9. The passivation layer 9 is disposed on the side of the first transparent conductive layer 61 facing away from the N-type silicon wafer. The passivation layer 9 is a SiO2 layer or a SiN layer. The thickness of the passivation layer 9 is 35 nm to 50 nm. Providing the passivation layer 9 on the front light incident surface can provide a better passivation effect. For example, the thickness of the passivation layer 9 can be any value within the above range, such as 35 nm, 38 nm, 40 nm, 42 nm, 44 nm, 46 nm, 48 nm, 50 nm, etc.

[0086] Please refer to FIG2 , which shows another heterojunction solar cell 100 provided in some embodiments. The heterojunction solar cell 100 includes: an N-type silicon wafer 1, a first intrinsic layer 2, an N-type microcrystalline silicon layer 3, a second intrinsic layer 4, a P-type microcrystalline silicon layer 5, a first film structure 6, a second film structure, and an electrode 8. The first intrinsic layer 2 and the N-type microcrystalline silicon layer 3 are sequentially stacked on the light incident side of the N-type silicon wafer 1; the second intrinsic layer 4 and the P-type microcrystalline silicon layer 5 are sequentially stacked on the backlight side of the N-type silicon wafer 1; the first film structure 6 includes a second transparent conductive layer 62, a first transparent conductive layer 61, and a seventh transparent conductive layer 63, which are sequentially stacked on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1. The indium doping ratio of the second transparent conductive layer 62 is greater than 97%, the first transparent conductive layer 61 includes an IWO material, and the seventh transparent conductive layer 63 includes an ITO material; the second film structure 6 includes a second transparent conductive layer 62, a first transparent conductive layer 61, and a seventh transparent conductive layer 63, which are sequentially stacked on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1. The layer structure includes a third transparent conductive layer 71, a fourth transparent conductive layer 72, and a fifth transparent conductive layer 73 stacked in sequence on the side of the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1. The indium doping ratio of the third transparent conductive layer 71 is greater than 97%, the fourth transparent conductive layer 72 includes FTO material and AZO material, and the fifth transparent conductive layer 73 includes ITO material; the electrode 8 includes a first electrode 81 and a second electrode 82. The first electrode 81 is in ohmic contact with the fifth transparent conductive layer 73, and the second electrode 82 is in ohmic contact with the seventh transparent conductive layer 63.

[0087] It should be noted that some embodiments provide a second heterojunction solar cell 100 with a double-sided gridline structure. In the second solar cell 100, the seventh transparent conductive layer 63 and the fifth transparent conductive layer 73 have similar functions. Similarly, the fourth transparent conductive layer 72 of the second solar cell 100 can have the same structure as the fourth transparent conductive layer 72 of the first solar cell 100, both including a first sublayer 721, a second sublayer 722, and a third sublayer 723.

[0088] Please refer to Figure 3, which shows another heterojunction solar cell 100 provided in some embodiments of the present application. The solar cell 100 includes: an N-type silicon wafer 1, a first intrinsic layer 2, an N-type microcrystalline silicon layer 3, a second intrinsic layer 4, a P-type microcrystalline silicon layer 5, a first film layer structure 6, a second film layer structure and an electrode 8. Among them, the first intrinsic layer 2 and the N-type microcrystalline silicon layer 3 are stacked in sequence on the light incident side of the N-type silicon wafer 1; the second intrinsic layer 4 and the P-type microcrystalline silicon layer 5 are stacked in sequence on the backlight side of the N-type silicon wafer 1; the first film layer structure 6 includes a second transparent conductive layer 62, a first transparent conductive layer 61, and an eighth transparent conductive layer 64, which are stacked in sequence on the side of the P-type microcrystalline silicon layer 5 facing away from the N-type silicon wafer 1. The indium doping ratio of the second transparent conductive layer 62 is greater than 97%, the first transparent conductive layer 61 includes an IWO material, and the eighth transparent conductive layer 64 includes an ITO material; the second film layer structure includes a fourth transparent conductive layer 72 and a third transparent conductive layer 71, which are stacked in sequence on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1. The fourth transparent conductive layer 72 includes an FTO material and an AZO material, and the indium doping ratio of the third transparent conductive layer 71 is greater than 97%; and the electrode 8 is in ohmic contact with the eighth transparent conductive layer 64.

[0089] It should be noted that the third type of solar cell 100 provided in some embodiments has a single-sided gridline structure. Unlike the first two types of solar cells 100, the first film structure 6 of the third type of solar cell 100 is disposed on one side of the P-type microcrystalline silicon layer 5, and the second film structure 7 is disposed on one side of the N-type microcrystalline silicon layer 3. In the third type of solar cell 100, the eighth transparent conductive layer 64 functions similarly to the fifth transparent conductive layer 73 of the first two types of solar cells 100.

[0090] Furthermore, the fourth transparent conductive layer 72 in the third solar cell includes a third sublayer 723, a second sublayer 722 and a first sublayer 721 stacked in sequence. The third sublayer 723 is arranged on the side of the N-type microcrystalline silicon layer 3 facing away from the N-type silicon wafer 1. The third sublayer 723 includes AZO material, the second sublayer 722 includes FTO material and AZO material, and the first sublayer 721 includes FTO material.

[0091] The solar cells in the embodiments of the present application can be deposited by a vapor deposition vacuum coating method, and the deposition order of each film layer is not specifically limited.

[0092] In a third aspect, the present application further provides a photovoltaic module, which includes a solar cell 100, which may be the solar cell 100 of the second aspect. The photovoltaic module is obtained by connecting the solar cells 100 in series or in parallel.

[0093] In a fourth aspect, the present application further provides an electrical device comprising a photovoltaic module, wherein the photovoltaic module is the photovoltaic module of the third aspect. The electrical device can be used in power transmission and distribution networks, building exterior walls, skylights and roofs, public transportation facilities, and the like.

[0094] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0095] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A film structure, characterized in that: The film structure comprises a first transparent conductive layer and a second transparent conductive layer stacked in sequence, the first transparent conductive layer comprises IWO material, the indium doping ratio of the second transparent conductive layer is greater than 97%, and the thickness of the second transparent conductive layer is 50nm-60nm.

2. The film structure according to claim 1, characterized in that: The second transparent conductive layer includes indium oxide material and tin oxide material, and the mass ratio of the indium oxide to the second transparent conductive layer is greater than 99%.

3. The film structure according to claim 1 or 2, characterized in that: The thickness of the first transparent conductive layer is 2nm-3nm.

4. A solar cell, characterized in that: The solar cell comprises: Substrate silicon wafer; A first doped crystalline silicon layer, wherein the first doped crystalline silicon layer is disposed on the front side of the substrate silicon wafer; A second doped crystalline silicon layer, wherein the second doped crystalline silicon layer is disposed on the back side of the substrate silicon wafer; a first film layer structure and a second film layer structure, wherein the first film layer structure is the film layer structure according to any one of claims 1 to 3, the second film layer structure comprises a third transparent conductive layer, the indium doping ratio of the third transparent conductive layer is greater than 97%, one of the first film layer structure and the second film layer structure is arranged on a side of the first doped crystalline silicon layer away from the substrate silicon wafer, and the other is arranged on a side of the second doped crystalline silicon layer away from the substrate silicon wafer; and An electrode is in ohmic contact with at least one of the first film layer structure and the second film layer structure.

5. The solar cell according to claim 4, characterized in that: The substrate silicon wafer is an N-type silicon wafer, the first doped crystalline silicon layer is an N-type microcrystalline silicon layer, the second doped crystalline silicon layer is a P-type microcrystalline silicon layer, and the solar cell comprises: N-type silicon wafer; A first intrinsic layer and an N-type microcrystalline silicon layer are sequentially stacked on the front side of the N-type silicon wafer; A second intrinsic layer and a P-type microcrystalline silicon layer are sequentially stacked on the back side of the N-type silicon wafer; a first film layer structure and a second film layer structure, wherein one of the first film layer structure and the second film layer structure is disposed on a side of the N-type microcrystalline silicon layer away from the N-type silicon wafer, and the other is disposed on a side of the P-type microcrystalline silicon layer away from the N-type silicon wafer; and An electrode is in ohmic contact with at least one of the first film layer structure and the second film layer structure.

6. The solar cell according to claim 5, characterized in that: When the first film layer structure is arranged on the side of the N-type microcrystalline silicon layer away from the N-type silicon wafer, the second transparent conductive layer is arranged between the N-type microcrystalline silicon layer and the first transparent conductive layer, and the second film layer structure also includes a fourth transparent conductive layer and a fifth transparent conductive layer stacked in sequence on the side of the P-type microcrystalline silicon layer away from the N-type silicon wafer, the fifth transparent conductive layer is in ohmic contact with the electrode, the fourth transparent conductive layer includes FTO material and AZO material, and the fifth transparent conductive layer includes ITO material.

7. The solar cell according to claim 6, characterized in that: The thickness of the third transparent conductive layer is 10 nm to 15 nm.

8. The solar cell according to claim 6, characterized in that: The thickness of the fourth transparent conductive layer is 55 nm to 75 nm.

9. The solar cell according to claim 6, characterized in that: The thickness of the fifth transparent conductive layer is 20 nm to 30 nm.

10. The solar cell according to claim 6, characterized in that: The fourth transparent conductive layer includes a first sublayer, a second sublayer and a third sublayer stacked in sequence, the first sublayer is arranged on a side of the third transparent conductive layer away from the N-type silicon wafer, the first sublayer includes FTO material, the second sublayer includes FTO material and AZO material, and the third sublayer includes AZO material.

11. The solar cell according to claim 10, characterized in that: The second sublayer is prepared by simultaneously magnetron sputtering a FTO target and an AZO target.

12. The solar cell according to claim 10, characterized in that: The thickness of the second sublayer is 3 nm to 7 nm.

13. The solar cell according to any one of claims 6 to 12, characterized in that: The second film layer structure also includes a sixth transparent conductive layer, which is arranged on a side of the fifth transparent conductive layer away from the N-type silicon wafer, and the electrode penetrates the sixth transparent conductive layer and is in ohmic contact with the fifth transparent conductive layer. The indium doping ratio of the sixth transparent conductive layer is greater than 97%, and the thickness of the sixth transparent conductive layer is 10nm to 25nm.

14. The solar cell according to any one of claims 6 to 13, characterized in that: The solar cell further comprises a passivation layer, which is arranged on a side of the first transparent conductive layer away from the N-type silicon wafer, and is a SiO2 layer or a SiN layer, and has a thickness of 35nm to 50nm.

15. The solar cell according to any one of claims 6 to 14, characterized in that: The first film layer structure further includes a seventh transparent conductive layer, the seventh transparent conductive layer is arranged on a side of the first transparent conductive layer away from the N-type silicon wafer, and the seventh transparent conductive layer includes an ITO material; The electrodes include a first electrode and a second electrode, the first electrode is in ohmic contact with the fifth transparent conductive layer, and the second electrode is in ohmic contact with the seventh transparent conductive layer.

16. The solar cell according to claim 5, characterized in that: When the first film layer structure is arranged on the side of the P-type microcrystalline silicon layer away from the N-type silicon wafer, the first film layer structure also includes an eighth transparent conductive layer, the eighth transparent conductive layer is arranged on the side of the first transparent conductive layer away from the N-type silicon wafer, the eighth transparent conductive layer includes ITO material, and the electrode is in ohmic contact with the eighth transparent conductive layer.

17. The solar cell according to claim 16, characterized in that: The second film layer structure includes a fourth transparent conductive layer and a third transparent conductive layer which are sequentially stacked on a side of the N-type microcrystalline silicon layer away from the N-type silicon wafer, and the fourth transparent conductive layer includes FTO material and AZO material.

18. The solar cell according to claim 17, characterized in that: The fourth transparent conductive layer includes a third sublayer, a second sublayer and a first sublayer stacked in sequence, the third sublayer is arranged on a side of the N-type microcrystalline silicon layer away from the N-type silicon wafer, the third sublayer includes AZO material, the second sublayer includes FTO material and AZO material, and the first sublayer includes FTO material.

19. A photovoltaic module, characterized in that: The photovoltaic module includes a solar cell, and the solar cell is the solar cell according to any one of claims 5 to 18.

20. An electrical device, characterized in that: The electrical device comprises a photovoltaic component, and the photovoltaic component is the photovoltaic component as claimed in claim 19.

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