Display driving circuit, display driving method, and display apparatus

Abstract

The present application relates to a display driving circuit, a display driving method, and a display apparatus. The display driving circuit comprises: a driving module (200), a power supply module (300), and a driving inverting module (400). The driving module (200) comprises a first driving signal output end (210), and a first part of peep-proof subpixels (131) are connected to the first driving signal output end (210); the power supply module (300) comprises a first power supply end (310) and a second power supply end (320); the driving inverting module (400) is connected to the first driving signal output end (210), the first power supply end (310), and the second power supply end (320); the driving inverting module (400) comprises a second driving signal output end (410), and a second part of peep-proof subpixels (131) are connected to the second driving signal output end (410); a signal of the second driving signal output end (410) is different from a signal of the first driving signal output end (210), so that the brightness and / or the turn-on time of the first part of peep-proof subpixels are different from those of the second part of peep-proof subpixels. In a peep-proof mode, a display panel presents an alternatively bright and dark or flashing peep-proof picture, thereby enhancing the peep-proof effect of the display panel.

Description

Display driving circuit, display driving method and display device

[0001] Related applications

[0002] This application claims priority to Chinese patent application No. 2023111346680 filed on September 5, 2023, entitled “Display driving circuit, display driving method and display device”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present application relates to the field of display, and specifically to a display driving circuit, a display driving method, and a display device. Background Art

[0004] OLED (Organic Light-Emitting Diode) display panels offer advantages such as self-luminescence, flexibility, thinness, high brightness, low power consumption, fast response, and a wide color gamut. They are widely used in electronic products such as televisions, mobile phones, and laptops. While these panels offer a wider viewing angle, providing a better visual experience, users may also desire privacy-protected displays to effectively protect trade secrets and personal privacy.

[0005] To facilitate the on / off function, some display panels have privacy-prevention pixels embedded in their pixel cells. When enabled, the light emitted by these pixels interferes with the light emitted by the display pixels when the user is looking sideways, preventing voyeurism. When the user is looking straight ahead, the light emitted by these pixels is blocked, ensuring normal display. When the privacy-prevention pixels are disabled, the display panel can display normally.

[0006] However, all the anti-peeping pixels are turned on or off at the same time. When the anti-peeping pixels are turned on, the brightness of all the anti-peeping pixels is consistent, and the anti-peeping effect of the display panel is poor. Summary of the Invention

[0007] The present application provides a display driving circuit, a display driving method and a display device to enhance the anti-peeping effect of a display panel.

[0008] The present application provides a display driver circuit for driving a display panel, wherein the display panel includes a plurality of pixel units arranged in an array, at least some of the pixel units include anti-peeping sub-pixels, and the display driver circuit includes:

[0009] A driving module comprising a first driving signal output terminal, wherein the display panel further comprises a first pixel driving circuit, and the first portion of the anti-peeping sub-pixels are connected to the first driving signal output terminal via the first pixel driving circuit;

[0010] A power supply module, comprising a first power supply terminal and a second power supply terminal, wherein a voltage of the first power supply terminal is greater than a voltage of the second power supply terminal;

[0011] A driving inverting module is connected to the first driving signal output terminal, the first power supply terminal and the second power supply terminal. The driving inverting module includes a second driving signal output terminal. The second part of the anti-peeping sub-pixels is connected to the second driving signal output terminal through the first pixel driving circuit. The signal of the second driving signal output terminal is different from the signal of the first driving signal output terminal, so that the brightness and / or turn-on time of the anti-peeping sub-pixels in the first part and the anti-peeping sub-pixels in the second part are different.

[0012] The present application also provides a display driving method, used in the display driving circuit, the display driving method comprising:

[0013] Acquire a display mode of the display panel, where the display mode includes an anti-peeping mode and a wide viewing angle mode;

[0014] When confirming that the display mode of the display panel is the anti-peeping mode, controlling the first driving signal output terminal of the driving module to output a signal, and controlling the second driving signal output terminal of the driving inversion module to output a signal, so that the brightness and / or turn-on time of the anti-peeping sub-pixels in the first part and the anti-peeping sub-pixels in the second part are different;

[0015] When it is confirmed that the display mode of the display panel is the wide viewing angle mode, the first driving signal output terminal and the second driving signal output terminal are controlled to stop outputting signals.

[0016] The present application also provides a display device, comprising:

[0017] A display panel, the display panel comprising a plurality of pixel units arranged in an array, at least some of the pixel units comprising anti-peeping sub-pixels;

[0018] The display driving circuit has a first driving signal output terminal connected to the first part of the anti-peeping sub-pixels, and a second driving signal output terminal connected to the second part of the anti-peeping sub-pixels.

[0019] The display driving circuit, display driving method, and display device disclosed in this application have the following beneficial effects:

[0020] In the present application, the driving module includes a first driving signal output terminal, a first portion of anti-peeping sub-pixels are connected to the first driving signal output terminal through a first pixel driving circuit, a power supply module includes a first power supply terminal and a second power supply terminal, the voltage of the first power supply terminal is greater than the voltage of the second power supply terminal, a driving inverting module is connected to the first driving signal output terminal, the first power supply terminal and the second power supply terminal, the driving inverting module includes a second driving signal output terminal, a second portion of anti-peeping sub-pixels are connected to the second driving signal output terminal through the first pixel driving circuit, and the signal of the second driving signal output terminal is different from the signal of the first driving signal output terminal, so that the brightness and / or turn-on time of the first portion of anti-peeping sub-pixels and the second portion of anti-peeping sub-pixels are different. In the anti-peeping mode, the display panel presents an anti-peeping picture that alternates between light and dark or flickers, thereby enhancing the anti-peeping effect of the display panel.

[0021] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by practice of the present application.

[0022] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0024] FIG1 is a schematic diagram of a display driving circuit for driving a display panel in a first embodiment of the present application.

[0025] FIG2 is a schematic structural diagram of a display panel in the first embodiment of the present application.

[0026] FIG3 is a schematic structural diagram of a display driving circuit in the first embodiment of the present application.

[0027] FIG4 is a schematic diagram of the anti-peeping principle of the display panel in the first embodiment of the present application.

[0028] FIG5 is a schematic diagram of a driving signal of an anti-peeping sub-pixel in the first embodiment of the present application.

[0029] FIG6 is a schematic structural diagram of a driving inverting module in the first embodiment of the present application.

[0030] FIG7 is a schematic diagram of the current of the second transistor in the first embodiment of the present application.

[0031] FIG8 is a schematic structural diagram of the first pixel driving circuit in the first embodiment of the present application.

[0032] FIG9 is a schematic diagram of the current of the third transistor in the first embodiment of the present application.

[0033] FIG10 is a schematic structural diagram of the second pixel driving circuit in the first embodiment of the present application.

[0034] FIG11 is a schematic diagram of a display driving circuit for driving a display panel in a second embodiment of the present application.

[0035] FIG12 is a schematic diagram of the current of the third transistor in the second embodiment of the present application.

[0036] FIG13 is a schematic diagram of a display driving method in the third embodiment of the present application.

[0037] FIG14 is a flow chart of a display driving method in the third embodiment of the present application.

[0038] FIG15 is a schematic structural diagram of the display device in the fourth embodiment of the present application.

[0039] Description of reference numerals:

[0040] 100, display panel; 110, scan line; 120, data line; 130, pixel unit; 131, anti-peeping sub-pixel; 132, display sub-pixel; 140, first pixel driving circuit; 141, third transistor; 150, second pixel driving circuit; 151, fourth transistor; 152, fifth transistor; 153, storage capacitor;

[0041] 200, driving module; 210, first driving signal output terminal; 220, control output terminal;

[0042] 300, power module; 310, first power terminal; 320, second power terminal; 330, third power terminal; 340, fourth power terminal; 350, fifth power terminal;

[0043] 400 , driving inverting module; 410 , second driving signal output terminal; 420 , first transistor; 430 , second transistor. Modes for Carrying Out the Invention

[0044] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0045] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0046] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0047] Example 1

[0048] As shown in Figures 1 to 3, the display panel 100 includes multiple rows of scan lines 110, multiple columns of data lines 120, and a plurality of pixel units 130. The pixel units 130 are arranged at the intersections of the scan lines 110 and the data lines 120. Each pixel unit 130 includes at least one display sub-pixel 132, and at least some of these pixel units 130 also include an anti-peeping sub-pixel 131. The at least one display sub-pixel 132 may include a red display sub-pixel 132 (R), a green display sub-pixel 132 (G), and a blue display sub-pixel 132 (B), to achieve RGB display. The anti-peeping sub-pixels 131 may include a yellow anti-peeping sub-pixel 131 (F), a white anti-peeping sub-pixel 131 (W), and a red anti-peeping sub-pixel 131. In other words, the color of the anti-peeping sub-pixel 131 can be the same as or different from that of the display sub-pixel 132, and the number of anti-peeping sub-pixels 131 can be one or more. This embodiment uses one anti-peeping sub-pixel 131 as an example. The display sub-pixel 132 and the anti-peeping sub-pixel 131 may both be organic light emitting diodes or light emitting diodes.

[0049] As shown in Figure 4, some or all of the pixel units 130 are provided with anti-peeping sub-pixels 131, and a light shielding unit is provided directly above the anti-peeping sub-pixels 131. The anti-peeping sub-pixels 131 can be turned on or off to switch between anti-peeping mode and wide-viewing angle mode. When the anti-peeping sub-pixels 131 are turned on, the light emitted by the anti-peeping sub-pixels 131 interferes with the light emitted by the display sub-pixels 132 when the user is looking at the side of the eye, achieving a narrow-viewing angle mode, that is, preventing peeping when looking at the side of the eye. When the user is looking straight ahead, the light emitted by the anti-peeping sub-pixels 131 is blocked by the light shielding unit, achieving a wide-viewing angle mode.

[0050] The display driver circuit includes a driver module 200, a power module 300, and a driver inverter module 400. The driver module 200 includes a first drive signal output terminal 210. The display panel 100 also includes a first pixel driver circuit 140. The first portion of the anti-peep sub-pixels 131 are connected to the first drive signal output terminal 210 via the first pixel driver circuit 140. The power module 300 includes a first power terminal 310 and a second power terminal 320. The voltage VGH at the first power terminal 310 is greater than the voltage VGL at the second power terminal 320.

[0051] The driving inverting module 400 is connected to the first driving signal output terminal 210, the first power supply terminal 310, and the second power supply terminal 320. The driving inverting module 400 includes a second driving signal output terminal 410, and the second portion of the anti-peeping sub-pixels 131 are connected to the second driving signal output terminal 410 via the first pixel driving circuit 140. The signal at the second driving signal output terminal 410 is different from the signal at the first driving signal output terminal 210, resulting in different brightness and / or on-times for the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131.

[0052] The arrangement of the first portion of the privacy protection sub-pixels 131 and the second portion of the privacy protection sub-pixels 131 can be arbitrarily configured, as long as the human eye can discern that the positions of the first portion of the privacy protection sub-pixels 131 and the second portion of the privacy protection sub-pixels 131 are different. For example, the first portion of the privacy protection sub-pixels 131 may be one or more rows of privacy protection sub-pixels 131, and the second portion of the privacy protection sub-pixels 131 may be one or more adjacent rows of privacy protection sub-pixels 131. The first portion of the privacy protection sub-pixels 131 may be a plurality of adjacent privacy protection sub-pixels 131, and the second portion of the privacy protection sub-pixels 131 may be a plurality of adjacent privacy protection sub-pixels 131 and adjacent to the first portion of the privacy protection sub-pixels 131.

[0053] When the brightness of the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131 are different, the display panel 100 will present an anti-peeping image that alternates between light and dark, enhancing the anti-peeping effect of the display panel 100. When the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131 are turned on for different periods of time, the display panel 100 will present an anti-peeping image with different areas of alternating light and dark flashing, enhancing the anti-peeping effect of the display panel 100. When the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131 have different brightnesses and different turn-on periods, the display panel 100 will present an anti-peeping image with different areas of alternating light and dark flashing, further enhancing the anti-peeping effect of the display panel 100.

[0054] The additional anti-peeping sub-pixel 131 provided in the pixel unit 130 occupies the design space of the display sub-pixel 132 . The size of the anti-peeping sub-pixel 131 is limited, and the brightness of the anti-peeping sub-pixel 131 is difficult to be very high, resulting in poor anti-peeping effect of the display panel 100 .

[0055] In this embodiment, the driver module 200 includes a first drive signal output terminal 210. The first portion of the anti-peeping sub-pixels 131 are connected to the first drive signal output terminal 210 via the first pixel driver circuit 140. The power supply module 300 includes a first power supply terminal 310 and a second power supply terminal 320. The voltage VGH of the first power supply terminal 310 is greater than the voltage VGL of the second power supply terminal 320. The driver inverter module 400 is connected to the first drive signal output terminal 210, the first power supply terminal 310, and the second power supply terminal 320. The driver inverter module 400 includes a second drive signal output terminal 410. The second portion of the anti-peeping sub-pixels 131 are connected to the second drive signal output terminal 410 via the first pixel driver circuit 140. The signal at the second drive signal output terminal 410 is different from the signal at the first drive signal output terminal 210, resulting in different brightness and / or on-times for the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131. In the anti-peeping mode, the display panel 100 presents an anti-peeping image that alternates between light and dark or flickers, thereby enhancing the anti-peeping effect of the display panel 100.

[0056] For example, as shown in FIG5 , the signal at the second drive signal output terminal 410 and the signal at the first drive signal output terminal 210 have the same frequency and opposite waveforms, resulting in different on-times for the first and second portions of the anti-peeping sub-pixels 131. The signal at the second drive signal output terminal 410 (OUT1) and the signal at the first drive signal output terminal 210 (OUT2) can both be PWM (pulse width modulation) signals. Both the signal at the second drive signal output terminal 410 and the signal at the first drive signal output terminal 210 are low-frequency signals, ensuring that the human eye can perceive a flickering anti-peeping image. For example, the signal at the second drive signal output terminal 410 and the signal at the first drive signal output terminal 210 each have a two-frame period, and a high-to-low ratio of 1. The signal at the second drive signal output terminal 410 and the signal at the first drive signal output terminal 210 have opposite waveforms. That is, when the signal at the first drive signal output terminal 210 is high, the signal at the second drive signal output terminal 410 is low, and when the signal at the first drive signal output terminal 210 is low, the signal at the second drive signal output terminal 410 is high.

[0057] The signal at the second driving signal output terminal 410 has the same frequency and opposite waveform to the signal at the first driving signal output terminal 210 , so that the display panel 100 can present an anti-peeping image with different areas flashing alternately between light and dark, which is simpler to implement.

[0058] 6 , the drive inverter module 400 includes a first transistor 420 and a second transistor 430, wherein at least the first transistor 420 is a vertical dual-gate transistor. The first connection terminal and the first control terminal of the first transistor 420 are both connected to the first power supply terminal 310, the second connection terminal of the first transistor 420 is connected to the connection node A, and the connection node A and the second control terminal of the first transistor 420 are both connected to the second drive signal output terminal 410. The first connection terminal of the second transistor 430 is connected to the connection node A, the second connection terminal of the second transistor 430 is connected to the second power supply terminal 320, and the first control terminal of the second transistor 430 is connected to the first drive signal output terminal 210.

[0059] When the driving inverting module 400 is working:

[0060] When the signal at the first driving signal output terminal 210 is a high-level signal, the second transistor 430 is turned on, and the power supply VGL of the second power supply terminal 320 can be written into the second driving signal output terminal 410. At the same time, since the first control terminal of the first transistor 420 is controlled by the power supply VGH of the first power supply terminal 310, the first transistor 420 is turned on, and the power supply VGH of the first power supply terminal 310 can be written into the second driving signal output terminal 410. Therefore, the low level of the second driving signal output terminal 410 is greater than the power supply VGL of the second power supply terminal 320 and less than the power supply VGH of the first power supply terminal 310.

[0061] When the signal at the first drive signal output terminal 210 is a low-level signal, the second transistor 430 is turned off. At the same time, since the first control terminal of the first transistor 420 is controlled by the power supply VGH of the first power supply terminal 310, the first transistor 420 is turned on, and the power supply VGH of the first power supply terminal 310 can be written into the second drive signal output terminal 410. Therefore, the high level of the second drive signal output terminal 410 is equal to the power supply VGH of the first power supply terminal 310.

[0062] The first transistor 420 and the second transistor 430 convert the signal at the first drive signal output terminal 210 into a signal with an opposite waveform and output it through the second drive signal output terminal 410 . The structure is simple and easy to implement.

[0063] In some embodiments, the width-to-length ratio of the channel of the second transistor 430 is greater than the width-to-length ratio of the channel of the first transistor 420. W is the transistor channel width, L is the transistor channel length, and the width-to-length ratio is W / L. For example, the width-to-length ratio of the channel of the second transistor 430 is greater than 10 times the width-to-length ratio of the channel of the first transistor 420.

[0064] The width-to-length ratio of the channel of the second transistor 430 is greater than that of the channel of the first transistor 420 , and the greater the difference, the closer the low level of the second driving signal output terminal 410 is to the power supply VGL of the second power supply terminal 320 .

[0065] In some embodiments, the first transistor 420 and the second transistor 430 are both vertical dual-gate transistors. The driver module 200 further includes a control output terminal 220, wherein the voltage at the control output terminal 220 is VMG, which is a variable voltage. The second control terminal of the second transistor 430 is connected to the control output terminal 220, and the control output terminal 220 is used to control the brightness of the second portion of the anti-peeping sub-pixels 131.

[0066] When the driving inverting module 400 is working:

[0067] When the signal at the first drive signal output terminal 210 is a low-level signal, the low-level signal turns off the second transistor 430. At the same time, since the first control terminal of the first transistor 420 is controlled by the power supply VGH of the first power supply terminal 310, the first transistor 420 is turned on, and the power supply VGH of the first power supply terminal 310 can be written into the second drive signal output terminal 410. However, due to the existence of the voltage VMG at the control output terminal 220, there is a certain leakage current in the second transistor 430, and the power supply VGH of the first power supply terminal 310 will be pulled down by the power supply VGL of the second power supply terminal 320.

[0068] In other words, by controlling the voltage VMG at the output terminal 220, the high-level voltage of the second drive signal output terminal 410 can be controlled. Referring to FIG. 7 , VG is the first control terminal voltage of the second transistor 430, VD is the first connection terminal voltage of the second transistor 430, and VS is the second connection terminal voltage of the second transistor 430. As the voltage VMG at the control output terminal 220 changes, the IDS-VGS curve of the second transistor 430 shifts left and right, resulting in a different current IDS when VG-VS = 0V. The larger the current IDS, the closer the high-level voltage of the second drive signal output terminal 410 is to the VGL voltage value, and the smaller the current IDS, the closer the high-level voltage of the second drive signal output terminal 410 is to the VGH voltage value.

[0069] As shown in FIG8 , the first pixel driving circuit 140 includes a third transistor 141. The control terminal of the third transistor 141 is connected to the first drive signal output terminal 210 or the second drive signal output terminal 410, and the first connection terminal and the second connection terminal of the third transistor 141 are connected to a power supply. As shown in FIG9 , Vs is the voltage at the second connection terminal of the third transistor 141, and Ids is the current of the third transistor 141. When the control terminal voltage of the third transistor 141 is different, the current Ids of the third transistor 141 is different, and the brightness of the anti-peeping sub-pixel 131 is also different. In other words, the first drive signal output terminal 210 or the second drive signal output terminal 410 controls the degree of activation of the third transistor 141. When the high-level voltage of the first drive signal output terminal 210 and the high-level voltage of the second drive signal output terminal 410 are different, the brightness of the anti-peeping sub-pixel 131 is also different.

[0070] By controlling the voltage VMG at the output terminal 220, the high-level voltage of the second drive signal output terminal 410 can be adjusted. That is, by controlling the voltage VMG at the output terminal 220, the brightness of the second portion of the anti-peeping sub-pixels 131 can be controlled so that the brightness of the second portion of the anti-peeping sub-pixels 131 is different from that of the first portion of the anti-peeping sub-pixels 131. For example, if the power supply VGH of the first power supply terminal 310 is 15V and the power supply VGL of the second power supply terminal 320 is -7V, the high-level voltage of the first drive signal output terminal 210 is 15V, the low-level voltage of the first drive signal output terminal 210 is -7V, the high-level voltage of the second drive signal output terminal 410 is 6V, and the low-level voltage of the second drive signal output terminal 410 is close to -7V.

[0071] 1 , the anti-peeping sub-pixels 131 in odd-numbered unit rows are connected to the first drive signal output terminal 210 via the first pixel driving circuit 140, while the anti-peeping sub-pixels 131 in even-numbered unit rows are connected to the second drive signal output terminal 410 via the first pixel driving circuit 140. A unit row includes one or more rows of anti-peeping sub-pixels 131. Alternatively, the anti-peeping sub-pixels 131 in odd-numbered unit columns are connected to the first drive signal output terminal 210 via the first pixel driving circuit 140, while the anti-peeping sub-pixels 131 in even-numbered unit columns are connected to the second drive signal output terminal 410 via the first pixel driving circuit 140. A unit column includes one or more columns of anti-peeping sub-pixels 131.

[0072] The first driving signal output terminal 210 and the second driving signal output terminal 410 control different unit rows or unit columns, so that different unit rows or unit columns have different brightness, and the control method is simpler.

[0073] 1 and 10 , the power module 300 further includes a third power terminal 330 and a fourth power terminal 340 . The voltage VDD of the third power terminal 330 is greater than the voltage VSS of the fourth power terminal 340 .

[0074] The first pixel driving circuit 140 includes a third transistor 141, the control end of the third transistor 141 is connected to the first driving signal output end 210 or the second driving signal output end 410, the first connection end of the third transistor 141 is connected to the third power supply end 330, and the second connection end of the third transistor 141 is connected to the fourth power supply end 340 through the anti-peep sub-pixel 131.

[0075] The pixel unit 130 further includes a display sub-pixel 132, which is connected to a second pixel driving circuit 150. The second pixel driving circuit 150 includes at least a fourth transistor 151, a fifth transistor 152, and a storage capacitor 153. The control terminal of the fourth transistor 151 is connected to the scan line 110, the first connection terminal of the fourth transistor 151 is connected to the data line 120, the second connection terminal of the fourth transistor 151 is connected to the control terminal of the fifth transistor 152, the first connection terminal of the fifth transistor 152 is connected to the third power supply terminal 330, the second connection terminal of the fifth transistor 152 is connected to the fourth power supply terminal 340 via the display sub-pixel 132, and the storage capacitor 153 is connected to the control terminal and the first connection terminal of the fifth transistor 152.

[0076] It should be understood that the second pixel driving circuit 150 may further include other transistors and capacitors to implement functions such as threshold voltage compensation.

[0077] The display sub-pixel 132 and the anti-peeping sub-pixel 131 share a common power supply, and the structure of the display driving circuit is simpler.

[0078] Example 2

[0079] The difference between the second embodiment and the first embodiment is that the power supply voltages of the first pixel driving circuits 140 of the odd unit rows and the even unit rows are different.

[0080] As shown in Figure 11, the power supply module 300 also includes a third power supply terminal 330, a fourth power supply terminal 340 and a fifth power supply terminal 350. The voltage VDD of the third power supply terminal 330 and the voltage Vdd of the fifth power supply terminal 350 are both greater than the voltage VSS of the fourth power supply terminal 340, and the voltage VDD of the third power supply terminal 330 and the voltage Vdd of the fifth power supply terminal 350 are different.

[0081] The first pixel driving circuit 140 includes a third transistor 141, and a control terminal of the third transistor 141 is connected to the first driving signal output terminal 210 or the second driving signal output terminal 410. The first connection terminal of the third transistor 141 in the odd-numbered unit rows is connected to the third power supply terminal 330, and the first connection terminal of the third transistor 141 in the even-numbered unit rows is connected to the fifth power supply terminal 350. The second connection terminal of the third transistor 141 is connected to the fourth power supply terminal 340 through the anti-peeping sub-pixel 131.

[0082] The pixel unit 130 further includes a display sub-pixel 132, which is connected to a second pixel driving circuit 150. The second pixel driving circuit 150 includes at least a fourth transistor 151, a fifth transistor 152, and a storage capacitor 153. The control terminal of the fourth transistor 151 is connected to the scan line 110, the first connection terminal of the fourth transistor 151 is connected to the data line 120, the second connection terminal of the fourth transistor 151 is connected to the control terminal of the fifth transistor 152, the first connection terminal of the fifth transistor 152 is connected to the third power supply terminal 330, the second connection terminal of the fifth transistor 152 is connected to the fourth power supply terminal 340 via the display sub-pixel 132, and the storage capacitor 153 is connected to the control terminal and the first connection terminal of the fifth transistor 152.

[0083] As shown in FIG12 , Vs is the voltage at the second connection terminal of the third transistor 141, and Ids is the current of the third transistor 141. When the voltage at the first connection terminal of the third transistor 141 is different, the current Ids of the third transistor 141 is different, and the brightness of the anti-peeping sub-pixel 131 is also different. In other words, the first drive signal output terminal 210 or the second drive signal output terminal 410 controls the degree of activation of the third transistor 141. At the same time, the voltage difference between the first connection terminal and the second connection terminal of the third transistor 141 also affects the current Ids of the third transistor 141. When the voltage at the first connection terminal of the third transistor 141 in the odd unit row is different from the voltage at the first connection terminal of the third transistor 141 in the even unit row, the brightness of the anti-peeping sub-pixel 131 is also different.

[0084] The anti-peeping sub-pixels 131 in the odd unit rows and the anti-peeping sub-pixels 131 in the even unit rows have different brightness and flash alternately. This design can make it easier for squinting to cause visual fatigue, thereby enhancing the anti-peeping effect of the display panel 100.

[0085] It should be noted that the difference between the first connection terminal voltage of the third transistor 141 of the odd unit row and the first connection terminal voltage of the third transistor 141 of the even unit row to make the brightness of the anti-peeping sub-pixel 131 different can be used simultaneously with the control output terminal 220 voltage VMG to make the brightness of the anti-peeping sub-pixel 131 different to increase the brightness difference between the anti-peeping sub-pixels 131 of the odd unit row and the anti-peeping sub-pixels 131 of the even unit row.

[0086] Example 3

[0087] The display driving method in this embodiment is used for the display driving circuit disclosed in Embodiment 1 or Embodiment 2. Referring to FIG. 13 and FIG. 14 , the display driving method includes:

[0088] S100: Acquire a display mode of the display panel 100, where the display mode includes an anti-peeping mode and a wide viewing angle mode;

[0089] S200: When it is confirmed that the display mode of the display panel 100 is the anti-peeping mode, the first driving signal output terminal 210 of the driving module 200 is controlled to output a signal, and the second driving signal output terminal 410 of the driving inversion module 400 is controlled to output a signal, so that the brightness and / or the turn-on time of the first part of the anti-peeping sub-pixels 131 and the second part of the anti-peeping sub-pixels 131 are different;

[0090] S300 : When it is confirmed that the display mode of the display panel 100 is the wide viewing angle mode, the first driving signal output terminal 210 and the second driving signal output terminal 410 are controlled to stop outputting signals.

[0091] In this embodiment, the display mode includes an anti-peeping mode and a wide-viewing angle mode, and the anti-peeping mode and the wide-viewing angle mode can be switched by the driving module 200. At the same time, the signal at the second driving signal output terminal 410 is different from the signal at the first driving signal output terminal 210, resulting in different brightness and / or on-times for the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131. In the anti-peeping mode, the display panel 100 presents an anti-peeping image that alternates between light and dark or flickers, thereby enhancing the anti-peeping effect of the display panel 100.

[0092] Specifically, in the wide viewing angle mode, the first drive signal output terminal 210, the control output terminal 220, and the second drive signal output terminal 410 stop outputting signals, and the third power supply terminal 330 and the fourth power supply terminal 340 can stop supplying power. In addition, if a fifth power supply terminal 350 is provided, the fifth power supply terminal 350 also stops supplying power.

[0093] The anti-peeping mode may include a constant-on anti-peeping mode and a flashing anti-peeping mode. In the constant-on anti-peeping mode, the first drive signal output terminal 210 stops outputting signals, and the third power supply terminal 330 and the fourth power supply terminal 340 start supplying power. If a fifth power supply terminal 350 is provided, the fifth power supply terminal 350 also starts supplying power. The control output terminal 220 is turned on, and the second part of the anti-peeping sub-pixels 131 are continuously illuminated. At the same time, the user can control the brightness of the constant-on anti-peeping mode by controlling the output terminal 220 voltage VMG. In addition, by increasing the frequency of the first drive signal output terminal 210 signal and the second drive signal output terminal 410 signal, all the anti-peeping sub-pixels 131 can be illuminated, and by controlling the output terminal 220 voltage VMG voltage, the brightness of the first part of the anti-peeping sub-pixels 131 and the second part of the anti-peeping sub-pixels 131 can be made the same.

[0094] In the flashing anti-peeping mode, the first drive signal output terminal 210, the control output terminal 220, and the second drive signal output terminal 410 output signals. The third power supply terminal 330 and the fourth power supply terminal 340 are turned on for power supply. If a fifth power supply terminal 350 is also provided, the fifth power supply terminal 350 is also turned on for power supply. At the same time, the user can control the brightness of the anti-peeping flash by making the brightness of the first part of the anti-peeping sub-pixels 131 and the second part of the anti-peeping sub-pixels 131 different by controlling the output terminal 220 voltage VMG. The user can also control the brightness of the anti-peeping flash by the voltage difference between the third power supply terminal 330 voltage VDD and the fifth power supply terminal 350 voltage Vdd. In addition, the user can also adjust the flashing frequency of the anti-peeping flash by controlling the output signal frequency of the first drive signal output terminal 210 and the second drive signal output terminal 410.

[0095] Example 4

[0096] As shown in Figure 15, the display device in this embodiment includes a display panel 100 and a display driver circuit, and the display driver circuit includes the display driver circuit disclosed in Example 1 and Example 2. The display panel 100 includes a plurality of pixel units 130 arranged in an array, and at least some of the pixel units 130 include anti-peeping sub-pixels 131. The display driver circuit includes a driver module 200, a power module 300, and a driver inverting module 400. The driver module 200 can be set on the display panel 100 or the main board, and the driver module 200, the power module 300, and the driver inverting module 400 can be set on the main board. The first drive signal output terminal 210 of the display driver circuit is connected to the first part of the anti-peeping sub-pixels 131, and the second drive signal output terminal 410 of the display driver circuit is connected to the second part of the anti-peeping sub-pixels 131.

[0097] The display device includes a display driving circuit. The driving module 200 in the display driving circuit includes a first driving signal output terminal 210. The first portion of the anti-peeping sub-pixels 131 is connected to the first driving signal output terminal 210 through the first pixel driving circuit 140. The power module 300 includes a first power terminal 310 and a second power terminal 320. The voltage VGH of the first power terminal 310 is greater than the voltage VGL of the second power terminal 320. The driving inversion module 400 is connected to the first driving signal output terminal 210, the first power terminal 310, and the second power terminal 320. The driving inversion module 400 includes a second driving signal output terminal 410. The second portion of the anti-peeping sub-pixels 131 is connected to the second driving signal output terminal 410 through the first pixel driving circuit 140. The signal of the second driving signal output terminal 410 is different from the signal of the first driving signal output terminal 210, so that the brightness and / or the turn-on time of the first portion of the anti-peeping sub-pixels 131 and the second portion of the anti-peeping sub-pixels 131 are different. In the anti-peeping mode, the display panel 100 presents an anti-peeping picture that alternates between light and dark or flickers, thereby enhancing the anti-peeping effect of the display panel 100 .

[0098] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified with "first," "second," etc., may explicitly or implicitly include one or more of such features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0099] In this application, unless otherwise specified or limited, terms such as "assembly" and "connection" should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0100] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0101] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent covered by this application.

Claims

1. A display driving circuit for driving a display panel, wherein the display panel comprises a plurality of pixel units arranged in an array, at least some of the pixel units comprise anti-peeping sub-pixels, wherein: The display driving circuit comprises: A driving module, comprising a first driving signal output terminal, the display panel further comprising a first pixel driving circuit, and the first part of the anti-peeping sub-pixels are connected to the first driving signal output terminal through the first pixel driving circuit; A power supply module, comprising a first power supply terminal and a second power supply terminal, wherein a voltage of the first power supply terminal is greater than a voltage of the second power supply terminal; A driving inverting module is connected to the first driving signal output terminal, the first power supply terminal and the second power supply terminal. The driving inverting module includes a second driving signal output terminal. The second part of the anti-peeping sub-pixels is connected to the second driving signal output terminal through the first pixel driving circuit. The signal of the second driving signal output terminal is different from the signal of the first driving signal output terminal, so that the brightness and / or opening time of the anti-peeping sub-pixels in the first part and the anti-peeping sub-pixels in the second part are different.

2. The display driving circuit according to claim 1, wherein: The signal at the second drive signal output end has the same frequency as the signal at the first drive signal output end and has opposite waveforms, so that the opening time of the anti-peeping sub-pixels in the first part and the opening time of the anti-peeping sub-pixels in the second part are different.

3. The display driving circuit according to claim 2, wherein: The driving inversion module comprises a first transistor and a second transistor, at least the first transistor is a vertical dual-gate transistor; The first connection terminal and the first control terminal of the first transistor are both connected to the first power supply terminal, the second connection terminal of the first transistor is connected to a connection node, and the connection node and the second control terminal of the first transistor are both connected to the second drive signal output terminal; The first connection terminal of the second transistor is connected to the connection node, the second connection terminal of the second transistor is connected to the second power supply terminal, and the first control terminal of the second transistor is connected to the first drive signal output terminal.

4. The display driving circuit according to claim 3, wherein: The width-to-length ratio of the second transistor channel is greater than the width-to-length ratio of the first transistor channel.

5. The display driving circuit according to claim 3, wherein: The first transistor and the second transistor are both vertical dual-gate transistors; The driving module further includes a control output terminal, a second control terminal of the second transistor is connected to the control output terminal, and the control output terminal is used to control the brightness of the anti-peeping sub-pixel in the second part.

6. The display driving circuit according to claim 1, wherein: The anti-peeping sub-pixels in odd-numbered unit rows are connected to the first drive signal output terminal through the first pixel driving circuit, and the anti-peeping sub-pixels in even-numbered unit rows are connected to the second drive signal output terminal through the first pixel driving circuit, and the unit rows include one or more rows of the anti-peeping sub-pixels; or The anti-peeping sub-pixels of the odd-numbered unit columns are connected to the first drive signal output terminal through the first pixel driving circuit, and the anti-peeping sub-pixels of the even-numbered unit columns are connected to the second drive signal output terminal through the first pixel driving circuit, and the unit columns include one or more columns of the anti-peeping sub-pixels.

7. The display driving circuit according to claim 6, wherein: The power module further includes a third power terminal and a fourth power terminal, and the voltage of the third power terminal is greater than the voltage of the fourth power terminal; The first pixel driving circuit includes a third transistor, a control end of the third transistor is connected to the first driving signal output end or the second driving signal output end, a first connection end of the third transistor is connected to the third power supply end, and a second connection end of the third transistor is connected to the fourth power supply end through the anti-peeping sub-pixel; The pixel unit also includes a display sub-pixel, which is connected to a second pixel driving circuit. The second pixel driving circuit at least includes a fourth transistor, a fifth transistor and a storage capacitor. The control end of the fourth transistor is connected to a scan line, the first connection end of the fourth transistor is connected to a data line, the second connection end of the fourth transistor is connected to the control end of the fifth transistor, the first connection end of the fifth transistor is connected to the third power supply end, the second connection end of the fifth transistor is connected to the fourth power supply end through the display sub-pixel, and the storage capacitor is connected to the control end and the first connection end of the fifth transistor.

8. The display driving circuit according to claim 6, wherein: The power module further includes a third power terminal, a fourth power terminal and a fifth power terminal, the voltage of the third power terminal and the voltage of the fifth power terminal are both greater than the voltage of the fourth power terminal, and the voltage of the third power terminal is different from the voltage of the fifth power terminal; The first pixel driving circuit includes a third transistor, a control terminal of the third transistor is connected to the first driving signal output terminal or the second driving signal output terminal, a first connection terminal of the third transistor of the odd unit row is connected to the third power supply terminal, a first connection terminal of the third transistor of the even unit row is connected to the fifth power supply terminal, and a second connection terminal of the third transistor is connected to the fourth power supply terminal through the anti-peeping sub-pixel; The pixel unit also includes a display sub-pixel, which is connected to a second pixel driving circuit. The second pixel driving circuit at least includes a fourth transistor, a fifth transistor and a storage capacitor. The control end of the fourth transistor is connected to a scan line, the first connection end of the fourth transistor is connected to a data line, the second connection end of the fourth transistor is connected to the control end of the fifth transistor, the first connection end of the fifth transistor is connected to the third power supply end, the second connection end of the fifth transistor is connected to the fourth power supply end through the display sub-pixel, and the storage capacitor is connected to the control end and the first connection end of the fifth transistor.

9. The display driving circuit according to claim 1, wherein: The anti-peeping sub-pixels in the first part are one or more rows of anti-peeping sub-pixels, and the anti-peeping sub-pixels in the second part are one or more rows of anti-peeping sub-pixels arranged adjacently, or, The first portion of the anti-peeping sub-pixels is a plurality of adjacent anti-peeping sub-pixels, and the second portion of the anti-peeping sub-pixels is a plurality of adjacent anti-peeping sub-pixels and is adjacent to the first portion of the anti-peeping sub-pixels.

10. The display driving circuit according to claim 1, wherein: The signal at the second drive signal output terminal and the signal at the first drive signal output terminal may both be pulse width modulation (PWM) wave signals, and the signal at the second drive signal output terminal and the signal at the first drive signal output terminal may both be low frequency signals.

11. The display driving circuit according to claim 10, wherein: The signal at the second drive signal output terminal and the signal at the first drive signal output terminal both have a period of two frames, and a ratio of high level to low level is 1.

12. The display driving circuit according to claim 10, wherein: The signal at the second drive signal output end has the same frequency as the signal at the first drive signal output end and has an opposite waveform.

13. The display driving circuit according to claim 3, wherein: When the driving inverting module is working: When the signal at the first drive signal output terminal is a high level signal, the second transistor is turned on, and the power of the second power supply terminal can be written into the second drive signal output terminal. At the same time, the first control terminal of the first crystal is controlled by the power of the first power supply terminal, the first transistor is turned on, and the power of the first power supply terminal can be written into the second drive signal output terminal, so that the low level of the second drive signal output terminal is greater than the power of the second power supply terminal and less than the power of the first power supply terminal; When the signal at the first drive signal output terminal is a low level signal, the second transistor is turned off, and at the same time, the first control terminal of the first transistor is controlled by the power supply of the first power supply terminal, the first transistor is turned on, and the power supply of the first power supply terminal can be written into the second drive signal output terminal, so that the high level of the second drive signal output terminal is equal to the power supply of the first power supply terminal.

14. The display driving circuit according to claim 1, wherein: The display sub-pixel and the anti-peeping sub-pixel share a power supply.

15. The display driving circuit according to claim 1, wherein: The first pixel driving circuit includes a third transistor, a control end of the third transistor is connected to the first driving signal output end or the second driving signal output end, and a first connection end and a second connection end of the third transistor are connected to a power source.

16. A display driving method, used in the display driving circuit according to any one of claims 1 to 15, wherein: The display driving method comprises: Acquire a display mode of the display panel, where the display mode includes an anti-peeping mode and a wide viewing angle mode; When confirming that the display mode of the display panel is the anti-peeping mode, controlling the first driving signal output terminal of the driving module to output a signal, and controlling the second driving signal output terminal of the driving inversion module to output a signal, so that the brightness and / or opening time of the anti-peeping sub-pixels in the first part and the anti-peeping sub-pixels in the second part are different; When it is confirmed that the display mode of the display panel is the wide viewing angle mode, the first drive signal output terminal and the second drive signal output terminal are controlled to stop outputting signals.

17. A display device, wherein: include: A display panel, the display panel comprising a plurality of pixel units arranged in an array, at least some of the pixel units comprising anti-peeping sub-pixels; According to any one of claims 1 to 15, the display driving circuit, the first driving signal output end of the display driving circuit is connected to the first part of the anti-peeping sub-pixels, and the second driving signal output end of the display driving circuit is connected to the second part of the anti-peeping sub-pixels.

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