Power converter arrangement
Patent Information
- Application Number
- PCT/EP2024/069634
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-08
- Filing Date
- 2024-07-11
- Publication Date
- 2025-03-13
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Figure EP2024069634_13032025_PF_FP_ABST
Abstract
Description
[0001] Description
[0002] title
[0003] Converter arrangement
[0004] The present invention relates to a power converter arrangement with at least one normally-on semiconductor switch.
[0005] Background of the invention
[0006] Voltage source inverters (VSIs) are preferably implemented with normally-off power semiconductors, as these have the property of conducting no current without a control signal (i.e., when no voltage is applied to the control terminals). This allows for easy handling of failure or fault scenarios for the gate driver and auxiliary supply level.
[0007] Normally conducting power semiconductors (e.g., junction field-effect transistors, abbreviated to JFET) offer several advantages over normally off components related to their semiconductor properties. These include more cost-effective manufacturing, better static properties, and potentially improved reliability (e.g., due to the elimination of the gate oxide). Therefore, for the same electrical requirements, a power converter design with normally conducting power semiconductors can offer cost advantages over a conventional design with normally off power semiconductors.
[0008] However, normally-on power semiconductors are often considered impractical or unfavorable in the context of VSI converter topologies, as the use of such devices requires additional measures to prevent bridge short circuits under various operating and failure conditions. This can increase the complexity and cost of the power stage and control system.
[0009] With reference to the simplest power converter topology, the half-bridge, such additional measures to enable the use of normally-off power semiconductors can be classified into two categories:
[0010] One approach involves the use of additional power semiconductors in the main circuit, which place the normally-on power semiconductors in the off state when no gate voltage is applied. An example of this is the well-known cascode arrangement consisting of a normally-on JFET and a normally-off MOSFET.
[0011] On the other hand, the implementation of a gate driver and auxiliary supply concept, which ensures the blocking state of the normally-on power semiconductor, as shown, for example, in US 2008 / 0 290 927 A1.
[0012] Both variants aim, with their respective approach, to ensure the blocking capability of the half-bridge in the event of a fault.
[0013] Disclosure of the invention
[0014] According to the invention, a power converter arrangement having the features of patent claim 1 is proposed. Advantageous embodiments are the subject of the subclaims and the following description.
[0015] The invention makes use of the measure of using a gate driver supply circuit supplied by two independent voltage sources, which ensures the blocking operation of the normally-on power semiconductors used.
[0016] The invention represents a supply concept for power converters with self-conducting
[0017] Power semiconductors and the intermediate voltage link represent a protection system that prevents overloading of the power stage during normal operation, in special operating conditions, and in failure scenarios by maintaining the blocking state of the power semiconductors used. This is achieved by using redundant supply units connected to different voltage sources and can be further improved by suitable electrical and, if necessary, spatial partitioning (e.g., through separate circuit boards, a partition wall, or other design measures).
[0018] More specifically, the invention relates to a power converter arrangement with at least one normally-on semiconductor switch. The power converter arrangement has at least one gate driver unit for controlling the at least one normally-on semiconductor switch and at least one gate driver supply circuit for supplying the at least one gate driver unit with an output voltage. The power converter arrangement further has at least one main supply unit for providing a first DC supply voltage to the at least one gate driver supply circuit and at least one auxiliary supply unit for providing a second DC supply voltage to the at least one gate driver supply circuit.
[0019] The converter arrangement comprises a DC intermediate circuit with a positive branch, a negative branch, and a DC intermediate circuit storage device between the positive branch and the negative branch. The DC intermediate circuit can be connected to a main DC voltage source, for example, an external battery, for charging the DC intermediate circuit storage device. The at least one semiconductor switch is connected between the positive branch or the negative branch and a load terminal and serves, in particular, to connect a load connected to the load terminal, such as a phase winding of an electrical machine, to the positive branch or the negative branch of the DC intermediate circuit.
[0020] The power converter arrangement has an auxiliary DC voltage source or can be connected to such a source, wherein the at least one auxiliary supply unit is supplied from the auxiliary DC voltage source and the at least one main supply unit is supplied from the DC voltage intermediate circuit.
[0021] Safe operation in the event of a supply unit failure is thus ensured by a redundant supply concept with an auxiliary supply unit and a main supply unit, as well as a suitable gate driver supply circuit. A bridge short circuit from the discharged state ("deadlock"), which allows charging of the intermediate circuit, is avoided. This is made possible by the use of the auxiliary DC voltage source, which ensures the off-state of the power semiconductors even when the DC link storage (intermediate circuit capacitor) is discharged.
[0022] Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawings.
[0023] The invention is illustrated schematically in the drawing using an embodiment(s) and is described below with reference to the drawing.
[0024] Short description of the drawings
[0025] Figure 1 shows schematically an embodiment of a single-phase converter circuit according to the invention with self-conducting power semiconductors, a voltage intermediate circuit and two voltage supply units.
[0026] Figure 2 schematically shows an embodiment of a single-phase converter circuit according to the invention with normally-conducting power semiconductors, a voltage intermediate circuit, and two voltage supply units, wherein the first voltage supply unit consists of an auxiliary supply unit and a main supply unit, and the second voltage supply unit consists of a main supply unit. Figure 3 shows a block diagram of an exemplary implementation of a voltage supply unit with an auxiliary supply unit, a main supply unit, and a gate driver supply circuit.
[0027] Figure 4 shows a diagram showing the relationship between the output voltage of the main supply unit and the intermediate circuit voltage.
[0028] Embodiment(s) of the invention
[0029] Figures 1 and 2 each show an embodiment of a power converter arrangement according to the invention, schematically and in circuit diagram form, and are designated overall by 100 and 200, respectively. The power converter arrangement 100, 200 has a half-bridge 110 with two semiconductor switches, a high-side semiconductor switch, HS switch 111, and a low-side semiconductor switch, LS switch 112. The HS switch 111 and the LS switch 112 are each designed as a normally-on power transistor which, without control (i.e., with zero voltage) at the control or monitoring connection (gate connection), has a low-resistance connection between the power terminals (drain / source path, collector / emitter path). In the illustration, a JFET is assumed as the power transistor.
[0030] It is understood that the invention is also applicable to multi-phase converter arrangements (with N half-bridges representing the N converter phases). Likewise, the invention is applicable to topologies comprising a series connection of several (N) normally-on power transistors. Likewise, the invention is applicable to topologies in which the switches 111, 112 consist of several parallel-connected power transistors controlled by the same (or individual) gate driver unit.
[0031] On the supply side, the power converter arrangement 100, 200 is connected to a DC voltage supply, for example, a low-voltage or high-voltage energy storage device of a vehicle, as the main DC voltage source 20. In a vehicle, such as a battery-electric vehicle (BEV), voltages below a permissible contact voltage of 60 V are referred to as low voltage (LV), and voltages above the permissible contact voltage of 60 V are referred to as high voltage (HV). Typical LV voltages are 12 V or 24 V, and typical HV voltages are in the mid- to upper three-digit range, for example, 400 - 800 V.
[0032] An isolating circuit 30 may be provided between the power converter arrangement 100, 200 and the main DC voltage source 20. The isolating circuit 30 may have additional means for limiting the current when supplying the power converter arrangement 100, 200.
[0033] The power converter arrangement 100, 200 has, on the input side, a DC intermediate circuit storage 120 of a DC intermediate circuit, which may, for example, comprise one or more capacitors, etc. The DC intermediate circuit storage 120, in a sufficiently charged state, is used as an energy source for the power converter arrangement 100, 200 (including for the gate driver supply) and provides a DC voltage Lide of, for example, 800 V (see also Fig. 4) between a positive branch Vp and a negative branch Vn of the DC intermediate circuit.
[0034] An electrical load 10, for example, a stator winding of an electrical machine, is connected to a center tap or load terminal 113 between the high-voltage switch 111 and the miniature circuit breaker 112. A second load terminal 111 can be fed back to the DC link via a suitable electrical network.
[0035] A gate driver unit 131 and 132, respectively, is assigned to the high-voltage switch 111 and the short-circuit breaker 112. A control signal input is designated s2 and s1, respectively, and is optionally isolated from an intermediate circuit of the converter, which is indicated by a dashed line.
[0036] The high-side, HS gate driver unit 131 is responsible for driving the HS
[0037] Switch 111, and the low-side, LS gate driver unit 132 is responsible for driving the LS switch 112. In the case of a JFET-based implementation of the switches, the off state is achieved by applying a negative voltage (e.g., Ugs1, Ugs2 = -20V) to the control terminals (gate-source).
[0038] The LS gate driver unit 131 and the LS gate driver unit 132 are each supplied with a voltage by a gate driver supply circuit 141 or 142, respectively, and, at least in some embodiments, have a short-circuit detection device capable of detecting a faulty state of the supplied LS switch 111 or LS switch 112, respectively, and of protecting the respective opposite LS switch 112 or LS switch 111 from the resulting overload by switching it to a non-conductive or high-resistance state.
[0039] The DC intermediate circuit is connected within the converter arrangement 100, 200 to a high-voltage main supply unit 161 and a low-voltage main supply unit 162, which in turn can be designed, for example, as DC-DC converters and provide a first DC supply voltage for the gate driver supply circuit 141 (cf. Usupp,1,HS in Fig. 3) and 142, respectively. The high-voltage main supply unit 161 and the low-voltage main supply unit 162 expediently have correct functionality down to a lower intermediate circuit voltage threshold Udc.min (e.g., 60V for high-voltage supply units).
[0040] The power converter arrangement 100, 200 is also connected to an auxiliary DC voltage source 40, which can be, for example, a 12V or 24V battery in a conventional BEV electric drive. Alternatively, the auxiliary DC voltage source 40 can also be implemented by a galvanically isolated DC / DC converter supplied from the main DC voltage source 20.
[0041] The auxiliary DC voltage source 40 serves as the supply voltage for the auxiliary functions of the power converter (including the gate driver supply) and provides potentials V2 and GND2 (ground). The ground potential can be different from potential Vn.
[0042] The auxiliary DC voltage source 40 is connected within the power converter arrangement 100 to an auxiliary high-voltage supply unit 151 and an auxiliary low-voltage supply unit 152, which in turn can be designed, for example, as DC-DC converters and provide a second DC supply voltage for the gate driver supply circuit 141 (cf. Usupp,2,HS in Fig. 3) and 142, respectively. The auxiliary supply units 151, 152 expediently isolate the auxiliary DC voltage source 40 from the intermediate circuit region of the power converter, which is indicated by a dashed line.
[0043] In the alternative embodiment of the converter arrangement 200 according to Figure 2, the auxiliary DC voltage source 40 within the converter arrangement 200 is connected only to the LS auxiliary supply unit 152, and the HV auxiliary supply unit 151 is omitted. This results in an architecture with reduced complexity. The power supply to the HV gate driver unit 131 is ensured by the HV main supply unit 161. The bridge short circuit during the charging phase of the intermediate circuit capacitor is prevented by the still present LS auxiliary supply unit 172 and the low-side transistor.
[0044] The gate driver supply circuit 141 or 142 can, for example, be a diode-based passive network, as shown schematically in Figure 3, for example. The gate driver supply circuit 141 or 142 is expediently configured to combine the first DC supply voltage Usupp,1,HS and the second DC supply voltage Usupp,2,HS to form an output voltage Usupp.HS, so that in the event of a failure or short circuit of one of the two inputs, the remaining voltage supply is used to supply the gate driver units.
[0045] In the embodiment of the power converter arrangement 100 according to Fig. 1, the HV auxiliary supply unit 151, HV main supply unit 161, and gate driver supply circuit 141 form an HV voltage supply unit 171, as shown larger in Fig. 3. The LS auxiliary supply unit 152, LS main supply unit 162, and gate driver supply circuit 142 form an LS voltage supply unit 172. In the alternative embodiment of the power converter arrangement 200 according to Fig. 2, the HV main supply unit 161 alone forms an HV voltage supply unit 271.
[0046] In case of an implementation of the switches 111, 112 as JFETs, the voltage supply unit 171, 271, 172 supplies a negative voltage (e.g. -20V) with respect to the supply-side reference potential GND1 of the gate driver unit.
[0047] When charging the intermediate circuit capacitor 120 by closing the isolating circuit 30, the blocking state of the half-bridge is initially ensured only by the auxiliary supply units 151 and 152. Above the intermediate circuit voltage Udc.min, both the auxiliary supply units 151 and 152 and the main supply units 161 and 162 are active.
[0048] The HV power supply unit 171, 271 and the LS power supply unit 172 are expediently completely electrically separated from each other, except for the common input supplies, so that the failure of one power supply unit has no effect on the other. Physical separation or similar measures in the actual implementation of the two power supply units 171, 271, 172 can also be applied, so that the probability of propagation of a destructive failure from one power supply unit to the other is minimized.
[0049] In the following, different error reactions are described which are possible due to the described embodiment of the power converter arrangement 100, 200.
[0050] In case of failure of one of the auxiliary supply units 151 or 152, the
[0051] Compliance with the blocking state of the respective switch 111 or 112 is ensured by the main supply unit of the respective side LS / HS, 161 or 162.
[0052] In the event of failure of one of the main supply units 161 or 162, compliance with the blocking state of the respective switch 111 or 112 is ensured by the auxiliary supply unit of the respective LS / HS side, 151 or 152.
[0053] When the DC link capacitor 120 is discharged, e.g. in the event of a failure of the auxiliary DC voltage source 40 and a subsequent opening of the isolating circuit 30, the blocking capability of the half-bridge is ensured by the main supply units 161, 162 until the intermediate circuit voltage reaches the lower threshold Udc.min. Below the threshold Udc.min, the main supply units are no longer functional, i.e. the blocking state of the power semiconductors is no longer guaranteed and the power transistors form a low-impedance path between the positive branch Vp and the negative branch Vn of the DC link, which leads to the discharge of the intermediate circuit capacitor 120. The residual energy in the intermediate circuit capacitor is converted into heat in the switches 111, 112. The power stage and the threshold voltage Udc.min are expediently coordinated so that no unwanted thermal overload of the switches 111, 112 occurs.An example calculation of the residual energy E in the DC link capacitor with a capacitance C for different DC link voltages Udc.min (minimum operating voltage of the main supply units) and Ude, max (maximum operating voltage) is shown in the following table.
[0054] In the event of loss of control or failure of a switch 111 or 112 (e.g., due to a broken gate connection, driver failure, or a destructive fault resulting in the transistor breaking down), the affected switch will exhibit a low-resistance path at the power terminals. This fault may also extend to the power supply unit 171, 271, 172 of the affected side (high-side or low-side). Should the operating state of the half-bridge lead to a bridge short circuit (e.g., due to the active switching on of the unaffected transistor), the still functional, unaffected side takes over the short-circuit protection and thus ensures the blocking capability of the half-bridge with respect to the intermediate circuit capacitor and the main DC voltage source 20.In a typical three-phase electric drive system for battery-electric vehicles, an active short circuit can be provided at the machine terminals with little effort in the loss-of-control fault scenario. The fault-affected side of the half-bridge automatically provides a low-impedance path (to the Vp branch in the case of a high-voltage fault and to the Vn branch in the case of a low-voltage circuit fault) as soon as the switches are no longer controlled (zero voltage at the control terminals).
[0055] In at least some embodiments of the invention, the HV auxiliary supply unit 151 and the LS auxiliary supply unit 152, and / or the HV main supply unit 161 and the LS main supply unit 162 can be designed with different nominal power, e.g., one main or auxiliary supply unit for full load (switching operation) and the other main or auxiliary supply unit for a low load (no switching operation, only maintenance of the blocking state of the respective switch by the driver unit). In this case, the associated main supply unit can also be designed with reduced performance below a certain input voltage Ude, because at low input voltages, full-load operation is not necessary (maintaining the blocking state of the respective switch is sufficient; see also areas 420, 430 in Fig. 4).
[0056] Figure 4 shows, in a diagram 400, a relationship between the output voltage Usupp,1 of the main supply unit 161, 162 and the intermediate circuit voltage Ude. Below the lower intermediate circuit voltage threshold Udc.min of, for example, 60V in Fig. 4, area 410, the main supply unit 161, 162 cannot generate an output voltage Usupp,1. Above the lower intermediate circuit voltage threshold Udc.min up to a maximum intermediate circuit voltage Ude,max of, for example, 850V in Fig. 4, areas 420 and 430, the main supply unit 161, 162 generates the first DC supply voltage Usupp,1 with a level Usupp,1 ,nom of, in this case, for example, -20V. In this case, an area 420 for reduced load and an area 430 for full load can be provided, as explained above.
Claims
Claims 1 . Power converter arrangement (100, 200) with at least one normally-on semiconductor switch (111, 112), comprising at least one gate driver unit (131, 132) for controlling the at least one normally-on semiconductor switch (111, 112), at least one gate driver supply circuit (141, 142) for supplying the at least one gate driver unit (131, 132) with an output voltage (Usupp.HS), at least one main supply unit (161, 162) for providing a first DC supply voltage (Usupp,1,HS) to the at least one gate driver supply circuit (141, 142), at least one auxiliary supply unit (151, 152) for providing a second DC supply voltage (Usupp,2,HS) to the at least one gate driver supply circuit (141, 142), a DC voltage intermediate circuit with a positive branch (Vp), a negative branch and a DC voltage intermediate circuit storage (120) between the positive branch (Vp) and the negative branch (Vn),wherein the DC voltage intermediate circuit is connectable to a main DC voltage source (20) for charging the DC voltage intermediate circuit storage device (120), wherein the at least one semiconductor switch (111, 112) is connected between the positive branch (Vp) or the negative branch (Vn) and a load terminal (113), wherein the at least one main supply unit (161, 162) is supplied from the DC voltage intermediate circuit, wherein the power converter arrangement (100, 200) has an auxiliary DC voltage source (40) or is connectable to an auxiliary DC voltage source (40), wherein the at least one auxiliary supply unit (151, 152) is supplied from the auxiliary DC voltage source (40).
2. Power converter arrangement (100, 200) according to claim 1, wherein the at least one normally-on semiconductor switch (111, 112) is designed as a junction field-effect transistor.
3. Power converter arrangement (100, 200) according to claim 1 or 2, wherein an electrical isolating circuit (30) is provided between the power converter arrangement (100, 200) and the main DC voltage source (20).
4. Power converter arrangement (100, 200) according to one of the preceding claims, wherein the at least one main supply unit (161, 162) is designed as a DC-DC converter which is connected between the DC voltage intermediate circuit and the at least one gate driver supply circuit (141, 142).
5. Power converter arrangement (100, 200) according to the preceding claim, wherein the at least one main supply unit (161, 162) is configured to generate the first DC supply voltage (Usupp,1,HS) when a DC intermediate circuit voltage corresponds to at least one lower intermediate circuit voltage threshold (Udc.min).
6. Power converter arrangement (100, 200) according to one of the preceding claims, wherein the at least one auxiliary supply unit (151, 152) is designed as a DC-DC converter which is connected between the auxiliary DC voltage source (40) and the at least one gate driver supply circuit (141, 142).
7. Power converter arrangement (100, 200) according to one of the preceding claims, wherein the auxiliary DC voltage source (40) is designed as a DC voltage converter which is connected between the main DC voltage source (20) and the at least one auxiliary supply unit (151, 152).
8. Power converter arrangement (100, 200) according to one of the preceding claims, wherein the at least one normally-on semiconductor switch (111, 112) Part of a half-bridge (110) with two self-conducting semiconductor switches (111, 112).
Citation Information
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