Imaging element, imaging device, and electronic apparatus

Abstract

The present disclosure relates to an imaging element: which receives incident light via a photoelectric conversion part divided into two, and detects a phase difference signal, using one of two signals; and which adds the two signals to make it possible to suppress reduction in a degree of freedom of a layout of pixels for generating an image signal. The present disclosure also relates to an imaging device and an electronic apparatus. A plurality of photoelectric conversion parts arranged in a pixel are separated by an intra-pixel separation part. Charges which have overflowed are mutually transferred by an overflow path among the plurality of photoelectric conversion parts disposed in the intra-pixel separation part. A potential of the overflow path disposed in the pixel is adjusted by an overflow gate when a voltage is applied in a direction perpendicular to an incident direction of incident light. An image signal is generated on the basis of a charge obtained by combining the charges generated by the plurality of photoelectric conversion parts, and a plurality of phase difference signals for pupil-splitting an object to detect an image plane phase difference are generated on the basis of the charges individually generated by the plurality of photoelectric conversion parts. The present disclosure can be applied to imaging devices.

Description

Image pickup element, image pickup device, and electronic device

[0001] The present disclosure relates to an imaging element, an imaging device, and an electronic device, and in particular to an imaging element, an imaging device, and an electronic device that receive incident light using a photoelectric conversion unit that divides the incident light into two, detects a phase difference signal using the individual signals, and adds up both signals to generate an image signal, thereby suppressing a reduction in the degree of freedom in layout in pixels.

[0002] 2. Description of the Related Art Image sensors have become widespread, each of which has pixels that receive incident light with two photoelectric conversion units, detect a phase difference signal using separate signals, and generate an image signal using both signals.

[0003] At the boundary between the two photoelectric conversion sections in the above-mentioned imaging element, an intra-pixel separation section made of a P-type impurity implant or the like is formed, and an overflow path is formed to transfer overflowing charges between the pixels divided left and right (or top and bottom).

[0004] However, the potential barrier of the overflow path is set low so that charges that overflow from one of the photoelectric conversion units can be transferred to the other photoelectric conversion unit.

[0005] For this reason, when detecting a phase difference signal using individual signals, the amount of saturated charge decreases. However, when generating an image signal, the charges of both signals are simply added together, so there is no effect of the amount of saturated charge.

[0006] Therefore, a technology has been proposed in which a gate structure (hereinafter also referred to as an OF gate) that controls an overflow path (hereinafter also referred to as an OF path) is formed near an intra-pixel isolation portion, and by switching it on or off, the potential barrier is increased when detecting a phase difference signal, thereby suppressing a reduction in the amount of saturated charge (see Patent Document 1).

[0007] International Publication No. 2022 / 201835

[0008] Incidentally, the OF gate described in Patent Document 1 is located at a lower level in the direction of incidence of incident light than the level at which the photoelectric conversion unit is formed, and is arranged at the same level as the transfer gate that transfers the charges generated in the photoelectric conversion unit to the floating diffusion region.

[0009] However, the OF gate and the transfer gate need to be placed at a distance apart that takes into account the influence of each other's electric fields, and forming the OF gate and the transfer gate on the same layer could create restrictions on placement and reduce the freedom of layout.

[0010] The present disclosure has been made in consideration of such circumstances, and in particular, aims to suppress a decrease in the degree of freedom in layout of a pixel having a function of receiving incident light with a photoelectric conversion unit that is divided into two, detecting a phase difference signal using the individual signals, and adding up both signals to generate an image signal.

[0011] An imaging element, an imaging device, and an electronic device according to one aspect of the present disclosure are an imaging element, an imaging device, and an electronic device that include: a pixel having a plurality of photoelectric conversion units that photoelectrically convert incident light from a subject to generate electric charges; an intra-pixel isolation unit that is disposed in the pixel and isolates the plurality of photoelectric conversion units; an overflow path that is disposed in the intra-pixel isolation unit and transfers overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate that is disposed in the pixel and adjusts the potential of the overflow path by applying a voltage in a direction perpendicular to the incident direction of the incident light; and an image signal generation unit that generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and that generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units.

[0012] In one aspect of the present disclosure, an intra-pixel separation section is arranged in a pixel having a plurality of photoelectric conversion sections that photoelectrically convert incident light from a subject to generate electric charges, the plurality of photoelectric conversion sections are separated by an intra-pixel separation section, an overflow path is arranged in the intra-pixel separation section and transfers overflowing electric charges between the plurality of photoelectric conversion sections, an overflow gate is arranged in the pixel and adjusts the potential of the overflow path by applying a voltage in a direction perpendicular to the incident direction of the incident light, an image signal is generated based on the combined electric charges generated by the plurality of photoelectric conversion sections, and a plurality of phase difference signals are generated to pupil-divide the subject and detect an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion sections.

[0013] 5 is a diagram illustrating a pixel structure in which the potential barrier of an inter-pixel separator is set low. FIG. 6 is a diagram illustrating an overview of a pixel according to the present disclosure. FIG. 7 is a diagram illustrating a configuration example of an imaging element according to the present disclosure. FIG. 8 is a diagram illustrating a circuit configuration of a pixel according to the present disclosure. FIG. 9 is a diagram illustrating a physical configuration example of a first embodiment of a pixel according to the present disclosure. FIG. 10 is a diagram illustrating a manufacturing method for the pixel of FIG. 5. FIG. 11 is a diagram illustrating an effect of an OF gate in a pixel according to the present disclosure. FIG. 12 is a diagram illustrating a physical configuration example of a second embodiment of a pixel according to the present disclosure. FIG. 13 is a diagram illustrating a physical configuration example of a third embodiment of a pixel according to the present disclosure. FIG. 14 is a diagram illustrating a physical configuration example of a fourth embodiment of a pixel according to the present disclosure. FIG. 15 is a diagram illustrating a physical configuration example of a fifth embodiment of a pixel according to the present disclosure. FIG. 16 is a diagram illustrating a physical configuration example of a sixth embodiment of a pixel according to the present disclosure. FIG. 17 is a diagram illustrating a physical configuration example of a seventh embodiment of a pixel according to the present disclosure. FIG. 18 is a diagram illustrating a physical configuration example of an eighth embodiment of a pixel according to the present disclosure. FIG. 19 is a block diagram illustrating a configuration example of an imaging device as an electronic device to which the imaging element according to the present disclosure is applied. FIG. 19 is a diagram illustrating an example of use of an imaging element to which the technology of the present disclosure is applied.

[0014] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0015] Hereinafter, embodiments for carrying out the present technology will be described. The description will be made in the following order: 1. Overview of the present disclosure 2. First embodiment 3. Second embodiment 4. Third embodiment 5. Fourth embodiment 6. Fifth embodiment 7. Sixth embodiment 8. Seventh embodiment 9. Eighth embodiment 10. Application example to electronic device 11. Use example of solid-state imaging device

[0016] <<1. Overview of the Present Disclosure>> The present disclosure particularly aims to suppress a decrease in the degree of freedom in layout of a pixel having a function of receiving incident light with a photoelectric conversion unit that is divided into two, detecting a phase difference signal using the individual signals, and generating an image signal by adding up both signals. Therefore, the overview of the present disclosure will first be described.

[0017] Fig. 1 shows an example of the configuration of the front side of one pixel in an image sensor having two photoelectric conversion units. Although Fig. 1 shows the configuration of the front side of the image sensor, incident light is incident from the back side of the paper on which Fig. 1 is drawn, and the configuration of the image sensor is what is called a back-illuminated type.

[0018] The pixels 11 of the image sensor in FIG. 1 are surrounded by inter-pixel isolation portions 31 formed by filling trenches with a semiconductor having a relatively high impurity concentration using FFTI (Front Full Trench Isolation), and are configured to be isolated from adjacent pixels 11 (not shown).

[0019] In the pixel 11, photoelectric conversion units 41-1 and 41-2 are arranged on the left and right sides of the drawing, respectively, to generate electric charges according to the amount of incident light incident from the back side of the paper surface of the drawing.

[0020] A charge transfer section (TG) 43-1 is formed on the lower left side of the photoelectric conversion section 41-1, on the front side of the drawing, by being stacked on the photoelectric conversion section 41-1. Also, a charge transfer section (TG) 43-2 is formed on the lower right side of the photoelectric conversion section 41-2, on the front side of the drawing, by being stacked on the photoelectric conversion section 41-2.

[0021] The charge transfer units (TG) 43-1 and 43-2 are made up of MOSFETs, and transfer charges generated by photoelectric conversion in the photoelectric conversion units 41-1 and 41-2 according to the amount of incident light to the charge accumulation units 42-1 and 42-2 made up of FD (Floating Diffusion) regions.

[0022] The charge storage sections (FD) 42-1 and 42-2 are arranged adjacent to the charge transfer sections 43-1 and 43-2, respectively, and store the charges generated by photoelectric conversion in the photoelectric conversion sections 41-1 and 41-2, respectively, and transferred by the charge transfer sections 43-1 and 43-2.

[0023] Between the photoelectric conversion units 41-1 and 41-2, the upper and lower portions in the figure, excluding the central portion, are formed by inter-pixel isolation portions 31, and the area near the central portion is formed by intra-pixel isolation portions 44 formed by P-type impurity implants.

[0024] In the following, when there is no need to particularly distinguish between the photoelectric conversion units 41-1, 41-2, the charge accumulation units 42-1, 42-2, and the charge transfer units 43-1, 43-2, they will simply be referred to as the photoelectric conversion unit 41, the charge accumulation unit 42, and the charge transfer unit 43, and the same will be used for other components.

[0025] Since the intra-pixel isolation portion 44 is configured to have a lower impurity concentration than the inter-pixel isolation portion 31 , the potential barrier of the intra-pixel isolation portion 44 is lower than the potential barrier of the inter-pixel isolation portion 31 .

[0026] With this configuration, when generating a phase difference signal, two signals based on the charges generated by the photoelectric conversion of the two photoelectric conversion units 41-1 and 41-2 are used independently and output as a phase difference signal.

[0027] On the other hand, when generating an image signal, signals based on the charges generated by photoelectric conversion in the two photoelectric conversion units 41-1 and 41-2 are added together, and the added signal is output as the image signal.

[0028] When light is incident asymmetrically on the two photoelectric conversion units 41-1 and 41-2, the charge stored in the photoelectric conversion unit 41 on the side where more light is incident may become saturated.

[0029] When the accumulated charge becomes saturated, the charge newly generated by the saturated photoelectric conversion unit 41 overflows from the photoelectric conversion unit 41 .

[0030] As described above, the potential barrier of the intra-pixel separation section 44 between the two photoelectric conversion sections 41-1 and 41-2 is configured to be lower than the potential barrier of the inter-pixel separation section 31 between the pixels 11, so that an overflow path is formed between the two photoelectric conversion sections 41-1 and 41-2, and charges are moved so that they do not overflow.

[0031] With this configuration, the pixel 11 in FIG. 1 can detect a phase difference signal for detecting an image plane phase difference by pupil-dividing incident light from a subject using signals detected individually by the photoelectric conversion units 41-1 and 41-2, and can generate an image signal by adding up both signals.

[0032] 1, the potential barrier of the intra-pixel separator 44 between the two photoelectric conversion units 41-1 and 41-2 is set low, which reduces the amount of saturated charge in each of the photoelectric conversion units 41-1 and 41-2. This narrows the range in which the phase difference can be detected when detecting a phase difference signal, reducing convenience.

[0033] Therefore, it is conceivable that an overflow gate (hereinafter also referred to as an OF gate) may be formed on the upper surface of the intra-pixel isolation portion 44 to control the height of the potential barrier of the overflow path, thereby suppressing the decrease in the amount of saturated charge when generating a phase difference signal.

[0034] FIG. 2 shows an example of the configuration of a pixel in which an OF gate is formed on the upper surface of the intra-pixel isolation portion.

[0035] In the pixel 51 in FIG. 2, components having the same functions as those of the pixel 11 in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0036] Pixel 51 in FIG. 2 differs from pixel 11 in FIG. 1 in that an OF gate 61 is formed on intra-pixel isolation section 44 (a lower layer when viewed from the direction of incidence of incident light), a contact (formed in Via) 62 that supplies a control signal to OF gate 61 is formed, and further, an overflow path 73 that can transfer overflowing charges between photoelectric conversion sections 41-1 and 41-2 in both directions is formed within intra-pixel isolation section 44.

[0037] In FIG. 2, the upper left is a top view, the lower left is a cross section of the upper left taken along line a, and the upper right is a cross section of the upper left taken along line b.

[0038] In addition, the inter-pixel isolation portion 31 is formed from polysilicon 72-1 to 72-4 in the range from the bottom of the trench formed by FFTI (Front Full Trench Isolation) excluding the upper layer portion in the figure, and the upper layer portion in the figure is formed from oxide films 71-1 to 71-4.

[0039] 2 illustrates a state in which the photoelectric conversion unit 41 is formed on the back surface side of the substrate 74. The substrate 74 at the bottom of the lower left in the figure (the same applies to the right end of the substrate 74 at the top right) is eventually scraped off by polishing, exposing the photoelectric conversion unit 41, which receives incident light and generates electric charges through photoelectric conversion.

[0040] In the pixel 51 of FIG. 2, when a voltage is applied from the OF gate 61, the potential barrier of the overflow path 73 in the area adjacent to and contacting the OF gate 61 is controlled to be lowered in the intra-pixel isolation portion 44.

[0041] As a result, the overflow path (hereinafter also referred to as the OF path) 73 functions to transfer the overflowing charge from the photoelectric conversion unit 41 to the other photoelectric conversion unit 41 .

[0042] That is, when generating a phase difference signal, the application of voltage from the OF gate 61 to the OF path 73 is stopped, thereby raising the potential barrier of the intra-pixel separation section 44 and blocking the OF path 73, thereby suppressing a decrease in the saturated charge amount.

[0043] Conversely, when generating an image signal, a voltage is applied from the OF gate 61 to the OF path 73, thereby lowering the potential barrier of the OF path 73 and opening the OF path 73, thereby allowing the movement of overflowing charges between the photoelectric conversion units 41-1 and 41-2.

[0044] However, since the OF gate 61 will be added to the layer where the charge transfer sections 43-1 and 43-2 shown in the dotted rectangular frame in the lower left of Figure 2 are formed, taking into account the effect of the electric field caused by the voltage applied to the OF gate 61, the two must be placed at a distance greater than a certain distance, which reduces the freedom of layout.

[0045] Although the charge transfer sections (TG) 43-1 and 43-2 do not exist on the cross section a in the upper left of FIG. 2, they are represented by a dotted rectangular frame in the lower left of FIG. 2 to indicate that they are formed in the same layer as the OF gate 61.

[0046] Furthermore, since the OF gate 61 can only apply voltage to the portion of the OF path 73 in the intra-pixel isolation section 44 directly below the OF gate 61, the OF path 73 can only be controlled in the portion of the intra-pixel isolation section 44 that is in contact with the OF gate 61.

[0047] Furthermore, considering the influence of the electric field around the charge transfer sections 43-1 and 43-2, it is desirable to configure the intra-pixel separation section 44 so that the OF path 73 is formed at a deep position (a position a predetermined distance deeper in the opposite direction to the incident direction of the incident light) away from the layer where the charge transfer sections 43-1 and 43-2 are formed, and this influence becomes particularly significant as the pixel size is made smaller.

[0048] Therefore, in the present disclosure, instead of the OF gate 61, OF gates 80-1 and 80-2 are formed in the oxide films 73-1 and 73-2 that constitute the inter-pixel isolation portion 31, which are shown in the dashed-dotted rectangular frame in the upper right part of Figure 2, and a voltage is applied to the OF path 73 in the intra-pixel isolation portion 44 from a direction perpendicular to the incident direction of the incident light.

[0049] With this configuration, the OF gates 80-1 and 80-2 are formed at a position deeper than the layer in which the charge transfer sections 43-1 and 43-2 are formed, and the OF path 73 formed by applying a voltage by the OF gates 80-1 and 80-2 can be controlled at a deeper level than the layer in which the charge transfer sections 43-1 and 43-2 are formed.

[0050] As a result, it is possible to reduce the influence of the electric field around the charge transfer sections 43-1 and 43-2 while suppressing the reduction in the amount of saturated charge when reading out the phase difference signal, and it is possible to suppress the reduction in the degree of freedom in the layout of the charge transfer sections 43-1, 43-2, etc.

[0051] 2. First Embodiment Configuration of Image Sensor Fig. 3 is a diagram showing an example of the configuration of an image sensor according to the present disclosure. The image sensor 81 in Fig. 3 is configured with a pixel region (so-called image sensor region) 83 in which pixels 93, each including a plurality of photoelectric conversion elements, are regularly arranged two-dimensionally on a semiconductor substrate 82, for example, a silicon substrate, and a peripheral circuit section.

[0052] Each pixel 93 is composed of a photoelectric conversion element, such as a photodiode, and multiple pixel transistors (so-called MOS transistors). The multiple pixel transistors can be composed of, for example, three transistors: a transfer transistor, a reset transistor, and an amplification transistor. Alternatively, a selection transistor can be added to make a total of four transistors. The pixel 93 can also have a shared pixel structure. This shared pixel structure is composed of multiple photodiodes, a floating diffusion region shared by multiple transfer transistors, and one other pixel transistor each.

[0053] The peripheral circuit section is made up of a vertical drive circuit 84 , a column signal processing circuit 85 , a horizontal drive circuit 86 , an output circuit 87 , and a control circuit 88 .

[0054] The control circuit 88 receives an input clock and data instructing the operation mode and the like, and outputs data such as internal information of the image sensor 81. That is, the control circuit 88 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit 84, column signal processing circuit 85, horizontal drive circuit 86, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock. The control circuit 88 then inputs these signals to the vertical drive circuit 84, column signal processing circuit 85, horizontal drive circuit 86, etc.

[0055] The vertical drive circuit 84 is configured, for example, by a shift register, selects pixel drive wirings 92, supplies pulses for driving pixels to the selected pixel drive wirings, and drives the pixels row by row. That is, the vertical drive circuit 84 selects and scans each pixel 93 in the pixel region 83 row by row in the vertical direction, and supplies pixel signals based on signal charges generated in accordance with the amount of light received in, for example, photodiodes serving as photoelectric conversion elements in each pixel 93 to the column signal processing circuit 85 via vertical signal lines 89.

[0056] The column signal processing circuits 85 are arranged, for example, for each column of pixels 93, and perform signal processing such as noise removal on signals output from one row of pixels 93 for each pixel column. That is, the column signal processing circuits 85 perform signal processing such as CDS (Correlated Double Sampling) for removing fixed pattern noise specific to the pixels 93, signal amplification, AD conversion, etc. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 85 and connected between the output and the horizontal signal line 90. The column signal processing circuit 85 is an example of a processing circuit as defined in the claims.

[0057] The horizontal drive circuit 86 is, for example, composed of a shift register, and by sequentially outputting horizontal scanning pulses, selects each of the column signal processing circuits 85 in turn and causes each of the column signal processing circuits 85 to output a pixel signal to the horizontal signal line 90.

[0058] The output circuit 87 processes and outputs signals sequentially supplied from each of the column signal processing circuits 85 via a horizontal signal line 90. For example, the output circuit 87 may perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, etc. The input / output terminal 91 exchanges signals with the outside.

[0059] <Example of Circuit Configuration of Image Sensor> Next, an example of the circuit configuration of the pixel 93 that constitutes the image sensor 81 will be described with reference to Fig. 4. Fig. 4 is a circuit diagram illustrating an example of the circuit configuration of the pixel 93 according to the present disclosure.

[0060] The pixel 93 in FIG. 4 includes photoelectric conversion units 101-1 and 101-2, charge holding units 102-1 and 102-2, charge transfer units 103-1 and 103-2, an overflow path 104, an overflow gate 105, a reset transistor 107, an amplification transistor 108, and a selection transistor 109.

[0061] The circuit configured by the reset transistor 107, the amplification transistor 108, and the selection transistor 109 constitutes the image signal generation unit 106. The charge transfer units 103-1 and 103-2, the reset transistor 107, the amplification transistor 108, and the selection transistor 109 can be configured by n-channel MOS transistors.

[0062] As described above, pixel drive wiring 92 and vertical signal lines 89 are wired to the pixels 93. The pixel drive wiring 92 in the figure includes signal lines GATE, TRG1, TRG2, RST, and SEL. The vertical signal lines 89 include signal line VO. In addition, a power supply line Vdd is wired to the pixels 93. This power supply line Vdd is a wiring that supplies power to the pixels 93.

[0063] The anode of the photoelectric conversion unit 101-1 is grounded, and the cathode is connected to the source of the charge transfer unit 103-1. The anode of the photoelectric conversion unit 101-2 is grounded, and the cathode is connected to the source of the charge transfer unit 103-2. The drain of the charge transfer unit 103-1 is connected to the source of the reset transistor 107, the gate of the amplification transistor 108, the drain of the charge transfer unit 103-2, one end of the charge holding unit 102-1, and one end of the charge holding unit 102-2. The other end of the charge holding unit 102-1 and the other end of 104 are grounded. The drain of the reset transistor 107 is connected to the power supply line Vdd. The drain of the amplification transistor 108 is connected to the power supply line Vdd, and the source is connected to the drain of the selection transistor 109. The source of the selection transistor 109 is connected to the signal line VO. The overflow path 104 is connected between the cathode of the photoelectric conversion unit 101-1 and the cathode of the photoelectric conversion unit 101-2.

[0064] A signal line GATE, a signal line TRG1, and a signal line TRG2 are connected to the overflow gate 105, the gate of the charge transfer unit 103-1, and the gate of the charge transfer unit 103-2, respectively. A signal line RST and a signal line SEL are connected to the gate of the reset transistor 107 and the gate of the selection transistor 109, respectively.

[0065] The photoelectric conversion units 101-1 and 101-2 perform photoelectric conversion of incident light. These photoelectric conversion units 101-1 and 101-2 can be configured with photodiodes formed on a semiconductor substrate. The photoelectric conversion units 101-1 and 101-2 perform photoelectric conversion of incident light during an exposure period and hold charges generated by the photoelectric conversion.

[0066] The charge holding units 102-1 and 102-2 hold the charges generated by the photoelectric conversion units 101-1 and 101-2. The charge holding units 102-1 and 102-2 shown in the figure are connected in parallel. The charge holding units 102-1 and 102-2 can be configured using floating diffusion regions (FD), which are semiconductor regions formed on a semiconductor substrate.

[0067] The charge transfer units 103-1 and 103-2, reset transistor 107, amplifier transistor 108, and select transistor 109 in the figure can be configured using n-channel MOS transistors. In this n-channel MOS transistor, conduction between the drain and source can be achieved by applying a voltage exceeding the threshold value of the gate-source voltage Vgs to the gate. Hereinafter, this voltage exceeding the threshold value of the gate-source voltage Vgs will be referred to as the "on voltage." A control signal including this on voltage is transmitted via a signal line TRG1 or the like.

[0068] The charge transfer units 103-1 and 103-2 transfer charges. The charge transfer unit 103-1 transfers charges generated by photoelectric conversion in the photoelectric conversion unit 101 to the charge holding unit 102-1, and the charge transfer unit 103-2 transfers charges generated by photoelectric conversion in the photoelectric conversion unit 101-2 to the charge holding unit 102-2. The charge transfer units 103-1 and 103-2 transfer charges by establishing electrical continuity between the photoelectric conversion units 101-1 and 101-2 and the charge holding units 102-1 and 102-2, respectively. Control signals for the charge transfer units 103-1 and 103-2 are transmitted by signal lines TRG1 and TRG2, respectively.

[0069] The image signal generating section 106 generates an image signal based on the charges held in the charge holding sections 102-1 and 102-2. As described above, the image signal generating section 106 is composed of the reset transistor 107, the amplification transistor 108, and the selection transistor 109.

[0070] The reset transistor 107 resets the charge holding portions 102-1 and 102-2. This reset can be achieved by establishing electrical continuity between the charge holding portions 102-1 and 102-2 and the power supply line Vdd, thereby discharging the charges in the charge holding portions 102-1 and 102-2. A control signal for the reset transistor 107 is transmitted via a signal line RST.

[0071] The amplifier transistor 108 amplifies the voltage of the charge holding portions 102-1 and 102-2. The gate of the amplifier transistor 108 is connected to the charge holding portions 102-1 and 102-2. As a result, an image signal having a voltage corresponding to the charges held in the charge holding portions 102-1 and 102-2 is generated at the source of the amplifier transistor 108. Furthermore, by making the selection transistor 109 conductive, this image signal can be output to the signal line VO. A control signal for the selection transistor 109 is transmitted by the signal line SEL.

[0072] The overflow path 104 transfers overflowing charges between the photoelectric conversion units 101-1 and 101-2. The overflow path 104 is formed as an overflow path 173 (FIG. 5) in the intra-pixel isolation unit 144 (FIG. 5) disposed between the photoelectric conversion units 101-1 and 101-2, and will be described in detail later.

[0073] The overflow gate 105 is an electrode disposed adjacent to the overflow path 104. While FIG. 4 shows a wiring example in which one overflow gate 105 is provided, the corresponding configuration in FIG. 5 consists of two overflow gates 161-1 and 161-2, which are formed on either side of the intra-pixel isolation section 144. The potential barrier of the overflow path 173 (FIG. 5) of the intra-pixel isolation section 144 (FIG. 5), which corresponds to the overflow path 104, is adjusted according to the voltages applied by the overflow gates 161-1 and 161-2. The adjustment of the potential barrier of this overflow path 173 (FIG. 5) will also be described in detail later.

[0074] When generating a phase difference signal in pixel 93, charge transfer units 103-1 and 103-2 transfer the charges generated by photoelectric conversion units 101-1 and 101-2 to charge holding units 102-1 and 102-2 individually. This charge transfer is referred to as individual transfer. Thereafter, phase difference signals are generated by image signal generation unit 106 based on the charges individually transferred to charge holding units 102-1 and 102-2. Hereinafter, the mode for generating phase difference signals is referred to as phase difference signal mode.

[0075] On the other hand, when generating an image signal in pixel 93, charge transfer units 103-1 and 103-2 transfer the charges generated by photoelectric conversion units 101-1 and 101-2 to charge holding units 102-1 and 102-2 in common. In this case, charge holding units 102-1 and 102-2 simultaneously hold the charges generated by photoelectric conversion units 101-1 and 101-2 together. This charge transfer is called collective transfer. Furthermore, the mode in which this image signal is generated is called image signal mode.

[0076] <Physical Configuration Example of Imaging Element> Next, with reference to FIG. 5, a physical configuration example of a pixel according to the first embodiment of the present disclosure will be described.

[0077] 5 is a diagram illustrating an example of the physical configuration of one pixel, that is, a pixel 111 corresponding to the pixel 93 according to the first embodiment of the present disclosure. In Fig. 5, the upper left part is a top view of the pixel 111, the lower left part is a cross section a of the pixel 111 at the upper left, and the upper right part is a cross section b of the pixel 111 at the upper left.

[0078] The pixels 111 of the image sensor in FIG. 5 are surrounded by inter-pixel isolation portions 131 made of a semiconductor region with a relatively high impurity concentration, which are made of FFTI (Front Full Trench Isolation), and are configured to be isolated from adjacent pixels 111 (not shown).

[0079] In pixel 111, photoelectric conversion units 141-1 and 141-2 that generate electric charges in accordance with the amount of incident light entering from the back side of the paper are arranged on the left and right sides of the upper left corner of Fig. 5. The photoelectric conversion units 141-1 and 141-2 in Fig. 5 have configurations corresponding to the photoelectric conversion units 101-1 and 101-2 in Fig. 4.

[0080] As shown in the upper left of Fig. 5, the charge transfer unit (TG) 143-1 is formed by stacking on the lower left of the photoelectric conversion unit 141-1, on the front side of the paper in the figure. The charge transfer unit (TG) 143-2 is formed by stacking on the lower right of the photoelectric conversion unit 141-2, on the front side of the paper in the figure. The charge transfer units 143-1 and 143-2 in Fig. 5 have configurations corresponding to the charge transfer units 103-1 and 103-2 in Fig. 4.

[0081] The charge transfer units (TG) 143-1 and 143-2 are made up of MOSFETs, and transfer the charges generated by photoelectric conversion in the photoelectric conversion units 141-1 and 141-2, respectively, according to the amount of incident light, to the charge holding units 142-1 and 142-2, which are made up of FD (Floating Diffusion) regions, according to a control signal.

[0082] The charge holding units (FD) 142-1 and 142-2 are arranged adjacent to the charge transfer units 143-1 and 143-2, respectively, and accumulate the charges generated by photoelectric conversion in the photoelectric conversion units 141-1 and 141-2, respectively, and transferred by the charge transfer units 143-1 and 143-2. ​​The charge holding units 142-1 and 142-2 in FIG. 5 have a configuration corresponding to the charge holding units 102-1 and 102-2 in FIG.

[0083] Between the photoelectric conversion units 141-1 and 141-2, the upper and lower portions in the upper left and upper right parts of Figure 5, excluding the central portion, are configured in the same manner as the inter-pixel isolation portion 131, and the area near the central portion is formed from an intra-pixel isolation portion 144 formed by a P-type impurity implant.

[0084] In the following, when there is no need to particularly distinguish between the photoelectric conversion units 141-1 and 141-2, the charge holding units 142-1 and 142-2, and the charge transfer units 143-1 and 143-2, they will simply be referred to as the photoelectric conversion unit 141, the charge holding unit 142, and the charge transfer unit 143, and the same will be used for other components.

[0085] As seen from the top view in the upper left of FIG. 5, the inter-pixel isolation portion 131 extending in a convex shape from the top to bottom direction in the drawing is, like the other inter-pixel isolation portions 131, configured with polysilicon 172-1 to 172-4 in the range from the trench bottom in the FFTI (Front Full Trench Isolation) excluding the upper layer portion, as shown in the upper right and lower left of FIG. 5, and with oxide films 171-1 to 171-4 configured in the upper layer portion above that.

[0086] In the upper right part of Fig. 5, OF gates 161-1 and 161-2 are embedded in oxide films 171-1 and 171-2 of the inter-pixel isolation portion 131, which extend convexly from the top and bottom directions in the figure when viewed from the top view in the upper left part of Fig. 5 and are formed so as to sandwich the intra-pixel isolation portion 144 from the top and bottom directions in the figure. Furthermore, contacts 162-1 and 162-2, which are formed by filling vias with a metal material, are electrically connected to the upper surfaces of the OF gates 161-1 and 161-2. An overflow path 173 made of an n-type semiconductor region is formed between the OF gates 161-1 and 161-2.

[0087] 5 shows a state in which the back surface has not been polished and the photoelectric conversion unit 141 has been formed on the substrate 174. The substrate 174 at the bottom of the lower left in the figure (similar to the right end of the substrate 174 at the top right) is eventually polished away, exposing the photoelectric conversion units 141-1 and 141-2 and enabling them to receive incident light and perform photoelectric conversion.

[0088] In pixel 111 in FIG. 5, when a voltage is applied between OF gates 161-1 and 161-2, the potential barrier in the range between OF gates 161-1 and 161-2 is controlled in the vertical direction in the upper right part of FIG. 5 that constitutes intra-pixel isolation section 144, thereby enabling charge transfer in overflow path (hereinafter also referred to as OF path) 173.

[0089] Incidentally, OF gates 161-1 and 161-2 in Fig. 5 have a configuration corresponding to the OF gate 105 in Fig. 4, and OF path 173 has a configuration corresponding to the OF path 104 in Fig. 4. In Fig. 4, the OF path 104 is configured to be controlled solely by the voltage applied to the OF gate 105, but in the configuration in Fig. 5, the potential barrier of the OF path 173 is controlled by the voltages applied to both OF gates 161-1 and 161-2.

[0090] As a result, when generating a phase difference signal, the application of voltage from the OF gates 161-1 and 161-2 is stopped, the potential barrier of the intra-pixel isolation section 144 is raised, and the OF path 173 is put into a blocked state, thereby blocking the overflow of charge and suppressing a decrease in the amount of saturated charge.

[0091] By such control, two signals based on the charges respectively generated by photoelectric conversion in the two photoelectric conversion units 141-1 and 141-2 are used separately and output as a phase difference signal.

[0092] On the other hand, when generating an image signal, voltage is applied from OF gates 161-1 and 161-2 to lower the potential barrier of the intra-pixel isolation section 144 and open the OF path 173, thereby allowing charge overflow between the photoelectric conversion sections 141-1 and 141-2.

[0093] With this control, when generating an image signal, the charges generated by the photoelectric conversion of the two photoelectric conversion units 141-1 and 141-2 are added together, and an image signal generated based on the added charges is output.

[0094] Furthermore, since the OF bus 73 is configured to apply a voltage between the OF gates 161-1 and 161-2, whereas the OF gate 61 in Figure 2 could only apply a voltage to a limited range that contacts the intra-pixel isolation portion 44, it is possible to apply a voltage to a wide range of the intra-pixel isolation portion 144 between the OF gates 161-1 and 161-2, and therefore it is possible to form an OF path 173 with a larger capacity than the OF path 73 in Figure 2.

[0095] Furthermore, since the layer on which the charge transfer sections 143-1 and 143-2 are formed is different from the layer on which the OF gates 161-1 and 161-2 are formed, it is possible to reduce the influence of the electric field on both the charge transfer sections 143-1 and 143-2 and the OF gates 161-1 and 161-2, and this prevents a reduction in the degree of freedom in the layout of the charge transfer sections 143-1 and 143-2.

[0096] Furthermore, by individually adjusting the voltages applied to the OF gates 161-1 and 161-2, it is possible to control the position of the OF path 173 between the OF gates 161-1 and 161-2.

[0097] Therefore, for example, as shown by the left-pointing arrow in the upper left corner of Figure 5, it is also possible to form the OF path 173 at a position lower than the vertical center position of the photoelectric conversion units 141-1 and 141-2 in the figure, and closer to the charge transfer units 143-1 and 143-2.

[0098] By forming the OF path 173 in a position close to the charge transfer sections 143-1 and 143-2 in this way, it is possible to improve the efficiency of transferring charges to the charge transfer sections 143-1 and 143-2.

[0099] With the above configuration, by using the OF gates 161-1 and 161-2 to control the potential barrier of the OF path 173 in the intra-pixel isolation unit 144, it is possible to reduce the influence of the electric field around the charge transfer units 143-1 and 143-2 while suppressing a reduction in the amount of saturated charge when reading out a phase difference signal, thereby suppressing a reduction in the degree of freedom in the layout of the charge transfer units 143-1, 143-2, etc. Furthermore, by individually adjusting the voltages applied to the OF gates 161-1 and 161-2, it is possible to control the position where the OF path 173 is formed.

[0100] <Method of Manufacturing Image Sensor> Next, a method of manufacturing the pixel 111 will be described with reference to Fig. 6. Note that Fig. 6 shows each step of the manufacturing method using the cross section b in the upper left of Fig. 5.

[0101] In the first process St1, a trench corresponding to the outer shape of the inter-pixel isolation portion 131 is formed in the substrate 174 by FFTI, and polysilicon 172-1, 172-2 and oxide films 171-1, 171-2 are buried into the formed trench from the bottom, thereby forming the inter-pixel isolation portion 131.

[0102] In the second process St2, the intra-pixel isolation portion 144 made of a P-type impurity implant is formed by ion implantation.

[0103] In the third process St3, recessed portions 171a-1 and 171a-2 for forming OF gates 161-1 and 161-2 are formed in the oxide film 171.

[0104] In a fourth process St4, polysilicon is buried in the recessed portions 171a-1 and 171a-2, respectively, to form OF gates 161-1 and 161-2.

[0105] In a fifth process St5, an OF path 173 made of an n-type semiconductor region is formed between the OF gates 161-1 and 161-2 in the intra-pixel isolation portion 144.

[0106] Furthermore, a wiring layer is formed in the upper layer of the oxide film 171 including the OF gates 161-1 and 161-2 in the drawing. As a result, charge transfer sections 143-1 and 143-2 (not shown in FIG. 6) are formed, and vias are formed up to the OF gates 161-1 and 161-2, respectively, and are filled with metal wiring to form contacts 162-1 and 162-2.

[0107] Finally, although not shown, the back surface side (lower side in the drawing) of the substrate 174 is ground to make it thinner, and an insulating film, a color filter, and an on-chip lens are disposed, thereby completing the pixel 111 .

[0108] <Effects of Overflow Gate> Next, the effects of the overflow gate 161 will be described with reference to FIG.

[0109] The upper and lower parts of Figure 7 represent the relationship between the position in the pixel 111 and the potential at each position in the image signal mode and the phase difference signal mode, respectively, with the horizontal axis representing the position in the pixel 111 and the vertical axis representing the potential.

[0110] More specifically, from the left in the figure, the potential barriers of the charge holding section (FD1) 143-1, charge transfer section (TG1) 143-1, photoelectric conversion section (PD1) 141-1, OF gate (Gate) 161, photoelectric conversion section (PD2) 141-2, charge transfer section (TG2) 143-2, and charge holding section (FD2) 143-2 are shown.

[0111] In addition, the middle part of Figure 7 shows the relationship between the charge input and charge output of each of the photoelectric conversion units (PD1, PD2) 141-1 and 141-2 in the image signal mode, where the dotted line represents the photoelectric conversion unit (PD1) 141-1, the dotted line represents the photoelectric conversion unit (PD2) 141-2, and the solid line represents the combined result of the photoelectric conversion units (PD1, PD2) 141-1 and 141-2.

[0112] As shown in the upper part of Figure 7, in the image signal mode, during the exposure period (period Z1 + Z2), a high potential is formed by the charge transfer units (TG1, TG2) 143-1, 143-2, and charges generated according to the amount of incident light are accumulated in the photoelectric conversion units (PD1, PD2) 141-1, 141-2.

[0113] By applying a voltage through the OF gate 161, the overflow potential barrier is controlled to be low, so that, for example, when charge overflows in the photoelectric conversion unit (PD2) 141-2, as shown by the arrow, the overflowed charge is transferred through the OF path 173 to the adjacent photoelectric conversion unit (PD1) 141-1.

[0114] That is, during a period Z1 in the middle part of FIG. 7, charges are accumulated at different speeds in the photoelectric conversion units (PD1, PD2) 141-1 and 141-2, and the outputs increase.

[0115] In period Z2, the photoelectric conversion unit (PD2) 141-2 is saturated first, and as described above, the overflowing charges flow into the photoelectric conversion unit (PD1) 141-1 via the OF path 173. As a result, the output of the photoelectric conversion unit (PD2) 141-2 becomes constant, but the output of the photoelectric conversion unit (PD1) 141-1 increases.

[0116] After that, in period Z3, the photoelectric conversion unit (PD1) 141-1 also saturates and the output becomes constant. By providing the OF path 173, the output obtained by adding up the left and right pixels in either region can maintain linearity as shown by the solid line.

[0117] In addition, in the phase difference signal mode, for example, when charges are transferred from the photoelectric conversion unit (PD1) 141-1 to the charge transfer unit (TG1) 143-1, if there is no OF gate 161, the overflow potential is low and the amount of charge decreases.

[0118] However, in the configuration of the present disclosure, as shown in the lower part of Figure 7, by stopping the application of voltage to the OF gate 161 and increasing the overflow potential, it is possible to prevent charge transfer between the left and right photoelectric conversion units (PD1, PD2) 141-1, 141-2, thereby making it possible to suppress a decrease in the amount of saturated charge.

[0119] <<3. Second Embodiment>> In the above, an example in which FFTI is used to form inter-pixel isolation portions has been described, but they may also be formed using RDTI (Rear Deep Trench Isolation).

[0120] FIG. 8 shows an example of the configuration of a pixel in which the inter-pixel isolation section is formed using RDTI.

[0121] The pixel 211 in Figure 8 is composed of an inter-pixel isolation section 231, photoelectric conversion sections 241-1 and 241-2, charge retention sections (FD) 242-1 and 242-2, charge transfer sections (TG) 243-1 and 243-2, an intra-pixel isolation section 244, OF gates 261-1 and 261-2, contacts 262-1 and 262-2, oxide films 271-1 to 271-4, polysilicon 272-1 to 272-4, OF path 273, and a substrate 274.

[0122] 8. The inter-pixel isolation portion 231 to the substrate 274 in the pixel 211 in FIG. 8 correspond to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0123] However, the difference is that the inter-pixel isolation section 131 is formed of FFTI, whereas the inter-pixel isolation section 231 is formed of RDTI.

[0124] That is, the trench processing formed to form the inter-pixel isolation portion 131 in pixel 111 in FIG. 5 is performed in a processing step on the back side relative to the incident surface through which incident light is incident, whereas the trench processing formed to form the inter-pixel isolation portion 231 in pixel 211 in FIG. 8 is performed in a processing step on the incident surface side.

[0125] The pixel 211 in FIG. 8 can also achieve the same effect as the pixel 111 in FIG.

[0126] <<4. Third Embodiment>> In the above, an example has been described in which the inter-pixel isolation portion is formed using rear deep trench isolation (RDTI), but it is also possible to use ion implantation (II).

[0127] FIG. 9 shows an example of the configuration of a pixel in which the inter-pixel isolation portion is formed using II.

[0128] The pixel 311 in FIG. 9 is composed of an inter-pixel isolation section 331, photoelectric conversion sections 341-1 and 341-2, charge retention sections (FD) 342-1 and 342-2, charge transfer sections (TG) 343-1 and 343-2, an intra-pixel isolation section 344, OF gates 361-1 and 361-2, contacts 362-1 and 362-2, OF path 373, and a substrate 374.

[0129] Note that the inter-pixel isolation portion 331 to the substrate 374 in the pixel 311 in FIG. 9 have a configuration corresponding to the configuration of the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5 excluding the oxide films 171-1 to 171-4 and the polysilicon films 172-1 to 172-4, and have basically the same functions.

[0130] However, the difference is that the inter-pixel isolation section 131 is formed of FFTI, whereas the inter-pixel isolation section 331 in FIG. 9 is formed of II.

[0131] That is, while trench processing is performed in pixel 111 in Fig. 5 and pixel 211 in Fig. 7, inter-pixel isolation portion 331 is formed in step II in pixel 311 in Fig. 9. By performing step II, both inter-pixel isolation portion 331 and intra-pixel isolation portion 344 are formed by P-type impurity implantation in pixel 311 in Fig. 9.

[0132] The pixel 311 in FIG. 9 can also achieve the same effect as the pixel 111 in FIG.

[0133] <<5. Fourth Embodiment>> In the above, an example has been described in which the OF gate 161 is formed by being embedded in the recessed portion 171 a on the surface side of the oxide film 171, where the charge transfer portion (TG1) 143 and the like are formed, but the OF gate 161 may also be formed to a predetermined depth from the surface.

[0134] FIG. 10 shows an example of the configuration of a pixel in which the OF gate is formed at a predetermined depth from the surface layer where the charge transfer section (TG1) 143 and the like are formed.

[0135] The pixel 411 in FIG. 10 is composed of an inter-pixel isolation section 431, photoelectric conversion sections 441-1 and 441-2, charge retention sections (FD) 442-1 and 442-2, charge transfer sections (TG) 443-1 and 443-2, an intra-pixel isolation section 444, OF gates 461-1 and 461-2, contacts 462-1 and 462-2, oxide films 471-1 to 471-4, polysilicon 472-1 to 472-4, OF path 473, and a substrate 474.

[0136] 10. The inter-pixel isolation portion 431 to the substrate 474 in the pixel 411 in FIG. 10 have configurations corresponding to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0137] However, the difference is that OF gates 461-1 and 461-2 and OF path 473 are formed at a predetermined depth from the surface of oxide films 471-1 and 471-2. The depth here refers to the depth direction indicated by the arrow in the upper right corner of FIG. 10, that is, the depth in the direction opposite to the incident direction of incident light.

[0138] The depth from the surface where the OF gates 461-1 and 461-2 and OF path 473 are formed can be set arbitrarily.

[0139] In the manufacturing process, after the OF gate 161 is formed, a step of covering the surface with an oxide film again to a desired depth is added to the process described with reference to FIG.

[0140] With this configuration, the OF path 473 is susceptible to the influence of the electric field caused by the charge transfer sections (TG) 443-1, 443-2 and the implants near the surface near the surface, so by forming it at a deeper position, it is possible to further reduce the influence of the electric field.

[0141] In the pixel 411 of FIG. 10, an example in which the inter-pixel isolation portion 431 is formed of FFTI is shown, but it may be formed of RDTI or II.

[0142] <<6. Fifth Embodiment>> In the above, an example has been described in which, after the OF gates 161-1 and 161-2 are formed, vias are formed to connect the wiring layer and the OF gates 161-1 and 161-2, and the vias are filled with a metal material, thereby forming the contacts 162-1 and 162-2.

[0143] However, an OF gate may be formed so as to straddle the OF path, so that the OF path can be controlled by one contact.

[0144] FIG. 11 shows an example of a pixel configuration in which an OF gate is formed so as to straddle an OF path, and the OF path can be controlled by one contact.

[0145] The pixel 511 in FIG. 11 is composed of an inter-pixel isolation section 531, photoelectric conversion sections 541-1 and 541-2, charge retention sections (FD) 542-1 and 542-2, charge transfer sections (TG) 543-1 and 543-2, an intra-pixel isolation section 544, an OF gate 561, a contact 562, oxide films 571-1 to 571-4, polysilicon 572-1 to 572-4, an OF path 573, and a substrate 574.

[0146] 11. The inter-pixel isolation portion 531 to the substrate 574 in the pixel 511 in FIG. 11 have configurations corresponding to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0147] However, unlike the OF gates 161-1 and 161-2 of the pixel 111 in FIG. 5, the OF gate 561 has a shape similar to a Fin-type transistor gate, is formed of Poly-Si so as to straddle the OF path 673, and is composed of a single contact 562 instead of the contacts 162-1 and 162-2.

[0148] With this configuration, the OF gate 561 can apply a voltage to the OF path 573 not only in a direction perpendicular to the incident direction of incident light but also in a direction opposite to the incident direction of incident light. Also, since there is only one contact 562, the number of contacts can be reduced compared to the pixel 111, which also improves the degree of freedom in the layout of the wiring layer.

[0149] In the pixel 511 of FIG. 11, an example in which the inter-pixel isolation portion 531 is formed of FFTI is shown, but it may be formed of RDTI or II.

[0150] <<7. Sixth Embodiment>> In the above, an example has been described in which an OF gate is formed so as to straddle an OF path, and the OF path can be controlled by one contact.

[0151] However, the OF gate may be formed so as not to be buried in the oxide film, that is, in the layer where the charge transfer section is formed.

[0152] FIG. 12 shows an example of a pixel configuration in which the OF gate is formed in the layer where the charge transfer section is formed so as not to be buried in the oxide film.

[0153] The pixel 611 in FIG. 12 is composed of an inter-pixel isolation section 631, photoelectric conversion sections 641-1 and 641-2, charge retention sections (FD) 642-1 and 642-2, charge transfer sections (TG) 643-1 and 643-2, an intra-pixel isolation section 644, OF gates 661-1 and 661-2, contacts 662-1 and 662-2, oxide films 671-1 to 671-4, polysilicon 672-1 to 672-4, OF path 673, and a substrate 674.

[0154] 12. The inter-pixel isolation portion 631 to the substrate 674 in the pixel 611 in FIG. 12 have a configuration corresponding to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0155] However, unlike the OF gates 161-1 and 161-2 of the pixel 111 in FIG. 5, the OF gates 661-1 and 661-2 are formed in the same layer as the charge transfer sections (TG) 643-1 and 643-2.

[0156] With this configuration, similar to the pixel 51 described with reference to FIG. 2, the charge transfer sections (TG) 643-1 and 643-2 can be formed in the same process, thereby reducing the number of steps.

[0157] In the pixel 611 of FIG. 12, an example in which the inter-pixel isolation portion 631 is formed of FFTI is shown, but it may be formed of RDTI or II.

[0158] <<8. Seventh embodiment>> In the above, an example has been described in which OF gates are configured to sandwich an OF path, but it is also possible to control the OF path by providing an OF gate only at one end of the OF path.

[0159] FIG. 13 shows an example of a pixel configuration in which an OF gate is provided only at one end of an OF path to control the OF path.

[0160] The pixel 711 in FIG. 13 is composed of an inter-pixel isolation section 731, photoelectric conversion sections 741-1 and 741-2, charge retention sections (FD) 742-1 and 742-2, charge transfer sections (TG) 743-1 and 743-2, an intra-pixel isolation section 744, an OF gate 761, a contact 762, oxide films 771-1 to 771-4, polysilicon 772-1 to 772-4, an OF path 773, and a substrate 774.

[0161] 13. The inter-pixel isolation portion 731 to the substrate 774 in the pixel 711 in FIG. 13 correspond to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0162] However, unlike the OF gates 161-1 and 161-2 of the pixel 111 in FIG. 5, only one OF gate 761 is formed on the oxide film 771-2 on the upper side in the drawing, as shown in the upper right part of FIG.

[0163] This configuration reduces the number of steps by requiring only one OF gate 761 and one contact 762. Furthermore, reducing the number of gates and contacts improves the degree of freedom in layout.

[0164] In the pixel 711 of FIG. 13, an example in which the inter-pixel isolation portion 731 is formed of FFTI is shown, but it may be formed of RDTI or II.

[0165] <<9. Eighth Embodiment>> In the above, an example has been described in which an OF gate is provided only at one end of an OF path to control the OF path, but similar pixels may be adjacent to each other, and further, an OF gate may be shared between adjacent pixels.

[0166] FIG. 14 shows an example of a pixel configuration in which an OF gate is provided only at one end of the OF gate to control the OF path, and the OF gate is shared between adjacent pixels.

[0167] 14 is a diagram showing a state in which two pixels 811-1 and 811-2 are adjacent to each other at the top and bottom of the figure. The pixel 811 in Fig. 14 is composed of an inter-pixel isolation section 831, photoelectric conversion sections 841-1 to 841-4, charge retention sections (FD) 842-1 to 842-4, charge transfer sections (TG) 843-1 to 843-4, an intra-pixel isolation section 844, an OF gate 861, a contact 862, oxide films 871-0 to 871-4, polysilicon 872-0 to 872-4, OF paths 873-1 and 873-2, and a substrate 874.

[0168] 14. The inter-pixel isolation portion 831 to the substrate 874 in the pixel 811 in FIG. 14 have configurations corresponding to the inter-pixel isolation portion 131 to the substrate 174 in FIG. 5, and basically have the same functions.

[0169] However, unlike the OF gates 161-1 and 161-2 and contacts 162-1 and 162-2 of pixel 111 in Fig. 5, the OF gate 861 and contact 862 are shared by pixels 811-1 and 811-2, as shown in Fig. 14, and control OF paths 873-1 and 873-2 in pixels 811-1 and 811-2 extending thereto, respectively. Also, because the OF gate 861 and contact 862 are shared, the layouts of pixels 811-1 and 811-2 are inverted upside down, as shown in the upper left corner of Fig. 14.

[0170] This configuration allows one OF gate 861 and one contact 862 for every two pixels, thereby reducing the number of processes. In addition, the number of OF gates and contacts can be reduced, improving the degree of freedom in layout.

[0171] In the pixel 811 of FIG. 14, an example in which the inter-pixel isolation portion 831 is formed of FFTI is shown, but it may be formed of RDTI or II.

[0172] <<10. Application Examples to Electronic Devices>> The image sensor 81 in FIG. 3 described above can be applied to various electronic devices, such as imaging devices such as digital still cameras and digital video cameras, mobile phones with an imaging function, or other devices with an imaging function.

[0173] FIG. 15 is a block diagram showing an example of the configuration of an imaging device as an electronic device to which the present technology is applied.

[0174] The imaging device 1001 shown in Figure 15 is configured with an optical system 1002, a shutter device 1003, a solid-state imaging element 1004, a drive circuit 1005, a signal processing circuit 1006, a monitor 1007, and a memory 1008, and is capable of capturing still images and moving images.

[0175] The optical system 1002 is configured with one or more lenses, and guides light from a subject (incident light) to the solid-state image sensor 1004 to form an image on the light-receiving surface of the solid-state image sensor 1004 .

[0176] The shutter device 1003 is disposed between the optical system 1002 and the solid-state image sensor 1004 , and controls the light irradiation period and light blocking period for the solid-state image sensor 1004 under the control of the drive circuit 1005 .

[0177] The solid-state imaging element 1004 is configured as a package including the above-mentioned solid-state imaging element. The solid-state imaging element 1004 accumulates signal charges for a certain period of time in response to light that is imaged on the light-receiving surface via the optical system 1002 and the shutter device 1003. The signal charges accumulated in the solid-state imaging element 1004 are transferred in accordance with a drive signal (timing signal) supplied from a drive circuit 1005.

[0178] The drive circuit 1005 outputs drive signals that control the transfer operation of the solid-state image sensor 1004 and the shutter operation of the shutter device 1003 , thereby driving the solid-state image sensor 1004 and the shutter device 1003 .

[0179] The signal processing circuit 1006 performs various signal processing on the signal charges output from the solid-state imaging device 1004. The image (image data) obtained by the signal processing performed by the signal processing circuit 1006 is supplied to a monitor 1007 for display, or supplied to a memory 1008 for storage (recording).

[0180] Even in the imaging device 1001 configured in this manner, it is possible to achieve a smaller and thinner device configuration by applying the imaging element 81 of Fig. 3 instead of the optical system 1002 and the solid-state imaging element 1004 described above. Furthermore, by applying the imaging element 81 of Fig. 3 instead of the optical system 1002 and the solid-state imaging element 1004 described above, it is possible to suppress a reduction in the degree of freedom in layout.

[0181] <<11. Usage Example of Solid-State Imaging Device>> FIG. 16 is a diagram showing an example of usage of the above-described imaging element 81. In FIG.

[0182] The above-described imaging element 81 can be used in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows.

[0183] ・Devices for taking images for viewing purposes, such as digital cameras and mobile devices with camera functions. ・Devices for traffic purposes, such as in-vehicle sensors that take images of the front, rear, surroundings, and interior of a car for safe driving such as automatic stopping, and for recognizing the driver's state, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles. ・Devices for home appliances such as TVs, refrigerators, and air conditioners that take images of user gestures and operate the device according to those gestures. ・Devices for medical and healthcare purposes, such as endoscopes and devices that take images of blood vessels by receiving infrared light. ・Devices for security purposes, such as surveillance cameras for crime prevention and cameras for person authentication. ・Devices for beauty purposes, such as skin measuring devices that take images of the skin and microscopes that take images of the scalp. ・Devices for sports purposes, such as action cameras and wearable cameras for sports, etc. ・Devices for agricultural purposes, such as cameras to monitor the condition of fields and crops.

[0184] Furthermore, each step described in the above flowchart can be executed by one device, or can be shared and executed by a plurality of devices.

[0185] Furthermore, when one step includes multiple processes, the multiple processes included in that one step can be executed by one device or can be shared and executed by multiple devices.

[0186] The present disclosure may also have the following configuration: <1> An imaging element comprising: a pixel having a plurality of photoelectric conversion units that photoelectrically convert incident light from a subject to generate electric charges; an intra-pixel isolation unit disposed in the pixel and isolating the plurality of photoelectric conversion units; an overflow path disposed in the intra-pixel isolation unit and transferring overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate disposed in the pixel and adjusting a potential of the overflow path by applying a voltage in a direction perpendicular to the incident direction of the incident light; and an image signal generation unit that generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and that generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units. <2> The image sensor according to <1>, further including: an inter-pixel separation section disposed at a boundary between the pixels; a charge retention section for retaining the generated charges; and a plurality of charge transfer sections disposed for each of the plurality of photoelectric conversion sections, for transferring the generated charges to the charge retention section and retaining them therein, wherein the plurality of charge transfer sections perform collective transfer, in which the charges generated by the plurality of photoelectric conversion sections are commonly transferred to the charge retention section and the charge retention section simultaneously retains the charges generated by the plurality of photoelectric conversion sections, and individual transfer, in which the charges generated by the plurality of photoelectric conversion sections are individually transferred to the charge retention section, wherein the image signal generation section generates the image signal based on the charges collectively retained in the charge retention section by the collective transfer, and generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the charges individually retained in the charge retention section by the individual transfer. <3> The image sensor according to <2>, wherein the overflow gate is embedded in the inter-pixel separation section. <4> The image sensor according to <2>, wherein the overflow gate is embedded in a surface layer of an oxide film of the inter-pixel separation section. <5> The image sensor according to <2>, wherein the overflow gate is embedded to a predetermined depth in the oxide film of the inter-pixel isolation portion in a direction opposite to the incident direction of the incident light.<6> The image sensor according to <2>, wherein the overflow gate has a fin-type gate structure. <7> The image sensor according to <2>, wherein the overflow gate is formed in the same layer as the layer in which the plurality of charge transfer units are formed. <8> The image sensor according to <2>, wherein the overflow gate is formed in a position adjacent to the overflow path in a direction perpendicular to the incident direction of the incident light. <9> The image sensor according to <8>, wherein two overflow gates are formed, and are formed in adjacent positions on either side of the overflow path in a direction perpendicular to the incident direction of the incident light. <10> The image sensor according to <2>, wherein one overflow gate is formed, and is formed in a position adjacent to one end of the overflow path in a direction perpendicular to the incident direction of the incident light. <11> The image sensor according to <2>, wherein one overflow gate is formed across the inter-pixel isolation portion formed between adjacent pixels and shared between the adjacent pixels. <12> The image sensor according to <2>, wherein the inter-pixel isolation portion is formed by FFTI (Front Full Trench Isolation). <13> The image sensor according to <2>, wherein the inter-pixel isolation portion is formed by RDTI (Rear Deep Trench Isolation). <14> The image sensor according to <2>, wherein the inter-pixel isolation portion is formed by II (Ion Implantation).<15> An imaging device having an imaging element including: a pixel having a plurality of photoelectric conversion units that photoelectrically convert incident light from a subject to generate electric charges; an intra-pixel isolation unit that is disposed in the pixel and isolates the plurality of photoelectric conversion units; an overflow path that is disposed in the intra-pixel isolation unit and transfers overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate that is disposed in the pixel and adjusts a potential of the overflow path by applying a voltage in a direction perpendicular to the incident direction of the incident light; and an image signal generation unit that generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and that generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units. <16> An electronic device having an imaging element including: a pixel having a plurality of photoelectric conversion units that photoelectrically convert incident light from a subject to generate electric charges; an intra-pixel isolation unit that is disposed in the pixel and isolates the plurality of photoelectric conversion units; an overflow path that is disposed in the intra-pixel isolation unit and transfers electric charges overflowing between the plurality of photoelectric conversion units; an overflow gate that is disposed in the pixel and adjusts a potential of the overflow path by applying a voltage in a direction perpendicular to the incident direction of the incident light; and an image signal generation unit that generates an image signal based on an aggregate of electric charges generated by the plurality of photoelectric conversion units, and that generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on electric charges individually generated by each of the plurality of photoelectric conversion units.

[0187] 81 imaging element, 93 pixel, 101-1, 101-2 photoelectric conversion section, 102-1, 102-2 charge retention section, 103-1, 103-2 charge transfer section, 104 overflow path (OF path), 105 overflow gate (OF gate), 106 image signal generation section, 107 reset transistor, 108 amplification transistor, 109 selection transistor, 131 inter-pixel isolation section, 141-1, 141-2 photoelectric conversion section, 144 intra-pixel isolation section, 161-1, 161-2 OF gate, 173 OF path, 231 inter-pixel isolation section, 241-1, 241-2 photoelectric conversion section, 244 intra-pixel isolation section, 261-1, 261-2 OF gate, 273 OF path, 331 inter-pixel isolation section, 341-1, 341-2 photoelectric conversion section, 344 intra-pixel isolation section, 361-1, 361-2 OF gate, 373 OF path, 431 inter-pixel isolation section, 441-1, 441-2 photoelectric conversion section, 444 intra-pixel isolation section, 461-1, 461-2 OF gate, 473 OF path, 531 inter-pixel isolation section, 541-1, 541-2 photoelectric conversion section, 544 intra-pixel isolation section, 561 OF gate, 573 OF path, 631 inter-pixel isolation section, 641-1, 641-2 photoelectric conversion section, 644 intra-pixel isolation section, 661-1, 661-2 OF gate, 673 OF path, 731 inter-pixel isolation section, 741-1, 741-2 Photoelectric conversion units, 744 Intra-pixel isolation unit, 761 OF gate, 773 OF path, 831 Inter-pixel isolation unit, 841-1 to 841-4 Photoelectric conversion units, 844-1, 844-2 Intra-pixel isolation unit, 861 OF gate, 873-1, 873-2 OF path

Claims

1. An imaging element comprising: a pixel having a plurality of photoelectric conversion units which generate electric charges by photoelectrically converting incident light from a subject; an intra-pixel isolation unit disposed in the pixel and isolating the plurality of photoelectric conversion units; an overflow path disposed in the intra-pixel isolation unit and transferring overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate disposed in the pixel and adjusting the potential of the overflow path by applying a voltage in a direction perpendicular to the incidence direction of the incident light; and an image signal generation unit which generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and which generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units.

2. An imaging element as described in claim 1, further comprising: an inter-pixel separation section disposed at a boundary between the pixels; a charge holding section for holding the generated charges; and a plurality of charge transfer sections disposed in each of the plurality of photoelectric conversion sections for transferring the generated charges to the charge holding section for holding therein, wherein the plurality of charge transfer sections perform collective transfer, in which the charges generated by each of the plurality of photoelectric conversion sections are commonly transferred to the charge holding section and the charges generated by the plurality of photoelectric conversion sections are simultaneously collectively held in the charge holding section, and individual transfer, in which the charges generated by each of the plurality of photoelectric conversion sections are individually transferred to the charge holding section, and the image signal generation section generates the image signal based on the charges collectively held in the charge holding section by the collective transfer, and generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on each of the charges individually held in the charge holding section by the individual transfer.

3. The imaging element according to claim 2, wherein the overflow gate is formed embedded in the inter-pixel isolation portion.

4. The image sensor according to claim 2, wherein the overflow gate is formed by being embedded in a surface layer of an oxide film of the inter-pixel isolation portion.

5. The image sensor according to claim 2, wherein the overflow gate is embedded in the oxide film of the inter-pixel isolation portion to a predetermined depth in a direction opposite to the incident direction of the incident light.

6. The image sensor according to claim 2, wherein the overflow gate has a fin-type gate structure.

7. The image sensor according to claim 2, wherein the overflow gate is formed in the same layer as the layer in which the plurality of charge transfer sections are formed.

8. The image sensor according to claim 2, wherein the overflow gate is formed at a position adjacent to the overflow path in a direction perpendicular to the incident direction of the incident light.

9. The imaging element according to claim 8, wherein two overflow gates are formed, and are formed in adjacent positions on either side of the overflow path, perpendicular to the incident direction of the incident light.

10. The imaging element according to claim 2, wherein one overflow gate is formed, and is formed in a position relative to the overflow path, perpendicular to the incident direction of the incident light, and adjacent to one of the ends of the overflow path.

11. The image sensor according to claim 2, wherein the overflow gate is formed across the inter-pixel isolation portion formed between adjacent pixels and is shared between the adjacent pixels.

12. The image sensor according to claim 2, wherein the inter-pixel isolation section is formed by FFTI (Front Full Trench Isolation).

13. The image sensor according to claim 2, wherein the inter-pixel isolation portion is formed by RDTI (Rear Deep Trench Isolation).

14. The image sensor according to claim 2, wherein the inter-pixel isolation portion is formed by II (Ion Implantation).

15. An imaging device having an imaging element including: a pixel having a plurality of photoelectric conversion units that generate electric charges by photoelectrically converting incident light from a subject; an intra-pixel isolation unit disposed in the pixel and isolating the plurality of photoelectric conversion units; an overflow path disposed in the intra-pixel isolation unit and transferring overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate disposed in the pixel and adjusting the potential of the overflow path by applying a voltage in a direction perpendicular to the incidence direction of the incident light; and an image signal generation unit that generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and that generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units.

16. An electronic device having an imaging element comprising: a pixel having a plurality of photoelectric conversion units which generate electric charges by photoelectrically converting incident light from a subject; an intra-pixel isolation unit disposed in the pixel and isolating the plurality of photoelectric conversion units; an overflow path disposed in the intra-pixel isolation unit and transferring overflowing electric charges between the plurality of photoelectric conversion units; an overflow gate disposed in the pixel and adjusting the potential of the overflow path by applying a voltage in a direction perpendicular to the incidence direction of the incident light; and an image signal generation unit which generates an image signal based on a combined electric charge generated by the plurality of photoelectric conversion units, and which generates a plurality of phase difference signals for pupil-dividing the subject and detecting an image plane phase difference based on the electric charges individually generated by each of the plurality of photoelectric conversion units.

Images