Method for manufacturing group iii nitride semiconductor template with improvement in quality of bonding layer
By employing a two-stage heat treatment process during the bonding layer formation in the manufacturing of group 3-type nitride semiconductor templates, the method addresses issues of leakage current and crystalline quality, resulting in improved bonding force and device reliability.
WO2025058145A1PCT designated stage expired Publication Date: 2025-03-20WAVELORD CO LTD
Patent Information
- Application Number
- PCT/KR2024/000819
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-14
- Filing Date
- 2024-01-17
- Publication Date
- 2025-03-20
Smart Images

Figure KR2024000819_20032025_PF_FP_ABST
Abstract
The present invention relates to a method for manufacturing a group III nitride semiconductor template with an improvement in the quality of a bonding layer and, more specifically, to a method for manufacturing a group III nitride semiconductor template including a high-quality group III nitride semiconductor seed layer, wherein the quality of the bonding layer can be significantly improved by performing heat treatment on the bonding layer in two steps, according to the temperature.
Need to check novelty before this filing date? Find Prior Art
Citation Information
Patent Citations
Vertical structured semiconductor light emitting device and method for producing thereof
KR1020110058122A
Laser lift-off for semiconductor devices and semiconductor devices thereby
KR1020180079601A
Organic light emitting device
KR1020210111199A
Cold chain device for vehicle
KR1020230158874A
KR20230127695A