Tandem OLED structure and display panel

Abstract

Disclosed in the present application are a tandem OLED structure and a display panel. The tandem OLED structure comprises a cathode layer, an anode layer, several light-emitting material layers, a charge generation layer, a hole blocking layer and an isolation part. The hole blocking layer is located on the side of the cathode layer close to the light-emitting material layers, and the hole blocking layer isolates the charge generation layer from the cathode layer in a first direction. The isolation part is located on the edge of the charge generation layer, and the isolation part isolates the charge generation layer from the cathode layer in a second direction. The first direction is parallel to the direction from the cathode layer to the anode layer, and the second direction is perpendicular to the direction from the cathode layer to the anode layer. By means of configuring the isolation part to isolate the charge generation layer from the cathode layer in the second direction, the present application prevents holes produced in the charge generation layer and electrons produced in the cathode layer from undergoing recombination quenching which disturbs the orderly distribution and transmission of electrons and holes in the charge generation layer, thereby improving the light emission efficiency of the light-emitting material layers.

Description

Tandem OLED structure and display panel Technical Field

[0001] The present invention relates to the field of display devices, and in particular to a series-type OLED structure and a display panel. Background Art

[0002] With the development of display technology, people's requirements for display quality of display devices are becoming higher and higher. Compared with ordinary OLED devices, Tandem OLED devices have the characteristics of long life, narrow half-width (half-maximum) (for achieving a high color gamut), and low power consumption.

[0003] In Tandem OLED devices, the light-emitting material layers are connected by CGL (charge generation layer). Under the action of the electric field, charge separation occurs in the CGL layer, and electrons and holes are transmitted to different light-emitting material layers respectively. Under the same current density, the luminous efficiency is several times that of a single-stack OLED device.

[0004] However, in existing Tandem OLEDs, holes generated in the CGL are affected by electrons in the cathode layer, thereby affecting the luminous efficiency of the light-emitting material layer.

[0005] Summary of the Invention

[0006] The purpose of this application is to provide a series OLED structure and display panel with high luminous efficiency.

[0007] The present application discloses a tandem OLED structure, which comprises:

[0008] cathode layer;

[0009] Anode layer;

[0010] a plurality of light-emitting material layers, wherein the plurality of light-emitting material layers are connected in series and are located between the cathode layer and the anode layer;

[0011] a charge generation layer, wherein the charge generation layer is located between the plurality of light-emitting material layers, and a projection of the light-emitting material layer in a first direction falls into the charge generation layer;

[0012] a hole blocking layer, located on a side of the cathode layer close to the light-emitting material layer, the hole blocking layer isolating the charge generating layer and the cathode layer in a first direction;

[0013] a separator, the separator being located at an edge of the charge generation layer and isolating the charge generation layer from the cathode layer in a second direction;

[0014] The first direction is parallel to a direction from the cathode layer to the anode layer, and the second direction is perpendicular to a direction from the cathode layer to the anode layer.

[0015] Optionally, the isolation portion includes a first isolation structure extending from an edge of the hole blocking layer.

[0016] Optionally, the tandem OLED structure further includes:

[0017] an electron transport layer, the electron transport layer being located between the hole blocking layer and the cathode layer;

[0018] The isolation portion includes a second isolation structure formed by extending edges of the hole blocking layer and the electron transport layer.

[0019] Optionally, the isolation portion includes a third isolation structure made of insulating material.

[0020] Optionally, the tandem OLED structure further includes:

[0021] substrate;

[0022] a first flat layer, the first flat layer being disposed between the substrate and the anode layer;

[0023] a pixel defining layer, the pixel defining layer being located on a side of the first planar layer away from the substrate;

[0024] a hole transport layer, the hole transport layer being located on a side of the pixel defining layer close to the charge generating layer;

[0025] A projection of the hole transport layer in the first direction overlaps with the charge generation layer, and a projection of the charge generation layer in the first direction falls into the pixel defining layer.

[0026] Optionally, the third isolation structure is disposed on a side of the pixel defining layer facing the charge generating layer.

[0027] Optionally, a first protruding structure is provided on a side of the substrate close to the first flat layer, the first flat layer covers the first protruding structure, and a projection of the first protruding structure in the first direction is covered by a projection of the third isolation structure in the first direction.

[0028] Optionally, a second flat layer is provided on the side of the first flat layer close to the pixel defining layer, a second protruding structure is provided on the side of the first flat layer close to the second flat layer, the second flat layer covers the second protruding structure, and the projection of the second protruding structure in the first direction is covered by the projection of the third isolation structure in the first direction.

[0029] Optionally, the charge generating layer includes an electron extraction layer and an electron accepting layer, wherein the electron extraction layer is located on a side close to the anode layer, and the electron accepting layer is located on a side close to the cathode layer.

[0030] Optionally, the material of the electron extraction layer includes an N-type doped organic layer, and the electron acceptance layer includes a P-type doped organic layer.

[0031] Optionally, a distance between an outer edge of the isolation portion and an outer edge of the charge generation layer is greater than or equal to 5 μm.

[0032] The present application also discloses a display panel, which includes the tandem OLED structure described above. The display panel includes a display area and a peripheral area surrounding the display area.

[0033] Optionally, in the peripheral region, a side of the pixel defining layer away from the substrate is in contact with the hole transport layer and the electron transport layer.

[0034] Optionally, in the peripheral area, a conductive layer is provided in the same layer as the anode layer, and the conductive layer is in contact with the cathode layer to transmit signals to the cathode layer.

[0035] Optionally, an encapsulation layer is provided on the side of the cathode layer away from the substrate, a touch electrode layer is provided on the side of the encapsulation layer away from the cathode layer, the touch electrode layer is provided with touch electrodes, and both the display area and the peripheral area are provided with the touch electrodes.

[0036] Compared with the related art, the present application isolates the charge generation layer and the cathode layer in the second direction by setting an isolation part, thereby preventing the holes generated by the charge generation layer and the electrons generated by the cathode layer from being recombined and quenched, disrupting the orderly arrangement and transmission of electrons and holes inside the charge generation layer, and improving the luminous efficiency of the luminescent material layer.

[0037] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the specification and, together with the description, serve to explain the principles of the specification.

[0039] FIG1 is a schematic structural diagram of a display panel of the present application.

[0040] FIG. 2 is a schematic structural diagram of an embodiment of a tandem OLED structure of the present application.

[0041] FIG3 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application.

[0042] FIG4 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application.

[0043] FIG5 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application.

[0044] FIG6 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application.

[0045] FIG. 7 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application.

[0046] FIG8 is a schematic structural diagram of another embodiment of the tandem OLED structure of the present application. DETAILED DESCRIPTION

[0047] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with this specification. Rather, they are merely examples of apparatus and methods consistent with certain aspects of this specification, as detailed in the appended claims.

[0048] The terminology used in this application is for the purpose of describing specific embodiments only and is not intended to limit the present disclosure. Unless otherwise defined, technical or scientific terms used in this specification should have the same ordinary meaning as those having ordinary skill in the art to which this application belongs. The terms "first," "second," and similar terms used in this specification and claims do not denote any order, quantity, or importance, but are simply used to distinguish different components. Similarly, terms such as "a" or "an" do not denote a limitation of quantity, but rather indicate the presence of one. "Multiple" or "several" means two or more. Unless otherwise indicated, terms such as "front," "rear," "lower," and / or "upper" are used for convenience only and are not intended to limit the scope of the present disclosure to a specific location or spatial orientation. Terms such as "include" or "comprising" mean that the elements or objects listed before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. Terms such as "connected" or "connected" are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect.

[0049] The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure. As used in this specification and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0050] In the related art, the holes in the charge generation layer may be disturbed by the cathode layer, thereby affecting the luminous efficiency of the light-emitting material layer.

[0051] To solve the above technical problems, as shown in FIG2 , the present application provides a tandem OLED structure, which includes:

[0052] cathode layer 120;

[0053] Anode layer 30;

[0054] a plurality of light-emitting material layers 70 , wherein the plurality of light-emitting material layers 70 are located at different heights and connected in series, and the plurality of light-emitting material layers 70 are located between the cathode layer 120 and the anode layer 30 ;

[0055] a charge generation layer 80 , wherein the charge generation layer 80 is located between the plurality of light-emitting material layers 70 , and a projection of the light-emitting material layer 70 in a first direction falls into the charge generation layer 80 ;

[0056] a hole blocking layer 100 , located on a side of the cathode layer 120 close to the light-emitting material layer 70 , and separating the charge generating layer 80 from the cathode layer 120 in a first direction;

[0057] a separator 90 , the separator 90 being located at an edge of the charge generation layer 80 and isolating the charge generation layer 80 from the cathode layer 120 in a second direction;

[0058] The first direction F1 is parallel to the direction from the cathode layer 120 to the anode layer 30 , and the second direction F2 is perpendicular to the direction from the cathode layer 120 to the anode layer 30 .

[0059] In order to solve the above technical problems, the present application further provides a display panel, which includes the above-mentioned tandem OLED structure.

[0060] The present application isolates the charge generation layer 80 and the cathode layer 120 in the second direction by setting an isolation part 90, thereby preventing the holes generated by the charge generation layer 80 and the electrons generated by the cathode layer 120 from being recombined and quenched, disrupting the orderly arrangement and transmission of electrons and holes inside the charge generation layer 80, and improving the luminous efficiency of the luminescent material layer.

[0061] The following will describe in detail the various embodiments of the present application that are consistent with the above-mentioned creative concepts.

[0062] As shown in Figures 1 and 2, the display panel includes a display area 200 and a peripheral area 300 surrounding the display area 200. This application discloses a tandem OLED structure that can be applied to the edge of the display area 200 and the peripheral area 300 of the display panel.

[0063] As shown in FIG2 , in an optional embodiment, the portion of the tandem OLED structure of the present application located in the display area 200 includes a substrate 10. The substrate 10 may be a rigid substrate, such as a glass substrate or a PMMA (Polymethyl methacrylate) substrate.

[0064] The substrate 10 may also be a flexible substrate. For example, the flexible substrate may be a PET (Polyethylene terephthalate) substrate, a PI (Polyimide) substrate, or a PEN (Polyethylene naphthalate diformic acid glycol ester) substrate. It is understood that the substrate 10 may be of various types and may be selected based on actual needs, and the embodiments of the present disclosure are not limited thereto.

[0065] A flat layer 20 is provided on one side of the substrate 10. A driving circuit layer is provided between the substrate 10 and the flat layer 20, and the structure of the driving circuit layer is not shown in the figure. A plurality of pixel driving circuits are provided in the driving circuit layer, and each pixel driving circuit is connected to a pixel for controlling the light emission of the pixel. The pixel driving circuit may include a plurality of thin film transistors and capacitors. For example, the pixel driving circuit may be a 2T1C, 3T1C, 5T1C, or 7T1C type pixel driving circuit. The specific structure of the driving circuit layer is flexibly set according to actual needs, and this application does not limit this.

[0066] A pixel defining layer 40 is provided on the side of the planar layer 20 facing away from the substrate 10. The pixel defining layer 40 is provided with a plurality of hollowed-out regions, which define the positions of pixels within the display panel. Each pixel within the display panel corresponds to a hollowed-out region of the pixel defining layer 40. An anode layer 30 is provided on the side of the planar layer 20 facing away from the substrate 10. The anode layer 30 is disposed on the planar layer 20. At least a portion of the projection of the anode layer 30 in the first direction F1 falls within the hollowed-out region of the pixel defining layer 40. A hole transport layer 50 is provided on the side of the pixel defining layer 40 and the anode layer 30 facing away from the planar layer 20. An electron blocking layer 60 is provided on the side of the hole transport layer 50 facing away from the pixel defining layer 40. A first luminescent material layer 71 is provided on the side of the electron blocking layer 60 facing away from the hole transport layer 50. A charge generation layer 80 is provided on the side of the first luminescent material layer 71 facing away from the electron blocking layer 60. A second luminescent material layer 72 is provided on the side of the charge generation layer 80 facing away from the first luminescent material layer 71. A hole blocking layer 100 is provided on the side of the second luminescent material layer 72 facing away from the charge generation layer 80. The projection of the second luminescent material layer 72 in the first direction overlaps with the projection of the first luminescent material layer 71 in the first direction. An electron transport layer 110 is provided on the side of the hole blocking layer 100 facing away from the second luminescent material layer 72. A cathode layer 120 is provided on the side of the electron transport layer 110 facing away from the hole blocking layer 100. The first luminescent material layer 71 includes a red luminescent material R, a green luminescent material G, and a blue luminescent material B. The second luminescent material layer 72 also includes a red luminescent material R, a green luminescent material G, and a blue luminescent material B. The projection of the red luminescent material R in the first luminescent material layer 71 in the first direction overlaps with the projection of the red luminescent material R in the second luminescent material layer 72 in the first direction; the projection of the green luminescent material G in the first luminescent material layer 71 in the first direction overlaps with the projection of the green luminescent material G in the second luminescent material layer 72 in the first direction; and the projection of the blue luminescent material B in the first luminescent material layer 71 in the first direction overlaps with the projection of the blue luminescent material B in the second luminescent material layer 72 in the first direction. The projections of the first light emitting material layer 71 and the second light emitting material layer 72 in the first direction fall into the hollowed area of ​​the planar layer 20. The first direction is a direction perpendicular to the charge generation layer 80, ie, the F1 direction in the figure.

[0067] When the tandem OLED structure emits light, the anode layer 30 transfers holes to the first light-emitting material layer 71 via the hole transport layer 50. The charge generation layer 80 transfers electrons to the first light-emitting material layer 71. The electrons and holes meet in the first light-emitting material layer 71 to form excitons, which excite the light-emitting molecules and emit visible light. The cathode layer 120 transfers electrons to the second light-emitting material layer 72 via the electron transport layer 110. The charge generation layer 80 transfers holes to the second light-emitting material layer 72. The electrons and holes meet in the second light-emitting material layer 72 to form excitons, which excite the light-emitting molecules and emit visible light. During this process, the electron blocking layer 60 traps electrons from the charge generation layer 80 in the first light-emitting material layer 71, thereby improving the luminescence efficiency of the first light-emitting material layer 71. The hole blocking layer 100 traps holes from the charge generation layer 80 in the second light-emitting material layer 72, thereby improving the luminescence efficiency of the second light-emitting material layer 72.

[0068] The charge generation layer 80 may include an electron extraction layer 81 and an electron acceptance layer 82. The materials of the electron extraction layer 81 and the electron acceptance layer 82 may be selected according to requirements.

[0069] In an optional embodiment, the electron extraction layer 81 is made of a metal material, and the electron acceptance layer 82 is made of a metal oxide. For example, the electron extraction layer 81 is made of Li (lithium), and the electron acceptance layer 82 is made of MoO3 (molybdenum trioxide).

[0070] In an optional embodiment, the electron extraction layer 81 is an n-type doped organic material, and the electron accepting layer 82 is an organic material. For example, the electron extraction layer 81 is made of Li-doped Alq3 (8-hydroxyquinoline aluminum) material, and the electron accepting layer 82 is made of HTA-CN material.

[0071] In an optional embodiment, the electron extraction layer 81 is an n-type doped organic material, and the electron accepting layer 82 is a p-type doped organic material. For example, the electron extraction layer 81 is made of Mg-doped Alq3 (8-hydroxyquinoline aluminum), and the electron accepting layer 82 is made of F4-TCNQ (tetrafluoro-7,7,8,8-tetracyanoquinoline quinone)-doped m-MTDATA (3,3',5,5'-tetramethyltriphenylamine). For another example, the electron extraction layer 81 is made of Li-doped Alq3 (8-hydroxyquinoline aluminum), and the electron accepting layer 82 is made of FeCl3-doped NPB (N,N'-di(1-naphthyl)-N,N'-diphenylaniline).

[0072] The n-doped electron extraction layer 81 can generate hole-electron pairs. Due to the band bending of the p-doped electron accepting layer 82, the holes in the electron extraction layer 81 can be transferred to the electron accepting layer 82. The electrons generated by the electron extraction layer 81 can be transferred to the first light-emitting material layer 71 through the interface between the electron extraction layer 81 and the first light-emitting material layer 71. The electron accepting layer 82 can receive the holes generated by the electron extraction layer 81 and transfer them to the second light-emitting material layer 72. Electrons from the electron transport layer 110 will enter the electron accepting layer 82. The p-type doped electron accepting layer 82 can enable the electrons to effectively tunnel to the n-type doped electron extraction layer 81, reducing the hole injection barrier and achieving current doubling.

[0073] In an optional embodiment, both the electron extraction layer 81 and the electron acceptance layer 82 are made of non-doped materials.

[0074] As shown in Figures 2 to 7, the substrate 10, the planar layer 20, the pixel defining layer 40, the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, the electron accepting layer 82, the hole blocking layer 100, the electron transport layer 110 and the cathode layer 120 extend from the edge of the display area 200 into the peripheral area 300.

[0075] In an optional embodiment, as shown in Figures 2, 3, and 4, the display panel is applied to a mobile phone device, which includes a relative top, bottom, left, right, and several contour corners. On the left and right sides and the top of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, the electron accepting layer 82, and the hole blocking layer 100 and the edge of the display area 200 is 75-105 μm, and optionally, it can be 75, 80, 90, 100, or 105 μm. On the bottom side of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, the electron accepting layer 82, and the hole blocking layer 100 and the edge of the display area 200 is 85-115 μm, and optionally, it can be 85, 90, 100, 110, or 115 μm. At the corners of the phone's outline, the distance D between the outer edges of the hole transport layer 50, electron blocking layer 60, electron extraction layer 81, electron accepting layer 82, and hole blocking layer 100 and the edge of the display area 200 is 145-175 μm, and optionally can be 145, 150, 160, 170, or 175 μm. The projections of the hole transport layer 50, electron blocking layer 60, electron extraction layer 81, electron accepting layer 82, hole blocking layer 100, and electron transport layer 110 in the first direction fall within the projections of the substrate 10, planar layer 20, pixel defining layer 40, and cathode layer 120 in the first direction. The edge of the cathode layer 120 bends toward the pixel defining layer 40 and wraps around the edges of the electron extraction layer 81 and electron accepting layer 82. The electron extraction layer 81 and the electron acceptance layer 82 are provided with an isolation portion 90 away from the edge of the display area 200. The isolation portion 90 isolates the charge generation layer 80 from the cathode layer 120 in the second direction, so that the charge generation layer 80 does not contact the cathode layer 120 in the second direction. The first direction is the direction perpendicular to the charge generation layer 80, that is, the F1 direction in the figure. The second direction is the direction parallel to the charge generation layer 80, that is, the F2 direction in the figure. This structure isolates the charge generation layer 80 from the cathode layer 120 in the second direction, preventing the holes generated by the charge generation layer 80 from recombining and quenching with the electrons generated by the cathode layer 120, thereby disrupting the orderly arrangement and transmission of electrons and holes in the charge generation layer 80. The holes generated by the charge generation layer 80 can be transported undisturbed to the second light-emitting material layer 72 near the cathode layer 120, where the holes recombine with the electrons from the cathode layer 120, causing the second light-emitting material layer 72 to emit light effectively. The electrons generated by the charge generation layer 80 can be transported to the first light-emitting material layer 71 near the anode layer 30 without interference, and the holes in the first light-emitting material layer 71 are recombined with the electrons from the anode layer 30, so that the first light-emitting material layer 71 emits light effectively.

[0076] As shown in Figure 2, in an optional embodiment, the display panel is applied to a mobile phone device, which includes a relative top, bottom, left, right, and several contour corners. On the left and right sides and the top of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, and the electron accepting layer 82 and the edge of the display area 200 is 75-105 μm, and optionally, it can be 75, 80, 90, 100, or 105 μm. On the bottom side of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, and the electron accepting layer 82 and the edge of the display area 200 is 85-115 μm, and optionally, it can be 85, 90, 100, 110, or 115 μm. At the corners of the mobile phone outline, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, and the electron receiving layer 82 and the edge of the display area 200 is 145-175 μm, optionally, it can be 145, 150, 160, 170 or 175 μm.

[0077] The edge of the hole blocking layer 100 extends outward and bends toward the side of the pixel defining layer 40, contacting the pixel defining layer 40, forming a first isolation structure 91 (the portion within the dashed box in FIG2 , the dashed lines in the figure are for ease of understanding only and do not represent any structure). The first isolation structure 91 is the isolation portion 90 or a portion of the isolation portion 90. In this case, when manufacturing the hole blocking layer 100, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 on the left and right sides and the top of the mobile phone is set to be greater than or equal to 145 μm, and optionally can be 145 μm, 150 μm, 155 μm, 160 μm, or 165 μm. On the bottom side of the mobile phone, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 is set to be greater than or equal to 155 μm, and optionally can be 155 μm, 160 μm, 165 μm, 170 μm, or 175 μm. At the corners of the phone's outline, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 is set to be greater than or equal to 240 μm. Optionally, it can be 240 μm, 245 μm, 250 μm, 255 μm, or 260 μm. At this point, on the left and right sides and the top and bottom sides of the phone, the outer edge of the first isolation structure 91 is greater than or equal to 5 μm from the outer edge of the charge generation layer 80. At the corners of the phone's outline, the outer edge of the first isolation structure 91 is greater than or equal to 8 μm from the outer edge of the charge generation layer 80. At this point, the first isolation structure 91 isolates the charge generation layer 80 from the cathode layer 120 in the second direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the second direction. The hole blocking layer 100 and the electron transport layer 110 isolate the charge generation layer 80 from the cathode layer 120 in the first direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the first direction. The first direction F1 is parallel to the direction from the cathode layer 120 to the anode layer 30 , and the second direction F2 is perpendicular to the direction from the cathode layer 120 to the anode layer 30 .

[0078] As shown in Figure 3, in an optional embodiment, the display panel is applied to a mobile phone device, which includes a relative top, bottom, left, right, and several contour corners. On the left and right sides and the top of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, and the electron accepting layer 82 and the edge of the display area 200 is 75-105 μm, and optionally, it can be 75, 80, 90, 100, or 105 μm. On the bottom side of the mobile phone, the distance D between the outer edges of the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, and the electron accepting layer 82 and the edge of the display area 200 is 85-115 μm, and optionally, it can be 85, 90, 100, 110, or 115 μm. At the corners of the phone's outline, the distance D between the outer edges of the hole transport layer 50, electron blocking layer 60, electron extraction layer 81, and electron acceptance layer 82 and the edge of the display area 200 is 145-175 μm, and optionally, can be 145, 150, 160, 170, or 175 μm. The edges of the hole blocking layer 100 and the electron transport layer 110 both extend outward and bend toward the side of the pixel defining layer 40 and contact the pixel defining layer 40 to form a second isolation structure 92 (the portion within the dotted box in FIG3 , the dotted lines in the figure are only for ease of understanding and do not represent any structure). The second isolation structure 92 is the isolation portion 90 or a portion of the isolation portion 90. At this time, when manufacturing the hole blocking layer 100 and the electron transport layer 110, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 on the left, right, and top sides of the phone is set to be greater than or equal to 145 μm, and can alternatively be 145 μm, 150 μm, 155 μm, 160 μm, or 165 μm. On the bottom side of the phone, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 is set to be greater than or equal to 155 μm, and can alternatively be 155 μm, 160 μm, 165 μm, 170 μm, or 175 μm. At the corners of the phone's outline, the distance L between the outer edge of the hole blocking layer 100 and the edge of the display area 200 is set to be greater than or equal to 240 μm, and can alternatively be 240 μm, 245 μm, 250 μm, 255 μm, or 260 μm. At this point, on the left and right sides and the top and bottom sides of the phone, the outer edge of the first isolation structure 91 is at least 5 μm away from the outer edge of the charge generation layer 80. At the corners of the phone's outline, the outer edge of the first isolation structure 91 is at least 8 μm away from the outer edge of the charge generation layer 80. At this point, the second isolation structure 92 isolates the charge generation layer 80 from the cathode layer 120 in the second direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the second direction. The hole blocking layer 100 and the electron transport layer 110 isolate the charge generation layer 80 from the cathode layer 120 in the first direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the first direction.The first direction F1 is parallel to the direction from the cathode layer 120 to the anode layer 30 , and the second direction F2 is perpendicular to the direction from the cathode layer 120 to the anode layer 30 .

[0079] As shown in FIG4 , in an optional embodiment, the isolation portion 90 includes or is made of a third isolation structure 93 made of an insulating material. The third isolation structure 93 can be a standalone film structure and does not form part of the pixel defining layer 40, the hole transport layer 50, the electron blocking layer 60, the electron extraction layer 81, the electron accepting layer 82, the hole blocking layer 100, or the electron transport layer 110. The insulating material used to make the third isolation structure 93 can be polyimide, acrylic resin, polyamide, or phenolic resin, among others. In this embodiment, the third isolation structure 93 is made of polyimide. The third isolation structure 93 is disposed on the side of the pixel defining layer 40 near the charge generation layer 80. The third isolation structure 93 surrounds the edge of the charge generation layer 80 to isolate the charge generation layer 80 from the cathode layer 120 in the second direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the second direction. The hole blocking layer 100 and the electron transport layer 110 isolate the charge generation layer 80 from the cathode layer 120 in the first direction, preventing the charge generation layer 80 from contacting the cathode layer 120 in the first direction. The cross-sectional shape of the third isolation structure 93 can be rectangular, triangular, or other irregular shapes, as long as it isolates the charge generation layer 80 from the cathode layer 120 in the second direction. The first direction F1 is parallel to the direction from the cathode layer 120 to the anode layer 30, and the second direction F2 is perpendicular to the direction from the cathode layer 120 to the anode layer 30.

[0080] In an optional embodiment, as shown in the above table and Figures 2 and 3, the fourth column in the table represents the distance between the outer edges of the hole transport layer 50, the charge generation layer 80, and the electron transport layer 110 and the edge of the display area 200. The fifth column in the table represents the distance between the outer edge of the electron transport layer 110 and the outer edge of the charge generation layer 80. The second, third, fourth, and fifth rows in the table represent the left and right sides, top side, bottom side, and corners of the relative contours of the display panel, respectively. On the left and right sides and top side of the display panel, the outer edges of the hole transport layer 50 and the charge generation layer 80 are 90 μm away from the edge of the display area 200, the distance between the electron transport layer 110 and the edge of the display area 200 is 145 μm, and the distance between the outer edge of the electron transport layer 110 and the outer edge of the charge generation layer 80 is 55 μm. On the lower side of the display panel, the outer edges of the hole transport layer 50 and the charge generation layer 80 are 100 μm away from the edge of the display area 200, the electron transport layer 110 is 155 μm away from the edge of the display area 200, and the outer edge of the electron transport layer 110 is 55 μm away from the outer edge of the charge generation layer 80. At the corners of the display panel's outline, the outer edges of the hole transport layer 50 and the charge generation layer 80 are 160 μm away from the edge of the display area 200, the electron transport layer 110 is 240 μm away from the edge of the display area 200, and the outer edge of the electron transport layer 110 is 80 μm away from the outer edge of the charge generation layer 80.

[0081] As shown in FIG5 , in an optional embodiment, the planarization layer 20 includes a first planarization layer 21 disposed on the side of the substrate 10 proximate to the pixel defining layer 40, and a second planarization layer 22 disposed on the side of the first planarization layer 21 proximate to the pixel defining layer 40. The first planarization layer 21 and the second planarization layer 22 can be formed of the same material or different materials. For example, the first planarization layer 21 can be formed of an inorganic material, and the second planarization layer 22 can be formed of an organic material; or the first planarization layer 21 can be formed of an organic material, and the second planarization layer 22 can be formed of an inorganic material; or both the first planarization layer 21 and the second planarization layer 22 can be formed of an inorganic material; or both the first planarization layer 21 and the second planarization layer 22 can be formed of an organic material. The thickness of the first planarization layer 21 is substantially uniform throughout, and accordingly, the upper surface of the first planarization layer 21 (the surface proximate to the pixel defining layer 40 and the anode layer 30) is a substantially flat surface. The thickness of the second planarization layer 22 is substantially uniform throughout, and accordingly, the upper surface of the second planarization layer 22 (the surface proximate to the second planarization layer 22) is a substantially flat surface. Optionally, a first protruding structure 211 is provided on the side of the substrate 10 close to the first flat layer 21. The first protruding structure 211 is conformally covered by the first flat layer 21. The first protruding structure 211 is provided around the outer edge of the charge generation layer 80, and the projection of the first protruding structure 211 in the first direction is covered by the projection of the third isolation structure 93 in the first direction. The first protruding structure 211 can be a metal structure or can be made of an insulating material such as polyimide. The provision of the first protruding structure 211 can provide support for the third isolation structure 93 in the first direction, so that the third isolation structure 93 can better cover the outer edge of the charge generation layer 80 in the first direction, thereby enabling the third isolation structure 93 to better isolate the charge generation layer 80 from the cathode layer 120 in the second direction. The first direction F1 is parallel to the direction from the cathode layer 120 to the anode layer 30, and the second direction F2 is perpendicular to the direction from the cathode layer 120 to the anode layer 30.

[0082] As shown in Figure 6, optionally, a second protruding structure 221 is provided on the side of the first flat layer 21 close to the second flat layer 22. The second protruding structure 221 is conformally covered by the second flat layer 22. The second protruding structure 221 is provided around the outer edge of the charge generation layer 80, and the projection of the second protruding structure 221 in the first direction is covered by the projection of the third isolation structure 93 in the first direction. The second protruding structure 221 can be a metal structure or made of an insulating material such as polyimide. The provision of the second protruding structure 221 can provide support for the third isolation structure 93 in the first direction, so that the third isolation structure 93 can better cover the outer edge of the charge generation layer 80 in the first direction, thereby enabling the third isolation structure 93 to better isolate the charge generation layer 80 from the cathode layer 120 in the second direction.

[0083] As shown in Figures 5 to 7, the tandem OLED structure of the present application can optionally include a first protrusion structure 211 and a second protrusion structure 221, depending on the actual situation. For example, only the first protrusion structure 211 or the second protrusion structure 221 can be provided; both the first protrusion structure 211 and the second protrusion structure 221 can be provided; or neither can be provided.

[0084] In the present application, an isolation portion 90 is provided to isolate the charge generation layer 80 from the cathode layer 120 in the second direction. The isolation portion 90 is located in the peripheral area 300 and surrounds the display area 200. This isolates the charge generation layer 80 from the cathode layer 120 at the edge of the display area 200 in the second direction. The charge generation layer 80 from the cathode layer 120 at the edge of the display area 200 is isolated in the first direction by the hole blocking layer 100. The charge generation layer 80 from the anode layer 30 at the edge of the display area 200 is isolated in the first direction by the electron blocking layer 60. This effectively prevents the holes generated by the charge generation layer 80 from being quenched by the electrons generated by the cathode layer 120, and also prevents the electrons generated by the charge generation layer 80 from being quenched by the holes generated by the anode layer 30. This ensures the orderly arrangement and transmission of electrons and holes within the charge generation layer 80, allowing the holes generated by the charge generation layer 80 to be transported undisturbed to the second light-emitting material layer 72 near the cathode layer 120. There, the holes recombine with electrons from the cathode layer 120, causing the second light-emitting material layer 72 to emit light efficiently. The electrons generated by the charge generation layer 80 can be transported undisturbed to the first light-emitting material layer 71 near the anode layer 30. There, the holes recombine with electrons from the anode layer 30, causing the first light-emitting material layer 71 to emit light efficiently. This improves the luminous efficiency of the light-emitting material layer.

[0085] The present application also provides a display panel, which includes the aforementioned tandem OLED structure.

[0086] As shown in Figures 1 and 8, the display panel includes a display area 200 and a peripheral area 300 surrounding the display area 200. In the peripheral area 300, the side of the pixel defining layer 40 away from the substrate 10 is in contact with the hole transport layer 50 and the electron transport layer 110. In the peripheral area 300, a conductive layer 31 is provided on the same layer as the anode layer 30. The conductive layer 31 is in contact with the cathode layer 120 to transmit signals to the cathode layer 120. An encapsulation layer 130 is provided on the side of the cathode layer 120 away from the substrate 10. The encapsulation layer 130 includes a first encapsulation layer 131 and a second encapsulation layer 132. The first encapsulation layer 131 can be an organic encapsulation layer or an inorganic encapsulation layer, and the second encapsulation layer 132 can be an organic encapsulation layer or an inorganic encapsulation layer. A buffer layer 140 is provided on the side of the encapsulation layer 130 away from the cathode layer 120. A touch electrode layer 150 is disposed on a side of the buffer layer away from the encapsulation layer 130 . A plurality of touch electrodes 151 are disposed in the touch electrode layer 150 . The touch electrodes 151 are disposed in both the display area 200 and the peripheral area 300 .

[0087] Other embodiments of the present invention will readily occur to those skilled in the art upon consideration of the present invention and practice of the invention claimed herein. This specification is intended to cover any variations, uses, or adaptations of the present invention that follow the general principles of this specification and include common knowledge or customary techniques in the art not claimed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present invention being indicated by the following claims.

[0088] It should be understood that the present description is not limited to the exact structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present description is limited only by the appended claims.

[0089] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A tandem OLED structure, characterized in that: include: cathode layer; Anode layer; A plurality of light-emitting material layers, the plurality of light-emitting material layers are connected in series, and the plurality of light-emitting material layers are located between the cathode layer and the anode layer; a charge generation layer, wherein the charge generation layer is located between the plurality of light-emitting material layers, and a projection of the light-emitting material layer in a first direction falls into the charge generation layer; A hole blocking layer, located on a side of the cathode layer close to the light-emitting material layer, the hole blocking layer isolating the charge generating layer from the cathode layer in a first direction; a separation portion, the separation portion being located at an edge of the charge generation layer, the separation portion separating the charge generation layer from the cathode layer in a second direction; The first direction is parallel to a direction from the cathode layer to the anode layer, and the second direction is perpendicular to a direction from the cathode layer to the anode layer.

2. The tandem OLED structure according to claim 1, characterized in that: The isolation portion includes a first isolation structure extending from an edge of the hole blocking layer.

3. The tandem OLED structure according to claim 1, characterized in that: The tandem OLED structure further comprises: An electron transport layer, the electron transport layer being located between the hole blocking layer and the cathode layer; The isolation portion includes a second isolation structure formed by extending edges of the hole blocking layer and the electron transport layer together.

4. The tandem OLED structure according to claim 1, characterized in that: The isolation portion includes a third isolation structure made of an insulating material.

5. The tandem OLED structure according to any one of claims 1 to 4, characterized in that: The tandem OLED structure further comprises: substrate; a first flat layer, the first flat layer being disposed between the substrate and the anode layer; a pixel defining layer, the pixel defining layer being located on a side of the first planar layer away from the substrate; A hole transport layer, the hole transport layer is located on a side of the pixel defining layer close to the charge generating layer; A projection of the hole transport layer in the first direction overlaps with the charge generation layer, and a projection of the charge generation layer in the first direction falls into the pixel defining layer.

6. The tandem OLED structure according to claim 5, characterized in that: The third isolation structure is disposed on a side of the pixel definition layer facing the charge generation layer.

7. The tandem OLED structure according to claim 6, characterized in that: A first protruding structure is disposed on a side of the substrate close to the first flat layer, the first flat layer covers the first protruding structure, and a projection of the first protruding structure in the first direction is covered by a projection of the third isolation structure in the first direction.

8. The tandem OLED structure according to claim 6, characterized in that: A second flat layer is disposed on a side of the first flat layer close to the pixel defining layer, a second protruding structure is disposed on a side of the first flat layer close to the second flat layer, the second flat layer covers the second protruding structure, and a projection of the second protruding structure in the first direction is covered by a projection of the third isolation structure in the first direction.

9. The tandem OLED structure according to claim 1, characterized in that: The charge generation layer includes an electron extraction layer and an electron acceptance layer. The electron extraction layer is located on a side close to the anode layer, and the electron acceptance layer is located on a side close to the cathode layer.

10. The tandem OLED structure according to claim 9, characterized in that: The material of the electron extraction layer includes an N-type doped organic layer, and the electron receiving layer includes a P-type doped organic layer.

11. The tandem OLED structure according to claim 1, characterized in that: The distance between the outer edge of the separator and the outer edge of the charge generating layer is greater than or equal to 5 μm.

12. A display panel, characterized in that: Comprising the tandem OLED structure as described in any one of claims 1 to 11, the display panel comprises a display area and a peripheral area surrounding the display area.

13. The display panel according to claim 12, characterized in that: In the peripheral region, a side of the pixel definition layer away from the substrate is in contact with the hole transport layer and the electron transport layer.

14. The display panel according to claim 12, characterized in that: In the peripheral area, a conductive layer is disposed on the same layer as the anode layer, and the conductive layer is in contact with the cathode layer to transmit signals to the cathode layer.

15. The display panel according to claim 12, characterized in that: A packaging layer is disposed on a side of the cathode layer away from the substrate, a touch electrode layer is disposed on a side of the packaging layer away from the cathode layer, the touch electrode layer is disposed with touch electrodes, and both the display area and the peripheral area are disposed with the touch electrodes.

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