Semiconductor device

Abstract

Provided is a novel semiconductor device. The semiconductor device has: a first conductive layer that functions as the drain of a first transistor; a second conductive layer, above the first conductive layer, that functions as the source of the first transistor; a first semiconductor layer including a channel formation region of the first transistor; a third conductive layer having a shape that conforms to a lateral surface of the first semiconductor layer and including a region that functions as the gate of the first transistor, a region that functions as the drain of a second transistor above the first transistor, and a region in contact with the second conductive layer; a fourth conductive layer, above the third conductive layer, that functions as the source of the second transistor; a second semiconductor layer including a channel formation region of the second transistor; and a fifth conductive layer having a shape that conforms to a lateral surface of the second semiconductor layer and including a region that functions as the gate of the second transistor and a region in contact with the fourth conductive layer, wherein the first and fifth conductive layer function as power lines, and the third conductive layer functions as a signal line.

Description

Semiconductor Devices

[0001] One embodiment of the present invention relates to a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, a driving method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. More specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, optical devices, imaging devices, lighting devices, arithmetic units, control devices, memory devices, input devices, output devices, input / output devices, signal processing devices, arithmetic processing devices, electronic computers, electronic devices, and driving methods thereof or manufacturing methods thereof.

[0003] It is known that a transistor including an oxide semiconductor in a channel formation region has an extremely small off-state current. For example, Patent Document 1 discloses a low-power processing unit (e.g., a CPU) that utilizes the low off-state current of the transistor. Furthermore, Patent Document 2 discloses a storage device (e.g., a main memory, a cache memory, etc.) that can store data for a long period of time by utilizing the low off-state current of the transistor.

[0004] Furthermore, for example, Patent Document 3 discloses a technique for increasing the density of an integrated circuit by stacking the transistors.

[0005] JP 2012-257187 A JP 2011-151383 A International Publication No. 2021 / 053473

[0006] An object of one embodiment of the present invention is to provide a highly reliable semiconductor device or a storage device including the semiconductor device.An object of one embodiment of the present invention is to provide a miniaturized semiconductor device or a storage device including the semiconductor device.An object of one embodiment of the present invention is to provide a semiconductor device whose operation speed can be increased or a storage device including the semiconductor device.An object of one embodiment of the present invention is to provide a semiconductor device whose power consumption can be reduced or a storage device including the semiconductor device.An object of one embodiment of the present invention is to provide a novel semiconductor device or a storage device including the semiconductor device.

[0007] Note that the above-mentioned problem does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of the above-mentioned problems. Note that problems other than the above-mentioned problem will become apparent from the description of this specification, drawings, claims, etc., and it is possible to extract problems other than the above-mentioned problem from the description of this specification, drawings, claims, etc.

[0008] (1) One aspect of the present invention is a method for manufacturing a semiconductor device comprising: a first conductive layer extending in a first direction and including a region that functions as either a source or a drain of a first transistor; a second conductive layer located on the first conductive layer and including a region that functions as the other of the source or the drain of the first transistor; a first semiconductor layer including a channel formation region of the first transistor; a third conductive layer extending in a second direction intersecting the first direction and including a region that has a shape along a side surface of the first semiconductor layer and functions as a gate of the first transistor, a region that functions as either a source or a drain of a second transistor on the first transistor, and a region that contacts the second conductive layer; and a second conductive layer located on the third conductive layer and including a region that functions as the source of the second transistor. or a fourth conductive layer including a region that functions as the other of the drain, a second semiconductor layer including a channel formation region of the second transistor, and a fifth conductive layer that has a shape along a side surface of the second semiconductor layer, includes a region that functions as the gate of the second transistor and a region that is in contact with the fourth conductive layer, and extends in a first direction, wherein one of the first conductive layer or the fifth conductive layer functions as a first power supply line, the other of the first conductive layer or the fifth conductive layer functions as a second power supply line to which a potential higher than the potential applied to the first power supply line is applied, and the third conductive layer functions as a signal line to which a signal that is equal to or higher than the potential of the first power supply line and equal to or lower than the potential of the second power supply line is applied.

[0009] (2) In the above (1), the channel length of the first transistor may be smaller than the channel width of the first transistor, and the channel length of the second transistor may be smaller than the channel width of the second transistor.

[0010] (3) In the above (1), each of the first semiconductor layer and the second semiconductor layer may include an oxide semiconductor.

[0011] (4) In the above (1), the first conductive layer may function as a second power supply line, and the fifth conductive layer may function as a first power supply line.

[0012] According to one embodiment of the present invention, a highly reliable semiconductor device or a storage device including the semiconductor device can be provided. Alternatively, one embodiment of the present invention can provide a miniaturized semiconductor device or a storage device including the semiconductor device. Alternatively, one embodiment of the present invention can provide a semiconductor device that can increase the operating speed or a storage device including the semiconductor device. Alternatively, one embodiment of the present invention can provide a semiconductor device that can reduce power consumption or a storage device including the semiconductor device. Alternatively, a novel semiconductor device or a storage device including the semiconductor device can be provided.

[0013] Note that the above effects do not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of the above effects. Note that effects other than the above effects will become apparent from the description in this specification, drawings, claims, etc., and it is possible to extract effects other than the above effects from the description in this specification, drawings, claims, etc.

[0014] FIG. 1A is a top view showing a configuration example of a semiconductor device. FIGS. 1B and 1C are cross-sectional views showing a configuration example of a semiconductor device. FIG. 1D is a circuit diagram showing a configuration example of a semiconductor device. FIGS. 2A and 2B are cross-sectional views showing a configuration example of a semiconductor device. FIG. 3A is a top view showing a configuration example of a semiconductor device. FIG. 3B is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 4A is a top view showing a configuration example of a semiconductor device. FIG. 4B is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 5A is a top view showing a configuration example of a semiconductor device. FIGS. 5B and 5C are cross-sectional views showing a configuration example of a semiconductor device. FIGS. 6A to 6C are circuit diagrams showing a configuration example of a semiconductor device. FIG. 7 is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 8 is a cross-sectional view showing a configuration example of a semiconductor device. FIGS. 9A to 9C are cross-sectional views showing a configuration example of a semiconductor device. FIGS. 10A to 10D are circuit diagrams showing a configuration example of a semiconductor device. FIG. 11A is a top view showing a configuration example of a semiconductor device. FIG. 11B is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 12 is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 13A is a top view showing a configuration example of a semiconductor device. FIGS. 13B and 13C are cross-sectional views showing a configuration example of a semiconductor device. FIG. 14A is a top view showing a configuration example of a semiconductor device. FIG. 14B is a perspective schematic view showing a configuration example of a semiconductor device. FIGS. 14C to 14E are cross-sectional views showing a configuration example of a semiconductor device. FIGS. 15A and 15B are cross-sectional views showing a configuration example of a semiconductor device. FIG. 16A is a top view showing a configuration example of a semiconductor device. FIG. 16B is a perspective schematic view showing a configuration example of a semiconductor device. FIGS. 16C to 16E are cross-sectional views showing a configuration example of a semiconductor device. FIG. 17 is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 18A is a top view showing a configuration example of a semiconductor device. FIG. 18B is a perspective schematic view showing a configuration example of a semiconductor device. FIGS. 18C to 18E are cross-sectional views showing a configuration example of a semiconductor device. FIG. 19 is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 20 is a cross-sectional view showing a configuration example of a semiconductor device. FIG. 21 is a schematic view showing a configuration example of a memory device. 22A to 22H are diagrams illustrating examples of circuit configurations of memory cells, and Fig. 23 is a diagram showing various memory devices by hierarchy.Fig. 24A and Fig. 24B are diagrams showing an example of an electronic component. Fig. 25A and Fig. 25B are diagrams showing an example of an electronic device. Fig. 25C to Fig. 25E are diagrams showing an example of a mainframe computer. Fig. 26A is a diagram showing an example of space equipment. Fig. 26B is a diagram showing an example of a storage system applicable to a data center. Figs. 27A1 to 27A7 and Figs. 27B1 to 27B6 are diagrams explaining "connection".

[0015] In this specification, a semiconductor device refers to a device that utilizes semiconductor characteristics, such as a circuit including a semiconductor element (e.g., a transistor or a diode), or a device having such a circuit. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit including a semiconductor element, a chip equipped with an integrated circuit, an electronic component in which a chip is housed in a package, or an electronic device equipped with an electronic component are examples of semiconductor devices. Furthermore, for example, a display device, a light-emitting device, a power storage device, an optical device, an imaging device, a lighting device, an arithmetic device, a control device, a memory device, an input device, an output device, an input / output device, a signal processing device, an electronic computer, or an electronic device may be a semiconductor device and may also include a semiconductor device.

[0016] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways. Therefore, it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments.

[0017] In this specification and the like, the configuration shown in each embodiment can be appropriately combined with the configuration shown in another embodiment to form one aspect of the present invention. Furthermore, when multiple configurations are shown in one embodiment, these configurations can be appropriately combined to form one aspect of the present invention.

[0018] In addition, in the drawings illustrating the embodiments, the same reference numerals may be used in common between different drawings for the same parts or parts having similar functions in the configuration of the invention, thereby omitting repeated description thereof. Furthermore, when the drawings indicate similar functions, for example, the same hatching patterns may be used and no particular reference numerals may be used. Furthermore, in the drawings, for example, in perspective views or top views (also called "plan views"), the illustration of some components may be omitted for ease of understanding. Furthermore, in the drawings, for example, the illustration of some hidden lines may be omitted. Furthermore, in the drawings, for example, the illustration of hatching patterns may be omitted.

[0019] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not limited to, for example, their size or aspect ratio. Note that the drawings are schematic representations of ideal examples and are not limited to, for example, the shapes or values ​​shown in the drawings. For example, in an actual manufacturing process, layers or resist masks may be unintentionally thinned by processes such as etching, but these may not be reflected in the drawings to facilitate understanding. In addition, for example, in actual circuit operation, variations in voltage or current may occur due to noise or timing errors, but these may not be reflected in the drawings to facilitate understanding.

[0020] Furthermore, in this specification and drawings, components may be classified by function and shown as independent elements. However, it may be difficult to separate components by function, and one element may be involved in multiple functions, or one function may be involved across multiple elements. Therefore, the elements shown in this specification and drawings may not be limited to the descriptions therein, and may be rephrased appropriately.

[0021] Furthermore, in this specification and drawings, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, the reference numeral may be accompanied by an identifying symbol such as "A", "b", "_1", "[n]", or "[m, n]". Furthermore, when explaining matters common to multiple elements accompanied by identifying symbols, or when it is not necessary to distinguish between them, the elements may be described without the identifying symbol.

[0022] In this specification and the like, the "conductive state" or "on state" of a transistor refers to, for example, a state in which the source and drain of the transistor are considered to be electrically short-circuited, or a state in which a current can flow between the source and drain (also referred to as a state in which a current can flow). For example, a state in which the voltage between the gate and source of an n-channel transistor is higher than the threshold voltage, or a state in which the voltage between the gate and source of a p-channel transistor is lower than the threshold voltage, may be referred to as the "conductive state" or "on state." In addition, the "non-conductive state," "cutoff state," or "off state" of a transistor refers to a state in which the source and drain of the transistor are considered to be electrically cut off. For example, a state in which the voltage between the gate and source of an n-channel transistor is lower than the threshold voltage, or a state in which the voltage between the gate and source of a p-channel transistor is higher than the threshold voltage, may be referred to as the "non-conductive state," "cutoff state," or "off state."

[0023] In this specification and the like, the voltage between the gate and the source (gate-source) may be referred to as the "gate voltage," the voltage between the drain and the source (drain-source) may be referred to as the "drain voltage," and the voltage between the back gate and the source (back gate-source) may be referred to as the "back gate voltage." Also, the current flowing between the drain and the source may be referred to as the "drain current." Note that, for n-channel transistors, terms such as "high gate voltage," "high drain voltage," and "high back gate voltage" may be interchangeable with terms such as "low gate voltage," "low drain voltage," and "low back gate voltage" for p-channel transistors, as appropriate. Also, terms such as "low gate voltage," "low drain voltage," and "low back gate voltage" for n-channel transistors may be interchangeable with terms such as "high gate voltage," "high drain voltage," and "high back gate voltage" for p-channel transistors, as appropriate.

[0024] In this specification and the like, unless otherwise specified, the "off-state current" of a transistor refers to the drain current when the transistor is in an off state. Note that in this specification and the like, the off-state current and the current flowing between the gate and the source and drain (also referred to as gate leakage current) may also be referred to as leakage current.

[0025] Embodiment 1 A semiconductor device according to one embodiment of the present invention will be described with reference to the drawings. At least part of the semiconductor device according to one embodiment of the present invention can be used, for example, in an electrostatic discharge (ESD) protection circuit.

[0026] 1A to 1C are top views and cross-sectional views illustrating a structural example of a semiconductor device according to one embodiment of the present invention, and FIG. 1D is a circuit diagram illustrating the semiconductor device.

[0027] Fig. 1A is a top view of a semiconductor device 100. Fig. 1B is a cross-sectional view of a portion indicated by a dashed line A1-A2 in Fig. 1A. Fig. 1C is a cross-sectional view of a portion indicated by a dashed line A3-A4 in Fig. 1A. Note that some elements have been omitted from the top view of Fig. 1A for clarity.

[0028] 1B and 1C illustrate an insulator 620, a transistor 600a on the insulator 620, a transistor 600b on the transistor 600a, an insulator 640a on the insulator 620, an insulator 640b on the insulator 640a, and an insulator 678 on the transistor 600a and the transistor 600b. Each of the insulator 620, the insulator 640a, the insulator 640b, and the insulator 678 functions as an interlayer film, a protective film, or the like.

[0029] The figure also illustrates a conductor 630 serving as one of the source and drain electrodes of the transistor 600a, a conductor 660a serving as the other of the source and drain electrodes, an oxide 650a serving as a semiconductor film including a channel formation region, and an insulator 672a serving as a gate insulating film. The figure also illustrates a conductor 670a serving as the gate electrode of the transistor 600a and also as one of the source and drain electrodes of the transistor 600b. The figure also illustrates a conductor 660b serving as the other of the source and drain electrodes of the transistor 600b, an oxide 650b serving as a semiconductor film including a channel formation region, an insulator 672b serving as a gate insulating film, and a conductor 670b serving as a gate electrode. Note that the conductors 630, 660a, 670a, 660b, and 670b each also function as wirings.

[0030] In this specification and drawings, the X, Y, and Z directions may be defined to facilitate understanding of the positional relationships between the components. The X, Y, and Z directions are perpendicular to one another. The X and Y directions are defined as directions along the surface on which the transistors 600a and 600b are formed (e.g., the upper surface of the insulator 620). The Z direction is defined as the direction in which the transistors 600a and 600b are stacked. In this specification and drawings, the Z direction may be referred to as the vertical direction or the height direction.

[0031] Furthermore, in this specification and the like, the term "conductor" may be appropriately replaced with the term "conductive layer" or "conductive film", and the term "insulator" may be appropriately replaced with the term "insulating layer" or "insulating film".

[0032] As shown in Figure 1B, the conductor 630 extends in the X direction. As shown in Figure 1C, the conductor 670a extends in the Y direction and contacts the conductor 660a through an opening 676a in the insulator 672a. As shown in Figure 1B, the conductor 670b extends in the X direction and contacts the conductor 660b through an opening 676b in the insulator 672b.

[0033] In other words, the transistor 600 a and the transistor 600 b are each diode-connected. Note that in this specification and the like, when the gate of a transistor is connected to either the source or the drain of the transistor, the transistor may be referred to as being diode-connected.

[0034] 1B and 1C, an opening 648a is provided in the insulator 640a and the conductor 660a, reaching the conductor 630, and at least a part of the structure of the transistor 600a is disposed in the opening 648a. Also, an opening 648b is provided in the insulator 640b and the conductor 660b, reaching the conductor 670a, and at least a part of the structure of the transistor 600b is disposed in the opening 648b.

[0035] Specifically, in the transistor 600a, part of the oxide 650a is provided to include a region along the side surface of the opening 648a, a region in contact with the top surface of the conductor 630, and a region in contact with the side surface of the conductor 660a, and the region of the oxide 650a along the side surface of the opening 648a includes a channel formation region. Part of the insulator 672a is provided along the side surface of the oxide 650a. Part of the conductor 670a is provided along the side surface of the insulator 672a. In other words, it can be said that part of the conductor 670a has a shape that follows the side surface of the oxide 650a inside the opening 648a. In the transistor 600b, part of the oxide 650b is provided to include a region along the side surface of the opening 648b, a region in contact with the top surface of the conductor 670a, and a region in contact with the side surface of the conductor 660b, and the region of the oxide 650b along the side surface of the opening 648b includes a channel formation region. Part of the insulator 672b is provided along the side surface of the oxide 650b. Part of the conductor 670b is provided along the side surface of the insulator 672b. In other words, it can be said that part of the conductor 670b has a shape that follows the side surface of the oxide 650b inside the opening 648b.

[0036] In this specification and the like, in an insulator, a conductor, or the like having an opening, a side surface of the insulator, the conductor, or the like at the opening may be referred to as a side surface of the opening. Thus, for example, "a side surface of opening 648a" can be appropriately interpreted as "a side surface of insulator 640a and conductor 660a at opening 648a," etc. Furthermore, for example, "a side surface of opening 648b" can be appropriately interpreted as "a side surface of insulator 640b and conductor 660b at opening 648b," etc.

[0037] Therefore, in the semiconductor device 100, the area occupied by each of the transistors 600a and 600b can be reduced when viewed from above.

[0038] Here, the channel length direction of each of the transistors 600a and 600b can be said to have a vertical component (the Z direction in FIGS. 1A to 1C (i.e., the depth direction in a top view), also referred to as the height direction or the direction perpendicular to the surface on which it is formed). In other words, the channel length direction of each of the transistors 600a and 600b can be said to have a component in the direction in which the transistors 600a and 600b are stacked. In other words, it can be said that the source electrode and the drain electrode are located at different heights, and the drain current flows vertically. In this specification and the like, a transistor whose channel length direction has a vertical component (i.e., a transistor in which the drain current flows vertically) may be referred to as a VFET (Vertical Field Effect Transistor), a vertical transistor, a vertical transistor, a vertical channel transistor, a vertical channel transistor, or the like.

[0039] 1A to 1C, the transistor 600a and the transistor 600b share part of their structures and are provided so as to overlap each other in a top view. In this case, the channel formation region of the transistor 600a included in the oxide 650a and the channel formation region of the transistor 600b included in the oxide 650b may be provided so as to overlap each other in a top view. This can reduce the area occupied by the semiconductor device 100.

[0040] 1A to 1C, the conductor 670b and the conductor 660b are located above the conductor 670a, and the conductor 670a and the conductor 660a are located above the conductor 630. Furthermore, the conductor 670b has a region that functions as a wiring and a region that functions as a gate electrode of the transistor 600b. The conductor 670a has a region that functions as a wiring, a region that functions as one of the source and drain electrodes of the transistor 600b, and a region that functions as the gate electrode of the transistor 600a. The conductor 660b has a region that functions as the other of the source and drain electrodes of the transistor 600b and a region that functions as a wiring. The conductor 630 has a region that functions as one of the source and drain electrodes of the transistor 600a and a region that functions as a wiring. The conductor 660a has a region that functions as the other of the source and drain electrodes of the transistor 600a and a region that functions as a wiring. In this case, the conductors 670b, 660b, 670a, 660a, and 630 have overlapping regions in a top view. The channel length directions of the transistors 600b and 600a are the depth direction (i.e., the Z direction) in a top view.

[0041] Each conductor included in the semiconductor device 100 may have a single layer structure or a stacked structure of two or more layers. For example, the conductor 630 may have a stacked structure of a conductor functioning as a wiring and a conductor functioning as one of the source and drain electrodes of the transistor 600a. For example, the conductor 660a may have a stacked structure of a conductor functioning as a wiring and a conductor functioning as the other of the source and drain electrodes of the transistor 600a. For example, the conductor 670a may have a stacked structure of a conductor functioning as the gate electrode of the transistor 600a, a conductor functioning as a wiring, and a conductor functioning as one of the source and drain electrodes of the transistor 600b. For example, the conductor 660b may have a stacked structure of a conductor functioning as a wiring and a conductor functioning as the other of the source and drain electrodes of the transistor 600b. Alternatively, for example, the conductor 670b may have a stacked structure of a conductor functioning as the gate electrode of the transistor 600b and a conductor functioning as a wiring.

[0042] 1D shows a transistor M11 corresponding to the transistor 600a and a transistor M12 corresponding to the transistor 600b. One of the source and the drain of the transistor M11 is connected to a wiring VLD. The other of the source and the drain of the transistor M11 is connected to a gate of the transistor M11, one of the source and the drain of the transistor M12, and a wiring SIG. The other of the source and the drain of the transistor M12 is connected to a gate of the transistor M12 and a wiring VLS.

[0043] The wiring VLD corresponds to the conductor 630. The wiring SIG corresponds to the conductor 660a and the conductor 670a. The wiring VLS corresponds to the conductor 660b and the conductor 670b. Note that in FIGS. 1A to 1C, the conductors corresponding to the wiring VLD, the wiring SIG, and the wiring VLS are indicated by reference characters in parentheses.

[0044] In one embodiment of the present invention, the semiconductor device 100 can be used as an ESD protection circuit. In other words, it can be said that the semiconductor device 100 has a function as an ESD protection circuit.

[0045] When the semiconductor device 100 is used as an ESD protection circuit, the wiring SIG functions as a signal line, the wiring VLD and the wiring VLS function as power supply lines, and the diode-connected transistors 600a and 600b function as ESD protection diodes.

[0046] Here, for example, a digital signal or an analog signal that is equal to or higher than a potential VSS, which is a low power supply potential, and equal to or lower than a potential VDD, which is a high power supply potential, is applied to the wiring SIG. In this case, if the transistors 600a and 600b are n-channel transistors, the semiconductor device 100 can function as an ESD protection circuit by applying the potential VDD to the wiring VLD and the potential VSS to the wiring VLS. Alternatively, if the transistors 600a and 600b are p-channel transistors, the semiconductor device 100 can function as an ESD protection circuit by applying the potential VSS to the wiring VLD and the potential VDD to the wiring VLS.

[0047] For example, when the wiring SIG is connected to another circuit (not shown), a surge generated in the wiring SIG due to ESD or the like can be diverted to at least one of the wirings VLD and VLS, thereby protecting the circuit from the surge. For example, it is possible to prevent the gate insulating film of a transistor included in the circuit from being damaged. Therefore, the reliability of the circuit can be improved.

[0048] In this case, the channel length of each of the transistors 600a and 600b may be smaller than the channel width. This can increase the on-state current of each of the transistors 600a and 600b, which function as ESD protection diodes. Therefore, a surge generated in the wiring SIG due to ESD or the like can be easily released to the wiring VLD and the wiring VLS, thereby improving reliability.

[0049] Although details will be described later, in vertical transistors such as the transistor 600a and the transistor 600b, the channel length can be set to the exposure limit of photolithography or less, and the on-state current can be easily increased.

[0050] The semiconductor device 100 of one embodiment of the present invention has a structure in which the transistors 600a and 600b are provided in a region where the conductor 670b corresponding to the wiring VLS, the conductor 670a corresponding to the wiring SIG, and the conductor 630 corresponding to the wiring VLD overlap with each other in a top view. That is, the transistors 600a and 600b functioning as ESD protection diodes can be arranged to overlap with the wiring SIG functioning as a signal line. Therefore, the transistors 600a and 600b and the conductors functioning as wirings can be provided without significantly increasing the occupied area in a top view. That is, it can be said that an ESD protection circuit can be provided without significantly increasing the occupied area.

[0051] Here, as shown in FIG. 1A , in a top view, the conductor 630 corresponding to the wiring VLS and the conductor 670b corresponding to the wiring VLD may be arranged so as to intersect with the conductor 670a corresponding to the wiring SIG. That is, the extending directions of the conductors 630 and 670b may be arranged so as to intersect with the extending direction of the conductor 670a. This reduces the overlapping area between the conductors 630 and 670a, thereby reducing the parasitic capacitance of the conductor 670a. Furthermore, the overlapping area between the conductors 670b and 670a can be reduced, thereby reducing the parasitic capacitance of the conductor 670a. By reducing the parasitic capacitance of the conductor 670a corresponding to the wiring SIG, the delay time of a signal transmitted via the wiring SIG can be reduced.

[0052] For example, when the wiring SIG is connected to another circuit (not shown), a decrease in the operating speed of the circuit due to the provision of the semiconductor device 100 having a function as an ESD protection circuit can be suppressed.

[0053] 1A to 1C, the semiconductor device 100 may be configured such that the conductor 660a extends in the Y direction instead of the conductor 670a, or such that both the conductor 670a and the conductor 660a extend in the Y direction. In particular, by configuring such that both the conductor 670a and the conductor 660a extend in the Y direction, the parasitic resistance of the wiring SIG corresponding to the conductor 670a and the conductor 660a can be reduced. By reducing the parasitic resistance of the wiring SIG, the delay time of a signal transmitted via the wiring SIG can be reduced.

[0054] For example, when the wiring SIG is connected to another circuit (not shown), a decrease in the operating speed of the circuit due to the provision of the semiconductor device 100 having a function as an ESD protection circuit can be suppressed.

[0055] 1A to 1C, the conductor 660b may extend in the X direction instead of the conductor 670b, or both the conductor 670b and the conductor 660b may extend in the X direction. In particular, by using a configuration in which both the conductor 670b and the conductor 660b extend in the X direction, the parasitic resistance of the wiring VLS corresponding to the conductor 670b and the conductor 660b can be reduced. By reducing the parasitic resistance of the wiring VLS, the potential supplied via the wiring VLS can be stabilized.

[0056] For example, when the wiring VLS is connected to another circuit (not shown), the potential supplied to the circuit through the wiring VLS can be stabilized, and the circuit can be stabilized.

[0057] In the semiconductor device 100, each of the oxide 650a and the oxide 650b can be, for example, a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor. The semiconductor is not limited to a simple semiconductor whose main component is a single element (for example, silicon or germanium), but can also be, for example, a compound semiconductor (for example, silicon germanium or gallium arsenide), an oxide semiconductor, or the like.

[0058] Note that oxide 650a and oxide 650b may be made of the same material or different materials.

[0059] In one embodiment of the present invention, the semiconductor device 100 can have a structure in which the oxide 650a and the oxide 650b each contain an oxide semiconductor. In this specification and the like, a transistor including an oxide semiconductor in a channel formation region is sometimes referred to as an OS transistor. Therefore, in one embodiment of the present invention, at least one of the transistor 600a and the transistor 600b in the semiconductor device 100 can be an OS transistor.

[0060] Unless otherwise specified, the semiconductor device 100 will be described below using an example in which the transistors 600a and 600b are OS transistors.

[0061] Note that the present invention is not limited to a structure in which the transistor 600a and the transistor 600b are both OS transistors. That is, the present invention is not limited to a structure in which the oxide 650a and the oxide 650b each contain an oxide semiconductor. Therefore, in this specification and the like, the term "oxide" may be replaced with the term "semiconductor," "semiconductor layer," or "semiconductor film" as appropriate.

[0062] The OS transistor has a characteristic of having an extremely small off-state current because the band gap of the oxide semiconductor in which the channel is formed is 2 eV or more. The off-state current of an OS transistor per 1 μm of channel width in a room temperature environment is 1 aA (1×10 −１８ A) Below, 1zA (1×10 −２１ A) or less, or 1 yA (1 x 10 −２４ In the case of a Si transistor (a transistor including silicon in a channel formation region), the off-state current per 1 μm of channel width in a room temperature environment can be 1 fA (1×10 −１５ A) or more and 1 pA (1 × 10 −１２ A) or less. Therefore, it can be said that the off-state current of an OS transistor is about 10 orders of magnitude smaller than that of a Si transistor. Therefore, for example, when a wiring connected to one of the source and drain of an OS transistor is floating, charge accumulated in the wiring can be held for a long period of time. Therefore, for example, by configuring a memory cell using an OS transistor, data written to the memory cell can be stored for a long period of time.

[0063] Furthermore, the off-state current of an OS transistor hardly increases even in a high-temperature environment. Specifically, the off-state current hardly increases even in an environment of room temperature or higher and 200° C. or lower. The on-state current of an OS transistor is unlikely to decrease even in a high-temperature environment. On the other hand, the on-state current of a Si transistor decreases in a high-temperature environment. That is, the on-state current of an OS transistor is larger than that of a Si transistor in a high-temperature environment. Furthermore, an OS transistor can perform favorable switching operation even in an environment of 125° C. or higher and 150° C. or lower because of its large ratio of on-state current to off-state current. Therefore, a semiconductor device using an OS transistor can operate stably and with high reliability even in a high-temperature environment.

[0064] Furthermore, an OS transistor has a high withstand voltage between the source and the drain (also referred to as drain withstand voltage). Therefore, a semiconductor device including an OS transistor can operate stably and with high reliability even when driven at high voltage.

[0065] Therefore, by using OS transistors for the transistors 600a and 600b in the semiconductor device 100, the transistors 600a and 600b themselves can be prevented from being damaged by a surge caused by ESD or the like, thereby improving the reliability of the semiconductor device 100.

[0066] Furthermore, because the off-state current of the OS transistor is extremely small, the current flowing from the wiring SIG to the wiring VLD and the current flowing from the wiring SIG to the wiring VLS can be made extremely small during normal operation (here, this refers to a state in which the potential of the wiring SIG is higher than or equal to the potential VSS and is lower than or equal to the potential VDD, and the transistors 600a and 600b are both off). Therefore, an increase in power consumption of the semiconductor device 100 can be suppressed.

[0067] Furthermore, for example, in a memory device using a memory cell having an OS transistor, when the memory device is provided with the semiconductor device 100 functioning as an ESD protection circuit, at least one of the transistors 600a and 600b can be manufactured simultaneously with the OS transistor included in the memory cell. Therefore, since an additional step and an additional mask are not required, the semiconductor device 100 can be provided without increasing process costs, and the reliability of the memory device can be improved.

[0068] That is, for example, in a memory device using a memory cell having an OS transistor, when an ESD protection circuit is provided in the memory device, by applying a configuration such as that of the semiconductor device 100, it is possible to improve the reliability of the memory device while suppressing increases in power consumption, process costs, and occupied area.

[0069] [Transistor 600] Next, specific structures of the transistor 600a and the transistor 600b will be described. Note that in the following description, the transistor 600 will be described as the transistor 600, focusing on features common to the transistor 600a and the transistor 600b. That is, in the transistor 600a, the insulator 640a, the conductor 660a, the oxide 650a, the insulator 672a, and a part of the conductor 670a (here, referring to the region of the conductor 670a in contact with the insulator 672a and the region in the vicinity thereof) correspond to the insulator 640, the conductor 660, the oxide 650, the insulator 672, and the conductor 670, respectively. Furthermore, in transistor 600b, a portion of conductor 670a (here referring to the region of conductor 670a in contact with oxide 650b and the region in its vicinity), insulator 640b, conductor 660b, oxide 650b, insulator 672b, and conductor 670b correspond to conductor 630, insulator 640, conductor 660, oxide 650, insulator 672, and conductor 670, respectively.

[0070] The transistor 600 includes a conductor 630, an insulator 640, a conductor 660 on the insulator 640, an oxide 650, an insulator 672 on the oxide 650, and a conductor 670 on the insulator 672. The oxide 650 functions as a semiconductor film including a channel formation region, the conductor 670 functions as a gate electrode, the insulator 672 functions as a gate insulating film, the conductor 630 functions as one of a source electrode and a drain electrode, and the conductor 660 functions as the other of the source electrode and the drain electrode.

[0071] In the transistor 600, a metal oxide functioning as an oxide semiconductor is used for the oxide 650 including the channel formation region.

[0072] The metal oxide preferably contains at least one of indium and zinc. Furthermore, for example, it is preferable to have indium, M (wherein M is one or more elements selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc. It is particularly preferable that M is one or more elements selected from gallium, aluminum, yttrium, and tin.

[0073] In particular, as the metal oxide, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO"). Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used. Alternatively, an oxide containing indium (In), tin (Sn), and zinc (Zn) (also referred to as "ITZO (registered trademark)") may be used. Alternatively, an oxide containing indium (In), gallium (Ga), zinc (Zn), and tin (Sn) (also referred to as "IGZTO") may be used.

[0074] By increasing the ratio of the number of indium atoms to the sum of the numbers of atoms of all metal elements contained in a metal oxide, a transistor using the metal oxide for a semiconductor film including a channel formation region can have excellent characteristics such as a large on-state current, high field-effect mobility, and high frequency characteristics.

[0075] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include a composition in which In:M:Zn=1:1:1 or thereabouts, a composition in which In:M:Zn=1:1:1.2 or thereabouts, a composition in which In:M:Zn=2:1:3 or thereabouts, a composition in which In:M:Zn=3:1:2 or thereabouts, a composition in which In:M:Zn=4:2:3 or thereabouts, a composition in which In:M:Zn=4:2:4.1 or thereabouts, a composition in which In:M:Zn=5:1:3 or thereabouts, a composition in which In:M:Zn=5:1:6 or thereabouts, a composition in which In:M:Zn=5:1:7 or thereabouts, a composition in which In:M:Zn=5:1:8 or thereabouts, a composition in which In:M:Zn=6:1:6 or thereabouts, and a composition in which In:M:Zn=5:2:5 or thereabouts. Furthermore, the atomic ratio of In in the In-M-Zn oxide may be smaller than the atomic ratio of M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include a composition of In:M:Zn=1:3:2 or a composition thereabout, or a composition of In:M:Zn=1:3:4 or a composition thereabout. Note that a composition thereabout includes a range of plus or minus 30% of the desired atomic ratio.

[0076] For example, when describing a composition having an atomic ratio of In:Ga:Zn=4:2:3 or thereabout, this includes a case where, when In is taken as 4, Ga is 1 or more and 3 or less, and Zn is 2 or more and 4 or less. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=5:1:6 or thereabout, this includes a case where, when In is taken as 5, Ga is more than 0.1 and 2 or less, and Zn is 5 or more and 7 or less. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=1:1:1 or thereabout, this includes a case where, when In is taken as 1, Ga is more than 0.1 and 2 or less, and Zn is more than 0.1 and 2 or less.

[0077] Furthermore, when metal oxides are used in a stacked structure, for example, a three-layer stacked structure can be used in which a first layer is a metal oxide having an atomic ratio of metal elements of In:Ga:Zn = 1:1:1, a second layer is a metal oxide having an atomic ratio of metal elements of In:Zn = 4:1, and a third layer is a metal oxide having an atomic ratio of metal elements of In:Ga:Zn = 1:1:1. It is preferable that the band gaps of the metal oxides in the first and third layers are larger than the band gap of the metal oxide in the second layer. This configuration allows the metal oxide in the second layer to serve as the main current path, resulting in a so-called buried channel structure.

[0078] The composition of metal oxides can be analyzed by, for example, secondary ion mass spectrometry (SIMS), energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Spectrometry) or the like can be used. Alternatively, a combination of these techniques may be used for analysis. Note that for elements with low content, the actual content and the content obtained by analysis may differ due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0079] The metal oxide can be formed by sputtering or atomic layer deposition (ALD). When the metal oxide is formed by sputtering, the composition of the formed metal oxide may differ from the composition of the sputtering target. In particular, the zinc content in the formed metal oxide may decrease to about 50% compared to the sputtering target.

[0080] The oxide semiconductor preferably has crystallinity. Examples of the crystalline oxide semiconductor include a c-axis aligned crystalline oxide semiconductor (CAAC-OS), a nanocrystalline oxide semiconductor (nc-OS), a polycrystalline oxide semiconductor, and a single-crystalline oxide semiconductor. As the oxide semiconductor, it is preferable to use a CAAC-OS or an nc-OS, and it is particularly preferable to use a CAAC-OS.

[0081] The CAAC-OS preferably has multiple layered crystalline regions, each with its c-axis oriented in the normal direction to the surface where it is formed. For example, the oxide semiconductor preferably has layered crystals parallel to the surface where it is formed. With this structure, the layered crystals of the oxide semiconductor are formed parallel to the channel length direction of the transistor, which allows the on-state current of the transistor to be increased.

[0082] In one embodiment of the present invention, in a method for forming an oxide semiconductor, a CAAC-OS, which is an oxide semiconductor with high crystallinity, can be used as a nucleus or a seed to increase the crystallinity of oxide semiconductors formed above and below the CAAC-OS. This can increase the crystallinity of the entire oxide semiconductor. In other words, oxide semiconductors formed above and below the CAAC-OS can be grown by solid-phase growth using the CAAC-OS as a nucleus or a seed, thereby forming an oxide semiconductor with high crystallinity. An oxide semiconductor formed by such a film formation method can be called an axial growth CAAC (AG CAAC).

[0083] By increasing the crystallinity of an oxide semiconductor, a transistor including the oxide semiconductor in a semiconductor film including a channel formation region can have excellent characteristics (for example, a transistor with high on-state current, a transistor with high field-effect mobility, a transistor with a small S value, a transistor with high frequency characteristics (also referred to as f characteristics), and a highly reliable transistor).

[0084] Note that it is preferable to perform a treatment for increasing the crystallinity of the oxide semiconductor during or after the formation of the oxide semiconductor. Examples of the treatment for increasing the crystallinity of the oxide semiconductor include heat treatment, plasma treatment, microwave (typically, 2.45 GHz) treatment, microwave plasma treatment, and light (e.g., ultraviolet light) irradiation treatment. Note that a plurality of these treatments may be performed simultaneously or sequentially. For example, heat treatment and microwave plasma treatment may be performed simultaneously. Alternatively, microwave plasma treatment may be performed after heat treatment.

[0085] In this specification, microwaves refer to electromagnetic waves having a frequency of 300 MHz to 300 GHz. Microwave plasma treatment refers to treatment using a device with a power source that generates high-density plasma using microwaves. Microwave plasma treatment can also be called microwave-excited high-density plasma treatment.

[0086] It is more preferable to perform the treatment for increasing the crystallinity of the oxide semiconductor multiple times during the formation of the oxide semiconductor. For example, when the oxide semiconductor film is formed by an ALD method, it is preferable to perform a microwave plasma treatment every time an atomic layer is formed. Alternatively, it is preferable to perform the treatment for increasing the crystallinity every time an oxide semiconductor film having a thickness within a predetermined range is formed, in order to increase productivity. Specifically, it is preferable to form a first oxide semiconductor film having a thickness of 1 nm to 10 nm, perform the first microwave plasma treatment, and then form a second oxide semiconductor film having a thickness of 1 nm to 10 nm, and perform the second microwave plasma treatment. Note that the methods for forming the first oxide semiconductor film and the second oxide semiconductor film are not particularly limited, and ALD or sputtering may be used, respectively. In particular, forming the first oxide semiconductor film by the ALD method is preferable because it can prevent elements of the layers constituting the formation surface from being mixed (also referred to as mixing) into the first oxide semiconductor film and the second oxide semiconductor film. This is particularly suitable when the element contained in the layer constituting the formation surface inhibits crystallization of the oxide semiconductor (for example, when silicon, carbon, or the like is contained). The first oxide semiconductor film and the second oxide semiconductor film may have different compositions. Although a stacked structure of the first oxide semiconductor film and the second oxide semiconductor film is illustrated here, the present invention is not limited to this. The same treatment can be applied to a single-layer oxide semiconductor film or a stacked structure of three or more layers.

[0087] Treatment for increasing the crystallinity of an oxide semiconductor may be performed after the oxide semiconductor is formed. Specifically, the treatment may be performed directly on the formed oxide semiconductor, or may be performed through another film, such as an insulating film, formed on the oxide semiconductor. For example, microwave plasma treatment may be performed after the oxide semiconductor is formed, or an insulating film (e.g., a silicon nitride film, a silicon oxide film, or an aluminum oxide film) may be formed after the oxide semiconductor is formed, and then heat treatment or microwave plasma treatment may be performed on the oxide semiconductor through the insulating film.

[0088] Note that the above-described treatment for increasing the crystallinity of an oxide semiconductor can also serve as treatment for removing impurities contained in the oxide semiconductor. For example, carbon, hydrogen, nitrogen, and the like contained in the oxide semiconductor can be preferably removed. Alternatively, by performing the treatment for increasing the crystallinity of an oxide semiconductor in an oxygen gas atmosphere, oxygen vacancies in the oxide semiconductor can be reduced.

[0089] When the treatment for increasing the crystallinity of the oxide semiconductor is performed, the substrate temperature is preferably set to room temperature (for example, 25° C.) or higher, 100° C. or higher and 600° C. or lower, or 300° C. or higher and 450° C. The temperature of the heat treatment is preferably set to 100° C. or higher and 700° C. or lower, or 300° C. or higher and 450° C.

[0090] By increasing the crystallinity of an oxide semiconductor, a highly reliable transistor can be realized.

[0091] The crystallinity of an oxide semiconductor can be analyzed by, for example, an X-ray diffraction (XRD) pattern, a transmission electron microscope (TEM) image, or an electron diffraction (ED) pattern. Alternatively, a combination of these methods may be used for analysis.

[0092] 1B and 1C, an opening 648 is provided in the insulator 640 and the conductor 660, reaching the conductor 630. At least a portion of the oxide 650 is disposed in the opening 648. The oxide 650 has a region in contact with the upper surface of the conductor 630 in the opening 648, a region in contact with the side surface of the conductor 660 in the opening 648, and a region in contact with at least a portion of the upper surface of the conductor 660. The insulator 672 is disposed so that at least a portion of it is located in the opening 648. The conductor 670 is disposed so that at least a portion of it is located in the opening 648. As shown in FIGS. 1B and 1C, the conductor 670 is preferably disposed so as to fill the opening 648.

[0093] The conductor 630 may have a structure in which tantalum nitride is stacked on titanium nitride, for example. In this case, the titanium nitride may be in contact with the insulator below the conductor 630, and the tantalum nitride may be in contact with the oxide 650. With such a structure, excessive oxidation of the conductor 630 by the oxide 650 can be suppressed. Furthermore, when an oxide insulator is used as the insulator below the conductor 630, excessive oxidation of the conductor 630 can be suppressed by the oxide insulator. Note that the conductor 630 may have a structure in which tungsten is stacked on titanium nitride, for example.

[0094] Furthermore, since the conductor 630 has a region in contact with the oxide 650, it is preferable to use a conductive material containing oxygen. With such a structure, the conductor 630 can maintain its conductivity even if it absorbs oxygen. Furthermore, even when a material containing oxygen is used for the insulator below the conductor 630, the conductivity of the conductor 630 can be maintained.

[0095] Furthermore, as the conductor 630, for example, indium tin oxide (also referred to as ITO), silicon-added indium tin oxide (also referred to as ITSO), or indium zinc oxide (also referred to as IZO (registered trademark)) can be used in a single layer or in a stacked layer.

[0096] The oxide 650 has a region in contact with the side surface of the conductor 660 in the opening 648 and a region in contact with part of the top surface of the conductor 660. In this way, the oxide 650 contacts not only the side surface but also the top surface of the conductor 660, thereby increasing the area in which the oxide 650 and the conductor 660 contact each other.

[0097] 1C shows a structure in which the side edge of the oxide 650 is located inside the side edge of the conductor 660. Note that one embodiment of the present invention is not limited to this. For example, a structure in which the side edge of the oxide 650 and the side edge of the conductor 660 coincide with each other in at least one of the X direction and the Y direction may be used. Alternatively, a structure in which the side edge of the oxide 650 is located outside the side edge of the conductor 660 may be used.

[0098] The side surface of the opening 648 (which may also be referred to as the side surface of the opening 648 in the insulator 640) is preferably perpendicular to the upper surface of the conductor 630. In other words, the insulator 640 can be said to have the opening 648 extending in a direction perpendicular to the upper surface of the conductor 630. In this case, the opening 648 has a cylindrical shape.

[0099] Although an example in which the opening 648 has a circular shape in a top view has been described here, one embodiment of the present invention is not limited to this. For example, the opening 648 may have a substantially circular shape such as an ellipse, a polygonal shape such as a square, or a polygonal shape such as a square with rounded corners in a top view. In this case, the maximum width of the opening 648 can be calculated appropriately according to the shape of the topmost part of the opening 648 in a top view.

[0100] For example, if opening 648 is rectangular in top view, the maximum width of opening 648 may be the length of the diagonal of the rectangle. Alternatively, for example, if opening 648 is approximately circular such as an ellipse, polygonal, or polygonal with rounded corners in top view, the maximum width of opening 648 may be the maximum width of the shape of opening 648 in top view.

[0101] The portions of the oxide 650, the insulator 672, and the conductor 670 that are disposed in the opening 648 are provided to reflect the shape of the opening 648. Thus, the oxide 650 is provided along the side surface of the opening 648, the insulator 672 is provided to cover the oxide 650, and the conductor 670 is provided to fill the recess in the insulator 672 that reflects the shape of the opening 648. In other words, it can be said that a portion of the conductor 670 has a shape that follows the side surface of the oxide 650 inside the opening 648.

[0102] That is, a part of the semiconductor film (corresponding to the oxide 650) including the channel formation region of the transistor 600 is provided along the side surface of the opening 648. That is, the part is provided in a direction perpendicular to the top surface of the conductor 630. In other words, the channel length direction of the transistor 600 has a component perpendicular to the top surface of the conductor 630.

[0103] Here, an insulator that contains excess oxygen and releases oxygen by heating is preferably used as the insulator 672. In this way, oxygen can be effectively supplied from the insulator 672 to the channel formation region of the oxide 650.

[0104] The insulator 672 may be, for example, a material that can be used for the insulator 522, the insulator 524, or the insulator 545 described later. For example, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, or silicon oxide having vacancies can be used. In particular, silicon oxide or silicon oxynitride is preferable in terms of its thermal stability. It is also preferable to use an insulator in which the concentrations of impurities such as hydrogen and water are reduced.

[0105] Furthermore, it is preferable to use a single layer or a stacked layer of a conductive material for each of the conductors 630, 660, and 670. For example, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has a function of suppressing oxygen diffusion.

[0106] The conductor 630, the conductor 660, and the conductor 670 may each be made of a material that can be used for the conductor 503, the conductor 560, or the conductor 542a and the conductor 542b, which will be described later. For example, titanium nitride or tantalum nitride can be used. Furthermore, in terms of, for example, conductivity and heat resistance, it is preferable to use a stack of tungsten.

[0107] Furthermore, since the insulator 640 functions as an interlayer film, it is preferable to use a material with a low dielectric constant. By using a material with a low dielectric constant as an interlayer film, the parasitic capacitance generated between wirings can be reduced. Furthermore, an insulator containing a material with a low dielectric constant can be used in a single layer or a stacked layer.

[0108] For example, a material that can be used for the insulator 516 described later may be used as the insulator 640. For example, silicon oxide or silicon oxynitride is preferably used because of its thermal stability.

[0109] An insulator having a barrier property against oxygen, hydrogen, and the like is preferably used for each of the insulator 620 and the insulator 678. For example, an insulator having a barrier property that prevents impurities such as hydrogen from diffusing into the region where the transistor 600 is provided from outside the region where the transistor 600 is provided is preferably used.

[0110] For example, the material that can be used for the insulator 514 described later can be used for the insulator 620 and the insulator 678. For example, a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide is preferably used because it has a barrier property against hydrogen.

[0111] 1B and 1C, the opening 648 is provided so that the side surface of the opening 648 is perpendicular to the top surface of the conductor 630; however, one embodiment of the present invention is not limited to this. For example, the side surface of the opening 648 may have a tapered shape.

[0112] In this specification and the like, a tapered shape refers to a shape in which at least a portion of a side surface of a structure is inclined with respect to the substrate surface. The angle between the inclined side surface and the substrate surface is referred to as a taper angle. In particular, in this specification and the like, a tapered shape having a taper angle greater than 0° and less than 90° is sometimes referred to as a forward taper shape, and a tapered shape having a taper angle greater than 90° and less than 180° is sometimes referred to as a reverse taper shape.

[0113] 1B and 1C, the oxide 650 is shown as a single layer, but one embodiment of the present invention is not limited to this. The oxide 650 may have a stacked structure of multiple oxide layers with different chemical compositions.

[0114] Fig. 2A is an enlarged view of oxide 650 and its vicinity in Fig. 1B, and Fig. 2B is a cross-sectional view in the XY plane of the portion indicated by the dashed dotted line A5-A6 in Fig. 2A.

[0115] As shown in FIG. 2A, the oxide 650 includes a region 650i and regions 650na and 650nb that are provided to sandwich the region 650i.

[0116] Region 650na is a region of oxide 650 that contacts conductor 630. At least a portion of region 650na functions as one of the source and drain regions of transistor 600. Region 650nb is a region of oxide 650 that contacts conductor 660. At least a portion of region 650nb functions as the other of the source and drain regions of transistor 600. As shown in FIG. 2B , conductor 660 contacts the entire periphery of oxide 650. Thus, the other of the source and drain regions of transistor 600 can be formed along the entire periphery of a portion of oxide 650 that is formed in the same layer as conductor 660.

[0117] The region 650i is a region between the regions 650na and 650nb of the oxide 650. At least a part of the region 650i functions as a channel formation region of the transistor 600. That is, the channel formation region of the transistor 600 is located in a region of the oxide 650 between the conductor 630 and the conductor 660. It can also be said that the channel formation region of the transistor 600 is located in a region of the oxide 650 that is in contact with the insulator 640 or in a region in the vicinity of the insulator 640.

[0118] The channel length of the transistor 600 is the distance between the source region and the drain region. In other words, the channel length of the transistor 600 can be said to be determined by the thickness of the insulator 640 on the conductor 630. In FIG. 2A , the channel length L of the transistor 600 is indicated by a dashed double-headed arrow. In a cross-sectional view, the channel length L is the distance between the edge of the region where the oxide 650 and the conductor 630 meet and the edge of the region where the oxide 650 and the conductor 660 meet. In other words, the channel length L corresponds to the length of the side of the insulator 640 on the opening 648 side.

[0119] In a planar transistor, the channel length is set by the exposure limit of photolithography, whereas in one embodiment of the present invention, the channel length can be set by the film thickness of the insulator 640. Therefore, the channel length of the transistor 600 can be made into an extremely fine structure that is equal to or less than the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more, or 5 nm or more). This increases the on-state current of the transistor 600, thereby improving its frequency characteristics.

[0120] Furthermore, as described above, the channel formation region, the source region, and the drain region can be formed in the opening 648. This allows the area occupied by the transistor 600 to be reduced compared to a planar transistor in which the channel formation region, the source region, and the drain region are provided separately on the XY plane.

[0121] Furthermore, in the XY plane including the channel formation region of the oxide 650, the oxide 650, the insulator 672, and the conductor 670 are arranged concentrically, as in FIG. 2B . Therefore, the side surface of the conductor 670 located at the center faces the side surface of the oxide 650 via the insulator 672. That is, in a top view, the entire periphery of the oxide 650 forms the channel formation region. In this case, for example, the channel width of the transistor 600 is determined by the periphery length of the oxide 650. That is, the channel width of the transistor 600 can be determined by the maximum width of the opening 648 (or the maximum diameter if the opening 648 is circular in a top view). In FIGS. 2A and 2B , the maximum width D of the opening 648 is indicated by a double-headed, dashed arrow. In FIG. 2B , the channel width W of the transistor 600 is indicated by a double-headed, dashed arrow. Increasing the maximum width D of the opening 648 increases the channel width per unit area, thereby increasing the on-state current.

[0122] When the opening 648 is formed using photolithography, the maximum width D of the opening 648 is set by the exposure limit of photolithography. The maximum width D of the opening 648 is also set by the film thickness of each of the oxide 650, the insulator 672, and the conductor 670 provided in the opening 648. The maximum width D of the opening 648 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and is preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. When the opening 648 is circular in top view, the maximum width D of the opening 648 corresponds to the diameter of the opening 648, and the channel width W can be calculated as "D × π."

[0123] The channel length L of the transistor 600 of one embodiment of the present invention is preferably smaller than at least the channel width W of the transistor 600. The channel length L of the transistor 600 of one embodiment of the present invention is 0.1 to 0.99 times, preferably 0.5 to 0.8 times, the channel width W of the transistor 600. With such a structure, a transistor with favorable electrical characteristics and high reliability can be realized.

[0124] Furthermore, by forming the opening 648 so as to have a circular shape in top view, the oxide 650, the insulator 672, and the conductor 670 are arranged concentrically, which makes the distance between the conductor 670 and the oxide 650 uniform, allowing the gate electric field of the oxide 650 to be applied uniformly.

[0125] Note that the transistor 600 illustrated in FIGS. 1A to 1C is an example and is not limited to this configuration.

[0126] 3A, 3B, and 6A are a top view, a cross-sectional view, and a circuit diagram illustrating a configuration example of a semiconductor device 100<2>, which is a modification of the above-described semiconductor device 100. The semiconductor device 100<2> is a configuration example in which an ESD protection circuit like that of the above-described semiconductor device 100 is provided for each of two wirings SIG (wirings SIG[1] and SIG[2]) that function as signal lines. Therefore, the description of the above-described semiconductor device 100 can be referred to as appropriate, and therefore, the description here may be omitted.

[0127] Fig. 3A is a top view of the semiconductor device 100<2>. Fig. 3B is a cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in Fig. 3A. Note that some elements are omitted from the top view of Fig. 3A for clarity. Also, Fig. 1C can be appropriately referenced for the cross-sectional view of the portion indicated by the dashed dotted line A3-A4 in Fig. 3A and the cross-sectional view of the portion indicated by the dashed dotted line A3'-A4' in Fig. 3A.

[0128] 3A and 3B illustrate a transistor 600a[1] and a transistor 600b[1] that function as ESD protection diodes for one of the two wirings SIG (wiring SIG[1]). Also illustrated are a transistor 600a[2] and a transistor 600b[2] that function as ESD protection diodes for the other of the two wirings SIG (wiring SIG[2]).

[0129] 3A and 3B, as an example, a conductor 670a[1] corresponding to the wiring SIG[1], a transistor 600a[1], and a transistor 600b[1], etc., and a conductor 670a[2] corresponding to the wiring SIG[2], a transistor 600a[2], and a transistor 600b[2], etc., are arranged side by side in the X direction.

[0130] Here, the transistor 600a[1] and the transistor 600a[2] correspond to the above-described transistor 600a, and the transistor 600b[1] and the transistor 600b[2] correspond to the above-described transistor 600b. Thus, opening 648a[1] and opening 648a[2] correspond to opening 648a, oxide 650a[1] and oxide 650a[2] correspond to oxide 650a, conductor 660a[1] and conductor 660a[2] correspond to conductor 660a, conductor 670a[1] and conductor 670a[2] correspond to conductor 670a, opening 648b[1] and opening 648b[2] correspond to opening 648b, oxide 650b[1] and oxide 650b[2] correspond to oxide 650b, and opening 676a[1] and opening 676a[2] correspond to opening 676a.

[0131] 3A and 3B, the conductor 630 extends in the X direction and has a region that functions as one of the source and drain electrodes of the transistor 600a[1] and a region that functions as one of the source and drain electrodes of the transistor 600a[2]. The conductor 670a[1] extends in the Y direction and contacts the conductor 660a[1] through an opening 676a[1] provided in the insulator 672a. The conductor 670a[2] extends in the Y direction and contacts the conductor 660a[2] through an opening 676a[2] provided in the insulator 672a. The conductor 660b has a region that functions as the other of the source and drain electrodes of the transistor 600b[1] and a region that functions as the other of the source and drain electrodes of the transistor 600b[2]. The conductor 670b extends in the X direction and has a region that functions as the gate electrode of the transistor 600b[1] and a region that functions as the gate electrode of the transistor 600b[2]. The conductor 670b is in contact with the conductor 660b through an opening 676b provided in the insulator 672b.

[0132] 6A shows a transistor M11[1] corresponding to the transistor 600a[1], a transistor M12[1] corresponding to the transistor 600b[1], a transistor M11[2] corresponding to the transistor 600a[2], and a transistor M12[2] corresponding to the transistor 600b[2]. One of the source or the drain of the transistor M11[1] is connected to the wiring VLD. The other of the source or the drain of the transistor M11[1] is connected to the gate of the transistor M11[1], one of the source or the drain of the transistor M12[1], and the wiring SIG[1]. The other of the source or the drain of the transistor M12[1] is connected to the gate of the transistor M12[1] and the wiring VLS. One of the source or the drain of the transistor M11[2] is connected to the wiring VLD. The other of the source and the drain of the transistor M11[2] is connected to the gate of the transistor M11[2], one of the source and the drain of the transistor M12[2], and the wiring SIG[2]. The other of the source and the drain of the transistor M12[2] is connected to the gate of the transistor M12[2] and the wiring VLS.

[0133] The wiring VLD corresponds to the conductor 630. The wiring SIG[1] corresponds to the conductor 660a[1] and the conductor 670a[1]. The wiring SIG[2] corresponds to the conductor 660a[2] and the conductor 670a[2]. The wiring VLS corresponds to the conductor 660b and the conductor 670b. Note that in FIGS. 3A and 3B, the conductors corresponding to the wiring VLD, the wiring SIG[1], the wiring SIG[2], and the wiring VLS are indicated by reference characters in parentheses.

[0134] Here, in the semiconductor device 100<2>, as in the semiconductor device 100 described above, a transistor 600a[1] and a transistor 600b[1] that function as ESD protection diodes can be arranged overlapping a wiring SIG[1] that functions as a signal line, and a transistor 600a[2] and a transistor 600b[2] that function as ESD protection diodes can be arranged overlapping a wiring SIG[2] that functions as a signal line.

[0135] For example, in a top view, there is no need to provide a region for arranging the transistors 600a[1], 600b[1], 600a[2], and 600b[2], each of which functions as an ESD protection diode, between the conductor 670a[1] corresponding to the wiring SIG[1] and the conductor 670a[2] corresponding to the wiring SIG[2]. Therefore, the conductors 670a[1] and 670a[2] can be arranged at the minimum interval defined by the design rule. Therefore, an ESD protection circuit can be provided without significantly increasing the occupied area.

[0136] Therefore, for example, in a memory device using memory cells having OS transistors, when the memory device is provided with multiple ESD protection circuits, by applying a configuration such as that of the semiconductor device 100<2>, it is possible to improve the reliability of the memory device while suppressing increases in power consumption, process costs, and occupied area.

[0137] Although the configuration example in which there are two wirings SIG that function as signal lines has been described here, even when there are three or more wirings SIG that function as signal lines, the conductors 670a corresponding to the respective wirings SIG can be arranged at the minimum intervals defined by the design rules, as in the semiconductor device 100<2>. Therefore, an ESD protection circuit can be provided without significantly increasing the occupied area, and reliability can be improved.

[0138] 4A, 4B, and 6B are a top view, a cross-sectional view, and a circuit diagram illustrating a configuration example of a semiconductor device 100A that is a modification of the above-described semiconductor device 100. The semiconductor device 100A differs from the semiconductor device 100 in that it includes two transistors 600a (transistors 600a_1 and 600a_2) connected in parallel and two transistors 600b (transistors 600b_1 and 600b_2) connected in parallel. Therefore, the description of the above-described semiconductor device 100 can be referred to as appropriate, and therefore, the description here may be omitted.

[0139] Fig. 4A is a top view of the semiconductor device 100A. Fig. 4B is a cross-sectional view of the portion indicated by the dashed dotted line A3-A4 in Fig. 4A. Note that some elements are omitted from the top view of Fig. 4A for clarity. Also, Fig. 1B can be appropriately referenced for the cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in Fig. 4A and the cross-sectional view of the portion indicated by the dashed dotted line A1'-A2' in Fig. 4A.

[0140] In FIGS. 4A and 4B, for example, a transistor 600a_1, a transistor 600b_1, a transistor 600a_2, a transistor 600b_2, etc. are arranged side by side in the Y direction.

[0141] Here, the transistors 600a_1 and 600a_2 correspond to the transistor 600a described above. The transistors 600b_1 and 600b_2 correspond to the transistor 600b described above. Therefore, the openings 648a_1 and 648a_2 correspond to the opening 648a, the oxides 650a_1 and 650a_2 correspond to the oxide 650a, the openings 648b_1 and 648b_2 correspond to the opening 648b, the oxides 650b_1 and 650b_2 correspond to the oxide 650b, and the conductors 660b_1 and 660b_2 correspond to the conductor 660b. The openings 676b_1 and 676b_2 correspond to the opening 676b.

[0142] As shown in Figures 4A and 4B, the conductor 630 extends in the X direction and has a region functioning as one of the source and drain electrodes of the transistor 600a_1 and a region functioning as one of the source and drain electrodes of the transistor 600a_2. The conductor 660a has a region functioning as the other of the source and drain electrodes of the transistor 600a_1 and a region functioning as the other of the source and drain electrodes of the transistor 600a_2. The conductor 670a extends in the Y direction and has a region functioning as the gate electrode of the transistor 600a_1 and a region functioning as the gate electrode of the transistor 600a_2. The conductor 670a is in contact with the conductor 660a through an opening 676a provided in the insulator 672a. The conductor 670b extends in the X direction and has a region functioning as the gate electrode of the transistor 600b_1 and a region functioning as the gate electrode of the transistor 600b_2. The conductor 670b is in contact with the conductor 660b_1 through an opening 676b_1 provided in the insulator 672b, and is in contact with the conductor 660b_2 through an opening 676b_2 provided in the insulator 672b.

[0143] 6B shows a transistor M11_1 corresponding to the transistor 600a_1, a transistor M12_1 corresponding to the transistor 600b_1, a transistor M11_2 corresponding to the transistor 600a_2, and a transistor M12_2 corresponding to the transistor 600b_2. One of the source or the drain of the transistor M11_1 is connected to the wiring VLD. The other of the source or the drain of the transistor M11_1 is connected to the gate of the transistor M11_1, one of the source or the drain of the transistor M12_1, and the wiring SIG. The other of the source or the drain of the transistor M12_1 is connected to the gate of the transistor M12_1 and the wiring VLS. One of the source or the drain of the transistor M11_2 is connected to the wiring VLD. The other of the source or the drain of the transistor M11_2 is connected to the gate of the transistor M11_2, one of the source or the drain of the transistor M12_2, and the wiring SIG. The other of the source and the drain of the transistor M12_2 is connected to the gate of the transistor M12_2 and the wiring VLS.

[0144] The wiring VLD corresponds to the conductor 630. The wiring SIG corresponds to the conductor 660a and the conductor 670a. The wiring VLS corresponds to the conductor 660b_1, the conductor 660b_2, and the conductor 670b. Note that in FIGS. 4A and 4B, the conductors corresponding to the wiring VLD, the wiring SIG, and the wiring VLS are indicated by reference characters in parentheses.

[0145] Here, the semiconductor device 100A includes two transistors 600a (transistors 600a_1 and 600a_2) connected in parallel and two transistors 600b (transistors 600b_1 and 600b_2) connected in parallel, and therefore the on-state current of the transistors functioning as ESD protection diodes can be made larger than that of the semiconductor device 100. Therefore, a surge generated in the wiring SIG due to ESD or the like can be easily released to the wiring VLD and the wiring VLS.

[0146] In this case, two transistors 600a connected in parallel and two transistors 600b connected in parallel can be arranged to overlap the wiring SIG that functions as a signal line, similarly to the semiconductor device 100. Therefore, the on-state current can be increased without significantly increasing the occupied area.

[0147] Therefore, for example, when the wiring SIG is connected to another circuit (not shown), the reliability of the circuit can be improved without significantly increasing the occupied area.Furthermore, for example, when an ESD protection circuit is provided in a memory device using memory cells having OS transistors, the reliability of the memory device can be improved while suppressing an increase in the occupied area by applying a configuration such as the semiconductor device 100A.

[0148] Although the configuration example of the semiconductor device 100A including two transistors 600 a connected in parallel and two transistors 600 b connected in parallel has been described here, a configuration including three or more transistors 600 a connected in parallel and three or more transistors 600 b connected in parallel may also be used. This makes it possible to more easily dissipate a surge generated in the wiring SIG due to ESD or the like to the wiring VLD and the wiring VLS without significantly increasing the occupied area, thereby improving reliability.

[0149] 5A to 5C and 6C are a top view, a cross-sectional view, and a circuit diagram illustrating a configuration example of a semiconductor device 100B, which is a modification of the above-described semiconductor device 100. The semiconductor device 100B differs from the semiconductor device 100 in that the semiconductor device 100B includes a transistor 600a and a transistor 600c connected in series instead of the transistor 600a, and a transistor 600b and a transistor 600d connected in series instead of the transistor 600b. Therefore, the description of the semiconductor device 100 described above can be referred to as appropriate, and therefore, the description may be omitted here.

[0150] Fig. 5A is a top view of the semiconductor device 100B. Fig. 5B is a cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in Fig. 5A. Fig. 5C is a cross-sectional view of the portion indicated by the dashed dotted line A3-A4 in Fig. 5A. Note that some elements have been omitted from the top view of Fig. 5A for clarity.

[0151] 5B and 5C illustrate an insulator 620, a transistor 600c on the insulator 620, a transistor 600a on the transistor 600c, a transistor 600d on the transistor 600a, a transistor 600b on the transistor 600d, an insulator 640c on the insulator 620, an insulator 640a on the insulator 640c, an insulator 640d on the insulator 640a, an insulator 640b on the insulator 640d, and an insulator 678 on the transistor 600c, the transistor 600a, the transistor 600d, and the transistor 600b. Each of the insulator 620, the insulator 640c, the insulator 640a, the insulator 640d, the insulator 640b, and the insulator 678 functions as an interlayer film, a protective film, or the like.

[0152] The figure also shows a conductor 630 serving as one of the source and drain electrodes of the transistor 600c, a conductor 660c serving as the other of the source and drain electrodes, an oxide 650c serving as a semiconductor film including a channel formation region, and an insulator 672c serving as a gate insulating film. The figure also shows a conductor 670c serving as the gate electrode of the transistor 600c and also serving as one of the source and drain electrodes of the transistor 600a. The figure also shows a conductor 660a serving as the other of the source and drain electrodes of the transistor 600a, an oxide 650a serving as a semiconductor film including a channel formation region, and an insulator 672a serving as a gate insulating film. The figure also shows a conductor 670a serving as the gate electrode of the transistor 600a and also serving as one of the source and drain electrodes of the transistor 600d. The figure also illustrates a conductor 660d that functions as the other of the source and drain electrodes of the transistor 600d, an oxide 650d that functions as a semiconductor film including a channel formation region, and an insulator 672d that functions as a gate insulating film. The figure also illustrates a conductor 670d that functions as the gate electrode of the transistor 600d and also as one of the source and drain electrodes of the transistor 600b. The figure also illustrates a conductor 660b that functions as the other of the source and drain electrodes of the transistor 600b, an oxide 650b that functions as a semiconductor film including a channel formation region, an insulator 672b that functions as a gate insulating film, and a conductor 670b that functions as a gate electrode. Note that the conductors 630, 660a, 670a, 660b, and 670b each also function as wirings.

[0153] As shown in Fig. 5B, the conductor 630 extends in the X direction. As shown in Fig. 5C, the conductor 670a extends in the Y direction and contacts the conductor 660a through an opening 676a in the insulator 672a. As shown in Fig. 5B, the conductor 670b extends in the X direction and contacts the conductor 660b through an opening 676b in the insulator 672b.

[0154] The conductor 670c contacts the conductor 660c through an opening 676c provided in the insulator 672c. The conductor 670d contacts the conductor 660d through an opening 676d provided in the insulator 672d.

[0155] In other words, it can be said that the transistors 600c, 600a, 600d, and 600b are each diode-connected.

[0156] 5C , the configuration example in which the conductors 660c and 670c extend in the Y direction and the conductors 660d and 670d extend in the Y direction is shown, but this is not limiting. For example, the conductors 660c and 670c may extend in the X direction. For example, the conductors 660d and 670d may also extend in the X direction.

[0157] 5B and 5C , an opening 648c reaching the conductor 630 is provided in the insulator 640c and the conductor 660c, and at least a portion of the structure of the transistor 600c is disposed in the opening 648c. An opening 648a reaching the conductor 670c is provided in the insulator 640a and the conductor 660a, and at least a portion of the structure of the transistor 600a is disposed in the opening 648a. An opening 648d reaching the conductor 670a is provided in the insulator 640d and the conductor 660d, and at least a portion of the structure of the transistor 600d is disposed in the opening 648d. An opening 648b reaching the conductor 670d is provided in the insulator 640b and the conductor 660b, and at least a portion of the structure of the transistor 600b is disposed in the opening 648b.

[0158] Specifically, in the transistor 600c, part of the oxide 650c is provided so as to include a region along the side surface of the opening 648c, a region in contact with the top surface of the conductor 630, and a region in contact with the side surface of the conductor 660c, and the region of the oxide 650c along the side surface of the opening 648c includes a channel formation region. Part of the insulator 672c is provided along the side surface of the oxide 650c. Part of the conductor 670c is provided along the side surface of the insulator 672c. In other words, it can be said that part of the conductor 670c has a shape that follows the side surface of the oxide 650c inside the opening 648c. In the transistor 600a, part of the oxide 650a is provided to include a region along the side surface of the opening 648a, a region in contact with the top surface of the conductor 670c, and a region in contact with the side surface of the conductor 660a, and the region of the oxide 650a along the side surface of the opening 648a is provided to include a channel formation region. Part of the insulator 672a is provided along the side surface of the oxide 650a. Part of the conductor 670a is provided along the side surface of the insulator 672a. In other words, it can be said that part of the conductor 670a has a shape that follows the side surface of the oxide 650a inside the opening 648a. In the transistor 600d, part of the oxide 650d is provided to include a region along the side surface of the opening 648d, a region in contact with the top surface of the conductor 670a, and a region in contact with the side surface of the conductor 660d, and the region of the oxide 650d along the side surface of the opening 648d is provided to include a channel formation region. Part of the insulator 672d is provided along the side surface of the oxide 650d. Part of the conductor 670d is provided along the side surface of the insulator 672d. That is, part of the conductor 670d can be said to have a shape that follows the side surface of the oxide 650d inside the opening 648d. In the transistor 600b, part of the oxide 650b is provided to include a region along the side surface of the opening 648b, a region in contact with the top surface of the conductor 670d, and a region in contact with the side surface of the conductor 660b, and the region of the oxide 650b along the side surface of the opening 648b includes a channel formation region. Part of the insulator 672b is provided along the side surface of the oxide 650b. Part of the conductor 670b is provided along the side surface of the insulator 672b.In other words, it can be said that a portion of the conductor 670b has a shape that follows the side surface of the oxide 650b inside the opening 648b.

[0159] Therefore, in the semiconductor device 100B, the area occupied by each of the transistors 600c, 600a, 600d, and 600b can be reduced when viewed from above.

[0160] 5A to 5C, the transistors 600c, 600a, 600d, and 600b share part of their structures and are provided so as to overlap with each other in a top view. In this case, the channel formation region of the transistor 600c included in the oxide 650c, the channel formation region of the transistor 600a included in the oxide 650a, the channel formation region of the transistor 600d included in the oxide 650d, and the channel formation region of the transistor 600b included in the oxide 650b may be provided so as to overlap with each other in a top view. This can reduce the area occupied by the semiconductor device 100B.

[0161] 5A to 5C , the conductor 670b and the conductor 660b are located above the conductor 670d, the conductor 670d and the conductor 660d are located above the conductor 670a, the conductors 670a and 660a are located above the conductor 670c, and the conductors 670c and 660c are located above the conductor 630. Furthermore, the conductor 670b has a region that functions as a wiring and a region that functions as the gate electrode of the transistor 600b. The conductor 670d has a region that functions as one of the source and drain electrodes of the transistor 600b and a region that functions as the gate electrode of the transistor 600d. The conductor 670a has a region that functions as a wiring, a region that functions as one of the source and drain electrodes of the transistor 600d, and a region that functions as the gate electrode of the transistor 600a. The conductor 670c has a region functioning as one of the source and drain electrodes of the transistor 600a and a region functioning as the gate electrode of the transistor 600c. The conductor 660b has a region functioning as the other of the source and drain electrodes of the transistor 600b and a region functioning as wiring. The conductor 660d has a region functioning as the other of the source and drain electrodes of the transistor 600d. The conductor 660a has a region functioning as the other of the source and drain electrodes of the transistor 600a and a region functioning as wiring. The conductor 630 has a region functioning as one of the source and drain electrodes of the transistor 600c and a region functioning as wiring. The conductor 660c has a region functioning as the other of the source and drain electrodes of the transistor 600c. In this case, the conductors 670b, 660b, 670d, 660d, 670a, 660a, 670c, 660c, and 630 have overlapping regions in top view. The channel length directions of the transistors 600b, 600d, 600a, and 600c are the depth direction (i.e., the Z direction) in top view.

[0162] 6C shows a transistor M11 corresponding to the transistor 600a, a transistor M12 corresponding to the transistor 600b, a transistor M13 corresponding to the transistor 600c, and a transistor M14 corresponding to the transistor 600d. One of the source or the drain of the transistor M13 is connected to the wiring VLD. The other of the source or the drain of the transistor M13 is connected to the gate of the transistor M13 and one of the source or the drain of the transistor M11. The other of the source or the drain of the transistor M11 is connected to the gate of the transistor M11, one of the source or the drain of the transistor M14, and the wiring SIG. The other of the source or the drain of the transistor M14 is connected to the gate of the transistor M14 and one of the source or the drain of the transistor M12. The other of the source or the drain of the transistor M12 is connected to the gate of the transistor M12 and the wiring VLS.

[0163] The wiring VLD corresponds to the conductor 630. The wiring SIG corresponds to the conductor 660a and the conductor 670a. The wiring VLS corresponds to the conductor 660b and the conductor 670b. Note that in FIGS. 5A to 5C, the conductors corresponding to the wiring VLD, the wiring SIG, and the wiring VLS are indicated by reference characters in parentheses.

[0164] Here, the semiconductor device 100B has transistors 600a and 600c connected in series, and transistors 600b and 600d connected in series, and therefore, compared to the semiconductor device 100 described above, the transistors themselves, which function as ESD protection diodes, can be prevented from being destroyed by surges generated by ESD or the like.

[0165] In this case, the transistors 600a and 600c connected in series and the transistors 600b and 600d connected in series can be arranged to overlap the wiring SIG functioning as a signal line, similarly to the semiconductor device 100. Therefore, the transistors themselves functioning as ESD protection diodes can be prevented from being destroyed by a surge generated by ESD or the like, without significantly increasing the occupied area.

[0166] Therefore, for example, when the wiring SIG is connected to another circuit (not shown), the reliability of the circuit can be improved without significantly increasing the occupied area.Furthermore, for example, when an ESD protection circuit is provided in a memory device using memory cells having OS transistors, the reliability of the memory device can be improved while suppressing an increase in the occupied area by applying a configuration such as the semiconductor device 100B.

[0167] Although the configuration example of the semiconductor device 100B has been described here in which the transistor 600a is replaced by two transistors (transistors 600a and 600c) connected in series, and the transistor 600b is replaced by two transistors (transistors 600b and 600d) connected in series, the semiconductor device 100B may have a configuration in which three or more transistors connected in series are used instead of the transistor 600a, and three or more transistors connected in series are used instead of the transistor 600c. This can further prevent the transistors themselves, which function as ESD protection diodes, from being destroyed by surges generated by ESD or the like, without significantly increasing the occupied area, thereby improving reliability.

[0168] [Modification 4] FIG. 7 is a cross-sectional view illustrating a configuration example of a semiconductor device 100C, which is a modification of the semiconductor device 100 described above.

[0169] 1C and other components, the semiconductor device 100C includes an insulator 672a and a conductor 614 embedded in the insulator 640a. The semiconductor device 100C differs from the semiconductor device 100 mainly in that the conductor 670a is not in contact with the conductor 660a and that the conductor 670a is in contact with the conductor 614 and the conductor 614 is in contact with the conductor 630. Therefore, the description of the semiconductor device 100 described above can be referred to as appropriate, and therefore, the description may be omitted here.

[0170] The conductor 614 functions as a plug or a wiring. Details of the conductor functioning as a plug or a wiring will be described later.

[0171] In the semiconductor device 100C, the conductor 670a, the conductor 614, and the conductor 630 correspond to the wiring SIG. The conductor 660a corresponds to the wiring VLD. The conductors 670b and 660b correspond to the wiring VLS.

[0172] In one embodiment of the present invention, for example, the transistor 600a can be diode-connected by connecting the gate of the transistor 600a (corresponding to the conductor 670a) to the other of the source and the drain of the transistor 600a (corresponding to the conductor 660a) as in the semiconductor device 100. Alternatively, for example, the transistor 600a can be diode-connected by connecting the gate of the transistor 600a (corresponding to the conductor 670a) to the other of the source and the drain of the transistor 600a (corresponding to the conductor 630) as in the semiconductor device 100C. Note that the same applies to the transistor 600b, although not shown.

[0173] 7, the semiconductor device 100C may be configured such that the conductor 630 extends in the Y direction instead of the conductor 670a, or such that both the conductor 670a and the conductor 630 extend in the Y direction. In particular, by configuring such that both the conductor 670a and the conductor 630 extend in the Y direction, the parasitic resistance of the wiring SIG corresponding to the conductor 670a and the conductor 630 can be reduced. By reducing the parasitic resistance of the wiring SIG, the delay time of a signal transmitted via the wiring SIG can be reduced.

[0174] For example, when the wiring SIG is connected to another circuit (not shown), a decrease in the operating speed of the circuit due to the provision of the semiconductor device 100C having a function as an ESD protection circuit can be suppressed.

[0175] [Transistor 600B] In one embodiment of the present invention, a transistor having a back gate may be used in the semiconductor device 100 or the like.

[0176] 8 is a cross-sectional view illustrating a structural example of a transistor having a back gate according to one embodiment of the present invention. A transistor 600B illustrated in FIG. 8 is a variation of the above-described transistor 600. The transistor 600B has two gates (a gate and a back gate) corresponding to each other with a channel formation region therebetween.

[0177] The transistor 600B differs from the transistor 600 in that it includes a conductor 680 and an insulator 682. In the transistor 600B, the insulator 682 is provided between the insulator 640 and the oxide 650 on the side surface of the opening 648, and the conductor 680 is provided in part of the insulator 640 so as to surround the outer periphery of the oxide 650 with the insulator 682 interposed therebetween.

[0178] Here, the conductor 670 may function as a first gate (also simply referred to as a gate) electrode, and the conductor 680 may function as a second gate (also referred to as a back-gate) electrode. In this case, the insulator 672 functions as a first gate insulating film, and the insulator 682 functions as a second gate insulating film.

[0179] The transistor 600B also differs from the transistor 600 in that the conductor 630 has a recessed portion at a position overlapping with the opening 648. In the transistor 600B, part of the oxide 650 and part of the insulator 682 are provided in the recessed portion of the conductor 630. In this case, the bottom surface of the oxide 650 is located lower than the bottom surface of the insulator 682.

[0180] This structure can increase the area where the oxide 650 and the conductor 630 are in contact with each other, thereby reducing the contact resistance between the oxide 650 and the conductor 630.

[0181] Here, for example, a material that can be used for the conductor 670 may be used as the conductor 680. Furthermore, for example, a material that can be used for the insulator 672 may be used as the insulator 682.

[0182] In a transistor having a back gate, the threshold voltage is shifted by the back gate voltage. The back gate of the transistor may be connected to the gate, one of the source and the drain, or the other of the source and the drain.

[0183] 9A is a cross-sectional view showing an example of a configuration in which the back gate of the transistor 600B (corresponding to the conductor 680) is connected to the gate of the transistor 600B (corresponding to the conductor 670) via an insulator 672 and a conductor 614 embedded in the insulator 640. FIG. 9B is a cross-sectional view showing an example of a configuration in which the back gate of the transistor 600B (corresponding to the conductor 680) is connected to the other of the source or drain of the transistor 600B (corresponding to the conductor 660) via the conductor 614 embedded in the insulator 640. FIG. 9C is a cross-sectional view showing an example of a configuration in which the back gate of the transistor 600B (corresponding to the conductor 680) is connected to one of the source or drain of the transistor 600B (corresponding to the conductor 630) via the conductor 614 embedded in the insulator 640.

[0184] The conductor 614 functions as a plug or a wiring. Details of the conductor functioning as a plug or a wiring will be described later.

[0185] 10A to 10D are examples of circuit diagrams in which the transistors in the circuit diagrams shown in Fig. 1D and Fig. 6A to 6C are replaced with transistors having back gates. In each of Fig. 10A to 10D, as an example, the back gate of each transistor is connected to the gate of the transistor.

[0186] In this manner, by connecting the back gate of the transistor to the gate, the on-state current of the transistor can be increased, which makes it possible to easily release a surge generated in the wiring SIG due to ESD or the like to the wiring VLD and the wiring VLS, thereby improving reliability.

[0187] Although not shown, the threshold voltage may be changed by applying an arbitrary potential to the back gate of the transistor. For example, a potential that reduces the threshold voltage of the transistor may be applied to the back gate to increase the on-state current. This can make it easier for a surge generated in the wiring SIG due to ESD or the like to escape to the wiring VLD and the wiring VLS, thereby improving reliability. Alternatively, for example, a potential that increases the threshold voltage of the transistor may be applied to the back gate to reduce the off-state current. This can significantly reduce the current flowing from the wiring SIG to the wiring VLD and the current flowing from the wiring SIG to the wiring VLS during normal operation, thereby suppressing an increase in power consumption.

[0188] As described above, the semiconductor device of one embodiment of the present invention can have various structures. In addition, the semiconductor device is not limited to the above structures, and various structures can be appropriately combined to form a semiconductor device.

[0189] <Configuration Example 2 of Semiconductor Device> Next, a configuration example will be described in which the gate of another transistor is connected to the wiring SIG of the semiconductor device 100 described above. In this way, by applying the semiconductor device 100 having a function as an ESD protection circuit, it is possible to prevent the transistor from being destroyed by a surge generated by ESD or the like. Note that the above description can be referred to as appropriate, and therefore the description may be omitted here.

[0190] 11A is a top view showing a configuration example in which a gate of a transistor 600e is connected to a wiring SIG of a semiconductor device 100. FIG. 11B is a cross-sectional view of a portion indicated by a dashed line A3-A4 in FIG. 11A. Note that some elements are omitted from the top view of FIG. 11A for clarity. Also, FIG. 1B can be referred to as appropriate for the cross-sectional view of the portion indicated by a dashed line A1-A2 in FIG. 11A.

[0191] In FIGS. 11A and 11B, as an example, the semiconductor device 100 and the transistor 600e are arranged side by side in the Y direction.

[0192] Here, the transistor 600e corresponds to the above-described transistor 600. Therefore, the conductor 630e corresponds to the conductor 630, the opening 648e corresponds to the opening 648, the oxide 650e corresponds to the oxide 650, and the conductor 660e corresponds to the conductor 660.

[0193] 11A and 11B, the conductor 670a corresponding to the wiring SIG extends in the Y direction and has a region that functions as the gate electrode of the transistor 600a, a region that functions as one of the source and drain electrodes of the transistor 600b, and a region that functions as the gate electrode of the transistor 600e. The conductor 630e has a region that functions as one of the source and drain electrodes of the transistor 600e. The conductor 660e has a region that functions as the other of the source and drain electrodes of the transistor 600e.

[0194] Here, for example, when the transistor 600e is applied to a memory device, the transistor 600e can be prevented from being destroyed by a surge generated by ESD or the like. This improves the reliability of the memory device. In this case, the transistor 600a can be manufactured simultaneously with the transistor 600e. This allows the semiconductor device 100 to be provided without significantly increasing process costs, thereby improving the reliability of the memory device.

[0195] For example, when the transistor 600e is used in a memory device, the transistor can be used as a transistor that forms a memory cell included in the memory device, a transistor that forms a driver circuit for operating the memory device, and the like.

[0196] <Configuration Example 3 of Semiconductor Device> The transistor connected to the wiring SIG of the semiconductor device 100 is not limited to the above-described configuration example such as the transistor 600e.

[0197] 12 is a cross-sectional view showing a configuration example in which the gate of a transistor 500 is connected to an interconnect SIG of the semiconductor device 100. In FIG. 12, as an example, a configuration example is shown in which a layer in which the semiconductor device 100 is located is disposed above a layer in which the transistor 500 is located. Note that the above-mentioned explanation can be referred to as appropriate, and therefore the explanation may be omitted here.

[0198] FIG. 12 illustrates an insulator 512, a transistor 500 on the insulator 512, insulators 582, 584, 586, and 588 on the transistor 500, and the semiconductor device 100 on the insulator 588.

[0199] Conductor 614 and conductor 612 are embedded in insulator 640a. Conductor 610 is embedded in insulator 620. Conductor 548 is embedded in insulator 588. Conductor 546 is embedded in insulators 586, 584, and 582, etc.

[0200] Each of the conductor 614, the conductor 612, the conductor 610, the conductor 548, and the conductor 546 functions as a plug or a wiring.

[0201] In this specification and the like, a conductor that functions as a plug or wiring may have multiple components collectively assigned the same reference symbol. The wiring and the plug may be integrated. That is, a portion of the conductor may function as a wiring and a portion of the conductor may function as a plug.

[0202] For each plug or wiring, a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used in a single layer or a laminated layer.

[0203] In particular, it is preferable to use a high-melting-point material that has both heat resistance and conductivity for each plug or wiring. Examples of such materials include tungsten and molybdenum. It is also preferable to use a low-resistance conductive material that can reduce wiring resistance for each plug or wiring. Examples of such materials include aluminum and copper.

[0204] The wiring SIG (corresponding to the conductor 670a) is connected to the gate of the transistor 500 (corresponding to the conductor 560 described later) via the conductor 614, the conductor 612, the conductor 610, the conductor 548, and the conductor 546.

[0205] Here, the semiconductor device 100 may be provided so as to overlap the transistor 500. As a result, when the transistor 500 is applied to a memory device, for example, the semiconductor device 100 can be provided without significantly increasing the area overhead of the memory device. Therefore, the memory device can be miniaturized.

[0206] [Transistor 500] The transistor 500 will be described.

[0207] Fig. 13A is a top view of the transistor 500. Fig. 13B is a cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in Fig. 13A, and is also a cross-sectional view of the transistor 500 in the channel length direction (illustrated as the X direction). Fig. 13C is a cross-sectional view of the portion indicated by the dashed dotted line A3-A4 in Fig. 13A, and is also a cross-sectional view of the transistor 500 in the channel width direction (illustrated as the Y direction). Note that some elements are omitted from the top view of Fig. 13A for clarity.

[0208] The transistor 500 is a so-called planar transistor, and has a structure that makes it easier to increase the channel length compared to a vertical transistor such as the above-described transistor 600. Therefore, the structure makes it easy to reduce short channel effects such as drain induced barrier lowering (DIBL). In other words, the structure makes it easy to realize a transistor with high saturation (small change in drain current with respect to drain voltage in the saturation region of the transistor).

[0209] Therefore, for example, when the transistor 500 is applied to a memory device, the transistor 500 may be used as a transistor that constitutes a sense amplifier for reading data from a memory cell included in the memory device.

[0210] As shown in FIGS. 13B and 13C, an insulator 514 and an insulator 516 are stacked in this order on top of an insulator 512.

[0211] Any of the insulators 512, 514, and 516 is preferably an insulator that has barrier properties against oxygen, hydrogen, and the like.

[0212] The insulator 514 is preferably an insulator having a barrier property that prevents impurities such as hydrogen from diffusing from outside the region where the transistor 500 is provided to the region where the transistor 500 is provided. The insulator 514 can be, for example, a material similar to the insulator 324 described later.

[0213] As an insulator having a barrier property against hydrogen, it is preferable to use a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0214] In particular, aluminum oxide has a high barrier property against both oxygen and impurities such as hydrogen and water. Therefore, aluminum oxide can prevent impurities such as hydrogen and water from entering the transistor 500 during and after the manufacturing process of the transistor, and can suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0215] Parasitic capacitance between wirings can be reduced by using a material with a relatively low dielectric constant for the insulators 512 and 516. For the insulators 512 and 516, for example, a material similar to the insulator 326 described later can be used.

[0216] As shown in Figures 13B and 13C, the transistor 500 has a conductor 503 arranged so as to be embedded in the insulator 514 and the insulator 516, an insulator 522 arranged on the insulator 516 and the conductor 503, an insulator 524 arranged on the insulator 522, an oxide 530a arranged on the insulator 524, an oxide 530b arranged on the oxide 530a, conductors 542a and 542b arranged apart from each other on the oxide 530b, an insulator 580 arranged on the conductors 542a and 542b and having an opening formed therein overlapping with the conductors 542a and 542b, an insulator 545 arranged along the opening, and a conductor 560 arranged on the formation surface of the insulator 545.

[0217] Note that the oxide 530a and the oxide 530b may be collectively referred to as the oxide 530.

[0218] The oxide 530 functions as a semiconductor film including a channel formation region of the transistor 500 .

[0219] The conductor 503 is arranged to overlap the oxide 530 and the conductor 560 .

[0220] Here, the conductor 503 preferably includes a conductor 503a provided in contact with the insulators 514 and 516 and a conductor 503b provided so as to be embedded inside the conductor 503a. Furthermore, an insulator 544 is preferably disposed between the insulator 580 and the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b. Furthermore, the conductor 560 preferably includes a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a. Furthermore, an insulator 582 is preferably disposed over the insulator 580, the conductor 560, and the insulator 545.

[0221] 13B and 13C , the conductor 503 has a two-layer stack of the conductor 503a and the conductor 503b, but the conductor 503 is not limited to this. For example, the conductor 503 may have a single-layer structure or a stack of three or more layers.

[0222] Although the configuration in which the ends of the conductors 542a and 542b are aligned with the end of the oxide 530 is shown, the present invention is not limited to this. For example, the conductors 542a and 542b may extend beyond the end of the oxide 530.

[0223] Although the oxide 530 has a two-layer structure including the oxide 530a and the oxide 530b, the structure is not limited thereto. For example, the oxide 530 may have a single-layer structure or a three-layer structure or more.

[0224] Although the conductor 560 has a two-layer structure including the conductor 560a and the conductor 560b, the conductor 560 is not limited to this structure. For example, the conductor 560 may have a single-layer structure or a three-layer structure.

[0225] Here, in the transistor 500, the conductor 560 functions as a gate electrode, the insulator 545 functions as a gate insulating film, and the conductor 542a and the conductor 542b function as one and the other of a source electrode or a drain electrode, respectively.

[0226] As described above, the conductor 560 is formed so as to be embedded in an opening (sometimes referred to as an opening of the insulator 580) formed in a region of the insulator 580 between the conductors 542a and 542b. Therefore, the arrangement of the conductor 560, the conductors 542a, and the conductors 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be arranged between the source electrode and the drain electrode in a self-aligned manner. With this configuration, the conductor 560 can be formed without providing a margin for alignment. Therefore, the area occupied by the transistor 500 can be reduced. This allows for miniaturization and high integration of semiconductor devices.

[0227] Furthermore, since the conductor 560 is formed in a self-aligned manner in the region between the conductor 542a and the conductor 542b, the conductor 560 does not have a region overlapping with the conductor 542a and the conductor 542b. This reduces the parasitic capacitance formed between the conductor 560 and the conductor 542a and the conductor 542b. This improves the switching speed of the transistor 500. This improves the frequency characteristics of the semiconductor device.

[0228] Furthermore, miniaturization of semiconductor devices requires shortening the gate length of the transistor 500, but at the same time, it is necessary to ensure that the conductivity of the conductor 560 does not decrease. If the thickness of the conductor 560 is increased for this purpose, the conductor 560 may have a shape with a high aspect ratio. Therefore, by providing the conductor 560 so that it is embedded in the opening of the insulator 580, the conductor 560 with a shape with a high aspect ratio can be formed without collapsing during the process.

[0229] Here, the conductor 560 may function as a first gate (also simply referred to as a gate) electrode, and the conductor 503 may function as a second gate (also referred to as a back-gate) electrode. In this case, the insulator 545 functions as a first gate insulating film, and the insulators 522 and 524 function as second gate insulating films.

[0230] As described above, the conductor 503 is arranged to overlap with the oxide 530 and the conductor 560. Therefore, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and the channel formation region formed in the oxide 530 can be covered.

[0231] In this case, in the transistor 500, for example, the threshold voltage of the transistor 500 can be controlled by changing the potential applied to the conductor 503 independently of the potential applied to the conductor 560. In particular, applying a negative potential to the conductor 503 increases the threshold voltage of the transistor 500, thereby enabling a reduction in off-state current. Therefore, for example, applying a negative potential to the conductor 503 can reduce the drain current (sometimes referred to as cutoff current) when the potential applied to the conductor 560 is 0 V.

[0232] In this specification and the like, a transistor structure in which the electric field of the gate electrode electrically surrounds the channel formation region is referred to as a surrounded channel (S-channel) structure. The S-channel structure disclosed in this specification and the like can also be said to have a structure different from a Fin structure and a planar structure. On the other hand, the S-channel structure disclosed in this specification and the like can also be regarded as a type of Fin structure or a type of planar structure. In this specification and the like, a Fin structure refers to a structure in which the gate electrode is disposed so as to surround at least two or more sides of the channel (specifically, two, three, or four sides, etc.). By employing the Fin structure and the S-channel structure, a transistor can be obtained that has improved resistance to the short channel effect. In other words, a transistor can be obtained that is less susceptible to the short channel effect.

[0233] By forming a transistor in the S-channel structure, the channel formation region can be electrically surrounded by the electric field of the gate electrode. Since the S-channel structure electrically surrounds the channel formation region with the electric field of the gate electrode, it can be said that the S-channel structure is substantially equivalent to a Gate All Around (GAA) structure or a Lateral Gate All Around (LGAA) structure. By forming a transistor in the S-channel, GAA, or LGAA structure, the channel formation region formed at or near the interface between the semiconductor film and the gate insulating film can be the entire bulk of the semiconductor film. Therefore, it is possible to increase the density of current flowing through the transistor, thereby improving the on-state current of the transistor or the field-effect mobility of the transistor.

[0234] As described above, the conductor 503 has the conductor 503a formed in contact with the insulators 514 and 516, and the conductor 503b formed further inside.

[0235] The conductor 503a is preferably made of a conductive material that has barrier properties against impurities such as hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules), water, and copper (has the function of suppressing the diffusion of the impurities; i.e., the impurities are less likely to permeate). Furthermore, the conductor 503a is preferably made of a conductive material that has barrier properties against oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (has the function of suppressing the diffusion of oxygen; i.e., the impurities are less likely to permeate). In other words, the conductor 503a preferably has barrier properties against any one or all of the above impurities and oxygen.

[0236] In this way, the conductor 503a has a barrier property against oxygen, which can prevent the conductor 503b from being oxidized and reducing its conductivity, thereby allowing the conductor 503b to also function as a wiring.

[0237] In this case, it is preferable to use a conductive material with high conductivity as the conductor 503b, such as a conductive material containing tungsten, copper, or aluminum as its main component.

[0238] Note that the transistor 500 may not include the conductor 503 (that is, may not include a back gate).

[0239] Here, it is preferable to use an insulator containing more oxygen than the amount of oxygen required for the stoichiometric composition as the insulator in contact with the oxide 530. The oxygen is easily released from the insulator by heating. Note that in this specification and elsewhere, oxygen released by heating may be referred to as "excess oxygen."

[0240] The insulator 524 is in contact with the oxide 530. Therefore, the insulator 524 preferably has a region containing excess oxygen (also referred to as an "excess oxygen region").

[0241] In this way, by providing an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V Ｏ This can reduce oxygen vacancy (also referred to as oxygen vacancy) and improve the reliability of the transistor 500.

[0242] Here, an oxide semiconductor that can be used for the oxide 530 will be described. The oxide semiconductor includes a metal oxide.

[0243] Note that it is preferable that hydrogen in the oxide semiconductor be reduced as much as possible. Hydrogen in the oxide semiconductor bonds with oxygen vacancies to form defects in which hydrogen enters the oxygen vacancies (V ＯBecause of this, the formation of a gate insulating film (also referred to as H) may deteriorate the transistor characteristics (e.g., the Id-Vg characteristics of the initial transistor or the Id-Vg characteristics in a long-term reliability test). Therefore, a material that releases little hydrogen is preferably used as a material surrounding the oxide semiconductor, for example, as a material used for an insulator in contact with the oxide semiconductor. Examples of such a material that releases little hydrogen include silicon nitride, silicon nitride oxide, aluminum oxide, and hafnium oxide. This can prevent hydrogen from entering the oxide semiconductor. In particular, using silicon nitride for at least one of the insulators in contact with the oxide semiconductor can improve the reliability of the transistor. Note that a material that releases little hydrogen may have a function of capturing or fixing (also referred to as gettering) hydrogen inside the insulator.

[0244] In the oxide 530, V Ｏ H may function as a donor and generate electrons as carriers. Furthermore, some of the hydrogen may bond with oxygen, which is bonded to a metal atom, to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stress, such as heat or an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced. In one embodiment of the present invention, V in the oxide 530 Ｏ It is preferable to reduce H as much as possible to obtain high-purity intrinsic or substantially high-purity intrinsic hydrogen.

[0245] In this way, V Ｏ To obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as hydrogen and water from the oxide semiconductor (also referred to as "dehydration" or "dehydrogenation treatment") and to supply oxygen to the oxide semiconductor to compensate for oxygen vacancies (also referred to as "oxygenation treatment"). Ｏ When an oxide semiconductor in which impurities such as H are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0246] When the insulator 524 has an excess oxygen region, the insulator 522 preferably has a barrier property against oxygen. The insulator 522 having a barrier property against oxygen can, for example, prevent oxygen contained in the oxide 530 from diffusing toward the insulator 516. Furthermore, for example, the conductor 503 can be prevented from reacting with oxygen contained in the insulator 524, the oxide 530, and the like.

[0247] Here, in a transistor using an oxide semiconductor for a semiconductor film, it is preferable that a channel formation region of the transistor has fewer oxygen vacancies or a lower impurity concentration (for example, the concentration of hydrogen, nitrogen, or a metal element) than a source region and a drain region. Ｏ H is formed and electrons that act as carriers may be generated, so V Ｏ It is also preferable that the amount of H is small. As described above, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be i-type (intrinsic) or substantially i-type.

[0248] In addition, the source and drain regions of the transistor have more oxygen vacancies than the channel formation region. Ｏ It is preferable that the source region and the drain region of the transistor have a high carrier concentration or a high impurity concentration. As described above, the source region and the drain region of the transistor are n-type regions with a high carrier concentration and low resistance compared to the channel formation region.

[0249] The band gap of the metal oxide used as the oxide semiconductor is preferably 2 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wide band gap as the oxide semiconductor, the off-state current of the transistor can be reduced.

[0250] The insulator 522 is preferably made of a high-dielectric-constant (high-k) material (a material with a high relative dielectric constant).

[0251] As transistors become more miniaturized and highly integrated, the thinner gate insulating film can cause problems such as gate leakage current. By using a high-k material as the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0252] Examples of insulators that function as gate insulating films include aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), and strontium titanate (SrTiO ３ ), or an insulator including barium strontium titanate (BST), is preferably used in a single layer or a laminated layer.

[0253] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, in terms of an insulator having barrier properties against oxygen, impurities, etc. As the insulator, it is preferable to use, for example, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0254] Furthermore, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. These insulators may be used after being nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on these insulators.

[0255] By forming the insulator 522 using such a material, the insulator 522 can function as an insulator that prevents oxygen from being released from the oxide 530 and prevents impurities such as hydrogen from being mixed into the oxide 530 from the periphery of the transistor 500.

[0256] 13B and 13C shows a structure in which two layers, the insulator 522 and the insulator 524, are stacked as the second gate insulating film; however, the present invention is not limited to this. For example, the second gate insulating film may have a single-layer structure or a stacked structure of three or more layers. In this case, the second gate insulating film may have a structure in which the same material is stacked, or a structure in which different materials are stacked.

[0257] In the transistor 500, a metal oxide functioning as an oxide semiconductor is used for the oxide 530 including the channel formation region. For example, the metal oxide that can be used for the oxide 650 described above may be used for the oxide 530. Note that as the oxide semiconductor, a metal oxide can be used as a single layer or a stacked layer.

[0258] In the oxide 530, the oxide 530a is provided below the oxide 530b, which makes it possible to suppress the diffusion of impurities from components formed below the oxide 530a into the oxide 530b.

[0259] The oxide 530 preferably has a configuration of multiple oxide layers with different atomic ratios of the metal atoms. Specifically, the atomic ratio of the element M among the constituent elements in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of the element M among the constituent elements in the metal oxide used for the oxide 530b. Furthermore, the atomic ratio of the element M to In in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. Furthermore, the atomic ratio of In to M in the metal oxide used for the oxide 530b is preferably larger than the atomic ratio of In to M in the metal oxide used for the oxide 530a.

[0260] The oxide 530a preferably has a conduction band minimum energy higher than that of the oxide 530b, or in other words, the oxide 530a preferably has a lower electron affinity than that of the oxide 530b.

[0261] Here, the energy level of the conduction band minimum at the junction between the oxide 530a and the oxide 530b changes gradually. In other words, the energy level of the conduction band minimum at the junction between the oxide 530a and the oxide 530b changes continuously, or the junction has a continuous junction. To achieve this, the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b may be reduced.

[0262] Specifically, when the oxide 530a and the oxide 530b have a common element (main component) other than oxygen, a mixed layer with a low density of defect states can be formed. For example, when the oxide 530b is an In—Ga—Zn oxide, the oxide 530a may be an In—Ga—Zn oxide, a Ga—Zn oxide, or gallium oxide.

[0263] In this case, the main carrier path is the oxide 530b. By configuring the oxide 530a as described above, the defect state density at the interface between the oxide 530a and the oxide 530b can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the on-state current of the transistor 500 can be increased.

[0264] A conductor 542a and a conductor 542b which function as a source electrode and a drain electrode are provided over the oxide 530b.

[0265] The conductors 542a and 542b can be made of, for example, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, or lanthanum, an alloy containing these metal elements, or an alloy combining these metal elements. In particular, conductive materials that are resistant to oxidation or that maintain conductivity even after absorbing oxygen are preferably used, such as tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. Furthermore, metal nitride films such as tantalum nitride are preferably used because they have barrier properties against oxygen, hydrogen, and the like.

[0266] 13B and 13C show a structure in which the conductor 542a and the conductor 542b are single layers, but the present invention is not limited to this. For example, the conductor 542a and the conductor 542b may have a stacked structure of two or more layers.

[0267] The conductor 542a and the conductor 542b may be, for example, a structure in which a tantalum nitride film and a tungsten film are stacked, a structure in which a titanium film and an aluminum film are stacked, a structure in which an aluminum film is stacked on a tungsten film, a structure in which a copper film is stacked on a copper-magnesium-aluminum alloy film, a structure in which a copper film is stacked on a titanium film, or a structure in which a copper film is stacked on a tungsten film.

[0268] Alternatively, for example, a three-layer structure may be used in which an aluminum film or copper film is stacked on top of a titanium film or titanium nitride film, and a titanium film or titanium nitride film is further stacked on top of that, or a three-layer structure in which an aluminum film or copper film is stacked on top of a molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film is further stacked on top of that.

[0269] Note that the conductor 542a and the conductor 542b may be formed using a transparent conductive material containing, for example, indium oxide, tin oxide, or zinc oxide.

[0270] 13B , in the oxide 530, a region 543a may be formed as a low-resistance region at the interface with the conductor 542a and in its vicinity. In addition, in the oxide 530, a region 543b may be formed as a low-resistance region at the interface with the conductor 542b and in its vicinity. In this case, the region 543a functions as one of a source region and a drain region, and the region 543b functions as the other of the source region and the drain region. A channel formation region is formed in the region sandwiched between the regions 543a and 543b.

[0271] In this way, by providing the conductors 542a and 542b so as to be in contact with the oxide 530, the oxygen concentrations in the regions 543a and 543b may be reduced. Furthermore, a metal compound layer containing the metal contained in the conductors 542a and 542b and components of the oxide 530 may be formed in the regions 543a and 543b. In such a case, the carrier concentrations in the regions 543a and 543b increase, and the regions 543a and 543b become low-resistance regions.

[0272] The insulator 544 is provided to cover the conductors 542 a and 542 b and suppresses oxidation of the conductors 542 a and 542 b. In this case, the insulator 544 may be provided to cover the side surfaces of the oxide 530 and the insulator 524 and to be in contact with the insulator 522.

[0273] For example, a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. can be used as the insulator 544. In addition, for example, silicon nitride oxide, silicon nitride, etc. can also be used.

[0274] Alternatively, an insulator containing an oxide of one or both of aluminum and hafnium may be used. For example, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) may be used. In particular, it is preferable to use hafnium aluminate, for example, because it has high heat resistance and is less likely to crystallize during heat treatment in a later step.

[0275] Note that if the conductors 542a and 542b are made of a material that is resistant to oxidation or a material whose conductivity does not decrease significantly even when it absorbs oxygen, the insulator 544 does not necessarily have to be provided.

[0276] The insulator 544 can prevent impurities such as hydrogen and water contained in the insulator 580 from diffusing into the oxide 530b. The insulator 580 can also prevent excess oxygen from being contained in the conductor 542a and the conductor 542b from being oxidized.

[0277] It is preferable to use an insulator that contains excess oxygen and releases oxygen by heating, similar to the above-described insulator 524, as the insulator 545. In this way, oxygen can be effectively supplied from the insulator 545 to the channel formation region of the oxide 530b.

[0278] Specifically, for example, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, or silicon oxide having vacancies can be used as the insulator 545. In particular, silicon oxide or silicon oxynitride is preferably used in terms of its thermal stability.

[0279] As the insulator 545, an insulator in which the concentrations of impurities such as hydrogen and water are reduced is preferably used, similar to the insulator 524. Note that the thickness of the insulator 545 is preferably 1 nm to 20 nm.

[0280] Here, a metal oxide may be provided between the insulator 545 and the conductor 560 to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530. The metal oxide preferably has a barrier property against oxygen. This suppresses the diffusion of excess oxygen from the insulator 545 to the conductor 560. This suppresses a decrease in the amount of excess oxygen supplied to the oxide 530. Furthermore, it is possible to suppress oxidation of the conductor 560 due to excess oxygen. For example, a material that can be used for the insulator 544 may be used as the metal oxide.

[0281] 13B and 13C illustrate a structure in which the insulator 545 is a single layer, but the present invention is not limited to this. For example, the insulator 545 functioning as the first gate insulating film may have a stacked structure of two or more layers, similar to the insulators 522 and 524 functioning as the second gate insulating films. For example, the insulator 545 may have a stacked structure of a high-k material and a thermally stable material. This allows the gate voltage during operation of the transistor 500 to be reduced while maintaining the physical film thickness of the insulator 545.

[0282] The conductor 560a of the conductor 560 may be, for example, hydrogen, water, nitrogen, or nitrogen oxide (e.g., N ２ O, NO, or NO ２ It is preferable to use a conductive material that has a barrier property against impurities such as copper and the like. It is also preferable to use a conductive material that has a barrier property against oxygen. When the conductor 560a has a barrier property against oxygen, it is possible to prevent the conductor 560b from being oxidized by oxygen contained in the insulator 545, which would reduce the electrical conductivity.

[0283] As the conductive material having a barrier property against oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used.

[0284] The conductor 560a can be made of an oxide semiconductor that can be used for the oxide 530. In this case, by forming the conductor 560b by a sputtering method, the electrical resistance of the conductor 560a can be reduced, making the conductor 560a a conductor. This can be called an oxide conductor (OC) electrode.

[0285] The conductor 560 can also function as a wiring. Therefore, it is preferable to use a conductive material with high conductivity as the conductor 560b, similar to the conductor 503b. For example, a conductive material containing tungsten, copper, or aluminum as its main component can be used.

[0286] The conductor 560b may be configured by laminating different materials, for example, by laminating titanium or titanium nitride and the above-mentioned conductive material.

[0287] The insulator 580 is provided over the conductor 542a and the conductor 542b with the insulator 544 interposed therebetween.

[0288] The insulator 580 preferably has an excess oxygen region.

[0289] The insulator 580 can be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, or resin. Silicon oxide or silicon oxynitride is particularly preferred because of its thermal stability. Furthermore, silicon oxide or silicon oxide having voids is preferred because it allows for easy formation of an excess oxygen region in a later step.

[0290] By providing the insulator 580 having an excess oxygen region, oxygen is released by heating, and the oxygen in the insulator 580 can be efficiently supplied to the oxide 530. Note that the insulator 580 preferably has a reduced concentration of impurities such as hydrogen and water.

[0291] The insulator 582 is preferably provided in contact with the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 545. By forming the insulator 582 by a sputtering method, excess oxygen regions can be provided in the insulator 545 and the insulator 580. This allows oxygen to be supplied from the excess oxygen regions to the oxide 530.

[0292] The insulator 582 can be, for example, a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium.

[0293] In particular, aluminum oxide has a high barrier property against impurities such as hydrogen, and even a thin film with a thickness of 0.5 nm to 3.0 nm can suppress the diffusion of impurities such as hydrogen. Therefore, aluminum oxide formed by sputtering not only functions as an oxygen source but also as an insulator with barrier properties against impurities such as hydrogen.

[0294] An insulator 584 functioning as an interlayer film is preferably provided over the insulator 582. The insulator 584 preferably has a reduced concentration of impurities such as hydrogen and water, similar to the insulator 524, for example.

[0295] The conductor 540a and the conductor 540b are provided in openings formed in the insulator 584, the insulator 582, the insulator 580, and the insulator 544. In this case, the conductor 540a and the conductor 540b are provided opposite each other with the conductor 560 interposed therebetween. The conductor 540a and the conductor 540b have the same structure as the conductor 546 described below.

[0296] An insulator 586 is provided on the insulator 584 .

[0297] An insulating material having a barrier property against oxygen, hydrogen, and the like is preferably used for the insulator 586. For example, the insulator 586 can be a material similar to that of the insulator 514.

[0298] An insulator 588 is provided on the insulator 586 .

[0299] Parasitic capacitance occurring between wirings can be reduced by using, for example, a material with a relatively low dielectric constant as the insulator 588. For example, the same material as the insulator 512 or the insulator 516 can be used as the insulator 588.

[0300] For example, the conductor 546 is embedded in the insulator 580, the insulator 582, the insulator 584, and the insulator 586. Furthermore, for example, the conductor 548 is embedded in the insulator 588.

[0301] Each of the conductors 546 and 548 functions as a plug or a wiring.

[0302] After the transistor 500 is formed, an opening may be formed to surround the transistor 500, and an insulator with high barrier properties against hydrogen and water may be formed to cover the opening. By surrounding the transistor 500 with the insulator with high barrier properties, hydrogen and water can be prevented from entering from the outside. Alternatively, multiple transistors 500 may be collectively surrounded by an insulator with high barrier properties against hydrogen and water. When forming an opening to surround the transistor 500, for example, an opening reaching the insulator 522 or the insulator 514 may be formed, and the insulator with high barrier properties may be formed in contact with the insulator 522 or the insulator 514. This allows the manufacturing process of the transistor 500 to serve as part of the process. For example, a material similar to the insulator 522 or the insulator 514 may be used as the insulator with high barrier properties against hydrogen and water.

[0303] Note that the transistor 500 illustrated in FIGS. 13A to 13C is just an example and is not limited to this configuration.

[0304] [Transistor 500F] An example of a transistor having a different configuration from the transistor 500 will be described with reference to FIGS. 14 to 18 . FIG. 14A is a top view of the transistor 500F. FIG. 14B is a schematic perspective view of the transistor 500F. FIGS. 14C to 14E are cross-sectional views of the transistor 500F. FIG. 14C is a cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in FIG. 14A , which is also a cross-sectional view of the transistor 500F in the channel width direction (Y direction). FIG. 14D is a cross-sectional view of the portion indicated by the dashed dotted line A3-A4 in FIG. 14A , which is also a cross-sectional view of the transistor 500F in the channel width direction. FIG. 14E is a cross-sectional view of the portion indicated by the dashed dotted line A5-A6 in FIG. 14A , which is also a cross-sectional view of the transistor 500F in the channel length direction (X direction). Here, the dashed-dotted line A5-A6 is perpendicular to the dashed-dotted line A1-A2 and the dashed-dotted line A3-A4, and the dashed-dotted line A1-A2 and the dashed-dotted line A3-A4 are parallel to each other. Note that some components are omitted from the top view of FIG. 14A and the schematic perspective view of FIG. 14B. Also, FIG. 15A shows an enlarged view of the vicinity of the conductor 560 in FIG. 14E. Also, FIG. 15B shows an enlarged view of the vicinity of the oxide 530 in FIG. 14C.

[0305] The transistor 500F has a structure that allows the channel width to be increased without significantly increasing the occupied area compared to the transistor 500. That is, the on-state current can be increased without significantly increasing the occupied area.

[0306] Therefore, for example, by applying the transistor 500F to a memory device, the operation speed of the memory device can be improved, such as by improving the speed of reading and writing data to and from memory cells included in the memory device.

[0307] The transistor 500F includes an insulator 514 on a substrate (not shown), an insulator 516 on the insulator 514, an insulator 521 on the insulator 516, an insulator 522 on the insulator 521, an oxide 530 on the insulator 522, conductors 542a and 542b on the oxide 530 and the insulator 522, an insulator 545 on the oxide 530, and a conductor 560 (conductors 560a and 560b) on the insulator 545. Note that in this specification and the like, the conductors 542a and 542b may be collectively referred to as conductors 542.

[0308] An insulator 544 is provided on the conductor 542, and an insulator 580 is provided on the insulator 544. The insulator 545 and the conductor 560 are provided inside a first opening that penetrates the insulator 580 and the insulator 544 and reaches the oxide 530. In a top view, the first opening has a region that overlaps with the oxide 530 and a region that extends beyond the edge of the oxide 530 along the channel width direction. Therefore, in a top view, the insulator 545 and the conductor 560 provided inside the first opening also have a region that overlaps with the oxide 530 and a region that extends beyond the edge of the oxide 530 along the channel width direction. The conductor 560 also functions as a wiring. The insulator 545 has a region that contacts the oxide 530 within the first opening. Furthermore, an insulator 582 is provided on the insulator 580 and the conductor 560. Furthermore, an insulator 584 is provided on the insulator 582.

[0309] Furthermore, insulator 541a is provided in contact with the side surface of the second opening, which penetrates insulators 584, 582, 580, and 544 to reach conductor 542a, and conductor 540a is provided in contact with insulator 541a. Conductor 540a has a region in contact with conductor 542a at the bottom of the first opening.

[0310] Furthermore, an insulator 541b is provided in contact with the side surface of a third opening that penetrates through insulators 584, 582, 580, and 544 to reach conductor 542b, and a conductor 540b is provided in contact with insulator 541b. Conductor 540b has a region that contacts conductor 542b at the bottom of the second opening.

[0311] In this specification and the like, the conductor 540a and the conductor 540b may be collectively referred to as the conductor 540. Furthermore, the insulator 541a and the insulator 541b may be collectively referred to as the insulator 541.

[0312] The oxide 530 includes a channel formation region of the transistor 500F. The conductor 560 has a region that functions as a gate electrode of the transistor 500F. The insulator 545 has a region that functions as a gate insulating film of the transistor 500F. In the transistor 500F, a region of the oxide 530 that overlaps with the conductor 560 functions as a channel formation region. A region of the conductor 560 that overlaps with the oxide 530 functions as a gate electrode. A region of the insulator 545 where the insulator 545 and the oxide 530 overlap and where the insulator 545 and the conductor 560 overlap functions as a gate insulating film.

[0313] The conductor 542a has a region that functions as one of the source electrode and the drain electrode of the transistor 500F. The conductor 540a functions as a plug connected to the conductor 542a. The conductor 542b has a region that functions as the other of the source electrode and the drain electrode of the transistor 500F. The conductor 540b functions as a plug connected to the conductor 542b.

[0314] The oxide 530 is formed on the insulator 522. As shown in Fig. 15B, the oxide 530 has a shape with a high aspect ratio in a cross section in the channel width direction. Therefore, the oxide 530 can also be said to have a fin-like shape.

[0315] In this specification, the maximum length of the oxide 530 in the channel formation region in the channel width direction is defined as length Lx, and the maximum length of the oxide 530 in the channel formation region in a direction perpendicular to the formation surface (e.g., the top surface of the insulator 522) (here, this refers to the Z direction) is defined as length H. In this case, the ratio of length H to length Lx is referred to as the aspect ratio of the oxide 530. Furthermore, the term "fin-shaped" refers to a shape of the oxide 530 that has a high aspect ratio (a shape in which length H is larger than length Lx) in a cross-sectional view in the channel width direction. Here, a transistor in which a semiconductor layer including a channel formation region is fin-shaped may be referred to as a fin transistor, a fin-type transistor, a fin transistor, a fin transistor, or the like.

[0316] The length Lx can also be considered as the maximum width of the oxide 530 in the channel formation region. Therefore, "length Lx" can be read as "width Lx." The length H can also be considered as the maximum height of the oxide 530 in the channel formation region. Therefore, "length H" can be read as "height H."

[0317] The aspect ratio of the oxide 530 is preferably as large as possible without causing the oxide 530 to collapse during the manufacturing process of the transistor 500F. The aspect ratio of the oxide 530 may be greater than 1 and less than 400, preferably greater than 2 and less than 100, more preferably greater than 5 and less than 40, and even more preferably greater than 10 and less than 20. That is, in the channel formation region of the oxide 530, the height H of the oxide 530 is preferably at least longer than the length Lx of the oxide 530. The height H of the oxide 530 may be greater than 1 and less than 400 times the length Lx of the oxide 530, preferably greater than 2 and less than 100 times, more preferably greater than 5 and less than 40 times, and even more preferably greater than 10 and less than 20 times. For example, the height H may be greater than 2 and less than 10 times the length Lx. For example, the length Lx may be greater than 5 nm and less than 100 nm, preferably greater than 5 nm and less than 50 nm, and even more preferably greater than 10 nm and less than 30 nm. For example, the height H may be 50 nm or more and 2000 nm or less, and preferably 100 nm or more and 1000 nm or less.

[0318] 15B , in a cross-sectional view in the channel width direction, the angle θ between the formation surface of the oxide 530 on the insulator 522 and the side surface of the oxide 530 is preferably perpendicular. For example, the angle θ is preferably 80° to 100°, more preferably 85° to 95°.

[0319] The insulator 545, the conductor 560, and the conductor 542 are provided to cover the oxide 530 having such an aspect ratio. In the transistor 500F, as shown in FIG. 15B , the insulator 545 and a portion of the conductor 560 are provided so as to sandwich the oxide 530 in half. As a result, in a cross-sectional view in the channel width direction, the oxide 530 and the conductor 560 are provided facing each other with the insulator 545 sandwiched between them on the top, the side surface on the A1 side, and the side surface on the A2 side of the oxide 530. In other words, the top, the side surface on the A1 side, and the side surface on the A2 side of the oxide 530 each function as a channel formation region. Therefore, the channel width of the transistor 500F is larger by the side surface on the A1 side and the side surface on the A2 side of the oxide 530 compared to when the oxide 530 is formed in a planar shape.

[0320] By increasing the channel width in this manner, the on-state current, transconductance, frequency characteristics, and the like of the transistor 500F can be improved. This allows a semiconductor device with high operating speed to be provided. Furthermore, in the structure of the transistor 500F, the channel width can be increased without increasing the occupied area due to the provision of the oxide 530. This allows for miniaturization or high integration of the semiconductor device.

[0321] 15B and other drawings, the upper portion of the oxide 530 may have a curved shape. Such a curved shape can prevent defects such as voids from being formed in the insulator 545 and the conductor 542 near the upper portion of the oxide 530. Note that in FIG. 15B and other drawings, the upper portion of the oxide 530 has a symmetrical structure in which curved shapes are provided on both the A1 side and the A2 side; however, one embodiment of the present invention is not limited to this. For example, the upper portion of the oxide 530 may have an asymmetrical structure in which a curved shape is provided on either the A1 side or the A2 side.

[0322] Note that here, an example configuration is shown in which the oxide 530 includes an oxide 530a, an oxide 530b in contact with the oxide 530a, and an oxide 530c in contact with the oxide 530b.

[0323] In this case, for example, the films that become the oxide 530a and the oxide 530c may be formed by an ALD method, and the film that becomes the oxide 530b may be formed by a sputtering method. Specifically, the film that becomes the oxide 530a can be formed to have a composition of In:Zn=2:1 (atomic ratio) or a composition close to that. Alternatively, indium oxide may be used for the film that becomes the oxide 530a. Alternatively, the film that becomes the oxide 530b can be formed using an oxide target with a composition of In:Sn:Zn=4:0.1:1 (atomic ratio) or a composition close to that. Alternatively, the film that becomes the oxide 530c can be formed to have a composition of In:Zn=2:1 (atomic ratio) or a composition close to that. Alternatively, indium oxide may be used for the film that becomes the oxide 530c.

[0324] Next, heat treatment is preferably performed in a temperature range in which the oxide 530 does not become polycrystallized.

[0325] For example, the heat treatment can be carried out at a flow rate ratio of nitrogen gas to oxygen gas of 4:1 at a temperature of 450° C. for one hour.

[0326] By forming the oxide 530 using the above method and then performing heat treatment, the oxide 530 can be converted into AG CAAC. As a result, the on-state current, the S value, the field-effect mobility, the frequency characteristics, and the like of the transistor 500F can be improved, and a semiconductor device with favorable electrical characteristics can be provided. In addition, a highly reliable semiconductor device can be provided.

[0327] 15A and 15B , when an oxide semiconductor is used for the oxide 530, the insulator 545 preferably has a stacked structure of an insulator 545a in contact with the oxide 530, an insulator 545b on the insulator 545a, an insulator 545c on the insulator 545b, and an insulator 545d on the insulator 545c. In this case, the insulator 545a and the insulator 545c preferably have a function of capturing hydrogen or fixing hydrogen.

[0328] Examples of insulators capable of capturing or fixing hydrogen include metal oxides having an amorphous structure. For the insulators 545a and 545c, it is preferable to use a metal oxide such as magnesium oxide or an oxide containing one or both of aluminum and hafnium. In such metal oxides having an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have the property of capturing or fixing hydrogen. In other words, metal oxides having an amorphous structure have a high ability to capture or fix hydrogen.

[0329] It is also preferable to use a high-k material for the insulator 545a and the insulator 545c. An example of a high-k material is an oxide containing one or both of aluminum and hafnium. Using a high-k material for the insulator 545a and the insulator 545c makes it possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulating film. Furthermore, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulating film.

[0330] For the insulators 545a and 545c, an oxide containing one or both of aluminum and hafnium is preferably used, and an oxide having an amorphous structure and containing one or both of aluminum and hafnium is more preferably used.

[0331] The insulator 545a can be, for example, an aluminum oxide film. The aluminum oxide preferably has an amorphous structure. By providing the insulator 545a in contact with the oxide 530, hydrogen contained in the oxide 530 can be more effectively captured and fixed to the insulator 545a.

[0332] The insulator 545c can be, for example, hafnium oxide. By providing the insulator 545c between the insulator 545b and the insulator 545d, hydrogen contained in the insulator 545b and the like can be more effectively captured and fixed.

[0333] Next, the insulator 545b is preferably a thermally stable insulator such as silicon oxide or silicon oxynitride. A silicon oxide film used as the insulator 545b is preferably formed by a PEALD method.

[0334] In order to suppress oxidation of the conductor 542a, the conductor 542b, and the conductor 560, it is preferable to provide an oxygen barrier insulator near each of the conductor 542a, the conductor 542b, and the conductor 560. For example, an oxygen barrier insulator may be provided for the insulator 545a, the insulator 545d, the insulator 545c, and the insulator 544.

[0335] In this specification and the like, a barrier insulator refers to an insulator with barrier properties. In this specification and the like, having barrier properties refers to having a property of preventing the permeation of a corresponding substance (also referred to as low permeability). For example, an insulator with barrier properties has a property that makes it difficult for a corresponding substance to diffuse into the insulator. Furthermore, for example, an insulator with barrier properties has a function of capturing or fixing (also referred to as gettering) a corresponding substance inside the insulator.

[0336] Examples of oxygen barrier insulators include oxides containing one or both of aluminum and hafnium, magnesium oxide, gallium oxide, silicon nitride, and silicon nitride oxide. Examples of oxides containing one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate), and oxides containing hafnium and silicon (hafnium silicate). For example, the insulators 545a, 545c, 545d, and 544 each preferably have a single-layer structure or a multilayer structure of oxygen barrier insulators.

[0337] The insulator 545a preferably has a barrier property against oxygen. The insulator 545a is preferably at least less permeable to oxygen than the insulator 580. The insulator 545a has a region in contact with the side surface of the conductor 542a and the side surface of the conductor 542b. The insulator 545a having a barrier property against oxygen can prevent the side surfaces of the conductors 542a and 542b from being oxidized and oxide films from being formed on the side surfaces. This can prevent a decrease in the on-state current or field-effect mobility of the transistor 500F.

[0338] The insulator 545a is provided in contact with the top surface and side surface of the oxide 530 and the top surface of the insulator 522. The insulator 545a has a barrier property against oxygen, which can prevent oxygen from being released from the channel formation region of the oxide 530 during heat treatment or the like. Therefore, oxygen vacancies can be reduced in the oxide 530.

[0339] Furthermore, by providing the insulator 545a, an excessive amount of oxygen can be prevented from being supplied from the insulator 580 to the oxide 530, and an appropriate amount of oxygen can be supplied to the oxide 530. Therefore, excessive oxidation of the source and drain regions can be prevented, which can prevent a decrease in the on-state current or the field-effect mobility of the transistor 500F.

[0340] An oxide containing one or both of aluminum and hafnium has barrier properties against oxygen and is therefore suitable as the insulator 545a.

[0341] The insulator 545d also preferably has a barrier property against oxygen. The insulator 545d is provided between the channel formation region of the oxide 530 and the conductor 560 and between the insulator 580 and the conductor 560. This structure can prevent oxygen contained in the channel formation region of the oxide 530 from diffusing to the conductor 560 and forming oxygen vacancies in the channel formation region of the oxide 530. Furthermore, oxygen contained in the oxide 530 and oxygen contained in the insulator 580 can be prevented from diffusing to the conductor 560 and oxidizing the conductor 560. The insulator 545d is preferably at least less permeable to oxygen than the insulator 580. For example, a silicon nitride film is preferably used as the insulator 545d. In this case, the insulator 545d is an insulator containing at least nitrogen and silicon.

[0342] The insulator 545d preferably has a barrier property against hydrogen, which can prevent impurities such as hydrogen contained in the conductor 560 from diffusing into the oxide 530.

[0343] The insulator 544 also preferably has a barrier property against oxygen. The insulator 544 is provided between the insulator 580 and the conductor 542a and between the insulator 580 and the conductor 542b. The insulator 544 is provided in contact with the side surface of the conductor 542, the side surface of the oxide 530, and the top surface of the insulator 522. This configuration can prevent oxygen contained in the insulator 580 from diffusing into the conductor 542. Therefore, it is possible to prevent the conductor 542 from being oxidized by the oxygen contained in the insulator 580 and its resistivity from increasing. The insulator 544 is preferably at least less permeable to oxygen than the insulator 580. For example, it is preferable to use silicon nitride as the insulator 544. In this case, the insulator 544 is an insulator containing at least nitrogen and silicon.

[0344] To prevent the hydrogen concentration in the source and drain regions from decreasing in the oxide 530, it is preferable to provide a hydrogen barrier insulator near each of the source and drain regions. For example, the insulator 544 may be provided with a hydrogen barrier insulator.

[0345] Examples of the barrier insulator against hydrogen include oxides such as aluminum oxide, hafnium oxide, and tantalum oxide, and nitrides such as silicon nitride. For example, the insulator 544 is preferably a single-layer structure or a stacked structure of a barrier insulator against hydrogen.

[0346] By providing the insulator 544 as described above, it is possible to reduce the diffusion of hydrogen in the source and drain regions to the outside, thereby suppressing a decrease in the hydrogen concentration in the source and drain regions, thereby making the source and drain regions n-type.

[0347] By adopting the above-described structure, the channel formation region can be made i-type or substantially i-type, and the source region and drain region can be made n-type, thereby providing a semiconductor device with excellent electrical characteristics. Furthermore, by adopting the above-described structure, the semiconductor device can have excellent electrical characteristics even when miniaturized or highly integrated. Furthermore, miniaturizing the transistor 500F can improve high-frequency characteristics. Specifically, the cutoff frequency can be improved.

[0348] The insulators 545a to 545d function as part of a gate insulating film. The insulators 545a to 545d, together with the conductor 560, are provided in an opening formed in the insulator 580. To miniaturize the transistor 500F, the insulators 545a to 545d preferably have a small thickness. The thickness of the insulators 545a to 545d is preferably 0.1 nm to 10 nm, more preferably 0.1 nm to 5.0 nm, more preferably 0.5 nm to 5.0 nm, still more preferably 1.0 nm to less than 5.0 nm, and still more preferably 1.0 nm to 3.0 nm. Note that at least a portion of the insulators 545a to 545d may have a region having the above thickness.

[0349] The thickness of the silicon oxide film used as the insulator 545 is preferably greater than or equal to 0.7 nm and less than or equal to 3 nm.

[0350] In order to thin the film thicknesses of the insulators 545a to 545d as described above, it is preferable to deposit the insulators 545a to 545d by the ALD method. Furthermore, it is preferable to deposit the insulators 545a to 545d by the ALD method in order to provide the insulators 545a to 545d in openings such as the insulator 580. By depositing the insulator 545 by the ALD method, it is possible to deposit the insulator 545 with good coverage on the side surface of the first opening formed in the insulator 580, the side end of the conductor 542a, and the side end of the conductor 542b.

[0351] Although the insulator 545 has a four-layer structure including insulators 545a to 545d in the above description, one embodiment of the present invention is not limited to this structure. The insulator 545 can also have a structure including at least one of the insulators 545a to 545d. When the insulator 545 is formed using one, two, or three layers of the insulators 545a to 545d, the manufacturing process of the transistor 500F can be simplified and the productivity of a semiconductor device including the transistor 500F can be improved.

[0352] As shown in FIG. 14A , the oxide 530 preferably has a circumferential shape (which can also be referred to as a frame shape, an annular shape, a doughnut shape, or a closed curve shape) in a top view. That is, the oxide 530 preferably has a structure including a plurality of portions extending in the channel width direction and a plurality of portions extending in the channel length direction. This structure can prevent the oxide 530 from collapsing during the transistor manufacturing process when the aspect ratio of the oxide 530 is increased. Note that the oxide 530 shown in FIG. 14A can also be described as having an opening in the center. In FIG. 14A , the shape of the oxide 530 in a top view is line-symmetric about the center A1-A2; however, one embodiment of the present invention is not limited to this. For example, the shape of the oxide 530 in a top view may be asymmetric.

[0353] 14A is a structure in which two circumferential oxides 530 are formed in the channel width direction. As shown in Fig. 14A, the oxide 530 preferably overlaps with the conductor 560 at two or more locations when viewed from above. Therefore, the conductor 560 preferably has two or more regions that overlap with the oxide 530. In other words, it is preferable that the oxide 530 and the conductor 560 have two or more regions that overlap with each other.

[0354] With this structure, as shown in FIG. 14B , multiple fin-shaped oxides 530 are formed in a cross-sectional view in the channel width direction. Each of the multiple fin-shaped oxides 530 includes a channel formation region. That is, the transistor 500F functions as a multi-channel transistor. Therefore, the channel width of the transistor 500F can be further increased, thereby increasing the on-state current. Therefore, the operating speed of a semiconductor device including the transistor 500F can be increased.

[0355] Although the structure in which two circumferential oxides 530 are provided has been described here, one embodiment of the present invention is not limited thereto. For example, a structure in which one or three or more circumferential oxides 530 are provided may be used. Furthermore, the circumferential oxides 530 may be joined to form an oxide 530 having a shape with a plurality of openings. Furthermore, a lattice-shaped oxide 530 may be used in top view.

[0356] The insulators 584, 582, 522, and 521 each preferably have an insulator that suppresses the diffusion of impurities such as water and hydrogen, and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and zirconium (hafnium zirconium oxide), gallium oxide, silicon nitride, or silicon nitride oxide can be used. For example, the insulators 584 and 521 are preferably made of silicon nitride, which has a high hydrogen barrier property. Furthermore, for example, the insulator 582 is preferably made of aluminum oxide, which has a high ability to capture or fix hydrogen. Furthermore, for example, the insulator 522 is preferably made of hafnium oxide, which is a high-k material and has a high ability to capture or fix hydrogen.

[0357] Note that at least one of the insulators 521 and 522 can have a stacked structure of silicon oxide or silicon oxynitride in addition to the above-described materials. For example, the insulator 521 can have a stacked structure of silicon nitride and silicon oxide. For example, the insulator 522 can have a stacked structure of hafnium oxide and silicon oxide.

[0358] With this structure, impurities such as water and hydrogen can be prevented from diffusing from an interlayer insulating film disposed above the insulator 584 to the transistor 500F and the like. Furthermore, impurities such as water and hydrogen can be prevented from diffusing from an interlayer insulating film disposed below the insulator 521 to the transistor 500F and the like. Furthermore, hydrogen contained in the insulator 580, the insulator 545, and the like can be captured and fixed to the insulator 582 or the insulator 522. Furthermore, the insulators 582 and 584 can prevent oxygen contained in the insulator 580 and the like from diffusing upward from the transistor 500F and the like. Furthermore, the insulators 522 and 521 can prevent oxygen contained in the oxide 530 and the like from diffusing downward from the transistor 500F and the like. Thus, by surrounding the transistor 500F from above and below with insulators that have a function of preventing the diffusion of impurities such as water and hydrogen and oxygen, the diffusion of excess oxygen and hydrogen into the oxide semiconductor can be reduced. This makes it possible to improve the electrical characteristics and reliability of the semiconductor device.

[0359] The insulators 516 and 580 preferably have a lower dielectric constant than the insulator 522. By using a material with a low dielectric constant as an interlayer film, parasitic capacitance between wirings can be reduced.

[0360] For example, it is preferable that the insulators 516 and 580 each include one or more of silicon oxide, silicon oxynitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, and silicon oxide having vacancies.

[0361] In particular, silicon oxide and silicon oxynitride are preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0362] The top surfaces of the insulators 516 and 580 may be planarized.

[0363] The concentration of impurities such as water and hydrogen is preferably reduced in the insulator 580. For example, the insulator 580 preferably includes an oxide containing silicon, such as silicon oxide or silicon oxynitride.

[0364] 16A to 16E , the transistor 500F may have a structure in which an insulator 524 is provided under the oxide 530. The planar shape of the insulator 524 (here, the shape when viewed from the Z direction) is similar to that of the oxide 530, and the insulator 524 overlaps with the oxide 530 in a top view. The lower surface of the insulator 524 is in contact with the insulator 522, the side surface of the insulator 524 is in contact with the insulator 545 and the conductor 542a, and the upper surface of the insulator 524 is in contact with the lower surface of the oxide 530. The insulator 524 may be made of an insulating material that can also be used for the insulator 545b. For example, silicon oxide can be used as the insulator 524. Here, FIGS. 16A to 16E correspond to FIGS. 14A to 14E . FIG. 17 corresponds to FIG. 15B . Regarding the configurations according to FIGS. 16A to 16E and 17 that are not explained below, the explanations according to FIGS. 14A to 14E and 15B can be referred to.

[0365] 17 , it is preferable that the thickness t2 of the insulator 545 at the bottom of the first opening be thinner than the thickness t1 (the length of the insulator 524 in the direction perpendicular to the surface on which it is formed) of the insulator 524. With this configuration, the bottom surface of the conductor 560 (conductor 560 a) located in the first opening can be positioned lower than the bottom surface of the oxide 530 by the difference (t1 − t2) between the thickness t1 and the thickness t2.

[0366] By positioning the bottom surface of the conductor 560 below the bottom surface of the oxide 530, a sufficient gate electric field can be applied from the top to the bottom of the oxide 530. In other words, within the opening of the insulator 580 or the like, the entire oxide 530 is electrically surrounded by the electric field of the conductor 560, allowing it to function as a channel formation region. This configuration prevents the bottom end of the oxide 530 from functioning as a parasitic channel, thereby reducing leakage current between the source electrode and the drain electrode. Furthermore, it is possible to suppress the transistor from becoming normally on, which is caused by the parasitic channel. In other words, the electrical characteristics of the transistor 500F can be improved.

[0367] Furthermore, as described above, the oxide 530 functions as a channel formation region from the top to the bottom, thereby increasing the channel width, which can improve the on-state current, transconductance, frequency characteristics, and the like of the transistor 500F.

[0368] In this specification and the like, a transistor structure in which the electric field of the gate electrode electrically surrounds the channel formation region as described above is referred to as a surrounded channel (S-channel) structure. In the S-channel structure, the gate electrode is arranged so as to surround at least two sides of the channel (specifically, two, three, or four sides, etc.). By adopting the S-channel structure, it is possible to improve resistance to the short channel effect, in other words, to provide a transistor in which the short channel effect is less likely to occur.

[0369] Note that the S-channel structure electrically surrounds the channel formation region, and therefore can be said to be substantially equivalent to a Gate All Around (GAA) structure or a Lateral Gate All Around (LGAA) structure. By forming the transistor 500F in the S-channel, GAA, or LGAA structure, the channel formation region formed at or near the interface between the oxide 530 and the insulator 545, which functions as a gate insulating film, can be the entire bulk of the oxide 530. Therefore, the current density flowing through the transistor can be improved, thereby improving the on-state current or the field-effect mobility of the transistor. In one embodiment of the present invention, the oxide 530 has a CAAC structure and a fin-like structure. With this structure, the current paths flowing to the source and drain of the transistor can be parallel to the a-b plane of the crystal axis. In other words, an oxide semiconductor having a CAAC structure and a fin-like structure has a conduction path equivalent to that of a two-dimensional semiconductor material, and by using such an oxide semiconductor, a device having two-dimensional conduction can be fabricated.

[0370] 18A to 18E , the transistor 500F may have a structure in which a conductor 503 is provided under an insulator 521. Note that FIGS. 18A to 18E correspond to FIGS. 14A to 14E . Regarding the structures in FIGS. 18A to 18E , matters not described below can be referred to the description of FIGS. 14A to 14E .

[0371] The conductor 503 has a region that functions as a gate electrode, similar to the conductor 560. The conductor 560 may be referred to as a first gate electrode (upper gate electrode) of the transistor 500F, and the conductor 503 may be referred to as a second gate electrode (lower gate electrode) of the transistor 500F. Furthermore, when the conductor 560 is referred to as a gate electrode of the transistor 500F, the conductor 503 may be referred to as a backgate electrode of the transistor 500F.

[0372] When the transistor 500F includes the conductor 503 under the insulator 521, the insulators 522 and 521 each have a region that functions as a gate insulating film, similar to the insulator 545. Specifically, a region of the insulators 522 and 521 that overlaps with the conductor 503 functions as a gate insulating film. The insulator 545 may be referred to as a first gate insulating film (upper gate insulating film), and the insulators 522 and 521 may be referred to as a second gate insulating film (lower gate insulating film).

[0373] In the transistor 500F, the conductor 503 is arranged to overlap with the oxide 530 and the conductor 560. In FIGS. 18C and 18E , the conductor 503 is provided inside a fourth opening that penetrates the insulator 516 and reaches the insulator 514. The fourth opening has, in a top view, a region that overlaps with the oxide 530 and a region that extends beyond the edge of the oxide 530 along the channel width direction. Therefore, the conductor 503 provided inside the fourth opening also has, in a top view, a region that overlaps with the oxide 530 and a region that extends beyond the edge of the oxide 530 along the channel width direction. The conductor 503 also functions as a wiring.

[0374] 18C and 18E , the conductor 503 preferably includes a conductor 503a and a conductor 503b. The conductor 503a is provided in contact with the bottom and side surfaces of the fourth opening. The conductor 503b is provided so as to fill a recess in the conductor 503a formed along the bottom and side surfaces of the fourth opening. Here, the height of the upper surface of the conductor 503 coincides with the height of the upper surface of the insulator 516.

[0375] Here, the conductor 503a is composed of hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２ It is preferable to have a conductive material that has a function of suppressing the diffusion of impurities such as copper atoms, etc. Alternatively, it is preferable to have a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0376] By using a conductive material that can reduce hydrogen diffusion for the conductor 503a, impurities such as hydrogen contained in the conductor 503b can be prevented from diffusing into the oxide 530 via the insulator 516 or the like. Furthermore, by using a conductive material that can suppress oxygen diffusion for the conductor 503a, oxidation of the conductor 503b and a decrease in conductivity can be suppressed. Examples of conductive materials that can suppress oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. The conductor 503a can have a single-layer structure or a multilayer structure of the conductive materials described above. For example, the conductor 503a preferably contains titanium nitride.

[0377] The conductor 503b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, the conductor 503b preferably contains tungsten.

[0378] As described above, the conductor 503 can function as a second gate electrode. In this case, the threshold voltage of the transistor 500F can be controlled by changing the potential applied to the conductor 503 independently of the potential applied to the conductor 560. In particular, applying a negative potential to the conductor 503 can increase the threshold voltage of the transistor 500F and reduce its off-state current. Therefore, applying a negative potential to the conductor 503 can reduce the drain current when the potential of the conductor 560 is 0 V compared to not applying a negative potential to the conductor 503.

[0379] The electrical resistivity of the conductor 503 is designed taking into consideration the potential applied to the conductor 503, and the film thickness of the conductor 503 is set to match this electrical resistivity. The film thickness of the insulator 516 is approximately the same as that of the conductor 503. Here, it is preferable to make the film thicknesses of the conductor 503 and the insulator 516 thin within the range permitted by the design of the conductor 503. By making the film thickness of the insulator 516 thin, the absolute amount of impurities such as hydrogen contained in the insulator 516 can be reduced, thereby suppressing the diffusion of the impurities into the oxide 530.

[0380] Note that although a stacked structure of the conductor 503a and the conductor 503b is shown here, one embodiment of the present invention is not limited thereto, and the conductor 503 may have a single-layer structure or a stacked structure of three or more layers. For example, when the conductor 503 has a three-layer stacked structure, in addition to the stacked structure of the conductor 503a and the conductor 503b as described above, a conductor made of a material similar to that of the conductor 503a can be provided on the conductor 503b. In this case, the conductor described above may be formed so that the top surface of the conductor 503b is lower than the top of the conductor 503a and so as to fill the recess formed by the conductor 503a and the conductor 503b.

[0381] <Structure Example 4 of Semiconductor Device> The transistor connected to the wiring SIG of the semiconductor device 100 is not limited to the structure examples such as the transistor 600e and the transistor 500 described above.

[0382] 19 is a cross-sectional view showing a configuration example in which the gate of a transistor 550 is connected to wiring SIG of the semiconductor device 100. In FIG. 19, as an example, a configuration example is shown in which a wiring layer is arranged above a substrate including a part of the transistor 550, and a layer in which the semiconductor device 100 is located is arranged above the wiring layer. Note that the above-mentioned explanation can be referred to as appropriate, and therefore the explanation may be omitted here.

[0383] 19 illustrates a substrate 311 including a part of the transistor 550, the transistor 550, the insulators 322, 324, and 326 over the transistor 550, a wiring layer (here, this refers to a layer including the insulators 350, 352, 354, and conductor 356) over the insulator 326, and the semiconductor device 100 over the wiring layer. Note that the cross-sectional view of the transistor 550 in the channel length direction is illustrated here. Also, FIG. 20 illustrates a cross-sectional view of the transistor 550 in the channel width direction.

[0384] A conductor 356 is embedded in the insulators 354, 352, and 350. A conductor 330 is embedded in the insulators 326 and 324. A conductor 328 is embedded in the insulators 322 and the like.

[0385] Each of the conductor 356, the conductor 330, and the conductor 328 functions as a plug or a wiring.

[0386] The wiring SIG (corresponding to the conductor 670a) is connected to the gate of the transistor 550 (corresponding to the conductor 316 described later) via the conductor 614, the conductor 612, the conductor 610, the conductor 356, the conductor 330, and the conductor 328.

[0387] Here, the semiconductor device 100 may be provided so as to overlap the transistor 550. As a result, when the transistor 550 is applied to a memory device, for example, the semiconductor device 100 can be provided without significantly increasing the area overhead of the memory device. Therefore, the memory device can be miniaturized.

[0388] [Transistor 550] The transistor 550 will now be described.

[0389] As shown in Figure 19, the transistor 550 is provided over a substrate 311 and has a conductor 316 that functions as a gate electrode, an insulator 315 that functions as a gate insulating film, a semiconductor region 313 that functions as a channel formation region, a low-resistance region 314a that functions as one of the source region and the drain region, and a low-resistance region 314b that functions as the other of the source region and the drain region.

[0390] Note that the transistor 550 may be either a p-channel type or an n-channel type. For example, by connecting the gate of an n-channel transistor 550 and the gate of a p-channel transistor 550, a CMOS circuit (e.g., a circuit that operates complementarily, a CMOS logic gate, or a CMOS logic circuit) can be configured.

[0391] Therefore, for example, when the transistor 550 is applied to a memory device, it may be used as a transistor that forms a driver circuit for operating the memory device.

[0392] 20 , the transistor 550 can have a so-called Fin structure in which the top surface and the side surfaces in the channel width direction of a semiconductor region 313 made of a part of a substrate 311 are covered with a conductor 316 via an insulator 315. This increases the effective channel width, thereby improving the on-state characteristics of the transistor 550. Furthermore, the contribution of the electric field of the gate electrode can be increased, thereby improving the off-state characteristics of the transistor 550.

[0393] The transistor 550 preferably includes a semiconductor such as a silicon-based semiconductor, and preferably includes single crystal silicon, in the region where the channel of the semiconductor region 313 is formed, the region nearby the region, the low-resistance region 314a that serves as one of the source and drain regions, and the low-resistance region 314b that serves as the other of the source and drain regions. Alternatively, the transistor 550 may be formed of a material containing, for example, germanium, silicon germanium, gallium arsenide, or gallium aluminum arsenide. Alternatively, the transistor 550 may be configured using silicon whose effective mass is controlled by applying stress to the crystal lattice to change the lattice spacing. Alternatively, the transistor 550 may be a high electron mobility transistor (HEMT) using, for example, gallium arsenide, gallium aluminum arsenide, or the like.

[0394] The low resistance region 314a and the low resistance region 314b contain, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0395] For example, a semiconductor material such as silicon containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron, can be used as the conductor 316. Alternatively, for example, a conductive material such as a metal material, an alloy material, or a metal oxide material can be used.

[0396] Note that the work function is determined by the material of a conductor; therefore, the threshold voltage of a transistor can be adjusted by selecting the material of the conductor.

[0397] It is preferable to use a material such as titanium nitride or tantalum nitride as the conductor 316. Furthermore, in order to achieve both conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum in a laminated state. In particular, in terms of heat resistance, it is preferable to use a tungsten in a laminated state.

[0398] An insulator 320 , an insulator 322 , an insulator 324 , and an insulator 326 are stacked in this order to cover the transistor 550 .

[0399] It is preferable to use, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, or aluminum nitride as the insulators 320, 322, 324, and 326. In particular, it is preferable to use silicon oxide or silicon oxynitride because of their thermal stability.

[0400] In this specification, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen, aluminum oxynitride refers to a material whose composition contains more oxygen than nitrogen, and aluminum nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0401] The insulator 322 may function as a planarizing film that planarizes steps caused by the transistor 550 or the like provided thereunder. For example, the top surface of the insulator 322 may be planarized by planarization treatment using a chemical mechanical polishing (CMP) method or the like to improve the planarity.

[0402] As the insulator 324, it is preferable to use an insulator having barrier properties that prevent impurities such as hydrogen from diffusing from the substrate 311 located below the insulator 324 or the transistor 550 to a region located above the insulator 324.

[0403] The insulator having a barrier property against hydrogen can be, for example, silicon nitride formed by chemical vapor deposition (CVD), or a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0404] Here, when hydrogen diffuses into a semiconductor element including an oxide semiconductor, such as the transistor 600, the characteristics of the semiconductor element may deteriorate. Therefore, an insulator that suppresses hydrogen diffusion is preferably used between a region where the transistor 600 is provided and a region where the transistor 550 is provided. Specifically, the insulator that suppresses hydrogen diffusion is an insulator that releases a small amount of hydrogen.

[0405] The insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, and more preferably less than 3. Furthermore, for example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, and more preferably 0.6 times or less, the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance that occurs between wirings can be reduced.

[0406] A conductor 328 is embedded in the insulators 320 and 322. A conductor 330 is embedded in the insulators 324 and 326.

[0407] The conductor 328 and the conductor 330 each function as a plug or a wiring. The conductor 328 and the conductor 330 can be made of, for example, the same material as the conductor 610, the conductor 612, or the conductor 614.

[0408] A wiring layer may be provided over the insulator 326 and the conductor 330. For example, in Fig. 19, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. Furthermore, a conductor 356 is embedded in the insulator 350, the insulator 352, and the insulator 354.

[0409] The conductor 356 functions as a plug or a wiring. For example, the same material as the conductor 328 or the conductor 330 can be used as the conductor 356. In particular, it is preferable to use a conductor having a barrier property against hydrogen.

[0410] The insulators 350, 352, and 354 can be formed using materials similar to those of the insulators 324, 322, and 326. In particular, it is preferable to use an insulator that has a barrier property against hydrogen.

[0411] Here, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen. With this structure, the region where the transistor 550 is provided can be separated from the outside of the region by the conductor having a barrier property against hydrogen. Therefore, diffusion of hydrogen to the outside of the region where the transistor 550 is provided can be suppressed.

[0412] For example, tantalum nitride may be used as a conductor having a barrier property against hydrogen. Alternatively, a stack of tantalum nitride and highly conductive tungsten may be used. By using a stack of tantalum nitride and tungsten as the conductor, the conductor can suppress the diffusion of hydrogen while maintaining the conductivity of the wiring.

[0413] That is, by forming the conductor 356 as a stack of tantalum nitride and tungsten, it is possible to suppress diffusion of hydrogen from the transistor 550 while maintaining the conductivity of the wiring. In this case, it is preferable that the tantalum nitride layer of the conductor 356 having a barrier property against hydrogen be in contact with the insulator 350 having a barrier property against hydrogen.

[0414] Although the wiring layer including the conductor 356 has been described here, the present invention is not limited to this. The wiring layer including the conductor 356 may not be provided, or two or more wiring layers similar to the wiring layer including the conductor 356 may be provided.

[0415] Note that the transistor 550 shown in FIG. 19 is just an example and is not limited to this configuration.

[0416] [Substrate] Examples of substrates that can be used for providing the semiconductor device of one embodiment of the present invention, the memory device including the semiconductor device, and the like include a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (e.g., a stainless steel substrate, a substrate including stainless steel foil, a tungsten substrate, or a substrate including tungsten foil), a semiconductor substrate (e.g., a single-crystal semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate), or an SOI (Silicon on Insulator) substrate. A heat-resistant plastic substrate may also be used as the substrate. Examples of glass substrates include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, and soda-lime glass. Alternatively, for example, crystallized glass can be used as the glass substrate.

[0417] In addition, the substrate can be, for example, a flexible substrate, a laminated film, paper containing a fibrous material, or a base film. Examples of flexible substrates, laminated films, or base films include plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), or polytetrafluoroethylene (PTFE). Other examples include synthetic resins such as acrylic. Other examples include polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Other examples include polyamide, polyimide, aramid resin, epoxy resin, inorganic vapor deposition film, or paper. In particular, by manufacturing transistors using, for example, a semiconductor substrate, a single-crystal substrate, or an SOI substrate, it is possible to manufacture transistors with small size, high current capacity, and little variation in characteristics, size, or shape. Constructing a circuit using such transistors can reduce the power consumption of the circuit or increase the circuit integration.

[0418] Alternatively, a flexible substrate may be used as the substrate, and one or more of, for example, a transistor, a resistor, and a capacitor may be formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate and one or more of, for example, a transistor, a resistor, and a capacitor. The release layer can be used to separate a semiconductor device, after a part or all of the semiconductor device is completed thereon, from the substrate and transfer the device to another substrate. In this case, for example, one or more of the transistor, the resistor, and the capacitor can be transferred to a substrate with poor heat resistance or a flexible substrate. Note that the release layer may be, for example, a laminated structure of an inorganic film of a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, or a silicon film containing hydrogen.

[0419] That is, a semiconductor device may be formed on a certain substrate and then transferred to another substrate. Examples of substrates onto which a semiconductor device may be transferred include, in addition to the substrates on which the above-described transistors can be formed, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, stone substrates, wood substrates, cloth substrates (including, for example, natural fibers (silk, cotton, or hemp), synthetic fibers (nylon, polyurethane, or polyester), or recycled fibers (acetate, cupra, rayon, or recycled polyester)), leather substrates, and rubber substrates. By using these substrates, it is possible to manufacture a flexible semiconductor device or a semiconductor device that is not easily broken. It is also possible to impart heat resistance to the semiconductor device. It is also possible to reduce the weight or thickness of the semiconductor device.

[0420] By providing a semiconductor device over a flexible substrate, an increase in weight can be suppressed and a semiconductor device that is less likely to be damaged can be provided.

[0421] Note that the semiconductor device according to one embodiment of the present invention is not limited to the semiconductor device described in this embodiment. At least part of the configuration examples, operation examples, and corresponding drawings described in this embodiment can be appropriately combined with other configuration examples, operation examples, drawings, and embodiments described in this specification.

[0422] In this embodiment, a transistor including an oxide semiconductor in a channel formation region (OS transistor) will be described. Note that the description of the OS transistor will be briefly compared with a transistor including silicon in a channel formation region (also referred to as a Si transistor).

[0423] [OS Transistor] An OS transistor is preferably formed using an oxide semiconductor with a low carrier concentration. For example, the carrier concentration of a channel formation region of an oxide semiconductor is preferably 1×10 １８ cm −３ Below 1 × 10, preferably １７ cm −３ less than 1×10 １６ cm −３less than 1×10 １３ cm −３ less than 1×10 １０ cm −３ is less than 1×10 −９ cm −３ That is all. Note that when the carrier concentration in an oxide semiconductor is reduced, the density of defect states in the oxide semiconductor may be reduced by reducing the impurity concentration in the oxide semiconductor. In this specification and the like, an oxide semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0424] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor may have a low density of trap states due to a low density of defect states. Furthermore, charges trapped in the trap states of the oxide semiconductor take a long time to disappear and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0425] Therefore, reducing the impurity concentration in the oxide semiconductor is effective for stabilizing the electrical characteristics of a transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen and nitrogen. Note that the impurity in the oxide semiconductor refers to, for example, any element other than the main component constituting the oxide semiconductor. For example, an element with a concentration of less than 0.1 atomic % can be considered an impurity.

[0426] Furthermore, when impurities or oxygen vacancies exist in a channel formation region of an oxide semiconductor, the electrical characteristics of an OS transistor are likely to fluctuate, and reliability may be reduced. Ｏ H) in the channel formation region, generating electrons that serve as carriers. ＯWhen H is formed, the donor concentration in the channel formation region may increase. As a result, the threshold voltage of an OS transistor may vary as the donor concentration in the channel formation region increases. Therefore, if an OS transistor has oxygen vacancies in the channel formation region of an oxide semiconductor, the OS transistor is likely to have normally-on characteristics (a drain current flows when the gate voltage is 0 V). Therefore, in the channel formation region of an oxide semiconductor, impurities, oxygen vacancies, and V Ｏ It is preferable that H is reduced as much as possible.

[0427] The band gap of the oxide semiconductor is preferably larger than that of silicon (typically 1.1 eV), preferably 2 eV or more, more preferably 2.5 eV or more, and further preferably 3.0 eV or more. By using an oxide semiconductor having a band gap larger than that of silicon, the off-state current (also referred to as Ioff) of the transistor can be reduced.

[0428] Furthermore, in Si transistors, a short channel effect (SCE) occurs as the transistors are miniaturized. This makes miniaturization of Si transistors difficult. One of the factors that causes the short channel effect is the small band gap of silicon. On the other hand, an OS transistor uses an oxide semiconductor, which is a semiconductor material with a wide band gap, and therefore the short channel effect can be suppressed. In other words, an OS transistor is a transistor that does not have the short channel effect or has an extremely small short channel effect.

[0429] The short-channel effect is a deterioration in electrical characteristics that becomes apparent as transistors are miniaturized (channel lengths are reduced). Specific examples of the short-channel effect include a decrease in threshold voltage, an increase in subthreshold swing (sometimes referred to as S value), and an increase in leakage current. Here, the S value refers to the amount of change in gate voltage when the drain current is changed by one order of magnitude while the drain voltage is kept constant in the subthreshold region.

[0430] Furthermore, the characteristic length is widely used as an index of resistance to the short channel effect. The characteristic length is an index of how easily the potential in the channel formation region bends. The smaller the characteristic length, the steeper the potential rises, and therefore the more resistant it is to the short channel effect.

[0431] An OS transistor is an accumulation-mode transistor, while a Si transistor is an inversion-mode transistor. Therefore, compared with a Si transistor, an OS transistor has a smaller characteristic length between a source region and a channel formation region and a smaller characteristic length between a drain region and a channel formation region. Therefore, an OS transistor is more resistant to the short-channel effect than a Si transistor. That is, when a transistor with a short channel length is to be manufactured, an OS transistor is more suitable than a Si transistor.

[0432] Even when the carrier concentration of the oxide semiconductor is reduced to the point where the channel formation region becomes i-type or substantially i-type, the conduction band minimum of the channel formation region in a short-channel transistor is lowered due to the conduction-band-lowering (CBL) effect, and therefore the energy difference between the conduction band minimums of the source or drain region and the channel formation region can be reduced to 0.1 eV or more and 0.2 eV or less. − The source and drain regions are n-type regions. ＋ The region of type n ＋ / n − / n ＋ an accumulation-type junction-less transistor structure, or ＋ / n − / n ＋ It can also be regarded as an accumulation type non-junction transistor structure.

[0433] The above structure enables an OS transistor to have good electrical characteristics even when miniaturized or highly integrated. For example, an OS transistor can have good electrical characteristics even when the gate length is 20 nm or less, 15 nm or less, 10 nm or less, 7 nm or less, or 6 nm or less and 1 nm or more, 3 nm or more, or 5 nm or more. On the other hand, a Si transistor may have difficulty achieving a gate length of 20 nm or less or 15 nm or less due to the short-channel effect. Therefore, an OS transistor can be used as a transistor with a shorter channel length than a Si transistor. Note that the gate length refers to the length of a gate electrode in a direction in which carriers move inside a channel formation region during transistor operation and refers to the width of the bottom surface of the gate electrode in a top view of the transistor.

[0434] Furthermore, miniaturization of an OS transistor can improve the high-frequency characteristics of the transistor. Specifically, the cutoff frequency of the transistor can be improved. When the gate length of an OS transistor is within the above range, the cutoff frequency of the transistor can be set to, for example, 50 GHz or higher, preferably 100 GHz or higher, and further preferably 150 GHz or higher at room temperature.

[0435] As described above, an OS transistor has excellent advantages over a Si transistor in that it has a smaller off-state current and can be manufactured as a transistor with a short channel length.

[0436] The configuration, structure, method, or the like described in this embodiment can be used in appropriate combination with the configuration, structure, method, or the like described in other embodiments.

[0437] Embodiment 3 In this embodiment, a memory device according to one embodiment of the present invention will be described.

[0438] <Structure Example of Memory Device> A memory device 700 of one embodiment of the present invention will be described. The semiconductor device 100 described in Embodiment 1 or the like can be used for at least part of the memory device 700. The above-described transistors (the transistor 600, the transistor 500, the transistor 500F, the transistor 550, and the like) can also be used.

[0439] 21 is a block diagram illustrating an example of the configuration of a memory device 700. The memory device 700 shown in FIG.

[0440] The memory array 721 has a plurality of memory cells 741. The plurality of memory cells 741 are arranged in a matrix of M rows and N columns, where M is an integer equal to or greater than 1, and N is an integer equal to or greater than 1.

[0441] In Figure 21, as representative examples, memory cell 741[1,1] arranged in the first row and first column, memory cell 741[1,N] arranged in the first row and Nth column, memory cell 741[M,1] arranged in the Mth row and first column, and memory cell 741[M,N] arranged in the Mth row and Nth column are shown.

[0442] In addition, Figure 21 shows, as representative examples, wiring WL[1] connected to N memory cells 741 arranged in the first row, wiring WL[M] connected to N memory cells 741 arranged in the Mth row, wiring BL[1] connected to M memory cells 741 arranged in the first column, and wiring BL[N] connected to M memory cells 741 arranged in the Nth column.

[0443] The drive circuit 722 includes a power switch 761, a power switch 762, and a peripheral circuit 771. The peripheral circuit 771 includes a peripheral circuit 781, a control circuit 772, and a voltage generation circuit 773.

[0444] In one embodiment of the present invention, for example, a Si transistor (a transistor including silicon in a channel formation region) can be used as a transistor included in the driver circuit 722. Therefore, for example, a CMOS circuit (e.g., a circuit operating complementarily, a CMOS logic gate, or a CMOS logic circuit) formed by connecting the gate of an n-channel Si transistor and the gate of a p-channel Si transistor can be used as the driver circuit 722.

[0445] As the Si transistor, for example, at least a part of the transistor 550 described in Embodiment 1 can be applied.

[0446] Furthermore, for example, by using an OS transistor (a transistor including an oxide semiconductor in a channel formation region) as a transistor included in the memory cell 741, the memory array 721 can be stacked over a driver circuit 722 including a Si transistor. This allows the memory device 700 to be miniaturized. Furthermore, the wiring distance between the driver circuit 722 and the memory array 721 can be shortened. This allows the read speed and write speed of the memory device 700 to be improved.

[0447] As the OS transistor, for example, at least some of the transistors 600, 500, and 500F described in Embodiment 1 can be used.

[0448] Furthermore, although not shown, the memory device 700 may have a configuration in which the memory array 721 has a plurality of sense amplifiers arranged in a matrix, and a plurality of memory cells 741 are stacked on the sense amplifiers. With such a configuration, the data stored in the memory array 721 can be read out in a massively parallel manner by simultaneously accessing the plurality of sense amplifiers.

[0449] For example, a signal is supplied to each of the terminal BW, terminal CE, terminal GW, terminal MCK, terminal WAKE, terminal ADDR, terminal WDA, terminal PON1, and terminal PON2 from outside the storage device 700. In addition, for example, a signal is output from the terminal RDA to outside the storage device 700.

[0450] For example, a clock signal is applied to terminal MCK. Furthermore, a control signal is applied to each of terminal BW, terminal CE, and terminal GW. A chip enable signal is applied to terminal CE. A global write enable signal is applied to terminal GW. A byte write enable signal is applied to terminal BW. An address signal is applied to terminal ADDR. Write data is applied to terminal WDA. Read data is applied to terminal RDA. A power gating control signal is applied to terminals PON1 and PON2. The signals applied to terminals PON1 and PON2 may be generated by, for example, control circuit 772.

[0451] The control circuit 772 has a function of controlling the operation of the memory device 700. The control circuit 772 has a function of performing a logical operation on signals provided to the terminals CE, GW, and BW, respectively, to determine an operation mode (e.g., a write operation or a read operation) of the memory device 700. The control circuit 772 also has a function of generating a signal that controls the peripheral circuit 781 so that the operation mode is executed.

[0452] The voltage generation circuit 773 has a function of generating an arbitrary potential for operating the driver circuit 722. For example, the voltage generation circuit 773 has a function of generating an arbitrary potential by inputting a clock signal provided to a terminal MCK in accordance with a signal provided to a terminal WAKE. For example, a signal that controls whether or not the clock signal provided to the terminal MCK is input to the voltage generation circuit 773 is provided to the terminal WAKE.

[0453] The peripheral circuit 781 has a function of writing and reading data to and from the memory cells 741. The peripheral circuit 781 has a function of generating various signals for controlling the operation of the memory cells 741, etc. The peripheral circuit 781 has a row decoder 782, a column decoder 784, a row driver 783, a column driver 785, a data driver 786, an input circuit 787, and an output circuit 788.

[0454] The row decoder 782 and the column decoder 784 have the function of decoding an address signal applied to the terminal ADDR. The row decoder 782 has the function of specifying a row to be accessed. The column decoder 784 has the function of specifying a column to be accessed. The row driver 783 has the function of selecting the row specified by the row decoder 782 and applying a desired signal to, for example, the corresponding memory cell 741. The column driver 785 has the function of selecting the column specified by the column decoder 784 and applying a desired signal to, for example, the corresponding memory cell 741.

[0455] The data driver 786 has a function of writing and reading data to and from the memory cells 741 selected by the row driver and the column driver. The input circuit 787 has a function of holding data provided to a terminal WDA from outside the memory device 700. The data (data Din) held in the input circuit 787 is written to the memory cells 741 via the data driver 786. The data stored in the memory cells 741 is read out to the output circuit 788 via the data driver 786. The output circuit 788 has a function of holding the read data (data Dout). It also has a function of outputting the held data from a terminal RDA to outside the memory device 700.

[0456] In the memory device 700 shown in FIG. 21, for example, a row driver 783 has a function of supplying desired signals to wirings WL[1] to WL[M], and a column driver 785 and a data driver 786 have a function of exchanging data with wirings BL[1] to BL[N].

[0457] The power switch 761 has a function of controlling whether or not the potential applied to the terminal VMD is supplied to the peripheral circuit 771. The power switch 762 has a function of controlling whether or not the potential applied to the terminal VMH is supplied to the row driver 783. Here, for example, a high power supply potential (e.g., potential VDD) for operating the drive circuit 722 is applied to the terminal VMD, and a low power supply potential (e.g., potential VSS) is applied to the terminal VMS. Also, for example, a high power supply potential (e.g., a potential higher than potential VDD) for operating the memory cell 741 and the like is applied to the terminal VMH. The power switch 761 is controlled to a conductive state or a non-conductive state by a signal applied to the terminal PON1. The power switch 762 is controlled to a conductive state or a non-conductive state by a signal applied to the terminal PON2.

[0458] Note that the circuits and terminals of the driver circuit 722 may be omitted as appropriate. Other circuits and terminals may be added as appropriate.

[0459] In one embodiment of the present invention, in the memory device 700, for example, the semiconductor device 100 described in Embodiment 1 can be applied to at least some of the wirings, such as the wirings WL[1] to WL[M], the wirings BL[1] to BL[N], the wirings that exchange signals between the driver circuit 722 and the memory array 721, the wirings that exchange signals between circuits in the driver circuit 722, and the wirings that exchange signals with the outside of the memory device 700. In this case, the wirings correspond to the wiring SIG included in the semiconductor device 100. In this manner, by applying the semiconductor device 100 to the memory device 700 and making the semiconductor device 100 function as an ESD protection circuit, the reliability of the memory device 700 can be improved while suppressing increases in power consumption, process cost, and occupation area.

[0460] <Configuration Example of Memory Cell> A configuration example applicable to the memory cell 741 will be described. An OS transistor can be used as a transistor included in the memory cell described below. For example, at least a part of the transistor 600, the transistor 500, and the transistor 500F described in Embodiment 1 can be used. Note that a storage device using an OS transistor as a memory cell may be referred to as an OS memory.

[0461] The memory cell 950a shown in FIG. 22A includes a transistor M911 and a capacitor C911. One of the source or drain of the transistor M911 is connected to one terminal of the capacitor C911. The other of the source or drain of the transistor M911 is connected to a wiring BL that functions as a bit line. The gate of the transistor M911 is connected to a wiring WL that functions as a word line. The other terminal of the capacitor C911 is connected to a wiring CL. Note that the wiring that connects the one of the source or drain of the transistor M911 and one terminal of the capacitor C911 may be referred to as a wiring MN in the following description.

[0462] The memory cell 950a can store binary data by associating the amount of charge stored in the capacitor C911, i.e., the amount of charge held in the wiring MN, with "1" or "0." Note that, for example, ternary or more levels of data may be stored. When writing data, the memory cell 950a controls the conduction state of the transistor M911 to apply a potential corresponding to the data from the wiring BL to the wiring MN, thereby holding a charge corresponding to the potential. When reading data, the memory cell 950a controls the conduction state of the transistor M911 to extract the charge held in the wiring MN to the wiring BL.

[0463] Note that when data is read from the memory cell 950a, the charge held in the wiring MN is extracted to the wiring BL, and the potential of the wiring MN changes. That is, when data is read from the memory cell 950a, the stored data is destroyed. That is, when data is read from the memory cell 950a, destructive reading occurs. Therefore, after data is read from the memory cell 950a, data needs to be written back (refreshed).

[0464] In one embodiment of the present invention, for example, an n-channel OS transistor can be used as the transistor M911.

[0465] Note that the memory cell 950a shown in FIG. 22A is a dynamic random access memory (DRAM) memory cell. In particular, a structure using an OS transistor as the transistor M911 may be referred to as a DOSRAM (registered trademark). Since the DOSRAM uses an OS transistor with extremely low off-state current, it can store data for a long period of time. Furthermore, it can store multilevel data or analog data. Furthermore, since once-written data can be stored for a long period of time, the frequency of data refresh can be reduced. Furthermore, since the electrostatic capacitance of the cell capacitance (capacitor C911) can be reduced, the cell size can be reduced. Therefore, by using a DOSRAM, it is possible to reduce the power consumption and improve the recording density of a semiconductor device or a memory device.

[0466] The memory cell 950b shown in FIG. 22B is a modification of the memory cell 950a shown in FIG. 22A, and differs in that it does not have the capacitance element C911.

[0467] 22B, charge can be stored in the parasitic capacitance (the capacitance between the gate and either the source or the drain of the transistor M911) shown by the dashed line, etc. By using such a configuration, for example, the cell size can be reduced, and the recording density of the semiconductor device and the memory device can be improved.

[0468] The memory cell 950c shown in FIG. 22C includes a transistor M921, a transistor M922, and a capacitor C921. One of the source or drain of the transistor M921 is connected to the gate of the transistor M922 and one terminal of the capacitor C921. The other of the source or drain of the transistor M921 is connected to a wiring WBL functioning as a write bit line. The gate of the transistor M921 is connected to a wiring WWL functioning as a write word line. One of the source or drain of the transistor M922 is connected to a wiring RBL functioning as a read bit line. The other of the source or drain of the transistor M922 is connected to a wiring PL. The other terminal of the capacitor C921 is connected to a wiring RWL functioning as a read word line. Note that the wiring connecting the one of the source or drain of the transistor M921, the gate of the transistor M922, and one terminal of the capacitor C921 to each other may be referred to as a wiring MN.

[0469] The memory cell 950c can store binary data by associating the amount of charge stored in the capacitor C921, i.e., the amount of charge held in the wiring MN, with "1" or "0." Note that, for example, ternary or more levels of data may be stored. When writing data, the memory cell 950c applies a potential corresponding to the data from the wiring WBL to the wiring MN by controlling the conduction state of the transistor M921, and can hold a charge corresponding to the potential. When reading data, the memory cell 950c can output a potential corresponding to the data to the wiring RBL by turning the transistor M922 on or off depending on the potential of the wiring MN.

[0470] In one embodiment of the present invention, for example, an n-channel OS transistor can be used as the transistor M921, and for example, an n-channel transistor (such as an OS transistor or a Si transistor) can be used as the transistor M922.

[0471] The memory cell 950c shown in FIG. 22C is a gain cell type memory cell. In particular, a memory cell using an OS transistor as the transistor M921 may be referred to as NOSRAM (registered trademark). NOSRAM is an abbreviation for Nonvolatile Oxide Semiconductor RAM. NOSRAM can store data for a long period of time because it uses an OS transistor with extremely low off-state current. It can also store multilevel data or analog data. Furthermore, because the writing transistor (transistor M921) and the reading transistor (transistor M922) are different, data can be read nondestructively. Therefore, it can be used, for example, as a nonvolatile memory.

[0472] 22D is a modification of the memory cell 950c shown in FIG. 22C, and differs in that it does not include the capacitor element C921 and in that the other of the source and the drain of the transistor M922 is connected to the wiring RWL.

[0473] 22D, charge can be stored in a parasitic capacitance added to the wiring MN. By adopting such a configuration, for example, the cell size can be reduced, and the recording density of the semiconductor device and the memory device can be improved.

[0474] The memory cell 950e shown in Figure 22E is a modified example of the memory cell 950c shown in Figure 22C, and differs in that the other of the source or the drain of the transistor M921 is connected to the wiring BL, and one of the source or the drain of the transistor M922 is connected to the wiring BL.

[0475] 22E, the wiring BL can function as both a write bit line and a read bit line. With this configuration, for example, the cell size can be reduced, and the recording density of the semiconductor device and the memory device can be improved.

[0476] 22F is a modification of the memory cell 950c shown in Fig. 22C, and differs in that it has a transistor M922p instead of the transistor M922. The transistor M922p can be, for example, a p-channel Si transistor.

[0477] 22F uses a p-channel transistor to read data, which may simplify the configuration and operation of the sense amplifier, etc. By using such a configuration, for example, the layout area of ​​the driver circuit can be reduced, thereby enabling miniaturization of the semiconductor device and memory device.

[0478] 22G is a modified example of the memory cell 950c shown in FIG. 22B and differs in that it further includes a transistor M923. One of the source or the drain of the transistor M922 is connected to one of the source or the drain of the transistor M923, the other of the source or the drain of the transistor M922 is connected to a wiring PL, the other of the source or the drain of the transistor M923 is connected to a wiring RBL, and the gate of the transistor M923 is connected to a wiring RWL. The transistor M923 can be, for example, an n-channel transistor (e.g., an OS transistor or a Si transistor).

[0479] 22G, the parasitic capacitance between the wiring MN and the wiring RBL can be reduced. With such a configuration, for example, it is possible to suppress the introduction of noise into the wiring MN via the gate capacitance of the transistor M922, thereby improving the reliability of the semiconductor device and the memory device.

[0480] The memory cell 950h shown in Figure 22H includes transistors M931, M932, M933, M934, capacitors C931, C932, inverters X931, and X932. One of the source or drain of the transistor M931 is connected to one of the source or drain of the transistor M933, the input terminal of the inverter X931, and the output terminal of the inverter X932. One of the source or drain of the transistor M932 is connected to one of the source or drain of the transistor M934, the output terminal of the inverter X931, and the input terminal of the inverter X932. The other of the source or drain of the transistor M933 is connected to one terminal of the capacitor C931. The other of the source or drain of the transistor M934 is connected to one terminal of the capacitor C932. The other of the source or drain of the transistor M931 is connected to a wiring BL that functions as one of a pair of bit lines. The other of the source and drain of the transistor M932 is connected to a wiring BLB that functions as the other of the pair of bit lines. The gates of the transistors M931 and M932 are connected to a wiring WL that functions as a word line. The gates of the transistors M933 and M934 are connected to a wiring BRL. The other terminal of the capacitor C931 and the other terminal of the capacitor C932 are connected to a wiring CL.

[0481] The memory cell 950h can store binary data of "1" or "0" in an inverter loop formed by an inverter X931 and an inverter X932. When writing data, the memory cell 950h can apply potentials corresponding to the data to the inverter loop from the wiring BL and the wiring BLB by controlling the conduction states of the transistors M931 and M932. When reading data, the memory cell 950h can extract potentials corresponding to the data stored in the inverter loop from the wiring BL and the wiring BLB by controlling the conduction states of the transistors M931 and M932.

[0482] Furthermore, by controlling the conduction states of the transistors M933 and M934, the memory cell 950h can apply a potential corresponding to the data stored in the inverter loop to one terminal of the capacitor C931 and one terminal of the capacitor C932, respectively, and can hold a charge corresponding to the potential. In other words, data can be backed up. Furthermore, by controlling the conduction states of the transistors M933 and M934, the memory cell 950h can extract the charge held in one terminal of the capacitor C931 and one terminal of the capacitor C932, respectively, to the inverter loop. In other words, data can be recovered.

[0483] In one embodiment of the present invention, for example, n-channel OS transistors can be used as the transistors M931, M932, M933, and M934. Furthermore, inverter circuits available in a standard circuit library can be used as the inverters X931 and X932. That is, for example, n-channel and p-channel Si transistors can be used as the transistors included in the inverters X931 and X932.

[0484] Note that the memory cell 950h shown in FIG. 22H is a memory cell of a back-up capable static random access memory (SRAM). In particular, a configuration in which OS transistors are used for the transistors M931, M932, M933, and M934 may be referred to as an OS-SRAM (Oxide Semiconductor-SRAM).

[0485] Note that one embodiment of the present invention is not limited to the memory cells 950a to 950h, and memory cells having structures each of which can be appropriately combined can be used.

[0486] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification and the like.

[0487] Embodiment 4 In this embodiment, an application example of a memory device according to one embodiment of the present invention will be described.

[0488] <Example of Hierarchical Structure of Storage Devices> Generally, computers and the like use various storage devices depending on the application. FIG. 23 shows various storage devices by hierarchy. The higher the storage device, the faster the operating speed is required, while the lower the storage device, the larger the storage capacity and recording density are required. FIG. 23 shows, from the top layer to the bottom, a register, a cache memory, a main memory, and storage. The cache memory may also include, from top to bottom, a primary cache (L1), a secondary cache (L2), and a tertiary cache (L3). While an example having up to a tertiary cache is shown here, a lower-level cache memory may also be included. The lowest-level cache memory may also be called an LLC (Last Level Cache) or an FLC (Final Level Cache). For example, a storage class memory may be included between the main memory and the storage.

[0489] Registers integrated into arithmetic processing units (also called processors) such as CPUs (Central Processing Units) and GPUs (Graphics Processing Units) are used to temporarily store the results of calculations performed by cores. They also have the function of storing setting information for the arithmetic processing units. As a result, they are frequently accessed by the arithmetic processing units. Therefore, registers are required to operate at high speeds.

[0490] For example, a static random access memory (SRAM) is used as the cache memory. The cache memory has the function of duplicating and storing a portion of the data stored in the main memory. By storing a copy of frequently used data, the speed of accessing the data can be increased. The cache memory is required to have a faster operating speed than the main memory.

[0491] The main memory may be, for example, a dynamic random access memory (DRAM). The main memory has a function of storing programs and data read from storage. The main memory is required to have a larger storage capacity and a higher recording density than cache memory.

[0492] Storage has the function of storing data that requires long-term storage and various programs used by processing units. Therefore, storage requires large storage capacity and high recording density. For example, a hard disk drive (HDD) or a solid state drive (SSD) located on top of an HDD can be used as the storage. For example, a large-capacity, non-volatile storage device such as a NAND flash memory (e.g., 3D NAND) can be used as the SSD.

[0493] The storage device according to one aspect of the present invention is excellent in that it has a high operating speed, is capable of retaining data for a long period of time, has high rewrite endurance, and is capable of low-voltage operation. The storage device according to one aspect of the present invention is suitable as a storage device located in an area (OSmem) that includes a hierarchy where a cache memory is located, a hierarchy where a main memory is located, and a hierarchy where a storage is located.

[0494] That is, for example, it is preferable to replace a DRAM used in a main memory with a storage device according to one embodiment of the present invention. Here, since DRAM requires a refresh operation and is a destructive readout storage device, it consumes more power than other storage devices. Therefore, by not using DRAM, it is possible to reduce power consumption. It is also preferable to replace, for example, a portion of an SRAM used in a cache memory and a portion of a 3D NAND used in storage with a storage device according to one embodiment of the present invention.

[0495] One embodiment of the present invention can be configured without using a DRAM, which has conventionally been used as a main memory or the like. In this case, a storage device according to one embodiment of the present invention can be used in place of the DRAM. With such a configuration, power consumption can be dramatically reduced (for example, by one hundredth or one thousandth or less). Therefore, by deploying information processing devices including computers, servers, and the like having such a configuration throughout the world, global warming can be suppressed.

[0496] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification and the like.

[0497] In this embodiment, electronic components, electronic devices, mainframes, space equipment, and data centers (also referred to as data centers (DCs)) that can use the semiconductor device described in the above embodiment will be described. The electronic components, electronic devices, mainframes, space equipment, and data centers that use the semiconductor device of one embodiment of the present invention are effective in achieving high performance, such as low power consumption.

[0498] [Electronic Component] Fig. 24A is a perspective view of an electronic component 5700 and a substrate (mounting substrate 5704) on which the electronic component 5700 is mounted. The electronic component 5700 shown in Fig. 24A has a semiconductor device 5710 inside a mold 5711. Fig. 24A omits some parts to show the interior of the electronic component 5700. The electronic component 5700 has lands 5712 on the outside of the mold 5711. The lands 5712 are connected to electrode pads 5713. The electrode pads 5713 are connected to the semiconductor device 5710 by wires 5714. The electronic component 5700 is mounted on, for example, a printed circuit board 5702. A plurality of such electronic components are combined and connected on the printed circuit board 5702 to complete the mounting substrate 5704.

[0499] The semiconductor device 5710 also includes a drive circuit layer 5715 and a memory layer 5716. The memory layer 5716 has a configuration in which multiple memory cell arrays are stacked. The stacked configuration of the drive circuit layer 5715 and the memory layer 5716 can be a monolithically stacked configuration. In a monolithically stacked configuration, the layers can be connected without using, for example, through-electrode technology such as a TSV (Through Silicon Via) or bonding technology such as Cu-Cu direct bonding. By monolithically stacking the drive circuit layer 5715 and the memory layer 5716, for example, a so-called on-chip memory configuration can be achieved in which the memory is formed directly on the processor. The on-chip memory configuration enables the operation of the interface between the processor and the memory to be faster.

[0500] Furthermore, by configuring an on-chip memory, it is possible to reduce the size of connection wiring, etc., compared to technologies that use through electrodes such as TSVs, and therefore it is also possible to increase the number of connection pins. Increasing the number of connection pins enables parallel operation, which makes it possible to improve the memory bandwidth (also called memory bandwidth).

[0501] It is also preferable that the memory cell arrays included in the memory layer 5716 are formed using OS transistors and the memory cell arrays are monolithically stacked. By monolithically stacking the memory cell arrays, it is possible to improve either or both of the memory bandwidth and the memory access latency. Note that the bandwidth is the amount of data transferred per unit time. Also, the access latency is the time from access to the start of data exchange. Note that when Si transistors are used for the memory layer 5716, it is more difficult to achieve a monolithically stacked structure than when OS transistors are used. Therefore, it can be said that OS transistors have a superior structure to Si transistors in a monolithically stacked structure.

[0502] That is, OS transistors have an excellent effect of enabling a wider memory bandwidth than Si transistors.

[0503] The semiconductor device 5710 may also be referred to as a die. In this specification, a die refers to a chip piece obtained by forming a circuit pattern on, for example, a disk-shaped substrate (also called a wafer) and cutting it into dices during the semiconductor chip manufacturing process. Examples of semiconductor materials that can be used for the die include silicon, silicon carbide, and gallium nitride. For example, a die obtained from a silicon substrate (also called a silicon wafer) may be called a silicon die.

[0504] 24B is a perspective view of an electronic component 5730. The electronic component 5730 is an example of a SiP (System in Package) or an MCM (Multi Chip Module). The electronic component 5730 has an interposer 5731 provided on a package substrate 5732 (printed circuit board), and a semiconductor device 5735 and a plurality of semiconductor devices 5710 provided on the interposer 5731.

[0505] In the electronic component 5730, the semiconductor device 5710 can be used as a storage device such as a high bandwidth memory (HBM), and the semiconductor device 5735 can be used as an integrated circuit (e.g., an arithmetic unit, a control unit, or a signal processing unit) such as a central processing unit (CPU), a graphics processing unit (GPU), or a field programmable gate array (FPGA).

[0506] For example, a ceramic substrate, a plastic substrate, or a glass epoxy substrate can be used for the package substrate 5732. For example, a silicon interposer or a resin interposer can be used for the interposer 5731.

[0507] The interposer 5731 has a plurality of wirings and functions to connect a plurality of integrated circuits with different terminal pitches via each of the plurality of wirings. The plurality of wirings are provided in a single layer or multiple layers. The interposer 5731 also functions to connect the integrated circuits provided on the interposer 5731 to electrodes provided on the package substrate 5732. For these reasons, the interposer 5731 is sometimes referred to as a "rewiring substrate" or "intermediate substrate." The interposer 5731 may also be provided with through electrodes, which may be used to connect the integrated circuits to the package substrate 5732. When a silicon interposer is used for the interposer 5731, TSVs may also be used as the through electrodes.

[0508] It is preferable to use a silicon interposer as the interposer 5731. A silicon interposer does not require an active element, and therefore can be manufactured at lower cost than an integrated circuit. Furthermore, since the wiring of a silicon interposer can be formed using a semiconductor process, it is easy to form fine wiring that is difficult to form with a resin interposer.

[0509] To achieve a wide memory bandwidth, an HBM needs to connect many wires. Therefore, the interposer on which the HBM is mounted must have fine and high-density wiring. Therefore, it is preferable to use a silicon interposer for the interposer on which the HBM is mounted.

[0510] Furthermore, for example, SiP or MCM using a silicon interposer is less likely to suffer from a decrease in reliability due to differences in the coefficient of expansion between the integrated circuit and the interposer. Furthermore, since the silicon interposer has a highly flat surface, poor connection between the integrated circuit mounted on the silicon interposer and the silicon interposer is less likely to occur. In particular, it is preferable to use a silicon interposer for a 2.5D package (2.5-dimensional packaging) in which multiple integrated circuits are arranged side by side on an interposer.

[0511] On the other hand, for example, when connecting multiple integrated circuits with different terminal pitches using a silicon interposer, a TSV, or the like, a space is required, such as the width of the terminal pitch. Therefore, when attempting to reduce the size of the electronic component 5730, the width of the terminal pitch becomes an issue, and it may be difficult to provide the many wirings necessary to achieve a wide memory bandwidth. Therefore, as described above, a monolithically stacked configuration using OS transistors is preferable. Also, a composite structure may be used in which a memory cell array stacked using TSVs and a monolithically stacked memory cell array are combined.

[0512] The substrate on which the electronic component 5730 is mounted may be provided with a heat sink (heat dissipation plate) overlapping the electronic component 5730. When a heat sink is provided, it is preferable that the height of the integrated circuit provided on the interposer 5731 be the same. For example, it is preferable that the height of the electronic component 5730 be the same as that of the semiconductor device 5710 and the semiconductor device 5735.

[0513] In order to mount the electronic component 5730 on another substrate, the package substrate 5732 may have electrodes 5733 on its bottom. FIG. 24B shows an example in which the electrodes 5733 are formed with solder balls. By providing solder balls in a matrix on the bottom of the package substrate 5732, the electronic component 5730 can be mounted using a ball grid array (BGA) method. The electrodes 5733 may also be formed with conductive pins. By providing conductive pins in a matrix on the bottom of the package substrate 5732, the electronic component 5730 can be mounted using a pin grid array (PGA) method.

[0514] The electronic component 5730 can be mounted on other substrates using various mounting methods, not limited to BGA or PGA, such as a staggered pin grid array (SPGA), a land grid array (LGA), a quad flat package (QFP), a quad flat J-leaded package (QFJ), or a quad flat non-leaded package (QFN).

[0515] 25A is a perspective view of an electronic device 6500. The electronic device 6500 shown in FIG. 25A is a portable information terminal that can be used as a smartphone. The electronic device 6500 includes, for example, a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and a control device 6509. Note that the control device 6509 includes, for example, one or more selected from a CPU, a GPU, and a memory device. The semiconductor device of one embodiment of the present invention can be applied to the display portion 6502 or the control device 6509, for example. The use of the semiconductor device of one embodiment of the present invention for the control device 6509 is preferable because power consumption can be reduced.

[0516] FIG. 25B is a perspective view of an electronic device 6600. The electronic device 6600 shown in FIG. 25B is an information terminal that can be used as a laptop personal computer. The electronic device 6600 includes, for example, a housing 6611, a keyboard 6612, a pointing device 6613, an external connection port 6614, a display portion 6615, and a control device 6616. Note that the control device 6616 includes, for example, one or more selected from a CPU, a GPU, and a memory device. The semiconductor device of one embodiment of the present invention can be applied to, for example, the control device 6509 or the control device 6616. The use of the semiconductor device of one embodiment of the present invention for the control device 6616 is preferable because power consumption can be reduced.

[0517] [Mainframe] Fig. 25C is a perspective view of a mainframe 5600. The mainframe 5600 shown in Fig. 25C has a rack 5610 housing a plurality of rack-mounted computers 5620. The mainframe 5600 may also be called a supercomputer.

[0518] Fig. 25D is a perspective view illustrating an example configuration of a computer 5620. In Fig. 25D, the computer 5620 has a motherboard 5630. The motherboard 5630 has a plurality of slots 5631 and a plurality of connection terminals (not shown). A PC card 5621 is inserted into the slot 5631. In addition, the PC card 5621 has connection terminals 5623, 5624, and 5625, each of which is connected to the motherboard 5630.

[0519] A PC card 5621 shown in Figure 25E is an example of a processing board equipped with, for example, a CPU, a GPU, and a storage device. The PC card 5621 has a board 5622. The board 5622 also has a connection terminal 5623, a connection terminal 5624, a connection terminal 5625, a semiconductor device 5626, a semiconductor device 5627, a semiconductor device 5628, and a connection terminal 5629. Note that Figure 25E illustrates semiconductor devices other than the semiconductor device 5626, the semiconductor device 5627, and the semiconductor device 5628, but for these semiconductor devices, the following descriptions of the semiconductor device 5626, the semiconductor device 5627, and the semiconductor device 5628 can be referred to.

[0520] The connection terminal 5629 has a shape that allows it to be inserted into a slot 5631 of the motherboard 5630, and functions as an interface for connecting the PC card 5621 and the motherboard 5630. An example of the standard for the connection terminal 5629 is PCIe (Peripheral Component Interconnect Express).

[0521] Each of the connection terminals 5623, 5624, and 5625 can be, for example, an interface for supplying power or inputting signals to the PC card 5621. Furthermore, each of the connection terminals 5623, 5624, and 5625 can be, for example, an interface for outputting signals calculated by the PC card 5621. Examples of standards for each of the connection terminals 5623, 5624, and 5625 include Universal Serial Bus (USB), Serial ATA (SATA), and Small Computer System Interface (SCSI). Furthermore, when a video signal is output from each of the connection terminals 5623, 5624, and 5625, examples of the respective standards include High-Definition Multimedia Interface (HDMI (registered trademark)).

[0522] The semiconductor device 5626 has a terminal (not shown) for inputting and outputting signals, and the semiconductor device 5626 can be connected to the board 5622 by inserting the terminal into a socket (not shown) provided on the board 5622.

[0523] The semiconductor device 5627 has a plurality of terminals, and the semiconductor device 5627 can be connected to the board 5622 by, for example, reflow soldering the terminals to wiring provided on the board 5622. Examples of the semiconductor device 5627 include an FPGA, a GPU, and a CPU. For example, the electronic component 5730 described above can be used as the semiconductor device 5627.

[0524] The semiconductor device 5628 has a plurality of terminals, and the semiconductor device 5628 can be connected to the board 5622 by, for example, reflow soldering the terminals to wiring provided on the board 5622. Examples of the semiconductor device 5628 include a memory device. For example, the electronic component 5700 described above can be used as the semiconductor device 5628.

[0525] The mainframe computer 5600 can also function as a parallel computer. By using the mainframe computer 5600 as a parallel computer, it is possible to perform large-scale calculations necessary for learning and inference in artificial intelligence, for example.

[0526] [Space Equipment] The semiconductor device of one embodiment of the present invention can be used in space equipment such as equipment that processes and stores information, for example.

[0527] The semiconductor device of one embodiment of the present invention can include an OS transistor. The OS transistor exhibits small changes in electrical characteristics due to radiation exposure. That is, the OS transistor has high radiation resistance and is therefore suitable for use in an environment where radiation may be incident. For example, the OS transistor is suitable for use in outer space.

[0528] Fig. 26A shows an artificial satellite 6800 as an example of space equipment. The artificial satellite 6800 has a body 6801, a solar panel 6802, an antenna 6803, a secondary battery 6805, and a control device 6807. Fig. 26A also shows a planet 6804 in outer space. Note that outer space refers to an altitude of 100 km or higher, for example, but the outer space described in this specification may also include the thermosphere, mesosphere, and stratosphere.

[0529] 26A , a battery management system (also referred to as a BMS) or a battery control circuit may be provided for the secondary battery 6805. The use of an OS transistor in the battery management system or the battery control circuit is preferable because it consumes low power and has high reliability even in space.

[0530] Furthermore, outer space is an environment with radiation levels 100 times higher than on Earth. Examples of radiation include electromagnetic waves (electromagnetic radiation) such as X-rays and gamma rays, and particle radiation such as alpha rays, beta rays, neutron rays, proton rays, heavy ion rays, and meson rays.

[0531] The solar panel 6802 generates the power necessary for the operation of the satellite 6800 when irradiated with sunlight. However, for example, in a situation where the solar panel 6802 is not irradiated with sunlight or where the amount of sunlight irradiating the solar panel 6802 is small, the solar panel 6802 generates less power. Therefore, the satellite 6800 may not generate the power necessary for its operation. In order to operate the satellite 6800 even in a situation where the power generated by the solar panel 6802 is small, the satellite 6800 may be provided with a secondary battery 6805. The solar panel 6802 may also be called a solar cell module.

[0532] The satellite 6800 can generate a signal. The signal is transmitted via the antenna 6803. Furthermore, for example, a receiver installed on the ground or another satellite can receive the signal. For example, the receiver can measure the position of the receiver by receiving the signal transmitted by the satellite 6800. As described above, the satellite 6800 can constitute a satellite positioning system.

[0533] The control device 6807 has a function of controlling the satellite 6800. The control device 6807 is configured using, for example, one or more devices selected from a CPU, a GPU, and a storage device. Note that the control device 6807 is preferably a semiconductor device including an OS transistor, which is one embodiment of the present invention. The OS transistor has smaller fluctuations in electrical characteristics due to radiation exposure than a Si transistor. That is, the OS transistor is preferable because it has high reliability even in an environment where radiation may be incident.

[0534] That is, an OS transistor has an excellent effect of being more radiation resistant than a Si transistor.

[0535] The artificial satellite 6800 may also be configured to include a sensor. For example, the artificial satellite 6800 may be configured to include a visible light sensor, thereby enabling it to have the function of detecting sunlight reflected from an object on the ground. The artificial satellite 6800 may also be configured to include a thermal infrared sensor, thereby enabling it to have the function of detecting thermal infrared rays emitted from the earth's surface. As described above, the artificial satellite 6800 may function as, for example, an earth observation satellite.

[0536] Although an artificial satellite is shown here as an example of space equipment, the present invention is not limited thereto. The semiconductor device of one embodiment of the present invention can be used in space equipment such as a spaceship, a space capsule, or a space probe, for example.

[0537] [Data Center] The semiconductor device according to one embodiment of the present invention can be used in a storage system applied to a data center, for example. The data center is required to perform long-term management of data, for example, by ensuring the immutability of data. Managing long-term data requires, for example, the installation of storage and servers for storing huge amounts of data, the securing of a stable power source for retaining the data, or the securing of cooling equipment required for retaining the data. Therefore, for example, the data center building needs to be enlarged.

[0538] By using the semiconductor device of one embodiment of the present invention in a storage system applied to a data center, it is possible to reduce the power required to store data and the size of the semiconductor device that stores data. Therefore, for example, it is possible to reduce the size of the storage system, the size of the power supply for storing data, and the scale of the cooling equipment. Therefore, it is possible to reduce the space required for the data center.

[0539] Furthermore, the semiconductor device of one embodiment of the present invention has low power consumption, which allows heat generation from the circuit to be reduced. Therefore, adverse effects of the heat generation on the circuit itself, peripheral circuits, and peripheral modules can be reduced. Furthermore, by using the semiconductor device of one embodiment of the present invention, a data center that operates stably even in a high-temperature environment can be realized. Therefore, the reliability of the data center can be improved.

[0540] Fig. 26B shows a storage system applicable to a data center. The storage system 7000 shown in Fig. 26B has a plurality of servers 7001sb as hosts 7001 (illustrated as Host Computers). It also has a plurality of storage devices 7003md as storage 7003 (illustrated as Storage). The host 7001 and storage 7003 are connected via a storage area network 7004 (illustrated as SAN: Storage Area Network) and a storage control circuit 7002 (illustrated as Storage Controller).

[0541] The host 7001 corresponds to a computer that accesses data stored in the storage 7003. The hosts 7001 may be connected to each other via a network.

[0542] Although the storage 7003 uses flash memory to reduce the data access speed, i.e., the time required to write or read data, this time is significantly longer than the time required for DRAM, which can be used as cache memory within the storage. In order to solve the problem of the long access speed of the storage 7003, a storage system typically provides cache memory within the storage to reduce the time required to write or read data.

[0543] The above-mentioned cache memory is used in the storage control circuit 7002 and the storage 7003. Data exchanged between the host 7001 and the storage 7003 is stored in the cache memory in the storage control circuit 7002 and the storage 7003, and then output to the host 7001 or the storage 7003.

[0544] By using OS transistors as transistors for storing data in the cache memory and holding a potential corresponding to the data, the frequency of refreshing the cache memory can be reduced and the power consumption of the cache memory can be reduced.Furthermore, by using a stacked memory cell array, the cache memory can be miniaturized.

[0545] Note that the semiconductor device of one embodiment of the present invention can be applied to any one or more of electronic components, electronic devices, mainframe computers, space equipment, and data centers to reduce power consumption. Therefore, while energy demand is expected to increase with the improvement in performance or high integration of semiconductor devices, the use of the semiconductor device of one embodiment of the present invention can contribute to the reduction of carbon dioxide (CO ２ Furthermore, the semiconductor device of one embodiment of the present invention consumes low power and is therefore effective as a countermeasure against global warming.

[0546] The configuration, structure, method, or the like described in this embodiment can be used in appropriate combination with the configuration, structure, method, or the like described in other embodiments.

[0547] (Additional Notes Regarding the Description of the Present Specification, etc.) The following additional notes will be given regarding the above-described embodiments and the explanation of each configuration in the embodiments.

[0548] In this specification, "connection" includes, as an example, "electrical connection." When the term "electrical connection" is used to define the connection relationship between circuit elements as a physical entity, "electrical connection" includes, as examples, "direct connection" and "indirect connection." "A and B are directly connected" refers to a case where A and B are connected without a circuit element (e.g., a transistor or a switch; wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" refers to a case where A and B are connected via one or more circuit elements.

[0549] Here, when "A and B are indirectly connected," it refers to the following connection relationship, for example. That is, assuming that a circuit is operating, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, such a circuit can be defined as an entity, and "A and B are indirectly connected." Note that even if there is a time when electrical signal transmission or potential interaction does not occur between A and B, if there is a time during the operation of the circuit when electrical signal transmission or potential interaction occurs between A and B, it can be defined as "A and B are indirectly connected." Note that "A and B are indirectly connected" is a definition of the connection relationship between circuit elements as an entity. Therefore, for example, even when a power supply voltage is not supplied to a circuit and the circuit is not operating, the circuit can be defined as an entity, and "A and B are indirectly connected" (however, for example, this is limited to the case where electrical signal transmission or potential interaction occurs between A and B during the operation of the circuit when a power supply voltage is supplied to the circuit and the circuit is operating).

[0550] Specific examples of "indirect connection" are shown below. First, an example of "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors, as shown in FIGS. 27A1 and 27A2. Another example of "A and B are indirectly connected" is when A and B are connected via one or more switches. When "A and B are indirectly connected," it is assumed that, assuming the circuit is operating, there is at least one time when a transistor between A and B is in an on state, a conductive state, or a state in which a current can flow. Note that "A and B are indirectly connected" also includes cases where a transistor between A and B is in an off state or a non-conductive state. When "A and B are indirectly connected," if multiple transistors are connected between A and B, it is assumed that, assuming the circuit is operating, each of the multiple transistors between A and B is in an on state, a conductive state, or a state in which a current can flow at least one time. In other words, when "A and B are indirectly connected," it is not necessary for all of the multiple transistors to be in an on state, a conductive state, or a state in which current can flow simultaneously. Therefore, when "A and B are indirectly connected," it also includes cases in which the multiple transistors between A and B are in an off state or a non-conductive state at the same time or at different times. As another example, as shown in FIG. 27A3, when A and C are connected via the source and drain of transistor TrP and B and C are connected via the source and drain of transistor TrQ, it can be defined as "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be described later, when a constant potential V is supplied to C from a power supply, GND, or the like, it can be said that "A and C are indirectly connected" or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."

[0551] While we have provided examples of cases where an "indirect connection" can and cannot be established, we will now present another example of a case where an "indirect connection" cannot be established. Even if an electrical signal exchange or potential interaction occurs between A and B during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of a case where A and B are connected via an insulator is when a capacitive element is connected between A and B, as shown in FIG. 27A4. Another example of a case where A and B are connected via an insulator is when a gate insulating film of a transistor is interposed between A and B, as shown in FIG. 27A5. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."

[0552] Another example of a case where it cannot be said that "A and B are indirectly connected" is a case where there is no timing when an electrical signal is exchanged or when potential interaction occurs between A and B. An example of this is when, as shown in Figures 27A6 and 27A7, multiple transistors are connected via their sources and drains to the path from A to B, and a constant potential V is supplied to a node between the transistors from a power supply, GND, or the like. In this case, it cannot be said that "A and B are indirectly connected," but it is possible to say that "A and V are indirectly connected" or "B and V are indirectly connected." In addition, in Figure 27A3, if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply or GND, etc., the connection relationship will be the same as in Figures 27A6 and 27A7, so it cannot be said that "A and B are indirectly connected," but it can be said that "A and C are indirectly connected," or "B and C are indirectly connected."

[0553] Although an example of "indirect connection" has been given above, as an example, the definition of "indirect connection" is included in the definition of "electrical connection," so if "A and B are indirectly connected," it can also be said that "A and B are electrically connected."

[0554] Next, specific examples of "direct connection" are shown. Examples of "A and B are directly connected" include cases where A and B are connected without any circuit element between them, as shown in FIGS. 27B1, 27B2, and 27B3. When A and B are connected to a power supply that supplies a constant potential V or to GND without any circuit element between them, as shown in FIGS. 27B4 and 27B5, it can be said that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." It can also be said that "A and B are directly connected," when A (or B) is connected to a constant potential V via the source and drain of a transistor, as shown in FIG. 27B6. Because A and V or B and V are connected via the source and drain of a transistor, they cannot be said to be directly connected, but rather that "A and V are indirectly connected" or "B and V are indirectly connected."

[0555] Although an example of "direct connection" has been given above, as an example, the definition of "direct connection" is included in the definition of "electrical connection," so when "A and B are directly connected," it can also be said that "A and B are electrically connected."

[0556] Note that even when independent components are shown connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both the wiring and the electrode. Therefore, in this specification, the term "connection" also includes such cases where one conductive film has the functions of multiple components.

[0557] Furthermore, in this specification, the term "resistive element" may refer to, for example, a circuit element or wiring having a resistance value higher than 0 Ω. Therefore, in this specification, the term "resistive element" includes, for example, wiring having a resistance value, a transistor in which current flows from drain to source, a diode, or a coil. Therefore, the term "resistive element" may be replaced with, for example, terms such as "resistance," "load," or "region having a resistance value." Conversely, the terms "resistance," "load," or "region having a resistance value" may be replaced with, for example, terms such as "resistive element." The resistance value may be, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and even more preferably 10 mΩ or more and 1 Ω or less. Furthermore, for example, the resistance value may be, for example, 1 Ω or more and 1×10 ９ It may be set to Ω or less.

[0558] When a wiring is used as a resistor, the resistance value of the resistor may be determined by the length of the wiring. Alternatively, the resistor may use a conductor having a different resistivity from the conductor used as the wiring. Alternatively, when a semiconductor is used as a resistor, the resistance value of the resistor may be determined by doping impurities into the semiconductor.

[0559] Furthermore, in this specification, the term "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0 F, a region of wiring having a capacitance value higher than 0 F, a parasitic capacitance, or a gate capacitance of a transistor. Therefore, in this specification, the term "capacitive element" is not limited to a circuit element including a pair of electrodes and a dielectric between the electrodes. The term "capacitive element" also includes, for example, a parasitic capacitance occurring between wirings, or a gate capacitance occurring between one of the source or drain of a transistor and the gate. Furthermore, terms such as "capacitive element," "parasitic capacitance," or "gate capacitance" can be replaced with terms such as "capacitance." Conversely, the term "capacitance" can be replaced with terms such as "capacitive element," "parasitic capacitance," or "gate capacitance." Furthermore, the term "pair of electrodes" in a "capacitive element" can be replaced with, for example, a "pair of conductors," a "pair of conductive regions," or a "pair of regions." The capacitance value can be, for example, 0.05 fF or more and 10 pF or less. Alternatively, it may be set to, for example, 1 pF or more and 10 μF or less.

[0560] In this specification and the like, a transistor has three terminals called a gate (also referred to as a gate terminal, a gate region, or a gate electrode), a source (also referred to as a source terminal, a source region, or a source electrode), and a drain (also referred to as a drain terminal, a drain region, or a drain electrode). A transistor also has a region where a channel is formed between the drain and the source (also referred to as a channel formation region). A transistor can pass a current between the source and the drain through the channel formation region. The channel formation region is a region through which a current mainly flows. A gate is a control terminal between the source and the drain that controls the amount of current flowing in the channel formation region. The two terminals that function as a source or a drain are input / output terminals of the transistor.

[0561] Note that one of the two input / output terminals serves as a source and the other as a drain depending on the conductivity type of the transistor (n-channel or p-channel) and the level of the potential applied to the three terminals of the transistor. Furthermore, for example, when the direction of current changes during circuit operation, the function as a source and the function as a drain may be interchanged. For this reason, the terms "source" and "drain" are interchangeable in this specification. Furthermore, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) or "the other of the source or drain" (or second electrode or second terminal) are used.

[0562] Depending on the structure, a transistor may have a back gate in addition to the three terminals described above. In this case, in this specification, one of the gate or the back gate of the transistor may be referred to as a first gate, and the other of the gate or the back gate of the transistor may be referred to as a second gate. Furthermore, for the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, when a transistor has three or more gates, in this specification, each gate may be referred to as, for example, a first gate, a second gate, or a third gate.

[0563] In this specification, a transistor having a multi-gate structure with two or more gate electrodes can be used. A multi-gate transistor has channel formation regions connected in series, resulting in a structure in which multiple transistors are connected in series. Therefore, a multi-gate transistor can reduce off-state current and improve the transistor's breakdown voltage (improved reliability). Furthermore, when a multi-gate transistor operates in the saturation region, even if the voltage between the drain and source changes, the current between the drain and source does not change significantly, resulting in a voltage-current characteristic with a flat slope. A transistor having a voltage-current characteristic with a flat slope can realize an ideal current source circuit or an active load with a very high resistance value. As a result, a transistor having a voltage-current characteristic with a flat slope can realize, for example, a differential circuit or a current mirror circuit with good characteristics.

[0564] Furthermore, in this specification, when a single circuit element is illustrated on a circuit diagram, the circuit element may include multiple circuit elements. For example, when a single resistor is illustrated on a circuit diagram, the resistor is considered to include two or more resistors connected in series. For example, when a single capacitor is illustrated on a circuit diagram, the capacitor is considered to include two or more capacitors connected in parallel. For example, when a single transistor is illustrated on a circuit diagram, the transistor is considered to include two or more transistors connected in series, with the gates of the respective transistors connected to each other. Similarly, when a single switch is illustrated on a circuit diagram, the switch is considered to include two or more transistors, with the two or more transistors connected in series or in parallel, and with the gates of the respective transistors connected to each other.

[0565] Furthermore, in this specification and the like, a "node" can be rephrased as a "terminal," "wiring," "electrode," "conductive layer," "conductor," or "impurity region," depending on, for example, the circuit configuration or the device structure. Furthermore, for example, a "terminal" or "wiring" can be rephrased as a "node."

[0566] Furthermore, in this specification, "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be interchanged with "potential." Note that ground potential does not necessarily mean 0 V. Furthermore, potential is relative. In other words, a change in the reference potential will change, for example, the potential applied to wiring, the potential applied to a circuit, or the potential output from a circuit.

[0567] Furthermore, in this specification and the like, the terms "high-level potential (also referred to as "high-level potential," "H potential," or "H")" and "low-level potential (also referred to as "low-level potential," "L potential," or "L")" do not refer to any particular potential. For example, when two wirings are both described as "functioning as wirings that supply a high-level potential," the high-level potentials provided by both wirings do not have to be equal to each other. Similarly, when two wirings are both described as "functioning as wirings that supply a low-level potential," the low-level potentials provided by both wirings do not have to be equal to each other.

[0568] Furthermore, in this specification, "electric current" refers to the phenomenon of charge transfer (electrical conduction). For example, the statement "electrical conduction of positively charged bodies is occurring" can be rephrased as "electrical conduction of negatively charged bodies is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "electric current" refers to the phenomenon of charge transfer (electrical conduction) associated with the movement of carriers. Examples of carriers include electrons, holes, anions, cations, and complex ions. Note that carriers vary depending on the system through which the current flows (e.g., semiconductor, metal, electrolyte, vacuum, etc.). Furthermore, the "direction of current" in, for example, wiring, is the direction in which positive carriers move and is expressed as a positive current amount. In other words, the direction in which negative carriers move is opposite to the direction of current and is expressed as a negative current amount. Therefore, in this specification and the like, unless otherwise specified regarding the positive or negative sign of a current (or the direction of the current), for example, a statement such as "current flows from element A to element B" can be rephrased as "current flows from element B to element A," etc. Furthermore, for example, a statement such as "current is input to element A" can be rephrased as "current is output from element A," etc.

[0569] Furthermore, in this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion between components. Therefore, they do not limit the number of components. Furthermore, they do not limit the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be referred to as "second" in another embodiment or in the claims. Furthermore, for example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0570] Furthermore, in this specification, terms indicating arrangement, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to drawings. Furthermore, the positional relationship between components changes as appropriate depending on the orientation in which each component is depicted. Therefore, terms indicating arrangement described in this specification are not limited to these terms and can be rephrased appropriately. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing by 180 degrees. Furthermore, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the left (or right) surface of a conductor" by rotating the orientation of the drawing by 90 degrees.

[0571] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A in direct contact with it, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0572] Furthermore, in this specification, terms such as "row" or "column" may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, terms such as "row" or "column" used in this specification are not limited to these terms and can be rephrased appropriately. For example, the expression "row direction" can be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.

[0573] Furthermore, in this specification and the like, for example, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" is not limited to the state in which electrode B is formed on insulating layer A. The expression "electrode B overlapping insulating layer A" does not exclude, for example, the state in which electrode B is formed under insulating layer A, or the state in which electrode B is formed on the right (or left) side of insulating layer A.

[0574] Furthermore, in this specification and the like, the terms "adjacent" or "close to" do not limit components to being in direct contact with each other. For example, the expression "electrode B adjacent to insulating layer A" does not necessarily mean that insulating layer A and electrode B are formed in direct contact with each other, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0575] Furthermore, in this specification and the like, terms such as "film" or "layer" may be interchangeable. For example, the term "conductive layer" may be interchangeable with the term "conductive film." For example, the term "insulating film" may be interchangeable with the term "insulating layer." Furthermore, terms such as "film" or "layer" may be interchangeable with other terms without using those terms. For example, the term "conductive layer" or "conductive film" may be interchangeable with the term "conductor." Furthermore, the term "conductor" may be interchangeable with the term "conductive layer" or "conductive film." For example, the term "insulating layer" or "insulating film" may be interchangeable with the term "insulator." Furthermore, the term "insulator" may be interchangeable with the term "insulating layer" or "insulating film."

[0576] Furthermore, in this specification and the like, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" or "wiring" include, for example, cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes, for example, cases where multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal." Furthermore, for example, a "terminal" can be part of a "wiring" or "electrode." Furthermore, for example, terms such as "electrode," "wiring," or "terminal" may be replaced with terms such as "region."

[0577] Furthermore, in this specification and the like, for example, terms such as "signal line" or "power line" may be changed to the term "wiring." Furthermore, for example, the term "potential" applied to wiring may be changed to the term "signal." The same is true in reverse, for example, terms such as "signal" may be changed to the term "potential."

[0578] In addition, in this specification, a "switch" has multiple terminals and has the function of switching (selecting) conduction or non-conduction between the terminals. For example, if a switch has two terminals and both terminals are conductive, the switch is said to be in a "conductive state" or "on state." Also, if both terminals are non-conductive, the switch is said to be in a "non-conductive state" or "off state." Note that switching the switch to either the conductive state or the non-conductive state, or maintaining either the conductive state or the non-conductive state, may be referred to as "controlling the conduction state."

[0579] In other words, a switch is a device that has the function of controlling whether or not a current flows. Alternatively, a switch is a device that has the function of selecting and switching a path through which a current flows. For example, an electrical switch or a mechanical switch can be used as the switch. In other words, the switch is not limited to a specific type.

[0580] There are types of switches that are normally in a non-conductive state but can be made conductive by controlling the conductive state, and these switches are sometimes called "contact A." There are also types of switches that are normally in a conductive state but can be made non-conductive by controlling the conductive state, and these switches are sometimes called "contact B."

[0581] Examples of electrical switches include transistors (e.g., bipolar transistors or MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, or diode-connected transistors), and logic circuits that combine these. Note that when a transistor is operated simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0582] An example of a mechanical switch is a switch that uses MEMS (microelectromechanical systems) technology. Such a switch has an electrode that can be mechanically moved, and the movement of the electrode selects a conductive state or a non-conductive state.

[0583] In this specification, the "channel length" of a transistor may refer to, for example, the distance between the source and drain in a region where the semiconductor (or the portion in the semiconductor through which current flows when the transistor is on) and the gate overlap, or the distance between the source and drain in a region where a channel is formed.

[0584] In addition, in this specification, the "channel width" of a transistor may refer to, for example, the length of the portion where the source and drain face each other in a region where the semiconductor (or the portion where current flows in the semiconductor when the transistor is on) and the gate overlap, or the length of the portion where the source and drain face each other in a region where a channel is formed.

[0585] In this specification and the like, terms such as "substrate," "wafer," or "die" do not limit the functionality of these components. For example, terms such as "substrate," "wafer," or "die" may be used interchangeably.

[0586] In this specification, "parallel" does not necessarily mean strictly parallel. Therefore, the term "parallel" can be appropriately interchangeable with terms such as "approximately parallel," "generally parallel," or "substantially parallel." "Parallel," "generally parallel," "generally parallel," or "substantially parallel" can include, for example, a state in which two lines or planes are arranged at an angle of -5° or more and 5° or less. Alternatively, they can include a state in which two lines or planes are arranged at an angle of -10° or more and 10° or less. Alternatively, they can include a state in which two lines or planes are arranged at an angle of -30° or more and 30° or less. Therefore, "parallel" can mean, for example, "parallel or roughly parallel." Furthermore, "perpendicular" does not necessarily mean strictly perpendicular. Therefore, the term "perpendicular" can be appropriately interchangeable with terms such as "generally perpendicular," "generally perpendicular," or "substantially perpendicular." "Perpendicular," "generally perpendicular," "generally perpendicular," or "substantially perpendicular" can include, for example, a state in which two lines or planes are arranged at an angle of 85° or more and 95° or less. Alternatively, it may include a state in which two straight lines or planes are arranged at an angle of 80° or more and 100° or less. Alternatively, it may include a state in which two straight lines or planes are arranged at an angle of 60° or more and 120° or less. Therefore, "perpendicular" may mean, for example, "perpendicular or approximately perpendicular."

[0587] In this specification, "equal heights" refers to the same height from a reference surface (e.g., a flat surface such as a substrate surface) in a cross-sectional view. For example, in a semiconductor device manufacturing process, a planarization process may expose the surface of a single layer or multiple layers. In this case, the surfaces to be planarized have the same height from the reference surface. However, depending on the processing equipment, processing method, or material of the processed surface during the planarization process, the heights of multiple layers may not be strictly equal. In this specification, "equal heights" is also used. For example, when there are two layers (here, a first layer and a second layer) with different heights relative to a reference surface, the difference between the height of the top surface of the first layer and the height of the top surface of the second layer is 20 nm or less. Therefore, "equal heights" may mean, for example, "equal heights or approximately equal heights."

[0588] In this specification, "edges coincide" means that, when viewed from above, at least a portion of the contours of stacked layers overlap. For example, this includes cases in which, in a semiconductor device manufacturing process, upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the contour of the upper layer may be located inside the contour of the lower layer, or the contour of the upper layer may be located outside the contour of the lower layer. In this specification, this case is also referred to as "edges coincide." Therefore, "edges coincide" can mean, for example, "edges coincide or approximately coincide."

[0589] In this specification, for example, when referring to counting values ​​and measurement values, or to things, methods, events, etc. that can be converted into counting values ​​or measurement values, terms such as "identical," "same," "equal," "simultaneous," "match," or "uniform" (including synonyms thereof) include an error of plus or minus 20% unless otherwise specified. Thus, for example, "identical" may mean "identical or approximately identical," "same" may mean "same or approximately the same," "equal" may mean "equal or approximately equal," "simultaneous" may mean "simultaneous or approximately simultaneous," "match" may mean "match or approximately match," and "uniform" may mean "uniform or approximately uniform."

[0590] In this specification and the like, the term "impurity" in a semiconductor refers to, for example, a substance other than the main component constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities in a semiconductor may, for example, increase the defect state density of the semiconductor, decrease the carrier mobility, or decrease the crystallinity. When the semiconductor is an oxide semiconductor, examples of impurities that change the characteristics of the semiconductor include Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component of the oxide semiconductor. In particular, examples of impurities include hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. For example, the inclusion of impurities in an oxide semiconductor may cause oxygen vacancies in the oxide semiconductor.

[0591] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into, for example, oxide insulators, oxide conductors (including transparent oxide conductors), and oxide semiconductors (also referred to as oxide semiconductors or simply as OSs). For example, when a metal oxide is used as a semiconductor including a channel formation region of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, when a metal oxide is used as a material capable of forming a channel formation region of a transistor having at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor. Furthermore, the term "OS transistor" can be rephrased as a transistor including a metal oxide or an oxide semiconductor.

[0592] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0593] In addition, in drawings and the like relating to this specification, arrows indicating the X direction, Y direction, and Z direction may be used. In this specification, the "X direction" refers to the direction along the X axis, and the forward direction and the reverse direction may not be distinguished unless explicitly stated. The same applies to the "Y direction" and the "Z direction." The X direction, Y direction, and Z direction are directions that intersect with each other. For example, the X direction, Y direction, and Z direction are directions that are perpendicular to each other. In this specification, one of the X direction, Y direction, and Z direction may be referred to as the "first direction" or "first direction." The other may be referred to as the "second direction" or "second direction." The remaining one may be referred to as the "third direction" or "third direction."

[0594] 100: semiconductor device, 100<2>: semiconductor device, 100A: semiconductor device, 100B: semiconductor device, 100C: semiconductor device, 600: transistor, 600a: transistor, 600b: transistor, 600c: transistor, 600d: transistor, 600e: transistor, 600B: transistor, 610: conductor, 612: conductor, 614: conductor, 620: insulator, 630: conductor, 630e: conductor, 640: insulator, 640a: insulator, 640b: insulator, 640c: insulator, 640d: insulator, 648: opening, 648a: opening, 64 8b: opening, 648c: opening, 648d: opening, 648e: opening, 650: oxide, 650a: oxide, 650b: oxide, 650c: oxide, 650d: oxide, 650e: oxide, 650i: region, 650na: region, 650nb: region, 660: conductor, 660a: conductor, 660b: conductor, 660c: conductor, 660d: conductor, 660e: conductor, 670: conductor, 670a: conductor, 670b: conductor, 670c: conductor, 670d: conductor, 672: insulator, 672a: insulator, 672b: insulator, 672c: insulator, 672d: insulator, 676a: opening, 676b: opening, 676c: opening, 676d: opening, 678: insulator, 680: conductor, 682: insulator, M11: transistor, M12: transistor, M13: transistor, M14: transistor, SIG: wiring, VLD: wiring, VLS: wiring, 500: transistor, 500F: transistor, 503: conductor, 503a: conductor, 503b: conductor, 512: insulator, 514: insulator, 516: insulator, 521: insulator, 522: insulator, 524: insulator, 530: oxide, 530a: oxide, 530b: oxide, 530c: Oxide, 540: conductor, 540a: conductor, 540b: conductor, 541: insulator, 541a: insulator, 541b: insulator, 542: conductor, 54...

Claims

a first conductive layer including a region that functions as one of a source and a drain of a first transistor and extending in a first direction; a second conductive layer located on the first conductive layer and including a region that functions as the other of the source or drain of the first transistor; a first semiconductor layer including a channel formation region of the first transistor; a third conductive layer having a shape along a side surface of the first semiconductor layer, including a region that functions as a gate of the first transistor, a region that functions as one of a source or a drain of a second transistor on the first transistor, and a region that contacts the second conductive layer, and extending in a second direction intersecting the first direction; a fourth conductive layer located on the third conductive layer and including a region that functions as the other of the source and the drain of the second transistor; a second semiconductor layer including a channel formation region of the second transistor; a fifth conductive layer having a shape along a side surface of the second semiconductor layer, including a region that functions as a gate of the second transistor and a region that is in contact with the fourth conductive layer, and extending in the first direction; one of the first conductive layer and the fifth conductive layer functions as a first power supply line; the other of the first conductive layer and the fifth conductive layer functions as a second power supply line to which a potential higher than a potential applied to the first power supply line is applied; the third conductive layer functions as a signal line to which a signal having a potential equal to or higher than the first power supply line and equal to or lower than the second power supply line is applied. Semiconductor device. 　 In claim 1, a channel length of the first transistor is smaller than a channel width of the first transistor; The channel length of the second transistor is smaller than the channel width of the second transistor. Semiconductor device. 　 In claim 1, Each of the first semiconductor layer and the second semiconductor layer includes an oxide semiconductor. Semiconductor device. 　 In claim 1, the first conductive layer has a function as the second power supply line, the fifth conductive layer functions as the first power supply line; Semiconductor device.

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