Light-emitting substrate, manufacturing method therefor, and display apparatus

Abstract

A light-emitting substrate, a manufacturing method therefor, and a display apparatus. The light-emitting substrate comprises a base substrate and a light-emitting device located on the base substrate. The light-emitting device comprises: a light-emitting layer, located on the base substrate, the light-emitting layer comprising a bottom surface facing the side of the base substrate, a top surface facing away from the side of the base substrate, and a first side surface, a second side surface, a third side surface and a fourth side surface which connect the bottom surface and the top surface, the first side surface and the second side surface being oppositely arranged, and the third side surface and the fourth side surface being oppositely arranged; a first electrode group, comprising a first electrode and a second electrode, the first electrode being provided on the base substrate and located on the side of the first side surface away from the light-emitting layer, the second electrode being provided on the base substrate and located on the side of the second side surface away from the light-emitting layer; and a second electrode group, comprising a third electrode and a fourth electrode, the third electrode being provided on the base substrate and located on the side of the third side surface away from the light-emitting layer, and the fourth electrode being provided on the base substrate and located on the side of the fourth side surface away from the light-emitting layer. The first electrode, the second electrode, the third electrode and the fourth electrode are independent of each other.

Description

Light-emitting substrate, manufacturing method thereof, and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting substrate and a manufacturing method thereof, and a display device. Background Art

[0002] For quantum dot light-emitting diode (QLED) and organic light-emitting diode (OLED) displays, key characteristics such as external quantum efficiency (EQE), brightness, and lifetime are all related to carrier injection. Theoretically, when carrier injection is balanced, device properties reach optimal levels. However, existing QLED and OLED displays struggle to achieve true carrier injection balance, and once the devices are fabricated, there's little room or means for active adjustment.

[0003] Summary of the Invention

[0004] The present disclosure provides a light-emitting substrate, a method for manufacturing the same, and a display device. The specific solutions are as follows:

[0005] The present disclosure provides a light-emitting substrate, comprising a base substrate and a light-emitting device located on the base substrate; the light-emitting device comprises:

[0006] a light-emitting layer located on the substrate; the light-emitting layer comprising: a bottom surface facing the substrate, a top surface facing away from the substrate, and a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the bottom surface and the top surface; wherein the first side surface and the second side surface are disposed opposite to each other, and the third side surface and the fourth side surface are disposed opposite to each other;

[0007] a first electrode group, comprising a first electrode and a second electrode, wherein the first electrode is located on the substrate and on a side of the first side away from the light-emitting layer, and the second electrode is located on the substrate and on a side of the second side away from the light-emitting layer;

[0008] The second electrode group includes a third electrode and a fourth electrode, wherein the third electrode is located on the base substrate and is located on the side of the third side away from the light-emitting layer, and the fourth electrode is located on the base substrate and is located on the side of the fourth side away from the light-emitting layer; wherein the first electrode, the second electrode, the third electrode and the fourth electrode are arranged independently of each other.

[0009] In a possible implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, the light-emitting device further includes:

[0010] a first carrier layer, located between at least one electrode in the first electrode group and the light-emitting layer;

[0011] The second carrier layer is located between at least one electrode in the second electrode group and the light-emitting layer.

[0012] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, the first carrier layer is provided between the first electrode and the light-emitting layer and between the second electrode and the light-emitting layer;

[0013] The second carrier layer is provided between the third electrode and the light-emitting layer and between the fourth electrode and the light-emitting layer.

[0014] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, the first carrier layer includes at least one of an electron transport layer and an electron injection layer, the second carrier layer includes at least one of a hole transport layer and a hole injection layer, the first carrier is an electron, and the second carrier is a hole; wherein, in the case where the first carrier layer includes an electron transport layer and an electron injection layer, the electron transport layer is arranged close to the light-emitting layer; in the case where the second carrier layer includes a hole transport layer and a hole injection layer, the hole transport layer is arranged close to the light-emitting layer.

[0015] In a possible implementation, the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure further includes a pixel defining layer located on the base substrate, the pixel defining layer having a pixel opening, and the light-emitting device is located in the pixel opening; wherein,

[0016] The orthographic projection shape of the pixel opening on the base substrate is a square.

[0017] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, the first carrier layer and the second carrier layer are arranged independently of each other, or the first carrier layer and the second carrier layer are arranged in contact with each other.

[0018] In a possible implementation, the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure further includes a pixel defining layer located on the base substrate, the pixel defining layer having a pixel opening, and the light-emitting device is located in the pixel opening; wherein,

[0019] The orthographic projection shape of the pixel opening on the substrate includes: a square opening, and a first opening, a second opening, a third opening and a fourth opening respectively connected to each side of the square opening and away from one side of the square opening; wherein adjacent openings among the first opening, the second opening, the third opening and the fourth opening are arranged at intervals, and the square opening and the first opening, the second opening, the third opening and the fourth opening are mutually connected.

[0020] In a possible implementation, in the above-mentioned light-emitting substrate provided by an embodiment of the present disclosure, the first electrode is located in the first opening, the second electrode is located in the second opening, the third electrode is located in the third opening, and the fourth electrode is located in the fourth opening;

[0021] The first carrier layer is located in the first opening and / or the second opening, and the second carrier layer is located in the third opening and / or the fourth opening;

[0022] The light-emitting layer at least covers the square opening and is disposed in contact with the first carrier layer and the second carrier layer.

[0023] In a possible implementation, the light-emitting substrate provided in the embodiment of the present disclosure further includes: a planar layer located on a side of the base substrate facing the light-emitting layer, a driving circuit layer located between the planar layer and the base substrate, and an encapsulation layer located on a side of the light-emitting layer facing away from the base substrate;

[0024] The driving circuit layer includes: a first driving circuit arranged in a one-to-one correspondence with the first electrode group, and a second driving circuit arranged in a one-to-one correspondence with the second electrode group; wherein, the first electrode is electrically connected to the first driving circuit through a first via hole penetrating the flat layer, the second electrode is electrically connected to the first driving circuit through a second via hole penetrating the flat layer, the third electrode is electrically connected to the second driving circuit through a third via hole penetrating the flat layer, and the fourth electrode is electrically connected to the second driving circuit through a fourth via hole penetrating the flat layer.

[0025] In a possible implementation, the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure further includes a metal reflective layer located between the flat layer and the light-emitting layer, and the orthographic projection of the metal reflective layer on the base substrate does not overlap with the orthographic projection of the first electrode group and the second electrode group on the base substrate.

[0026] In a possible implementation, the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure further includes a metal reflective layer located between the encapsulation layer and the light-emitting layer, and the orthographic projection of the metal reflective layer on the base substrate does not overlap with the orthographic projection of the first electrode group and the second electrode group on the base substrate.

[0027] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, along the direction from the first electrode to the second electrode, the thickness of the light-emitting layer is 20 nm to 750 nm;

[0028] Along the direction from the third electrode to the fourth electrode, the thickness of the light-emitting layer is 20 nm to 750 nm.

[0029] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, along the direction from the first electrode to the second electrode, the thickness of the electron injection layer is 20 nm to 250 nm, and the thickness of the electron transport layer is 20 nm to 250 nm;

[0030] Along the direction from the third electrode to the fourth electrode, the thickness of the hole injection layer is 5 nm to 150 nm, and the thickness of the hole transport layer is 5 nm to 200 nm.

[0031] In a possible implementation, in the above-mentioned light-emitting substrate provided by an embodiment of the present disclosure, along the direction from the first electrode to the second electrode, the thickness of the first electrode and the thickness of the second electrode are 50 nm to 400 nm;

[0032] Along the direction from the third electrode to the fourth electrode, the thickness of the third electrode and the thickness of the fourth electrode are 50 nm to 400 nm.

[0033] In a possible implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, the height of the pixel electrode layer is 150 nm to 2000 nm, and the height of the light-emitting layer is 10 nm to 500 nm;

[0034] The height of the first electrode group and the second electrode group is greater than or equal to 100 nm and less than or equal to the height of the pixel electrode layer+40 nm;

[0035] The heights of the first carrier layer and the second carrier layer are greater than or equal to 50 nm and less than or equal to the first height+20 nm, and the first height is the smallest height between the first electrode group and the second electrode group.

[0036] Correspondingly, an embodiment of the present disclosure further provides a display device, comprising any of the above-mentioned light-emitting substrates provided by the embodiment of the present disclosure.

[0037] Accordingly, the present disclosure also provides a method for manufacturing a light-emitting substrate, comprising:

[0038] providing a substrate;

[0039] forming a first electrode group on the base substrate, wherein the first electrode group includes a first electrode and a second electrode arranged opposite to each other;

[0040] forming a second electrode group on the substrate, the second electrode group comprising a third electrode and a fourth electrode disposed opposite to each other; wherein the first electrode, the second electrode, the third electrode, and the fourth electrode form a ring structure, and the first electrode, the second electrode, the third electrode, and the fourth electrode are disposed independently of each other;

[0041] A light-emitting layer is formed on the substrate and located within the annular structure; the light-emitting layer includes: a bottom surface facing the substrate, a top surface facing away from the substrate, and a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the bottom surface and the top surface; wherein the first side surface and the second side surface are arranged opposite to each other, the third side surface and the fourth side surface are arranged opposite to each other, the first electrode is located on a side of the first side surface away from the light-emitting layer, the second electrode is located on a side of the second side surface away from the light-emitting layer, the third electrode is located on a side of the third side surface away from the light-emitting layer, and the fourth electrode is located on a side of the fourth side surface away from the light-emitting layer.

[0042] In a possible implementation, in the above-mentioned manufacturing method provided in the embodiment of the present disclosure, before forming the light-emitting layer, the method further includes:

[0043] forming a first carrier layer between the first electrode and the light-emitting layer and / or between the second electrode and the light-emitting layer;

[0044] A second carrier layer is formed between the third electrode and the light-emitting layer and / or between the fourth electrode and the light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] FIG1 is a schematic structural diagram of a light emitting device provided in the related art;

[0046] FIG2 is a schematic structural diagram of a light emitting device provided by an embodiment of the present disclosure;

[0047] FIG3A is a schematic structural diagram of another light-emitting device provided in an embodiment of the present disclosure;

[0048] FIG3B shows the shape of the pixel opening in FIG3A ;

[0049] FIG4 is a JV (current-voltage) test performed on a contact setting and a non-contact setting between the first carrier layer and the second carrier layer according to the present disclosure;

[0050] FIG5 is a schematic diagram of the electron flow direction and the hole flow direction in the light-emitting device provided by the present disclosure;

[0051] FIG6 is a schematic cross-sectional view along the CC' direction in FIG2 and FIG3A;

[0052] FIG7 is another cross-sectional schematic diagram along the CC' direction in FIG2 and FIG3A;

[0053] FIG8 is a schematic cross-sectional view along the DD′ direction in FIG2 and FIG3A;

[0054] FIG9 is another cross-sectional schematic diagram along the DD′ direction in FIG2 and FIG3A;

[0055] FIG10 is a schematic diagram showing the thickness and energy level values ​​of each film layer in the HOD device along the direction from the third electrode to the fourth electrode;

[0056] FIG11 is a schematic diagram showing the change in current density J of the HOD device corresponding to different QD thicknesses;

[0057] FIG12 is a schematic diagram showing the change in current density J of the HOD device corresponding to different simulated voltages;

[0058] FIG13 is a schematic diagram showing the thickness and energy level values ​​of each film layer in the EOD device along the direction from the first electrode to the second electrode;

[0059] FIG14 is a schematic diagram showing the change in current density J of the EOD device corresponding to different QD thicknesses;

[0060] FIG15 is a schematic diagram showing the change in current density J of an EOD device corresponding to different simulated voltages;

[0061] FIG16 is a schematic flow chart of a method for manufacturing a light-emitting substrate according to an embodiment of the present disclosure;

[0062] FIG17 is a schematic flow chart of a method for manufacturing another light-emitting substrate provided in an embodiment of the present disclosure;

[0063] 18A to 18O are schematic structural diagrams of the light emitting device shown in FIG. 2 after each step is performed in the manufacturing process according to the embodiment of the present disclosure;

[0064] 19A to 19O are schematic structural diagrams of the light emitting device shown in FIG. 3A after each step is performed in the manufacturing process according to the embodiment of the present disclosure;

[0065] FIG20 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0066] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0067] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words “include” or “comprise” and the like used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The words “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0068] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0069] The existing self-luminous QLED or OLED device structures are all based on a stacked structure, that is, the functional layers are stacked in parallel, as shown in Figure 1, including a cathode 10, an electron transport layer 20, a light-emitting layer 30, a hole transport layer 40, a hole injection layer 50, an anode 60, etc. stacked in sequence. From the cathode 10 to the anode 60, the functional layers are stacked layer by layer to form a stacked structure in which the functional layers are parallel to each other. And on the basis of the stacked device structure framework shown in Figure 1, the device performance is improved, including external quantum efficiency (EQE), brightness, life, etc. However, the performance of these devices is related to the injection of carriers. In theory, the performance of all aspects of the device will reach the optimal level when the carrier injection balance is achieved. Traditional stacked devices mainly adjust carrier balance by regulating the various characteristics of the materials of each functional layer (such as energy level, mobility, work function, refractive index, cleanliness, etc.) and the parameters of the film layer itself (film thickness, morphology, roughness, interface, etc.). The purpose is to achieve matching of performance parameters between the functional layers to achieve carrier injection balance in the light-emitting layer 30, so that the carriers can be effectively recombined into excitons to achieve the best performance of QLED or OLED devices. However, the parameters that need to be regulated are very complex. Changes in material performance parameters and interfaces between layers have a huge number of combined factors that may affect injection and device efficiency. This makes it difficult to take all factors into consideration during the optimization and regulation process, and it is also difficult to truly achieve carrier injection balance. In addition, after the stacked structure device is manufactured, the device properties are basically determined, and there are no effective means and methods for regulation.

[0070] In view of this, an embodiment of the present disclosure provides a light-emitting substrate, as shown in FIG2 and FIG3A , including a base substrate 1 and a light-emitting device 2 located on the base substrate 1; the light-emitting device 2 includes:

[0071] The light-emitting layer 21 is located on the base substrate 1. The light-emitting layer 21 includes a bottom surface A1 facing the base substrate 1, a top surface A2 facing away from the base substrate 1, and a first side surface A3, a second side surface A4, a third side surface A5, and a fourth side surface A6 connecting the bottom surface A1 and the top surface A2. The first side surface A3 and the second side surface A4 are arranged opposite to each other, and the third side surface A5 and the fourth side surface A6 are arranged opposite to each other.

[0072] a first electrode group (22 and 23), comprising a first electrode 22 and a second electrode 23, wherein the first electrode 22 is located on the base substrate 1 and on a side of the first side A3 away from the light-emitting layer 21, and the second electrode 23 is located on the base substrate 1 and on a side of the second side A4 away from the light-emitting layer 21;

[0073] The second electrode group (24 and 25) includes a third electrode 24 and a fourth electrode 25. The third electrode 24 is located on the base substrate 1 and on the side of the third side A5 away from the light-emitting layer 21. The fourth electrode 25 is located on the base substrate 1 and on the side of the fourth side A6 away from the light-emitting layer 21; wherein the first electrode 22, the second electrode 23, the third electrode 24 and the fourth electrode 25 are arranged independently of each other.

[0074] The above-mentioned light-emitting substrate provided in the embodiment of the present disclosure arranges the functional layers of the light-emitting device on the same plane, that is, the shape of the light-emitting device can be approximated to a vertical orthogonal device structure. By applying different bias voltages on the two sets of electrodes, the holes and electrons in the light-emitting device can be separately regulated, thereby making it easier to achieve a true injection balance of holes and electrons.

[0075] Optionally, the substrate may be a flexible substrate or a rigid substrate. The flexible substrate may be, for example, a PI substrate, and the rigid substrate may be, for example, a glass substrate.

[0076] Optionally, the light-emitting layer in the light-emitting device provided in the embodiments of the present disclosure may be a quantum dot light-emitting layer or an organic light-emitting layer, but is certainly not limited thereto.

[0077] Optionally, when the light-emitting layer is a quantum dot light-emitting layer, the quantum dots used to make the quantum dot light-emitting layer include but are not limited to CdS, CdSe, ZnSe, ZnTeSe, InP, PbS, CsPbCl3, CsPbBr3, CsPbI3, CdS / ZnS, CdSe / ZnS, ZnSe, ZnSeTe, InP / ZnS, PbS / ZnS, CsPbCl3 / ZnS, CsPbBr3 / ZnS, CsPbI3 / ZnS, CdS / ZnSeS / ZnS, CdSe / ZnSeS / ZnS, ZnSe / ZnSeS / ZnS, ZnSeTe / ZnSeS / ZnS, InP / ZnS, PbS / ZnS, CsPbCl3 / ZnS, CsPbBr3 / ZnS, CsPbI3 / ZnS and other quantum dots. Optionally, the shape of the quantum dots includes but is not limited to spherical, round, ellipsoidal, polyhedral, rod-shaped, cross-shaped, ring-shaped, and other quantum dot materials of any geometric shape.

[0078] In a specific implementation, the principle of light emission of an electroluminescent device is that holes from the anode and electrons from the cathode are transferred to the light-emitting layer to recombine and emit light. Due to the difference in energy level barriers between the anode and the light-emitting layer and between the cathode and the light-emitting layer, the transmission of electrons and holes is difficult and the transmission rate and quantity are also very different. Therefore, in order to balance the concentration of electrons and holes, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, the light-emitting device 2 further includes:

[0079] The first carrier layer 27 is located between at least one electrode (the first electrode 22 and / or the second electrode 23) in the first electrode group (22 and 23) and the light-emitting layer 21; thus, first carriers can be injected into the first carrier layer 27 through the first electrode 22 and / or the second electrode 23. The first carriers can be electrons or holes.

[0080] The second carrier layer 28 is located between at least one electrode (the third electrode 24 and / or the fourth electrode 25) in the second electrode group (24 and 25) and the light-emitting layer 21; in this way, the second carrier can be injected into the second carrier layer 28 through the third electrode 24 and / or the fourth electrode 25. When the first carrier is an electron, the second carrier is a hole; when the first carrier is a hole, the second carrier is an electron.

[0081] In a specific implementation, in order to more effectively balance the concentrations of electrons and holes injected into the light-emitting layer, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in FIG2 and FIG3A , a first carrier layer 27 is provided between the first electrode 22 and the light-emitting layer 21 and between the second electrode 23 and the light-emitting layer 21;

[0082] A second carrier layer 28 is provided between the third electrode 24 and the light-emitting layer 21, and between the fourth electrode 25 and the light-emitting layer 21. Optionally, the first carrier layer 27 includes at least one of an electron transport layer 271 and an electron injection layer (not shown), and the second carrier layer 28 includes at least one of a hole transport layer 281 and a hole injection layer 282. The first carriers are electrons, and the second carriers are holes. When the first carrier layer 27 includes the electron transport layer 271 and the electron injection layer, the electron transport layer 271 is disposed adjacent to the light-emitting layer 21; when the second carrier layer 28 includes the hole transport layer 281 and the hole injection layer 282, the hole transport layer 281 is disposed adjacent to the light-emitting layer 21. In this way, the first carrier and the second carrier can pass through film layers of different thicknesses to reach the light-emitting layer 21. The difference in transmission distance can be used to regulate the injection efficiency of electrons and holes, so that different carriers can be balanced. In addition, the present disclosure also realizes separate regulation of holes and electrons in the light-emitting device by applying different bias voltages to the two sets of electrodes, thereby making it easier to achieve true injection balance of holes and electrons.

[0083] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, the light-emitting device 2 has two groups of parallel electrode groups, an electron transport layer 271 and a light-emitting layer 21 are provided between the first electrode 22 and the second electrode 23, and the layers are arranged in parallel; a hole injection layer 282, a hole transport layer 281 and a light-emitting layer 21 are provided between the third electrode 24 and the fourth electrode 25, and the layers are arranged in parallel. The structure of the light-emitting device 2 can be a vertical (or approximately vertical) orthogonal device structure, in which the planes where the hole injection layer 282, the hole transport layer 281 and the electron transport layer 271 are located are spatially vertical (or approximately vertical), and the first electrode 22, the second electrode 23 and the third electrode 24, the fourth electrode 25 are also vertical (or approximately vertical) to each other; the individual electrodes in the two electrode groups of the first electrode 22, the second electrode 23 and the third electrode 24, the fourth electrode 25 are parallel to each other, that is, the first electrode 22 and the second electrode 23 are parallel, and the third electrode 24 and the fourth electrode 25 are parallel; in this way, the device structure formed between the first electrode 22 and the second electrode 232 is considered to be a complete single electron device (EOD) structure, and the device structure formed between the third electrode 24 and the fourth electrode 25 is considered to be a complete single hole device (HOD) structure, and the light-emitting layer 21 between the two electrode groups is a common light-emitting layer. Therefore, the first electrode 22 and the second electrode 23 can be driven separately to adjust the concentration of electrons, and the third electrode 24 and the fourth electrode 25 can be driven separately to adjust the concentration of holes, thereby achieving a true injection balance of holes and electrons.

[0084] In specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, it also includes a pixel defining layer 3 located on the base substrate 1, the pixel defining layer 3 has a pixel opening 31, and the light-emitting device 2 is located in the pixel opening 31.

[0085] Optionally, as shown in Figure 2, the shape of the pixel opening 21 is square. Since the functional layers of the light-emitting device 2 are generally produced in the square pixel opening 21 using a photolithography process, and it is necessary to ensure that the two groups of electrodes do not contact each other, the square pixel opening 21 is more suitable for the photolithography machine with higher exposure accuracy and the corresponding etching accuracy is also higher. It can achieve the situation where the two groups of electrodes do not contact each other without the help of the pixel defining layer 3 structure, that is, the first electrode 22 does not contact the third electrode 24 and the fourth electrode 25 in space, and the second electrode 23 does not contact the third electrode 24 and the fourth electrode 25 in space.

[0086] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in FIG2 , the first carrier layer 27 and the second carrier layer 28 are independently arranged; of course, the first carrier layer 27 and the second carrier layer 28 can also be arranged in contact with each other. The inventors of this case conducted a JV (current-voltage) test on the contact setting and the non-contact setting between the first carrier layer 27 and the second carrier layer 28, as shown in Figure 4, where Curve 1 is the JV curve corresponding to the first group of QLED devices with a traditional stacked structure (structure: anode / hole injection layer / hole transport layer / quantum dot light-emitting layer / electron transport layer / cathode, Anode|HI|HT|QD|ET|Cathode), Curve 2 is the JV curve corresponding to the second group of QLED devices with a traditional stacked structure (structure: anode / hole injection layer / hole transport layer / quantum dot light-emitting layer / electron transport layer / cathode, Anode|HI|HT|QD|ET|Cathode), and Curve 3 is the JV curve corresponding to the first group of QLED devices with a traditional stacked structure without the quantum dot light-emitting layer (structure: anode / hole injection layer / hole transport layer / electron transport layer / cathode , Anode|HI|HT|ET|Cathode) corresponding to the JV curve, Curve 4 is the JV curve corresponding to the second group of QLED devices with a traditional stacked structure (structure: anode / hole injection layer / hole transport layer / electron transport layer / cathode, Anode|HI|HT|ET|Cathode) without the quantum dot light-emitting layer. The experimental results of the JV curve shown in Figure 4 show that for the QLED device with a traditional stacked structure (structure: anode / hole injection layer / hole transport layer / quantum dot light-emitting layer / electron transport layer / cathode) and the device with only the quantum dot light-emitting layer removed (structure: anode / hole injection layer / hole transport layer / electron transport layer / cathode), the current density of the two devices is not much different at the same voltage, that is, when the first carrier layer 27 and the second carrier layer 28 are in complete and direct contact, the leakage current of the diode formed is not large. Therefore, the first carrier layer 27 and the second carrier layer 28 in the present disclosure can be in contact.

[0087] As shown in FIG5 , FIG5 is a schematic diagram of the electron flow direction F1 and the hole flow direction F2 in the light emitting device. Since the first electrode group and the second electrode group are perpendicular to each other, the electric field applied by the first electrode group and the electric field applied by the second electrode group are perpendicular or approximately perpendicular to each other, respectively driving the electrons (e - ) and holes (h +) are injected into the light-emitting layer 21, and the paths to each other (the electron flow direction F1 and the hole flow direction F2) are also vertical or approximately vertical. At this time, the lateral migration of electrons and holes in the first carrier layer 27 and the second carrier layer 28 respectively is very small (indicated by "×" in the schematic diagram). Therefore, based on the JV curve experimental results shown in Figure 4, it can be further verified that the contact between the first carrier layer 27 and the second carrier layer 28 will not cause obvious leakage of the light-emitting device, and will not have a significant impact on the electrical performance of the light-emitting device.

[0088] However, the exposure accuracy requirement for the photolithography machine is relatively low, and it is impossible to achieve that the two groups of electrodes do not contact each other. In this case, it is necessary to use the structure and design of the pixel definition layer 3 to achieve that the two groups of electrodes do not contact each other, that is, the first electrode 22 is spatially separated from the third electrode 24 and the fourth electrode 25 by the pixel definition layer 3, and the second electrode 23 is spatially separated from the third electrode 24 and the fourth electrode 25, as shown in Figures 3A and 3B. Figure 3B is a schematic diagram of the pixel opening 31 in Figure 3A, and the pixel opening The orthographic projection shape of 31 on the base substrate 1 includes: a square opening 311, and a first opening 312, a second opening 313, a third opening 314 and a fourth opening 315 respectively connected to each side of the square opening 311 and away from the side of the square opening 311; wherein, adjacent openings among the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315 are arranged at intervals, and the square opening 311 and the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315 are mutually connected. In this way, the first electrode 22 can be arranged to be located in the first opening 312, the second electrode 23 can be arranged to be located in the second opening 313, the third electrode 24 can be arranged to be located in the third opening 314, and the fourth electrode 25 can be arranged to be located in the fourth opening 25, that is, the first electrode 22, the second electrode 23, the third electrode 24 and the fourth electrode 25 are separated from each other by the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315; and the first carrier layer 27 can be arranged to be located in the first opening 312 and / or the second opening 313, and the second carrier layer 28 can be arranged to be located in the third opening 314 and / or the fourth opening 315, that is, the first opening 312, the second opening 313, the third opening 314 and / or the fourth opening 315 can be separated from each other by the first opening 312, the second opening 313, the third opening 314 and / or the fourth opening 315. The opening 312, the second opening 313, the third opening 314 and the fourth opening 315 separate the first carrier layer 27 and the second carrier layer 28 from each other; and the light-emitting layer 21 at least covers the square opening 311 and is arranged in contact with the first carrier layer 27 and the second carrier layer 28. For example, when the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315 are not filled with electrodes and carrier layers, the light-emitting layer 21 also covers the areas of the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315 that are not filled with electrodes and carrier layers, so that the light-emitting layer 21 is arranged in contact with the first carrier layer 27 and the second carrier layer 28.

[0089] It should be noted that, as shown in Figure 3B, the sizes of the first opening 312, the second opening 313, the third opening 314 and the fourth opening 315 can only accommodate the corresponding electrodes to separate the electrodes, so that the carrier layer can be made in the square opening 311, and adjacent carrier layers can be set in contact or spaced apart.

[0090] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in FIG6 to FIG9 , FIG6 and FIG7 are two schematic cross-sectional views along the CC' direction in FIG2 and FIG3A , respectively, and FIG8 and FIG9 are two schematic cross-sectional views along the DD' direction in FIG2 and FIG3A , respectively. The light-emitting substrate further includes: a flat layer 4 located on the side of the base substrate 1 facing the light-emitting layer 21, a driving circuit layer 5 located between the flat layer 4 and the base substrate 1, and an encapsulation layer 6 located on the side of the light-emitting layer 21 facing away from the base substrate 1;

[0091] The drive circuit layer 5 includes: a first drive circuit 51 provided in a one-to-one correspondence with the first electrode groups (22 and 23), and a second drive circuit 52 provided in a one-to-one correspondence with the second electrode groups (24 and 25). The first electrode 22 is electrically connected to the first drive circuit 51 via a first via V1 penetrating the planar layer 4; the second electrode 23 is electrically connected to the first drive circuit 51 via a second via V2 penetrating the planar layer 4; the third electrode 24 is electrically connected to the second drive circuit 52 via a third via V3 penetrating the planar layer 4; and the fourth electrode 25 is electrically connected to the second drive circuit 52 via a fourth via V4 penetrating the planar layer 4. In this way, the first drive circuit 51 can apply a corresponding drive voltage to the first electrode 22 and the second electrode 23, and the second drive circuit 52 can apply a corresponding drive voltage to the third electrode 24 and the fourth electrode 25, thereby achieving precise control of electron and hole injection.

[0092] It should be noted that the structures of the above-mentioned driving circuits are the same as those in the related art. The difference between this disclosure and the prior art is that each sub-pixel opening contains a first driving circuit for controlling the first electrode group and a second driving circuit for controlling the second electrode group.

[0093] The present disclosure does not limit the light-emitting type of the light-emitting device, such as bottom-emitting light or top-emitting light.

[0094] Optionally, in the above-mentioned light-emitting substrate provided in the embodiments of the present disclosure, as shown in Figures 6 and 8 , a metal reflective layer 7 is further included between the flat layer 4 and the light-emitting layer 21. The orthographic projection of the metal reflective layer 7 on the base substrate 1 does not overlap with the orthographic projections of the first electrode group (22 and 23) and the second electrode group (24 and 25) on the base substrate 1. This can form a light-emitting device that emits light from a top portion. The material of the metal reflective layer 7 can be any metal material or alloy material with a reflective effect.

[0095] Optionally, in the above-mentioned light-emitting substrate provided in the embodiments of the present disclosure, as shown in Figures 7 and 9, a metal reflective layer 7 is further included between the encapsulation layer 6 and the light-emitting layer 21. The orthographic projection of the metal reflective layer 7 on the base substrate 1 does not overlap with the orthographic projections of the first electrode group (22 and 23) and the second electrode group (24 and 25) on the base substrate 1. In this way, a bottom-emitting light-emitting device can be formed. The material of the metal reflective layer 7 can be any metal material or alloy material with a reflective effect.

[0096] In specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2, 3A, and 6-9, the corners of the top view outline of the pixel defining layer 3 and the angle between the inner wall of the pixel defining layer 3 and the surface of the base substrate 1 in the cross-sectional view (cross-sectional view) are all expressed as right angles (mainly for the sake of clarity and convenience in drawing). Of course, in actual devices or products, the corners of the outline of the pixel defining layer 3 outside each light-emitting device 21 and the angle between the inner wall of the pixel defining layer 3 and the surface of the base substrate 1 can be right angles or approximate right angles, or chamfers of any reasonable angle. The size and shape of the chamfer are determined by the process conditions and corresponding materials when preparing the pixel defining layer 3, and can be any reasonable angle value and shape. The present disclosure will no longer repeat its specific angles and shapes.

[0097] In specific implementations, in the above-mentioned light-emitting substrate provided in the embodiments of the present disclosure, the materials for the first electrode 22, the second electrode 23, the third electrode 24, and the fourth electrode 25 can be various electrode materials known in the related art (for example, including but not limited to metals, conductive metal oxides, and conductive organic or conductive polymer materials), or mixed electrode layers of multiple electrode materials, or laminated composite electrode layers of multiple electrode materials. Optionally, each electrode can include at least one layer of a metal electrode capable of reflecting visible light to effectively reflect light and improve the light extraction efficiency of the device.

[0098] Since the thickness of the light-emitting layer along the anode-to-cathode direction in the light-emitting device shown in Figure 1 in the related art is generally only tens of nanometers, the inventors of this case used Setfos software to simulate and verify whether the thicker light-emitting layer 21 between the two electrodes in the present disclosure can meet the lighting conditions of the QLED device.

[0099] The present disclosure simulates the stacked HOD device and EOD device separately, and provides auxiliary and inferential explanation of the thickness value of the light-emitting layer in the orthogonal light-emitting device provided by the present disclosure, taking the light-emitting layer as a quantum dot light-emitting layer (QD) as an example.

[0100] The structure of the HOD device is: third electrode (e.g., ITO) / hole injection layer / hole transport layer / luminescent layer / hole transport layer / hole injection layer / fourth electrode (e.g., Au). The thickness and energy level values ​​of each film layer along the direction from the third electrode 24 to the fourth electrode 25 are shown in Figure 10. Optionally, the third electrode 24 can be electrically connected to the positive pole of the power supply, and the fourth electrode 25 can be connected to the negative pole of the power supply. Of course, the third electrode 24 can also be electrically connected to the negative pole of the power supply, and the fourth electrode 25 can be connected to the positive pole of the power supply.

[0101] Simulation 1: Simulate the stacked HOD device at a constant voltage (e.g. voltage = 6 V), change the thickness of the QD, and simulate the current density (J, unit: mA / cm 2 ). The simulated QD thickness range is N = 10nm to 800nm, with a step of 10nm (i.e., simulation is performed every 10nm). The corresponding changes in the current density J of the HOD device under these thickness conditions are simulated, and the results are shown in Figure 11.

[0102] Simulation 2: Simulate the current density (J, unit: mA / cm) in the HOD device under different voltage conditions with a fixed QD thickness (N = 20 nm). 2 ). The simulated voltage range is 1V to 10V, with a step of 0.2V (i.e., simulation is performed every 0.2V). The corresponding changes in the current density J of the HOD device under these voltage conditions are simulated, and the results are shown in Figure 12 (only the results for 1V to 4V are shown).

[0103] Comparing the changes in the current density magnitude in simulation 1 and simulation 2 in the HOD device:

[0104] Since the thickness of the quantum dot light-emitting layer in the QLED device in the related art is 10nm to 30nm, the current density change under the condition of changing voltage is simulated with the thickness of the quantum dot light-emitting layer being 20nm (the results in simulation 2). Since the turn-on voltage of common QLED devices is 1.5V to 1.8V, the simulation results show that when the voltage of the HOD device is 1.6V, the corresponding current density J is 5×10^-7mA / cm 2 Therefore, it can be inferred that the hole current density required for the common QLED device to light up is about 5×10^-7mA / cm 2 Considering the differences in hole injection and migration between HOD devices and QLED devices in related technologies, the simulation results show that when the QLED device can be turned on, the hole current density is around 10^-7mA / cm 2At a constant voltage, the thickness of the quantum dot light-emitting layer is changed, and the simulation results of the current density change of the HOD device (the results in simulation 1) show that when the thickness of the quantum dot light-emitting layer N ≤ 700nm, the corresponding current density is > 1×10^-7mA / cm 2 (That is, when the QD film thickness N = 700nm, the current density J≈1.3×10^-7mA / cm 2 ). Therefore, when the QD film thickness N≤700nm, the hole concentration can meet the conditions for turning on the QLED device.

[0105] In addition, considering the differences between devices, the energy level differences of QDs, and the ability to control carrier injection and transport in QDs by doping, it can be inferred that the orthogonal light-emitting device provided in the present invention can meet the QD film thickness N≤750nm required for the light-emitting device to be turned on.

[0106] Optionally, the thickness of the QD can be ≤600 nm, or ≤500 nm, or ≤400 nm, or ≤300 nm, or ≤200 nm.

[0107] The EOD device structure is: first electrode (e.g., Ag) / electron transport layer / luminescent layer / electron transport layer / second electrode (e.g., Ag). The thickness and energy level values ​​of each film layer along the direction from the first electrode 22 to the second electrode 23 are shown in Figure 13. Optionally, the first electrode 22 can be electrically connected to the positive pole of the power supply, and the second electrode 23 can be connected to the negative pole of the power supply. Of course, it is also possible to electrically connect the first electrode 22 to the negative pole of the power supply, and the second electrode 23 to the positive pole of the power supply.

[0108] Simulation 3: Simulate the stacked EOD device at a constant voltage (e.g., voltage = 6 V), change the thickness of the QD, and simulate the current density (J, unit: mA / cm 2 ) changes. The simulated QD thickness range is N = 10nm to 800nm, with a step of 10nm (i.e., simulation is performed every 10nm). The corresponding changes in the current density J of the EOD device under these thickness conditions are simulated, and the results are shown in Figure 14.

[0109] Simulation 4: Simulate the current density (J, unit: mA / cm) in the EOD device under different voltage conditions with a fixed QD thickness (N = 20 nm) using a stacked EOD device. 2 ). The simulated voltage range is 1V to 10V, with a step of 0.2V (i.e., one simulation per 0.2V interval). The corresponding changes in the current density J of the EOD device under these voltage conditions are simulated, and the results are shown in Figure 15 (only the results for 1-4V are shown).

[0110] Comparing the changes in the current density magnitude in simulation 3 and simulation 4 in the EOD device:

[0111] Using the same analytical logic as the HOD device simulation results above, and comparing them to the EOD device, we can estimate that the maximum QD thickness should be ≤750nm. Alternatively, the QD thickness can be ≤600nm, ≤500nm, ≤400nm, ≤300nm, ≤200nm, or ≤100nm.

[0112] In a specific implementation, in the above-mentioned light-emitting substrate provided in an embodiment of the present disclosure, as shown in FIG2 and FIG3A , along the direction from the first electrode 22 to the second electrode 23, the thickness H1 of the light-emitting layer 21 may be 20 nm to 750 nm; optionally, H1 may be 20 nm, 30 nm, 50 nm, 80 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 700 nm, or 750 nm;

[0113] Along the direction from the third electrode 24 to the fourth electrode 25, the thickness H2 of the light-emitting layer 21 can be 20nm to 750nm; optionally, H2 can be 20nm, 30nm, 50nm, 80nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 700nm, or 750nm.

[0114] Optionally, H1 and H2 may be the same or different.

[0115] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, the thickness H3 of the electron transport layer 271 along the direction from the first electrode 22 to the second electrode 23 can be 20nm to 250nm; the thickness of the ET layer: 20nm≤T-HT≤250nm; preferably, T-HT can be 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 90nm, 100nm, 120nm, 150nm, 180nm, 200nm; when an electron injection layer is further provided between the electron transport layer 27 and the first electrode 22 and / or the second electrode 23, the thickness of the electron injection layer can be 20nm to 250nm;

[0116] Along the direction from the third electrode 24 to the fourth electrode 25, the thickness H4 of the hole injection layer 282 can be 5nm~150nm, and the HI layer thickness is: 5nm≤T-HI≤150nm; preferably, T-HI can be ≈5nm, 7nm, 9nm, 10nm, 15nm, 18nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 60nm, 70nm, 80nm, 100nm; the thickness H5 of the hole transport layer 281 can be 5nm~200nm, and the HT layer thickness is: 5nm≤T-HT≤200nm; preferably, T-HT can be 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 100nm, 150nm, 200nm.

[0117] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, along the direction from the first electrode 22 to the second electrode 23, the thickness H6 of the first electrode 22 can be 50nm to 400nm; optionally, H6 can be 80nm, 100nm, 120nm, 150nm, 200nm, 300nm, or 400nm; the thickness of the second electrode 23 can be the same as the thickness H6 of the first electrode 22, wherein due to process errors, the thickness of the second electrode 23 and the thickness H6 of the first electrode 22 may differ and are not necessarily equal in thickness.

[0118] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in Figures 2 and 3A, along the direction from the third electrode 24 to the fourth electrode 25, the thickness H7 of the third electrode 24 can be 50nm to 400nm; optionally, H7 can be 80nm, 100nm, 120nm, 150nm, 200nm, 300nm, or 400nm; the thickness of the fourth electrode 25 can be the same as the thickness H7 of the third electrode 24, wherein due to process errors, the thickness of the fourth electrode 25 may be different from the thickness H7 of the third electrode 24, and is not necessarily equal to the thickness.

[0119] In a specific implementation, in the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure, as shown in FIG6 to FIG9 , along the direction perpendicular to the base substrate 1 , the height of the pixel electrode layer 3 can be 150 nm to 2000 nm, and the height of the light-emitting layer 21 can be 10 nm to 500 nm;

[0120] The height (height of the non-via area) of the first electrode group (22 and 23) and the second electrode group (24 and 25) can be greater than or equal to 100nm and less than or equal to the height of the pixel electrode layer 3 + 40nm; specifically, when the electrode material is actually deposited, the electrode material will be deposited above the pixel electrode layer 3, and the target pattern will be subsequently exposed through the photoresist, and then etched to leave the electrode at the target position. However, during the actual exposure, due to the alignment accuracy, there is no way to completely ensure that the pattern exposed by the photoresist is exactly the same as the edge of the pixel electrode layer 3. At this time, the integrity of the electrode and the pixel electrode layer 3 can be ensured by reducing the amount of over-etching in the etching process of the electrode, which may cause the electrode to be slightly higher than the pixel electrode layer 3. Considering that the electrode is too much higher than the pixel electrode layer 3, it will cause the electrode to be easily broken in the subsequent process, so the height of the electrode is limited to within 40nm exceeding the height of the pixel defining layer 3; optionally, the height of the first electrode group (22 and 23) is less than the height of the pixel electrode layer 3, and the height of the second electrode group (24 and 25) is less than the height of the pixel electrode layer 3;

[0121] Based on the same reasons as when making the electrodes mentioned above, the height of the first carrier layer 27 and the second carrier layer 28 can be greater than or equal to 50nm and less than or equal to the first height + 20nm, and the first height is the smallest height of the first electrode group (22 and 23) and the second electrode group (24 and 25), that is, the height of the carrier layer is limited to within 20nm exceeding the height of the pixel defining layer 3.

[0122] In summary, the orthogonal light-emitting device provided by the embodiments of the present disclosure has the following advantages compared to the light-emitting device with a stacked structure in the related art:

[0123] 1. The orthogonal light-emitting device provided in the embodiments of the present disclosure cleverly leverages its structural advantages to easily apply different bias voltages to the first and second electrodes, and to the third and fourth electrodes, respectively. This allows for precise control of the hole and electron injection concentrations within the device through external voltage regulation, thereby truly achieving carrier injection balance within the device. In other words, through structural innovation, the present disclosure achieves the ability to influence and control the carrier injection balance of the device by varying the magnitude of the externally applied bias voltage, thereby achieving optimal device performance.

[0124] 2. In the orthogonal light-emitting devices provided in the embodiments of the present disclosure, all layers except the light-emitting layer can be prepared and produced based on existing mature semiconductor process flows. The light-emitting layer (e.g., QD) can be prepared using a variety of film-forming processes, including direct photolithography patterning, indirect photolithography patterning, inkjet printing, doctor blade coating, slit coating, vapor deposition, and spin coating.

[0125] 3. Because all functional layers, including electrodes, hole injection layers, hole transport layers, and electron transport layers, are parallel to the light-emitting layer's light-emitting direction, the microcavity effect within the device is essentially eliminated, freeing the device from optical and electrical control. Optical control of the device is primarily focused on a plane perpendicular to the light-emitting plane. In this device structure, optical control in this area is unaffected by the electrical structure, enabling greater freedom in optical structural design.

[0126] Based on the same inventive concept, the embodiment of the present disclosure further provides a method for manufacturing a light-emitting substrate, as shown in FIG16 , comprising:

[0127] S1601, providing a substrate;

[0128] S1602, forming a first electrode group on a base substrate, the first electrode group including a first electrode and a second electrode disposed opposite to each other;

[0129] S1603, forming a second electrode group on the base substrate, the second electrode group including a third electrode and a fourth electrode disposed opposite to each other; wherein the first electrode, the second electrode, the third electrode, and the fourth electrode form a ring structure, and the first electrode, the second electrode, the third electrode, and the fourth electrode are disposed independently of each other;

[0130] S1604. A light-emitting layer is formed in a ring structure on the substrate; the light-emitting layer includes: a bottom surface facing the substrate, a top surface facing away from the substrate, and a first side surface, a second side surface, a third side surface and a fourth side surface connecting the bottom surface and the top surface; wherein the first side surface and the second side surface are arranged opposite to each other, the third side surface and the fourth side surface are arranged opposite to each other, the first electrode is located on a side of the first side surface away from the light-emitting layer, the second electrode is located on a side of the second side surface away from the light-emitting layer, the third electrode is located on a side of the third side surface away from the light-emitting layer, and the fourth electrode is located on a side of the fourth side surface away from the light-emitting layer.

[0131] The method for manufacturing the above-mentioned light-emitting substrate provided in the embodiment of the present disclosure manufactures the functional layers of the light-emitting device on the same plane, that is, the shape of the light-emitting device can be approximated to a vertical orthogonal device structure. By applying bias voltages of different magnitudes to two sets of electrodes, the holes and electrons in the light-emitting device can be separately regulated, thereby making it easier to achieve a true injection balance of holes and electrons.

[0132] In a specific implementation, in order to balance the concentrations of electrons and holes, the above-mentioned manufacturing method provided in the embodiment of the present disclosure, before forming the light-emitting layer, as shown in FIG17 , further includes:

[0133] S1603′, forming a first carrier layer between the first electrode and the light-emitting layer and / or between the second electrode and the light-emitting layer;

[0134] S1604', forming a second carrier layer between the third electrode and the light-emitting layer and / or between the fourth electrode and the light-emitting layer.

[0135] The following describes a method for manufacturing a light-emitting substrate provided by an embodiment of the present disclosure, taking the light-emitting substrate shown in FIG2 as an example. The method specifically includes the following steps:

[0136] (1) A pixel defining layer 3 is formed on a base substrate (not shown), and the pixel defining layer 3 has a pixel opening 31, as shown in FIG18A.

[0137] (2) A first electrode film layer 100 for forming the first electrode and the second electrode is deposited on the entire surface of the pixel defining layer 3, and a first photoresist layer (not shown) is coated on the first electrode film layer 100, as shown in FIG18B ; by exposing and developing the first photoresist layer, and etching the electrode film layer 100, a first electrode 22 and a second electrode 23 are prepared in the pixel opening 31, as shown in FIG18C .

[0138] (3) A second photoresist layer 200 is coated on the first electrode 22 and the second electrode 23, a second electrode film layer 300 for forming the third electrode and the fourth electrode is deposited on the entire surface of the second photoresist layer 200, and a third photoresist layer (not shown) is coated on the second electrode film layer 300, as shown in FIG18D ; by exposing and developing the third photoresist layer and simultaneously developing the second photoresist layer 200, and etching the second electrode film layer 300, a third electrode 24 and a fourth electrode 25 are prepared in the pixel opening 31, as shown in FIG18E .

[0139] (4) A fourth photoresist layer 400 is coated on the substrate on which the first electrode 22, the second electrode 23, the third electrode 24 and the fourth electrode 25 are prepared, as shown in FIG18F ; and the position of the electron transport layer 271 is exposed through exposure and development processes, as shown in FIG18G ; then, an electron transport material is deposited on the entire surface, as shown in FIG18H ; and then, by peeling off the fourth photoresist layer 400, the excess electron transport material is peeled off together with the fourth photoresist layer 400, thereby achieving the deposition of the electron transport layer 271 at a specific position, as shown in FIG18I .

[0140] (5) A fifth photoresist layer 500 is applied to the substrate on which the first electrode 22, the second electrode 23, the third electrode 24, the fourth electrode 25, and the electron transport layer 271 are prepared, as shown in FIG18J ; and the position of the hole injection layer 282 is exposed through exposure and development processes, as shown in FIG18K ; then, a hole injection material is deposited on the entire surface, as shown in FIG18L ; then, by peeling off the fifth photoresist layer 500, the excess hole injection material is peeled off together with the fifth photoresist layer 500, thereby achieving the deposition of the hole injection layer 282 at a specific position, as shown in FIG18M . Thereafter, the same process for making the hole injection layer 282 is used to form a hole transport layer 281 on the side of the hole injection layer 282 away from the third electrode 24 and the side of the hole injection layer 282 away from the fourth electrode 25, as shown in FIG18N .

[0141] (6) Then, on the basis of FIG18N , a light-emitting layer 21 is formed in the annular structure surrounded by two electron transport layers 271 and two hole transport layers 281. The material of the light-emitting layer 21 can be quantum dots, perovskites, organic light-emitting materials, etc.; wherein, the manufacturing process of the light-emitting layer 21 for quantum dot materials includes direct photolithography patterning, indirect photolithography patterning, inkjet printing (including electrospraying), scraping, slit coating, spin coating, printing, spraying, transfer printing, etc., and for organic light-emitting materials and / or perovskite light-emitting materials, thin film deposition can also be performed by evaporation to complete the deposition of a light-emitting layer of a wavelength, as shown in FIG18O ; then, the preparation of the light-emitting layer is repeated twice to prepare light-emitting layers of different light-emitting wavelengths, thereby realizing the preparation of full-color devices.

[0142] (7) The light-emitting device shown in FIG18O is packaged to form a complete QLED or OLED device.

[0143] It should be noted that, as shown in Figure 2, in the angle space between the first electrode group and the second electrode group (the blank area formed between the light-emitting device 2 and the pixel defining layer 3 in Figure 2), the blank area is filled with the encapsulation layer; at the same time, since the materials such as the hole injection layer, the hole transport layer, the electron transport layer and the light-emitting layer are deposited before the encapsulation layer, and there is a certain alignment error in the deposition of each layer, there will also be a thin film or multi-layer thin film of one or more materials in the hole injection layer, the hole transport layer, the electron transport layer and the light-emitting layer in the blank area, and the thin films of these materials are all below the encapsulation layer.

[0144] It should be noted that the light-emitting device shown in the above-mentioned production Figure 2 is more suitable for the higher exposure accuracy of the photolithography machine, and the corresponding etching accuracy is also higher. It can achieve the two groups of electrode groups not contacting each other without the help of the pixel definition layer 3 structure, that is, the first electrode 22 is not in spatial contact with the third electrode 24 and the fourth electrode 25, and the second electrode 23 is not in spatial contact with the third electrode 24 and the fourth electrode 25.

[0145] The manufacturing process flow for the light-emitting device shown in FIG3A is substantially the same as the manufacturing process flow for the light-emitting device shown in FIG2 . The main difference between the two is the shape of the pixel opening 31 of the pixel defining layer 3. When manufacturing the light-emitting device shown in FIG3A , the design of the pixel opening 31 of the pixel defining layer 3 is required to ensure that the first electrode group and the second electrode group are spatially separated and do not contact each other. Schematic diagrams of the various process flows for manufacturing the light-emitting device shown in FIG3A are shown in FIG19A-FIG19O.

[0146] Based on the same inventive concept, the present disclosure also provides a display device comprising the aforementioned light-emitting substrate provided in the present disclosure. The principles of this display device are similar to those of the aforementioned light-emitting substrate, so the implementation of this display device can refer to the implementation of the aforementioned light-emitting substrate, and any repetitions will not be repeated here.

[0147] In specific implementation, the above-mentioned display device provided in the embodiment of the present disclosure may be a full-screen display device, or may be a flexible display device, etc., which is not limited here.

[0148] In a specific implementation, the display device provided in the embodiment of the present disclosure may be a full-screen mobile phone as shown in FIG20 . Of course, the display device provided in the embodiment of the present disclosure may also be any product or component with a display function, such as a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or the like. Other essential components of the display device are well understood by those skilled in the art and are not described here in detail, nor should they be construed as limiting the present invention.

[0149] The embodiments of the present disclosure provide a light-emitting substrate, a method for manufacturing the same, and a display device. By arranging the functional layers of the light-emitting device on the same plane, that is, the shape of the light-emitting device can be approximated to a vertical orthogonal device structure, and by applying bias voltages of different magnitudes to two sets of electrodes, the holes and electrons in the light-emitting device can be separately regulated, thereby making it easier to achieve a true injection balance of holes and electrons.

[0150] Obviously, those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include these modifications and variations.

Claims

1. A light-emitting substrate, wherein: It includes a substrate and a light emitting device located on the substrate; The light emitting device comprises: A light-emitting layer is located on the base substrate; the light-emitting layer includes: a bottom surface facing the base substrate, a top surface facing away from the base substrate, and a first side surface, a second side surface, a third side surface and a fourth side surface connecting the bottom surface and the top surface; wherein the first side surface and the second side surface are arranged opposite to each other, and the third side surface and the fourth side surface are arranged opposite to each other; A first electrode group, comprising a first electrode and a second electrode, wherein the first electrode is located on the substrate and located on a side of the first side away from the light-emitting layer, and the second electrode is located on the substrate and located on a side of the second side away from the light-emitting layer; The second electrode group includes a third electrode and a fourth electrode, wherein the third electrode is located on the base substrate and located on a side of the third side away from the light-emitting layer, and the fourth electrode is located on the base substrate and located on a side of the fourth side away from the light-emitting layer; wherein the first electrode, the second electrode, the third electrode and the fourth electrode are arranged independently of each other.

2. The light-emitting substrate according to claim 1, wherein: The light emitting device further comprises: A first carrier layer, located between at least one electrode in the first electrode group and the light-emitting layer; The second carrier layer is located between at least one electrode in the second electrode group and the light-emitting layer.

3. The light-emitting substrate according to claim 2, wherein: The first carrier layer is provided between the first electrode and the light-emitting layer and between the second electrode and the light-emitting layer; The second carrier layer is provided between the third electrode and the light-emitting layer and between the fourth electrode and the light-emitting layer.

4. The light-emitting substrate according to claim 3, wherein: The first carrier layer includes at least one of an electron transport layer and an electron injection layer, the second carrier layer includes at least one of a hole transport layer and a hole injection layer, the first carrier is an electron, and the second carrier is a hole; Among them, when the first carrier layer includes an electron transport layer and an electron injection layer, the electron transport layer is arranged close to the light-emitting layer; when the second carrier layer includes a hole transport layer and a hole injection layer, the hole transport layer is arranged close to the light-emitting layer.

5. The light-emitting substrate according to any one of claims 2 to 4, wherein: It also includes a pixel definition layer located on the substrate, the pixel definition layer has a pixel opening, and the light emitting device is located in the pixel opening; wherein, The orthographic projection shape of the pixel opening on the base substrate is a square.

6. The light-emitting substrate according to claim 5, wherein: The first carrier layer and the second carrier layer are arranged independently of each other, or the first carrier layer and the second carrier layer are arranged in contact with each other.

7. The light-emitting substrate according to any one of claims 2 to 4, wherein: It also includes a pixel definition layer located on the substrate, the pixel definition layer has a pixel opening, and the light emitting device is located in the pixel opening; wherein, The orthographic projection shape of the pixel opening on the substrate includes: a square opening, and a first opening, a second opening, a third opening and a fourth opening respectively connected to each side of the square opening and away from one side of the square opening; wherein adjacent openings among the first opening, the second opening, the third opening and the fourth opening are arranged at intervals, and the square opening is interconnected with the first opening, the second opening, the third opening and the fourth opening.

8. The light-emitting substrate according to claim 7, wherein: The first electrode is located in the first opening, the second electrode is located in the second opening, the third electrode is located in the third opening, and the fourth electrode is located in the fourth opening; The first carrier layer is located in the first opening and / or the second opening, and the second carrier layer is located in the third opening and / or the fourth opening; The light emitting layer at least covers the square opening and is disposed in contact with the first carrier layer and the second carrier layer.

9. The light-emitting substrate according to any one of claims 1 to 8, wherein: Also includes: A flat layer located on a side of the base substrate facing the light-emitting layer, a driving circuit layer located between the flat layer and the base substrate, and a packaging layer located on a side of the light-emitting layer facing away from the base substrate; The driving circuit layer includes: a first driving circuit arranged in one-to-one correspondence with the first electrode group, and a second driving circuit arranged in one-to-one correspondence with the second electrode group; wherein the first electrode is electrically connected to the first driving circuit through a first via hole penetrating the flat layer, the second electrode is electrically connected to the first driving circuit through a second via hole penetrating the flat layer, the third electrode is electrically connected to the second driving circuit through a third via hole penetrating the flat layer, and the fourth electrode is electrically connected to the second driving circuit through a fourth via hole penetrating the flat layer.

10. The light emitting substrate according to claim 9, wherein: It also includes a metal reflective layer located between the flat layer and the light-emitting layer, and the orthographic projection of the metal reflective layer on the base substrate does not overlap with the orthographic projections of the first electrode group and the second electrode group on the base substrate.

11. The light emitting substrate according to claim 9, wherein: It also includes a metal reflective layer located between the encapsulation layer and the light-emitting layer, and the orthographic projection of the metal reflective layer on the base substrate does not overlap with the orthographic projections of the first electrode group and the second electrode group on the base substrate.

12. The light-emitting substrate according to any one of claims 1 to 11, wherein: Along the direction from the first electrode to the second electrode, the thickness of the light-emitting layer is 20nm to 750nm; Along the direction from the third electrode to the fourth electrode, the thickness of the light-emitting layer is 20 nm to 750 nm.

13. The light emitting substrate according to claim 4, wherein: Along the direction from the first electrode to the second electrode, the thickness of the electron injection layer is 20nm to 250nm, and the thickness of the electron transport layer is 20nm to 250nm; Along the direction from the third electrode to the fourth electrode, the thickness of the hole injection layer is 5nm-150nm, and the thickness of the hole transport layer is 5nm-200nm.

14. The light-emitting substrate according to any one of claims 1 to 13, wherein: Along the direction from the first electrode to the second electrode, the thickness of the first electrode and the thickness of the second electrode are 50nm to 400nm; Along the direction from the third electrode to the fourth electrode, the thickness of the third electrode and the thickness of the fourth electrode are 50 nm to 400 nm.

15. The light-emitting substrate according to any one of claims 5 to 8, wherein: Along the direction perpendicular to the base substrate, the height of the pixel electrode layer is 150nm to 2000nm, and the height of the light-emitting layer is 10nm to 500nm; The height of the first electrode group and the second electrode group is greater than or equal to 100 nm and less than or equal to the height of the pixel electrode layer+40 nm; The heights of the first carrier layer and the second carrier layer are greater than or equal to 50 nm and less than or equal to the first height+20 nm, and the first height is the smallest height between the first electrode group and the second electrode group.

16. A display device, wherein: It comprises the light-emitting substrate as described in any one of claims 1 to 15.

17. A method for manufacturing a light-emitting substrate, wherein: include: providing a substrate base plate; forming a first electrode group on the base substrate, wherein the first electrode group includes a first electrode and a second electrode arranged opposite to each other; A second electrode group is formed on the base substrate, wherein the second electrode group includes a third electrode and a fourth electrode which are arranged opposite to each other; wherein the first electrode, the second electrode, the third electrode and the fourth electrode form a ring structure, and the first electrode, the second electrode, the third electrode and the fourth electrode are arranged independently of each other; A light-emitting layer is formed on the substrate and is located within the annular structure; the light-emitting layer includes: a bottom surface facing the substrate, a top surface facing away from the substrate, and a first side surface, a second side surface, a third side surface and a fourth side surface connecting the bottom surface and the top surface; wherein the first side surface and the second side surface are arranged opposite to each other, the third side surface and the fourth side surface are arranged opposite to each other, the first electrode is located on a side of the first side surface away from the light-emitting layer, the second electrode is located on a side of the second side surface away from the light-emitting layer, the third electrode is located on a side of the third side surface away from the light-emitting layer, and the fourth electrode is located on a side of the fourth side surface away from the light-emitting layer.

18. The method of claim 17, wherein: Before forming the light-emitting layer, the method further comprises: forming a first carrier layer between the first electrode and the light-emitting layer and / or between the second electrode and the light-emitting layer; A second carrier layer is formed between the third electrode and the light-emitting layer and / or between the fourth electrode and the light-emitting layer.

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