New superconducting quantum circuit and chip

Abstract

The present invention relates to the field of superconducting quantum technology. Disclosed are a new superconducting quantum circuit and a chip. The superconducting quantum circuit comprises: a quantum bit which comprises a bit capacitor and a Josephson junction, wherein the bit capacitor comprises two independent metal pieces, the Josephson junction is bridged between either of the metal pieces and a grounding plane, a first coupling capacitor is formed between the two metal pieces, and a self-capacitor is formed between each metal piece and the grounding plane; and a signal transmission line which is coupled to the quantum bit. The present invention can prevent a Z control line from extending to a central area of the bit capacitor, and the bit capacitor has a smaller size, thereby helping to improve the level of integration of a chip, making design flexible and reducing design complexity.

Description

A new superconducting quantum circuit and chip Technical Field

[0001] The present invention relates to the field of superconducting quantum technology, and in particular to a novel superconducting quantum circuit and chip. Background Art

[0002] In traditional superconducting quantum chips, bit capacitors are generally formed by a single independent metal sheet and the chip ground. The size of this type of bit capacitor is comparable to that of a 1 / 4 wavelength resonator with a meandering layout. As the number of quantum bits increases, the quantum bits expand in two dimensions. At this time, the layout space reserved for the XY control lines, Z control lines, and read lines is small, and it is usually necessary to sacrifice the isolation index between signal lines to meet wiring requirements. Compared with the cross-shaped bit capacitor, the bit capacitor based on the double-island structure is larger in size, and the layout space reserved for the XY control lines, Z control lines, and read lines is more abundant. It is not necessary to sacrifice the isolation index between signal lines and meet wiring requirements. However, the double-island structure has the following problems: First, the Josephson junction is connected across two metal sheets (located in the center area of ​​the bit capacitor). In other words, the Z control line must extend to the center area of ​​the bit capacitor to apply magnetic flux to the Josephson junction. This structure not only limits the layout of the resonator and signal lines, but also increases the coupling between the Z control line and the resonator. The bit capacitor based on the double-island structure is not flexible in design, increases the complexity of the design, and reduces the speed of version iteration.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present.

[0004] Summary of the Invention

[0005] The purpose of the present invention is to provide a new superconducting quantum circuit and chip, which can avoid the Z control line extending to the central area of ​​the bit capacitor, have a smaller bit capacitor size, are conducive to improving the integration of the chip, have flexible design, and reduce design complexity.

[0006] To solve the above technical problems, the present invention provides a superconducting quantum circuit, comprising:

[0007] A quantum bit, comprising a bit capacitor and a Josephson junction, wherein the bit capacitor comprises two independent metal sheets, the Josephson junction is connected across any one of the metal sheets and a ground plane, a first coupling capacitor is formed between the two metal sheets, and a self-capacitance is formed between each of the metal sheets and the ground plane;

[0008] A signal transmission line is coupled to the quantum bit.

[0009] Optionally, the bit capacitor includes a first metal sheet and a second metal sheet, the size of the first metal sheet is smaller than that of the second metal sheet, and the Josephson junction is connected between the first metal sheet and a ground plane.

[0010] Optionally, also include:

[0011] a first substrate, the quantum bit being formed on an upper surface of the first substrate;

[0012] A second substrate, wherein the signal transmission line is formed on a lower surface of the second substrate.

[0013] Optionally, the upper surface of the first substrate and the lower surface of the second substrate are both made of superconducting materials.

[0014] Optionally, also include:

[0015] A resonator is coupled to the quantum bit, and a second coupling capacitor is formed between the resonator and each of the metal sheets.

[0016] Optionally, the signal transmission line is coupled to the quantum bit in a different plane.

[0017] Optionally, the signal transmission line includes a Z control line, and the Z control line is coupled to the Josephson junction through mutual inductance.

[0018] Optionally, the signal transmission line includes an XY control line, and the XY control line is coupled to the bit capacitor through mutual capacitance.

[0019] Optionally, there are multiple quantum bits;

[0020] The two adjacent quantum bits are fixedly coupled.

[0021] Optionally, there are multiple quantum bits;

[0022] The two adjacent quantum bits are adjustable in coupling.

[0023] To solve the above technical problems, the present invention further provides a superconducting quantum chip, comprising the superconducting quantum circuit as described in any one of the above.

[0024] The present invention provides a superconducting quantum circuit. A bit capacitor comprises two independent metal sheets. A Josephson junction is connected between either metal sheet and a ground plane, preventing the Z control line from extending into the center of the bit capacitor. Using the quantum bit structure of the present invention, the size of the metal sheet not connected to the Josephson junction can be adjusted as needed. This results in a smaller bit capacitor, which improves chip integration, provides design flexibility, and reduces design complexity. The present invention also provides a superconducting quantum chip that exhibits the same beneficial effects as the aforementioned superconducting quantum circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0026] FIG1 is a schematic structural diagram of a superconducting quantum circuit provided by the present invention;

[0027] FIG2 is a schematic structural diagram of another superconducting quantum circuit provided by the present invention;

[0028] FIG3 is a schematic structural diagram of another superconducting quantum circuit provided by the present invention;

[0029] FIG4 is an equivalent circuit model of a superconducting quantum circuit provided by the present invention;

[0030] FIG5 is a schematic structural diagram of a fixed substrate provided by the present invention;

[0031] FIG6 is a schematic structural diagram of another superconducting quantum circuit provided by the present invention;

[0032] FIG7 is a schematic diagram of an adjustable coupling provided by the present invention;

[0033] FIG8 is a schematic diagram of another adjustable coupling provided by the present invention;

[0034] Figure 9 is a schematic diagram of a quantum bit circuit based on a double-island structure. DETAILED DESCRIPTION

[0035] The core of the present invention is to provide a new superconducting quantum circuit and chip, which can prevent the Z control line from extending to the central area of ​​the bit capacitor, have a smaller bit capacitor size, and are conducive to improving the integration of the chip, flexible design, and reducing design complexity.

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0037] In the first aspect, please refer to FIG1 , which is a schematic structural diagram of a superconducting quantum circuit provided by the present invention. The superconducting quantum circuit includes:

[0038] The quantum bit includes a bit capacitor and a Josephson junction 1. The bit capacitor includes two independent metal plates. The Josephson junction 1 is connected between any one of the metal plates and the ground plane Gnd. A first coupling capacitor is formed between the two metal plates. A self-capacitance is formed between each metal plate and the ground plane Gnd.

[0039] Signal transmission line, the signal transmission line is coupled with the quantum bit.

[0040] The signal transmission line includes a Z control line 31, which is coupled to the Josephson junction 1 via mutual inductance. The signal transmission line also includes an XY control line 32, which is coupled to the bit capacitor via mutual capacitance. The signal transmission line also includes a readout line 33. Of course, the signal transmission line may also include other signal lines for controlling qubits, which are not specifically limited in this embodiment. As a preferred embodiment, out-of-plane coupling can be used between the signal transmission line and the qubit. As the number of qubits increases, out-of-plane coupling facilitates the deployment of more qubits.

[0041] In this embodiment, the bit capacitor includes two independent metal sheets, the two metal sheets include a first metal sheet 21 and a second metal sheet 22, each metal sheet has a first end and a second end, and the middle of the metal sheet is bent, so that the metal sheet forms an L-shaped structure. In addition, the middle bending areas of the two metal sheets are close to each other, and the two middle bending areas do not touch, and the ends of the two metal sheets are relatively far away. As shown in Figure 2, the first end of the first metal sheet 21 and the first end of the second metal sheet 22 form a line L1, and the second end of the first metal sheet 21 and the second end of the second metal sheet 22 form a line L2, and the line L1 and the line L2 intersect near the two bending areas.

[0042] The Josephson junction 1 can be connected between the first metal sheet 21 and the ground plane Gnd, or between the second metal sheet 22 and the ground plane Gnd. It will be understood that the Josephson junction 1 is a three-layer structure of superconducting-insulating-superconducting. In this embodiment, the superconducting materials on both sides of the Josephson junction 1 are connected to the first metal sheet 21 or the second metal sheet 22 on one side, and to the ground plane Gnd on the other side. Both metal sheets include a first end and a second end. The first end and second end of the first metal sheet 21 are A1 and B1, respectively, and the first end and second end of the second metal sheet 22 are A2 and B2, respectively. The Josephson junction 1 can be connected between A1 and the ground plane Gnd, or between B1 and the ground plane Gnd, or between A2 and the ground plane Gnd, or between B2 and the ground plane Gnd. The design can be based on actual engineering needs and is not specifically limited in this embodiment. With the structure of this embodiment, since the Josephson junction 1 is connected between the end of the metal sheet and the ground plane Gnd, the magnetic flux can act on the Josephson junction 1 at the end of the metal sheet, avoiding the Z control line 31 extending to the central area of ​​the bit capacitor.

[0043] The following is an example of a Josephson junction 1 connected between the first metal sheet 21 and the ground plane Gnd. The same applies when the Josephson junction 1 is connected between the second metal sheet 22 and the ground plane Gnd. It can be understood that a small first coupling capacitor C is formed between the two metal sheets. 12 , a self-capacitance C is formed between the first metal sheet 21 and the ground plane Gnd q1 , a self-capacitance C is formed between the second metal sheet 22 and the ground plane Gnd q2 , the bit capacitance of the above structure can be equivalent to C q2 with C 12 Connect in series with C q1 In parallel, considering the first coupling capacitor C 12 Much smaller than the self-capacitance C q1 、C q2 The total bit capacitance formed by the structure provided in this embodiment can be equivalent to C q1 +C 12 ≈C q1 , and C q2 The total bit capacitance value of the new bit capacitor has little effect. In the design, the corresponding C q2 The size of the self-capacitance can be adjusted to any size. It can be understood that when the Josephson junction 1 is connected between the first metal sheet 21 and the ground plane Gnd, the size of the second metal sheet 22 can be adjusted according to actual layout requirements. When the Josephson junction 1 is connected between the second metal sheet 22 and the ground plane Gnd, the size of the first metal sheet 21 can be adjusted according to actual layout requirements.

[0044] The bit capacitor structure provided in this embodiment has a smaller minimum size of the bit capacitor, which is beneficial to improving the integration of the chip and is flexible in design. q2 It can be adjusted to any value according to the layout requirements. When the number of control lines in the signal transmission line changes (such as the number of resonators 4 mounted on a single read line 33 changes or the coupling mode between the bit capacitors is changed from fixed coupling to adjustable coupling), there is no need to redesign the bit capacitors. q2 The size of the self-capacitor can meet the requirements of signal line layout, which is conducive to improving the speed of version iteration.

[0045] The present invention provides a superconducting quantum circuit, in which a bit capacitor includes two independent metal sheets. A Josephson junction 1 is connected across either metal sheet and a ground plane Gnd, thereby preventing the Z control line 31 from extending to the central area of ​​the bit capacitor. By adopting the quantum bit structure of the present invention, the size of the metal sheet not connected to the Josephson junction 1 can be adjusted as needed. Therefore, the bit capacitor has a smaller size, which is conducive to improving the integration of the chip, making the design flexible, and reducing the design complexity.

[0046] Based on the above embodiment:

[0047] As an optional embodiment, the bit capacitor includes a first metal plate 21 and a second metal plate 22 , the first metal plate 21 is smaller than the second metal plate 22 , and the Josephson junction 1 is connected between the first metal plate 21 and the ground plane Gnd.

[0048] In this embodiment, the two independent metal sheets are selected from two metal sheets of different sizes, the size of the first metal sheet 21 is smaller than the size of the second metal sheet 22, the Josephson junction 1 is connected across the independent metal sheet of smaller size (i.e., the first metal sheet 21) and the ground plane Gnd, the small-sized independent metal sheet forms a small equivalent capacitor with the ground plane Gnd, the large-sized independent metal sheet forms a large equivalent capacitor with the ground plane Gnd, and the small-sized independent metal sheet forms a coupling capacitor with the large-sized independent metal sheet. The two large capacitors formed by the two independent metal sheets of different sizes and the ground plane Gnd are connected in series through the small coupling capacitor formed between the two independent metal sheets. Among them, the equivalent capacitance formed between the small-sized independent metal sheet and the ground plane Gnd can be approximated as the total equivalent capacitance of the bit capacitor in this embodiment, and the large-sized independent metal sheet has little effect on the total equivalent capacitance value of the new bit capacitor and can be adjusted to any size as needed. In this embodiment, the size of the small-sized independent metal sheet is fixed, and the size of the large-sized independent metal sheet can be adjusted as needed, so that the size of the second metal sheet 22 can be adjusted in a larger range, while reserving a larger space for signal transmission line layout.

[0049] As an optional embodiment, referring to FIG. 3 , the superconducting quantum circuit further includes:

[0050] Resonator 4, resonator 4 is coupled with the quantum bit, and a second coupling capacitor is formed between resonator 4 and each metal piece.

[0051] In this embodiment, the superconducting quantum circuit further includes a resonator 4. The resonator 4 can be coupled to the quantum bit in different planes or in the same plane to exchange information with the quantum bit. The Josephson junction 1 is still connected across the first metal plate 21 and the ground plane Gnd as an example. The Josephson junction 1 is connected across the first metal plate 21 and the ground plane Gnd, and the equivalent inductance is L j A second coupling capacitor C is formed between the resonator 4 and the first metal plate 21. g1 A second coupling capacitor C is formed between the resonator 4 and the second metal plate 22. g2 Considering that the Josephson junction 1 is connected between the ground plane Gnd and any metal sheet, the coupling strength between the Z control line 31 and the resonator 4 is reduced while facilitating the layout of the resonator 4 and the signal line to the greatest extent.

[0052] FIG4 is an equivalent circuit model of a superconducting quantum circuit provided by this embodiment, wherein Cr is the equivalent capacitance formed between the 1 / 4 wavelength resonator and the metal ground, Lr is the equivalent inductance formed between the 1 / 4 wavelength resonator and the metal ground, and i1-i5 are the equivalent inductances flowing through C g1 、C g2 、C 12 、C q1 and L j 、C q2 Ck is the coupling capacitance between the 1 / 4 wavelength resonator and the read line 33.

[0053] According to Hough's law, the equations can be listed as follows:

[0054] ① The circuits are:

[0055] ②The circuits are:

[0056] in Where Zx is L j and C q1 The total equivalent impedance formed by parallel connection;

[0057] After i2, i3, i4 and i5 are represented by i1, the impedance in the dotted box can be obtained as

[0058] From the numerator = 0, consider C g1 、C g2 and C 12 Much smaller than Cq1 and C q2 , the series resonant frequency can be obtained as:

[0059] Similarly, from the denominator = 0, consider C g1 、C g2 and C 12 Much smaller than C q1 and C q2 , the parallel resonant frequency can be obtained;

[0060] It can be seen from the above formula that the total equivalent capacitance C formed by the novel structure proposed in this embodiment is q ≈C q1 , and C q2 Therefore, the size of the second metal sheet 22 can be adjusted to any size according to the signal transmission line layout requirements. q1 ≈C q , C q2 When ≈0, the bit capacitor of the new structure has the minimum size.

[0061] As an optional embodiment, as shown in FIG5 , the method further includes:

[0062] A first substrate 51 , wherein a quantum bit is formed on an upper surface 52 of the first substrate 51 ;

[0063] The second substrate 53 has a lower surface 54 on which a signal transmission line and a resonator 4 are formed.

[0064] In this embodiment, the superconducting quantum circuit also includes a fixed substrate, which includes a first substrate 51 and a second substrate 53, wherein the Josephson junction 1, two metal plates and a ground plane Gnd are formed on the upper surface 52 of the first substrate 51; the resonator 4, the Z control line 31, the XY control line 32 and the read line 33 are formed on the lower surface 54 of the second substrate 53, and the ground planes of the first substrate 51 and the second substrate 53 are connected through an indium column 55. As an optional embodiment, the upper surface 52 of the first substrate 51 and the lower surface 54 of the second substrate 53 are both superconducting materials, such as metal tantalum, aluminum, etc. The substrate material can be selected but is not limited to silicon and sapphire.

[0065] As an optional embodiment, there are multiple quantum bits;

[0066] Two adjacent quantum bits are fixedly coupled.

[0067] In this embodiment, a superconducting quantum circuit may include multiple qubits. Each bit capacitor requires an XY control line 32, and each Josephson junction 1 requires a Z control line 31. Signal transmission between qubits can be achieved by fixed coupling, i.e., a fixed gap is set between adjacent qubits, as shown in FIG6 .

[0068] As an optional embodiment, there are multiple quantum bits;

[0069] Two adjacent quantum bits can be adjusted to couple with each other.

[0070] In this embodiment, a superconducting quantum circuit may include multiple qubits. Each bit capacitor requires an XY control line 32, and each Josephson junction 1 requires a Z control line 31. Adjustable coupling may also be employed between qubits. If this is the case, a Z control line 31 is required for each adjustable coupling qubit between two bits. Referring to FIG7 , an adjustable coupling method may be employed to provide an I-shaped adjustable coupling capacitor between two adjacent qubits. Alternatively, the arrangement may be as shown in FIG8 . FIG7 and FIG8 illustrate two adjacent qubits as examples. The same applies to other adjacent qubits.

[0071] In one exemplary embodiment, as shown in FIG6 , using a superconducting quantum circuit with multiple qubits using a fixed coupling mechanism as an example, six XY control lines 32 and six Z control lines 31 are extended from each column of qubits (in the X direction) in the positive and negative directions, respectively, to the corners of a superconducting quantum chip (e.g., a superconducting quantum chip). This facilitates bonding to a packaging box for installation and testing of the superconducting quantum chip. To minimize crosstalk between signal transmission lines, the spacing between the signal transmission lines is set to 50 μm. In this case, the spacing between the readout line 33 and the right resonator 4 must satisfy the following requirement: d ≥ 50 μm × 7 = 350 μm to meet the layout requirements for the six signal lines.

[0072] For the bit capacitance design value C q =84fF, based on the analysis of the novel bit capacitor structure proposed in this embodiment, C q1 =84fF, C q2 Take any value, here we take 84fF. Set the upper and lower substrate materials to sapphire, with a thickness of 500um, and simulate and analyze in the Ansys suite Q3D software, we can get the same value as C q1 and C q2The corresponding bit capacitor size is: 345um×345um, then the entire bit capacitor size is 690um×690um. For the resonant frequency design value f=6.3GHz of the 1 / 4 wavelength resonator 4, its resonant length is about 5033um, and it is laid out in the form of a meandering line with a size of 550um×320um. The meandering line spacing is 40um, and air bridges are connected on both sides of the meandering line to achieve a good common ground. According to the bit capacitor size and the resonator 4 size, the spacing d between the read line 33 and the right resonator 4 can be obtained as 370um> 350um, that is, the new bit capacitor structure proposed in this embodiment avoids the waste of signal line layout space while ensuring the signal line isolation index.

[0073] For the same design value C q＝ 84fF and f = 6.3GHz. The existing cross-shaped bit capacitor and resonator 4 meander layout area are 550um × 550um and 420um × 420um, respectively. The spacing between the read line 33 and the right resonator 4 is d = 130um < 350um. In this case, the isolation between the signal lines must be sacrificed to meet the wiring requirements.

[0074] Similarly, for the same design value C q =84fF and f=6.5GHz, according to the minimum size condition of the double-island bit capacitor, take C q1 =C q2 =168fF, the bit capacitor has a minimum size of 1200um×1200um. Considering that the Z control line 31 needs to extend to the center area of ​​the bit capacitor, the resonator 4 needs to bypass the lower left corner area in Figure 9 when wiring. At this time, the resonator 4 layout corresponding to f=6.3GHz is 480um×370um, and the spacing d between the read line 33 and the right resonator 4 is 720um>350um. Obviously, although the dual-island bit capacitor meets the signal line layout requirements, its wiring needs to bypass the center area and the lower left corner area of ​​the bit capacitor. In addition, since the size of the bit capacitor is much larger than the size required for the signal line layout, it causes a waste of wiring space and reduces the integration of the quantum chip.

[0075] In summary, the bit capacitor structure proposed in the present invention has the following advantages over the cross-type bit capacitor and the double-island bit capacitor in the prior art: it avoids the Z control line from extending to the central area of ​​the bit capacitor, reduces the coupling strength between the Z control line and the resonator, and facilitates the layout of the resonator and the signal line to the greatest extent; it has a smaller minimum size of the bit capacitor, which is conducive to improving the integration of the quantum chip. When the bit capacitor based on the double-island structure takes the minimum size, it must correspond to the condition C q1＝ C q2 =2C q, and the new bit capacitor proposed in this invention has the minimum size requirement of C q1 ≈C q , C q2 Taking any value, the novel bit capacitor proposed in the present invention has a smaller minimum size of bit capacitor, which is beneficial to improving the integration of the chip; the design is flexible and reduces the complexity of the design. q2 It can be adjusted to any value according to layout requirements. When the number of control lines changes (such as the number of resonators mounted on a single read line changes or the coupling mode between bit capacitors is changed from fixed coupling to adjustable coupling), there is no need to redesign the bit capacitors and adjust C q2 The size of the self-capacitor can meet the requirements of signal line layout, which is conducive to improving the speed of version iteration.

[0076] In a second aspect, the present invention further provides a superconducting quantum chip, comprising the superconducting quantum circuit as described in any one of the above embodiments.

[0077] For an introduction to a superconducting quantum chip provided by the present invention, please refer to the above embodiments, and the present invention will not be described in detail here.

[0078] The superconducting quantum chip provided by the present invention has the same beneficial effects as the above-mentioned superconducting quantum circuit.

[0079] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0080] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A superconducting quantum circuit, characterized in that: include: A quantum bit, comprising a bit capacitor and a Josephson junction, wherein the bit capacitor comprises two independent metal sheets, the Josephson junction is connected across any of the metal sheets and a ground plane, a first coupling capacitor is formed between the two metal sheets, and a self-capacitor is formed between each of the metal sheets and the ground plane; A signal transmission line is coupled to the quantum bit.

2. The superconducting quantum circuit according to claim 1, characterized in that: The bit capacitor includes a first metal sheet and a second metal sheet, the first metal sheet is smaller than the second metal sheet, and the Josephson junction is connected between the first metal sheet and a ground plane.

3. The superconducting quantum circuit according to claim 1, characterized in that: Also includes: A first substrate, the quantum bit being formed on an upper surface of the first substrate; A second substrate, wherein the signal transmission line is formed on a lower surface of the second substrate.

4. The superconducting quantum circuit according to claim 3, characterized in that: The upper surface of the first substrate and the lower surface of the second substrate are both made of superconducting materials.

5. The superconducting quantum circuit according to claim 1, characterized in that: Also includes: A resonator is coupled to the quantum bit, and a second coupling capacitor is formed between the resonator and each of the metal sheets.

6. The superconducting quantum circuit according to claim 1, characterized in that: The signal transmission line is coupled to the quantum bit in different planes.

7. The superconducting quantum circuit according to claim 1, characterized in that: The signal transmission line includes a Z control line, and the Z control line is coupled with the Josephson junction through mutual inductance; and / or, The signal transmission line includes an XY control line, and the XY control line is coupled with the bit capacitor through mutual capacitance.

8. The superconducting quantum circuit according to any one of claims 1 to 7, characterized in that: There are multiple quantum bits; Two adjacent quantum bits are fixedly coupled.

9. The superconducting quantum circuit according to any one of claims 1 to 7, characterized in that: There are multiple quantum bits; Two adjacent quantum bits are adjustably coupled.

10. A superconducting quantum chip, characterized in that: Comprising the superconducting quantum circuit as described in any one of claims 1-9.

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