Solar cell and manufacturing method therefor

Abstract

The present application relates to the technical field of photovoltaics, and discloses a solar cell and a manufacturing method therefor, used for enhancing the carrier collection capability of a first doped region, thereby facilitating the improvement of the photoelectric conversion efficiency of the solar cell. The solar cell comprises a semiconductor substrate, a surface passivation layer and a dopant. A light-facing surface and / or a shadowed surface of the semiconductor substrate are / is provided with first doped regions / a first doped region. The surface passivation layer is formed on the side of the semiconductor substrate provided with the first doped region. The surface passivation layer is internally provided with a plurality of conductive windows. The dopant penetrates the surface passivation layer through the conductive windows to form the first doped region. The first doped region comprises at least one doped sub-region. In the length direction of the doped sub-region, the maximum depth to which two ends of each doped sub-region are recessed into the semiconductor substrate is greater than the maximum depth to which the middle of the doped sub-region is recessed into the semiconductor substrate. Each doped sub-region corresponds to at least three conductive windows. In the length direction of the doped sub-region, the morphology of the two ends of each doped sub-region is different from the morphology of the middle of the doped sub-region. The manufacturing method for the solar cell is used for manufacturing the solar cell.

Description

Solar cell and manufacturing method thereof Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a method for manufacturing the same. Background Art

[0002] Solar cells are increasingly being used as a new energy alternative. Photovoltaic solar cells convert sunlight into electricity. Specifically, they utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, facilitating efficient use of the electrical energy.

[0003] However, in existing solar cells, the doped regions formed on the light-facing side and / or the backlight side of the semiconductor substrate have poor carrier collection capabilities, which is not conducive to improving the photoelectric conversion efficiency of the solar cell.

[0004] Summary of the Invention

[0005] The purpose of the present application is to provide a solar cell and a method for manufacturing the same, which are used to enhance the carrier collection capability of the first doping region, thereby improving the photoelectric conversion efficiency of the solar cell.

[0006] In order to achieve the above-mentioned objectives, in a first aspect, the present application provides a solar cell comprising: a semiconductor substrate, a surface passivation layer and a dopant. The light-facing surface and / or the backlight surface of the semiconductor substrate have a first doped region. The surface passivation layer is formed on the side of the semiconductor substrate having the first doped region. A plurality of conductive windows are provided in the surface passivation layer. The dopant passes through the surface passivation layer through the conductive windows to form a first doped region. The first doped region comprises at least one doped sub-region. Along the length direction of the doped sub-region, the maximum depth of the two ends of each doped sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle portion of the doped sub-region recessed into the semiconductor substrate.

[0007] When the above technical solution is adopted, when the solar cell is in an operating state, the carriers of the corresponding conductive type generated after the semiconductor substrate absorbs photons can be collected and conducted out by the first doped region, which is conducive to the formation of photocurrent. Based on this, the solar cell provided by the present application also includes a dopant, which penetrates the surface passivation layer through a conductive window and forms the above-mentioned first doped region. In addition, the first doped region formed by the dopant includes at least one doped sub-region. Along the length direction of the doped sub-region, the depth of the two ends of each doped sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle part of the doped sub-region recessed into the semiconductor substrate. In this case, as the depth of the corresponding part of the doped sub-region recessed into the semiconductor substrate increases, the formation range of the doped sub-region increases; at the same time, within a certain range, the carrier collection ability of the doped sub-region is proportional to its own formation range. Therefore, compared with the roughly the same depth of each part of the doped sub-region recessed into the semiconductor substrate along the length direction, when the depth of the two ends of each doped sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle part of the doped sub-region recessed into the semiconductor substrate, the carrier collection ability of each doped sub-region at both ends along its own length direction can be enhanced, and the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed can be reduced, which is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0008] In addition, in the case where the dopant is an electrode, when the depth of the two ends of the doped sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle of the doped sub-region recessed into the semiconductor substrate, the bonding depth between the electrode and the semiconductor substrate at both ends of each doped sub-region along its own length direction is larger, which can improve the connection strength between the electrode and the semiconductor substrate and reduce the risk of the electrode detaching from the semiconductor substrate; at the same time, it can also increase the contact area between the electrode and the semiconductor substrate, thereby reducing the contact resistance between the electrode and the semiconductor substrate, improving the contact performance, and further improving the photoelectric conversion efficiency of the solar cell.

[0009] As a possible implementation solution, along the length direction of the doped sub-region, the ratio of the maximum depth of the doped sub-region's two ends recessed into the semiconductor substrate to the maximum depth of the doped sub-region's middle portion recessed into the semiconductor substrate is greater than or equal to 1.61 and less than or equal to 3.46.

[0010] When the above technical solution is adopted, along the length direction of the doped sub-region, the ratio of the maximum depth of the doped sub-region's two ends recessed into the semiconductor substrate to the maximum depth of the doped sub-region's middle portion recessed into the semiconductor substrate is within the above range. This can prevent the carrier collection capacity of the doped sub-region along its own length from being significantly improved due to a small ratio, thereby ensuring that the first doped region has a higher carrier collection capacity. When the dopant is an electrode, it can also prevent the bonding depth between the electrode and the semiconductor substrate from being significantly increased due to a small ratio, thereby ensuring a higher connection strength and contact performance between the electrode and the semiconductor substrate. In addition, within a certain range, the greater the depth of the doped sub-region's corresponding portion recessed into the semiconductor substrate, the higher the temperature corresponding to the doped sub-region formed by the dopant. Based on this, the ratio of the two maximum depths within the above range can also prevent the semiconductor substrate from being damaged by the high temperature caused by the dopant when the dopant is formed due to a large ratio, thereby improving the yield of the solar cell.

[0011] As a possible implementation solution, each doped sub-region corresponds to at least three conductive windows; along the length direction of the doped sub-region, the morphology at both ends of each doped sub-region is different from the morphology at the middle of the doped sub-region.

[0012] When the above technical solution is adopted, when the specifications of the conductive windows are fixed, compared with each doped sub-region corresponding to only a maximum of two conductive windows, when each doped sub-region corresponds to at least three conductive windows, it is beneficial to increase the formation range of each doped sub-region. And because the carrier collection capacity of each doped sub-region is proportional to its own formation range, increasing the formation range of each doped sub-region is beneficial to enhancing its own carrier collection capacity. In addition, when the dopant is an electrode, increasing the formation range of each doped sub-region is to increase the contact area between the electrode and the semiconductor substrate, which is beneficial to improving the connection strength between the electrode and the semiconductor substrate, reducing the risk of the electrode detaching from the semiconductor substrate, and also helping to reduce the contact resistance between the electrode and the semiconductor substrate, improving the contact performance, and thus improving the photoelectric conversion efficiency of the solar cell. Secondly, when each doped sub-region corresponds to at least three conductive windows, the dopant can penetrate the surface passivation layer through the larger opening formed by the at least three conductive windows to form each doped sub-region, which can solve the problem in the prior art that the doped sub-region has a smaller formation range because the dopant is difficult to fill the small opening formed by a maximum of two conductive windows. While reducing the difficulty of dopant filling, it can also ensure that each doped sub-region has a larger formation range that matches the opening range corresponding to the at least three conductive windows.

[0013] Furthermore, along the length of the doped sub-region, the morphology at the ends of each doped sub-region differs from the morphology in the middle of the doped sub-region. In this case, the morphology at the ends and middle of each doped sub-region along the length direction can be appropriately adjusted based on the different requirements for the middle and ends of the doped sub-region along the length direction in actual manufacturing processes and actual application scenarios. This allows for adjustment of the carrier collection capacity at the ends and middle of each doped sub-region along the length direction, ensuring that the carrier collection capacity at both ends and middle of the doped sub-region along the length direction meets operational requirements. Furthermore, when the dopant is an electrode, the connection strength and contact performance between the electrode and the semiconductor can be adjusted by appropriately controlling the morphology at the ends and middle of each doped sub-region along the length direction, thereby further improving the photoelectric conversion efficiency of the solar cell.

[0014] As one possible implementation, the longitudinal cross-section of each doped sub-region along its longitudinal middle portion is curved or wavy. In this case, the surface of each doped sub-region along its longitudinal middle portion has an uneven topography. Compared to a flat surface, an uneven surface has a larger surface area, which helps expand the formation range of each doped sub-region along its longitudinal middle portion and enhances the carrier collection capability of the doped sub-region along its longitudinal middle portion.

[0015] As a possible implementation scheme, each doped sub-region has a sharp-angled longitudinal cross-section at both ends along its own length, and a smoothly transitioned, quasi-acute angle or peak shape at the end facing away from the conductive window. In this case, the width of each doped sub-region recessed into the semiconductor substrate at both ends along its own length varies approximately linearly, resulting in a relatively stable trend in the carrier collection capability of each region along the depth direction at both ends of the doped sub-region, thereby ensuring that each portion of the doped sub-region along its own length has good carrier collection performance. Furthermore, in the case where the dopant is an electrode, the sharp-angled longitudinal cross-section at both ends of the doped sub-region along its own length, and the smoothly transitioned, quasi-acute angle or peak shape at the end facing away from the conductive window, can also ensure a relatively stable trend in the connection strength between each region along the depth direction at both ends of the dopant and the semiconductor substrate, further improving the connection strength between the electrode and the semiconductor substrate.

[0016] As a possible implementation scheme, the middle surface of each doped sub-region along its own length direction is composed of a cut single hemispherical surface, or is composed of multiple hemispherical surfaces overlapping each other; and / or, when observed in the thickness direction of the semiconductor substrate, the middle part of each doped sub-region along its own length direction is in the shape of an abacus bead.

[0017] When employing the above technical solution, when the central surface of each doped sub-region along its own length is composed of a single, cut, quasi-hemispherical surface, or is composed of multiple overlapping quasi-hemispherical surfaces, the extent to which each region of the central portion of the doped sub-region along its own circumference is recessed into the semiconductor substrate is approximately the same, thereby ensuring that each region of the central portion of the doped sub-region along its own circumference has good carrier collection performance. Furthermore, when viewed through the thickness of the semiconductor substrate, the beneficial effects of each doped sub-region having an abacus-bead shape along its own length are similar to those of each doped sub-region having a single, cut, quasi-hemispherical surface along its own length, or is composed of multiple overlapping quasi-hemispherical surfaces, and are not further elaborated here.

[0018] As one possible implementation, each doped sub-region has two end surfaces along its length that overlap with the middle of the doped sub-region, and each end of the doped sub-region along its length has a rectangular shape with missing corners when viewed through the thickness of the semiconductor substrate. In this case, the three surfaces of the quasi-triangular pyramid exhibit good symmetry, ensuring that the surface areas of the three portions along the circumference of the two ends of the doped sub-region are approximately the same, thereby facilitating approximately equal carrier collection performance for the three portions.

[0019] As a possible implementation solution, the maximum width of the middle portion of each doped sub-region along its own length direction is smaller than the maximum widths of both ends of the doped sub-region.

[0020] When using the above technical solution, the lateral proportion of each doped sub-region along its own length direction is greater in a direction parallel to the light-facing or backlight-facing surface of the semiconductor substrate, resulting in each doped sub-region having a relatively high lateral carrier collection capacity at both ends along its own length direction. In addition, when the dopant is an electrode, the connection strength between the electrode and the semiconductor substrate parallel to the light-facing or backlight-facing surface can be enhanced, and the contact area between the electrode and the semiconductor substrate parallel to the light-facing or backlight-facing surface can be increased, which is beneficial to improving the contact performance between the electrode and the semiconductor substrate.

[0021] As a possible implementation solution, the maximum width of the middle portion of each doped sub-region along its own length direction is greater than or equal to 30 μm and less than or equal to 40 μm.

[0022] When using the above technical solution, the maximum width of each doped sub-region along its own length in the middle portion is within the above range. This can prevent the doped sub-region from being unable to collect carriers of the corresponding conductivity type in the middle portion along its own length due to the smaller maximum width of the doped sub-region along its own length, thereby reducing the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed. It can also prevent damage to the semiconductor substrate caused by the higher formation temperature during the formation of the first doped region due to the larger maximum width of the doped sub-region along its own length, thereby ensuring a high yield of the solar cell.

[0023] As a possible implementation, the maximum width of each doped sub-region along its length is greater than or equal to 54 μm and less than or equal to 72 μm. The beneficial effects of this case can be referred to the beneficial effects analysis when the maximum width of each doped sub-region along its length is greater than or equal to 30 μm and less than or equal to 40 μm, and will not be repeated here.

[0024] As a possible implementation scheme, multiple conductive window columns including multiple conductive windows extend along a first direction and are spaced apart along a second direction. The first direction is different from the second direction. Each conductive window column includes multiple conductive window groups spaced apart along the first direction, and the multiple conductive window groups included in the same conductive window column correspond one-to-one to the multiple doped sub-regions included in the same first doped region. The sum of the lengths of all conductive window groups in the same conductive window column along the first direction is a first length, and the sum of the spacings between each two adjacent conductive window groups in the same conductive window along the first direction is a second length. The ratio of the first length to the second length is greater than or equal to 1:9 and less than or equal to 5:5.

[0025] As a possible implementation scheme, the first length can also be defined as the sum of the lengths of all conductive windows corresponding to the same first doping region along the length direction of the doped sub-region. In addition, the conductive window group corresponding to each doped sub-region is all the conductive windows corresponding to itself; the second length can also be defined as the sum of the spacings between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doping region along the length direction of the doped sub-region. Similarly, the ratio of the first length to the second length is greater than or equal to 1:9 and less than or equal to 5:5. This definition can be applied to the case where each doped sub-region corresponds to at least three conductive windows.

[0026] When using the above technical solution, the surface passivation layer can chemically passivate the side of the semiconductor substrate where the first doped region is formed, thereby reducing the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed. While providing a conductive window within the surface passivation layer reduces the contact area between the surface passivation layer and the semiconductor substrate, the dopant needs to pass through the conductive window to penetrate the surface passivation layer to form the first doped region. Based on this, within a certain range, the greater the number or area of ​​the conductive windows provided in the surface passivation layer, the worse the passivation effect of the surface passivation layer on the semiconductor substrate. However, the larger the surface area of ​​the first doped region, the lower the series resistance of the solar cell. In this case, the first length is the sum of the lengths of all conductive window groups in the same conductive window column along the first direction. A larger value indicates a greater number or area of ​​conductive window groups included in the conductive window column. The second length is the sum of the spacing between two adjacent conductive window groups in the same conductive window column along the first direction. A larger value indicates a greater length of the two adjacent conductive window groups included in the surface passivation layer in the same conductive window column. Similarly, for the case where each doped sub-region corresponds to at least three conductive windows, the above-mentioned first length is the sum of the lengths of all conductive windows corresponding to the same first doped region along the first direction. The larger this value is, the more conductive windows there are or the larger the area is. The second length is the sum of the spacings between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region. The larger this value is, the longer the length of the portion of the surface passivation layer located between the two adjacent conductive window groups corresponding to the same first doped region is. Therefore, when the ratio of the first length to the second length is within the above-mentioned range, it is possible to prevent the area of ​​the first doped region from being smaller due to the smaller ratio, thereby ensuring that the first doped region has a higher carrier collection performance, which is beneficial to reducing the series resistance of the solar cell. In addition, it is also possible to prevent the contact area between the surface passivation layer and the semiconductor substrate from being larger due to the larger ratio, thereby ensuring that the surface passivation layer has a higher passivation effect on the side of the semiconductor substrate where the first doped region is formed.

[0027] As a possible implementation, the length of each conductive window group along the first direction is a third length. The third lengths corresponding to different conductive window groups in the same conductive window column are equal; and / or the third lengths corresponding to different conductive window groups in different conductive window columns are equal; and / or the third length is greater than or equal to 250 μm and less than or equal to 290 μm.

[0028] As a possible implementation, the third length can also be defined as the length of the conductive window group corresponding to each doped sub-region along the length direction of the doped sub-region. In the same first doped region, the third lengths of the conductive window groups corresponding to different doped sub-regions are equal; and / or the third lengths of the conductive window groups corresponding to two doped sub-regions belonging to different first doped regions are equal; and / or the third length is greater than or equal to 250 μm and less than or equal to 290 μm. This definition applies to the case where each doped sub-region corresponds to at least three conductive windows.

[0029] When the above technical solution is adopted, when the third lengths corresponding to different conductive window groups included in the same conductive window column are equal, it is beneficial to make the different conductive window groups included in the same conductive window column have the same specifications. Similarly, when the third lengths corresponding to different conductive window groups included in different conductive window columns are equal, it is beneficial to make the different conductive window groups included in different conductive window columns have the same specifications, and there is no need to strictly require manufacturing accuracy in order to form conductive window groups of different specifications in a fixed position, thereby reducing the difficulty of manufacturing solar cells. Similarly, for the case where each doped sub-region corresponds to at least three conductive windows, in the same first doped region, when the third lengths of the conductive window groups corresponding to different doped sub-regions are equal, it is also beneficial to make the different conductive window groups corresponding to the same first doped region have the same specifications. Similarly, when the third lengths of the conductive window groups corresponding to two doped sub-regions belonging to different first doped regions are equal, it is also beneficial to make the different conductive window groups corresponding to different first doped regions have the same specifications, and there is no need to strictly require manufacturing accuracy in order to form conductive window groups of different specifications in a fixed position, thereby reducing the difficulty of manufacturing solar cells.

[0030] In addition, when the third length is greater than or equal to 250 μm and less than or equal to 290 μm, it is possible to prevent the cross-sectional area of ​​each doped sub-region formed by the dopant from being smaller than the cross-sectional area of ​​the conductive window group due to the difficulty of the dopant (e.g., electrode) from filling the smaller conductive window group due to the smaller third length, thereby ensuring that each doped sub-region has a higher carrier collection capacity due to its larger cross-sectional area. Secondly, it is also possible to prevent the contact area between the surface passivation layer and the semiconductor substrate from being smaller due to the larger third length, thereby ensuring that the surface passivation layer has a higher passivation effect on the side of the semiconductor substrate where the first doped region is formed.

[0031] As a possible implementation, the spacing along the first direction between each two adjacent conductive window groups in the same conductive window column is a fourth length. The fourth lengths corresponding to each two adjacent conductive window groups in the same conductive window column are equal; and / or the fourth lengths corresponding to two pairs of conductive window groups in different conductive window columns are equal, with each pair of conductive window groups being two adjacent conductive window groups in the same conductive window column.

[0032] As a possible implementation, the fourth length can also be defined as the spacing between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region, along the length direction of the doped sub-region. The fourth lengths of the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region are equal; and / or the fourth lengths of the conductive window groups corresponding to two pairs of doped sub-regions belonging to different first doped regions are equal, where each pair of doped sub-regions is composed of two adjacent doped sub-regions in the same first doped region. This definition is applicable to the case where each doped sub-region corresponds to at least three conductive windows.

[0033] When the above technical solution is adopted, in the same conductive window column, when the spacing between each two adjacent conductive window groups along the first direction is the fourth length, the different doped sub-regions included in different first doped regions are distributed at equal intervals; secondly, when the fourth lengths corresponding to two pairs of conductive window groups belonging to different conductive window columns are equal, the two pairs of conductive window groups belonging to different conductive window columns are distributed at equal intervals. Alternatively, for the case where each doped sub-region corresponds to at least three conductive windows, when the spacing between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region is the fourth length, if the fourth lengths of the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region are equal, the different doped sub-regions included in the same first doped region are distributed at equal intervals. Secondly, if the fourth lengths of the conductive window groups corresponding to two pairs of doped sub-regions belonging to different first doped regions are equal, the two pairs of doped sub-regions belonging to different first doped regions are distributed at equal intervals. Such equidistant distribution is conducive to the uniform distribution of different conductive window groups in the surface passivation layer, and thus helps the first doped region to collect carriers of corresponding conductive types in each area of ​​the semiconductor substrate parallel to the backlight surface or the light surface in a timely manner, further reducing the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed.

[0034] As one possible implementation, the semiconductor base includes a semiconductor substrate and a doped semiconductor layer formed on a portion of the backlight surface of the semiconductor substrate. The doped semiconductor layer has a conductivity type opposite to that of the semiconductor substrate. Furthermore, a first doped region is located in an area of ​​the backlight surface of the semiconductor substrate that is exposed outside the doped semiconductor layer. A second doped region is formed on a side of the doped semiconductor layer that faces away from the semiconductor substrate.

[0035] When the above-mentioned technical solution is adopted, in the actual process of manufacturing the semiconductor base, it is only necessary to form an entire doped semiconductor layer covering the backlight surface of the semiconductor substrate and remove part of the doped semiconductor layer located on the backlight surface. Then, a first doped region and a second doped region with opposite conductivity types can be formed on the backlight side, thereby solving the problem of the need to dope the backlight surface twice with opposite conductivity types, which leads to a complicated solar cell manufacturing process.

[0036] As a possible implementation, the semiconductor substrate is a P-type semiconductor substrate, the doped semiconductor layer is an N-type doped semiconductor layer, and the semiconductor base further includes a tunneling passivation layer located between the P-type semiconductor substrate and the N-type doped semiconductor layer.

[0037] When the above technical solution is adopted, the tunneling passivation layer and the N-type doped semiconductor layer can form a tunneling passivation contact structure. This tunneling passivation contact structure has excellent interface passivation effect and selective collection of carriers, which can further improve the photoelectric conversion efficiency of the back contact cell.

[0038] As a possible implementation solution, the solar cell is a passivated emitter and back contact cell. The first doped region is formed only on the backlight side of the semiconductor substrate.

[0039] As a possible implementation, both the light-facing surface and the backlight surface of the semiconductor substrate have first doped regions, and the first doped region on the light-facing side has a conductivity type opposite to that of the first doped region on the backlight side.

[0040] The present application also provides another solar cell, comprising:

[0041] A semiconductor substrate, wherein the light-facing surface and / or the backlight surface of the semiconductor substrate has a first doped region;

[0042] A surface passivation layer is formed on a side of the semiconductor substrate having the first doped region; a plurality of conductive windows are provided in the surface passivation layer;

[0043] A dopant is used to penetrate the surface passivation layer through a conductive window to form a first doped region; the first doped region includes at least one doped sub-region; each doped sub-region corresponds to at least three conductive windows; along the length direction of the doped sub-region, the morphology of the two ends of each doped sub-region is different from the morphology of the middle part of the doped sub-region.

[0044] In the present application, other technical features of a solar cell provided in the present application are also applicable to another solar cell provided in the present application, provided that there is no conflict, and the same technical features can achieve the same technical effects recorded in the present application. The specific numerical points of the same numerical range characteristics of a solar cell provided in the present application are also applicable to another solar cell provided in the present application, and will not be repeated here.

[0045] In a solar cell, a doped region formed by a dopant on the light-facing and / or backlight-facing surfaces of a semiconductor substrate and used to collect carriers includes at least one doped sub-region. In some cases, the morphology of each doped sub-region along its length is identical across its length, which is not conducive to adjusting the morphology of the middle and ends of the doped sub-region along its length differently according to actual manufacturing processes and actual needs. As a result, the carrier collection capabilities of the middle and ends of the doped sub-region along its length cannot simultaneously meet operating requirements, which in turn is not conducive to improving the photoelectric conversion efficiency of the solar cell. In addition, it can also lead to poor contact performance between the electrode electrically coupled to the doped region and the semiconductor substrate. In actual applications, different morphological requirements are often applied to the middle and ends of each doped sub-region along its length. For example, if the dopant is an electrode, the surface area of ​​each doped sub-region along its length can be set to be larger than the surface area of ​​the middle portion to increase the connection strength between the end of the corresponding electrode region and the semiconductor substrate, preventing the electrode from detaching from the semiconductor substrate during application or transportation. For example: if the actual carrier collection ranges corresponding to the doped sub-regions along the length direction are different, the doped sub-regions need to have a larger formation range along the length direction and corresponding to the larger actual carrier collection range (such as a larger width and / or a greater depth recessed into the semiconductor substrate, etc.) to timely export the carriers within the corresponding range.

[0046] In a second aspect, the present application provides a method for manufacturing a solar cell, which comprises: first, providing a semiconductor substrate. Next, forming a surface passivation layer on the light-facing surface and / or the backlight surface of the semiconductor substrate. A plurality of conductive windows are provided in the surface passivation layer. Then, forming a dopant on the side of the semiconductor substrate corresponding to the surface passivation layer. The dopant penetrates the surface passivation layer through the conductive window, and forms a first doped region on the side of the semiconductor substrate corresponding to the surface passivation layer. The first doped region includes at least one doped sub-region. Along the length direction of the first doped sub-region, the maximum depth of each doped sub-region recessed into the semiconductor substrate at both ends is greater than the maximum depth of the middle of the doped sub-region recessed into the semiconductor substrate, and / or each doped sub-region corresponds to at least three conductive windows, and along the length direction of the doped sub-region, the morphology of each doped sub-region at both ends is different from the morphology of the middle of the doped sub-region.

[0047] The beneficial effects of the second aspect of this application can be analyzed by referring to the beneficial effects of the first aspect and its various implementation methods, and will not be repeated here.

[0048] As a possible implementation scheme, a surface passivation layer is formed on the light-facing surface and / or the backlight surface of the semiconductor substrate, including: forming a whole layer of surface passivation material on the light-facing surface and / or the backlight surface of the semiconductor substrate. Next, a laser etching process is used to form a plurality of conductive windows penetrating the surface passivation material to obtain a surface passivation layer. Wherein, the conductive window columns including the plurality of the above-mentioned conductive windows all extend along the first direction and are spaced apart along the second direction, and the first direction is different from the second direction. Each conductive window column includes a plurality of conductive window groups spaced apart along the first direction, and the plurality of conductive window groups included in the same conductive window column correspond one-to-one to the plurality of doped sub-regions included in the same first doped region. All the conductive windows corresponding to each doped sub-region included in the first doped region are a conductive window group. When the first doped region includes a plurality of doped sub-regions, the plurality of conductive window groups corresponding to the first doped region are spaced apart along the length direction of the doped sub-region.

[0049] When the above technical solution is adopted, the laser etching process has a high etching accuracy. Therefore, the laser etching process is used to selectively etch the entire layer of surface passivation material, which can improve the manufacturing accuracy of solar cells. In addition, because the energy of the laser spot used in the laser etching process gradually decreases along the direction from its own center to the edge, and the etching intensity of each part of the laser spot is proportional to the energy of each part, the etching intensity corresponding to each laser spot along the direction from its own center to the edge gradually decreases. In other words, the etching depth corresponding to each laser spot along the direction from its own center to the edge gradually decreases, which is conducive to making the longitudinal cross-section of each doped sub-region formed after the dopant passes through the conductive window formed by multiple laser spots through the surface passivation layer have an uneven morphology such as a broken line, arc or wave shape, which is conducive to enhancing the carrier collection ability of each doped sub-region.

[0050] As a possible implementation scheme, when the longitudinal cross-sectional shape of each doped sub-region has N arc-shaped recessed portions recessed into the semiconductor substrate, the number of laser spots used by the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group is greater than or equal to N+2 and less than or equal to N+4.

[0051] When the above technical solution is adopted, in the longitudinal cross-sectional shape of each doped sub-region, there is also a concave portion on each side of the N arc-shaped concave portions that are concave into the semiconductor substrate. Each arc-shaped concave portion corresponds to a laser spot, and each side concave portion corresponds to at least one laser spot. Based on this, when the longitudinal cross-sectional shape of each doped sub-region has N arc-shaped concave portions that are concave into the semiconductor substrate, the laser spots used by the laser etching process to selectively remove the surface passivation material corresponding to each conductive window group are greater than or equal to N+2 and less than or equal to N+4. A sufficient number of laser spots can be reserved for manufacturing the side concave portions, ensuring that the depth of the side concave portions concave into the semiconductor substrate and the dimensions along the direction parallel to the light-facing surface or the backlight surface can meet the working requirements, thereby improving the yield of the solar cell.

[0052] As one possible implementation, the pattern of the laser spot used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window is the same as the pattern of the corresponding conductive window. Alternatively, the pattern of the laser spot used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window is located within the pattern of the corresponding conductive window.

[0053] When employing the above technical solution, the laser spot pattern and the pattern of the corresponding conductive window can be identical or not strictly corresponding. In the actual manufacturing process, the corresponding laser spot pattern can be determined based on the accuracy of the laser etching equipment and the pattern of the conductive window, thereby reducing the difficulty of the laser etching process. Alternatively, when the dopant is a structure such as an electrode with a certain burn-through effect, the laser spot pattern and the pattern of the corresponding conductive window can also not strictly correspond.

[0054] As for the case of using laser etching process to form conductive windows, the number, size and distribution of laser spots used by the laser etching process to selectively remove the surface passivation material corresponding to the portion of each conductive window group can be determined according to the morphology of each doped sub-region formed.

[0055] As a possible implementation solution, the laser spot used in the laser etching process to selectively remove the surface passivation material corresponding to the portion of the same conductive window group is spaced at a distance along the first direction between two adjacent laser spots greater than or equal to -5μm and less than or equal to 5μm. In this case, it can be prevented that the spacing between two adjacent laser spots used in the portion of the same conductive window group is large along the first direction, which would make it difficult for the dopant to burn through the portion of the surface passivation layer located between the two adjacent laser spots after subsequent formation, thereby obtaining a continuous conductive window group, thereby improving the precision of the solar cell.

[0056] As a possible implementation solution, a screen printing process and a sintering process are used to form a dopant on the side of the semiconductor substrate corresponding to the surface passivation layer.

[0057] In the case of the above technical solution, since the printing and sintering processes are relatively mature methods for forming electrodes, when the dopant is an electrode, the dopant can be formed on the side of the semiconductor substrate corresponding to the surface passivation layer using screen printing and sintering processes. This can reduce the difficulty of forming the dopant and facilitate the production of solar cells with a higher yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0059] FIG1 is a longitudinal cross-sectional SEM image of a solar cell provided in an embodiment of the present application;

[0060] FIG2 is a schematic longitudinal cross-sectional view of a solar cell provided in an embodiment of the present application;

[0061] FIG3 is a SEM image of the middle portion of the doped sub-region along its own direction of the solar cell provided by an embodiment of the present application;

[0062] FIG4 is a SEM image of the solar cell provided by an embodiment of the present application at both ends of the doped sub-region along its own direction;

[0063] FIG5 is a schematic diagram of the morphology of each doped sub-region when viewed in the thickness direction of the semiconductor substrate in an embodiment of the present application;

[0064] FIG6 is a SEM image of a portion of the morphology of each doped sub-region when viewed along the thickness direction of the semiconductor substrate in an embodiment of the present application;

[0065] FIG7 is a schematic diagram of a laser spot pattern opposite to a conductive window in an embodiment of the present application.

[0066] Reference numerals: 11 is a semiconductor substrate, 12 is a first doped region, 13 is a doped sub-region, 14 is a surface passivation layer, 15 is a dopant, 16 is a conductive window, 17 is a laser spot, and 18 is a light-facing passivation layer. DETAILED DESCRIPTION

[0067] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present application. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion in the concepts of the present application.

[0068] The accompanying drawings illustrate various schematic diagrams of structures according to embodiments of the present application. These figures are not drawn to scale, and for the purpose of clarity, some details are exaggerated and some details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0069] It should be noted that the technical features in the various embodiments illustrated in the specification can be freely combined to form new solutions without conflict. In addition, each claim can be used as an embodiment alone, or the technical features in each claim can be combined to form a new embodiment.

[0070] In the context of this application, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intervening layer / element between them. Furthermore, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects to be solved by this application more clearly understood, the application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely intended to explain this application and are not intended to limit this application.

[0071] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, "multiple" means two or more, unless otherwise clearly and specifically defined. "Several" means one or more, unless otherwise clearly and specifically defined.

[0072] In the description of this application, it should be understood that the terms "up", "down", "front", "back", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limitations on this application.

[0073] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0074] Solar cells are increasingly being used as a new energy alternative. Photovoltaic solar cells convert sunlight into electricity. In practice, they utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, facilitating efficient utilization of the electrical energy.

[0075] Specifically, existing solar cells generally include a semiconductor substrate, a surface passivation layer, and an electrode. Specifically, when the solar cell is a double-sided contact cell, doped regions are formed on both the light-facing and backlight-reflecting surfaces of the semiconductor substrate. When the solar cell is a back-contact cell, a doped region is formed only on the backlight-reflecting surface of the semiconductor substrate. As for the above-mentioned surface passivation layer, it is formed on the side of the semiconductor substrate having the doped region to passivate surface defects on the side of the semiconductor substrate having the doped region and reduce the carrier recombination efficiency on this side. At least a portion of the above-mentioned electrode penetrates the surface passivation layer and is in ohmic contact with the doped region to conduct the carriers collected by the doped region to form a photocurrent.

[0076] However, in existing solar cells, the doped regions formed on the light-facing and / or light-backward surfaces of the semiconductor substrate, which are used to collect carriers, are recessed into the semiconductor substrate to roughly the same depth. This hinders the surface area of ​​the doped regions, resulting in poor carrier collection capabilities and, consequently, poor photovoltaic conversion efficiency. Furthermore, this can lead to poor contact between the electrodes electrically coupled to the doped regions and the semiconductor substrate.

[0077] In order to solve the above technical problems, in a first aspect, an embodiment of the present application provides a solar cell.

[0078] In terms of cell type, the solar cell provided in the embodiments of the present application can be any type of photovoltaic cell capable of converting light energy into electrical energy. For example, the solar cell provided in the embodiments of the present application can be any type of solar cell, such as a passivated emitter and back contact cell, a heterojunction cell, or a tunneling oxide passivated contact cell.

[0079] In terms of the electrode formation position, the solar cell provided by the embodiments of the present application can be a double-sided contact cell, in which case the positive electrode and negative electrode of the solar cell are respectively formed on the light-facing side or the backlight side of the semiconductor substrate. Alternatively, the solar cell provided by the embodiments of the present application can also be a back-contact cell, in which case the positive electrode and negative electrode included in the solar cell are both formed on the backlight side of the semiconductor substrate.

[0080] As shown in Figures 1 and 2, the solar cell provided in the embodiment of the present application includes: a semiconductor substrate 11, a surface passivation layer 14 and a dopant 15. The light-facing surface and / or the backlight surface of the semiconductor substrate 11 have a first doping region 12. The surface passivation layer 14 is formed on the side of the semiconductor substrate 11 having the first doping region 12. A plurality of conductive windows 16 are provided in the surface passivation layer 14. The dopant 15 passes through the surface passivation layer 14 through the conductive windows 16 to form the first doping region 12. The first doping region 12 includes at least one doping sub-region 13. Along the length direction of the doping sub-region 13, the maximum depth of the two ends of each doping sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle part of the doping sub-region 13 recessed into the semiconductor substrate 11.

[0081] When the above technical solution is adopted, when the solar cell is in working state, the carriers of the corresponding conductive type generated after the semiconductor substrate absorbs photons can be collected and conducted out by the first doping region, which is conducive to the formation of photocurrent. Based on this, as shown in Figures 1 and 2, the solar cell provided in the embodiment of the present application also includes a dopant 15, which penetrates the surface passivation layer 14 through the conductive window 16 and forms the above-mentioned first doping region 12. In addition, the first doping region 12 formed by the dopant 15 includes at least one doping sub-region 13. Along the length direction of the doping sub-region 13, the depth of the two ends of each doping sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle part of the doping sub-region 13 recessed into the semiconductor substrate 11. In this case, as the depth of the corresponding part of the doped sub-region 13 recessed into the semiconductor substrate 11 increases, the formation range of the doped sub-region 13 increases; at the same time, within a certain range, the carrier collection ability of the doped sub-region 13 is proportional to its own formation range. Therefore, compared with the roughly the same depth of each part of the doped sub-region 13 recessed into the semiconductor substrate 11 along the length direction, when the depth of the two ends of each doped sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle part of the doped sub-region 13 recessed into the semiconductor substrate 11, the carrier collection ability of each doped sub-region 13 at both ends along its own length direction can be enhanced, and the carrier recombination rate on the side of the semiconductor substrate 11 where the first doped region 12 is formed can be reduced, which is beneficial to improving the photoelectric conversion efficiency of the solar cell. In addition, when the dopant 15 is an electrode, when the depth of the two ends of the doped sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle of the doped sub-region 13 recessed into the semiconductor substrate 11, the bonding depth between the electrode and the semiconductor substrate 11 at both ends of each doped sub-region 13 along its own length direction is larger, which can improve the connection strength between the electrode and the semiconductor substrate 11 and reduce the risk of the electrode detaching from the semiconductor substrate 11; at the same time, it can also increase the contact area between the electrode and the semiconductor substrate 11, thereby reducing the contact resistance between the electrode and the semiconductor substrate 11, improving the contact performance, and further improving the photoelectric conversion efficiency of the solar cell.

[0082] In the solar cell, the doped sub-regions may be arranged such that each doped sub-region corresponds to at least three conductive windows, and along the length direction of the doped sub-region, the morphology at both ends of each doped sub-region is different from the morphology at the middle of the doped sub-region.

[0083] 1 and 2 , in the solar cell, each doped sub-region 13 corresponds to at least three conductive windows 16. Along the length of the doped sub-region 13, the morphology at both ends of each doped sub-region 13 is different from that in the middle.

[0084] Based on this, as shown in Figures 1 and 2, the solar cell also includes a dopant 15, which penetrates the surface passivation layer 14 through the conductive window 16 and forms the above-mentioned first doping region 12. In addition, the first doping region 12 formed by the dopant 15 includes at least one doping sub-region 13. Each doping sub-region 13 corresponds to at least three conductive windows 16. Based on this, when the specifications of the conductive window 16 are fixed values, compared with each doping sub-region corresponding to only a maximum of two conductive windows, when each doping sub-region 13 corresponds to at least three conductive windows 16, it is beneficial to increase the formation range of each doping sub-region 13. And because the carrier collection ability of each doping sub-region 13 is proportional to its own formation range, increasing the formation range of each doping sub-region 13 is beneficial to enhancing its own carrier collection ability. In addition, when the dopant 15 is an electrode, increasing the formation range of each doped sub-region 13 means increasing the contact area between the electrode and the semiconductor substrate 11, which is beneficial to improving the connection strength between the electrode and the semiconductor substrate 11, reducing the risk of the electrode detaching from the semiconductor substrate 11, and also helping to reduce the contact resistance between the electrode and the semiconductor substrate 11, improving the contact performance, and thus improving the photoelectric conversion efficiency of the solar cell. Secondly, when each doped sub-region 13 corresponds to at least three conductive windows 16, the dopant 15 can penetrate the surface passivation layer 14 through the larger opening formed by the at least three conductive windows 16 to form each doped sub-region 13. This can solve the problem in the prior art that the formation range of the doped sub-region 13 is small due to the difficulty of the dopant 15 filling the small opening formed by at most two conductive windows 16. While reducing the difficulty of filling the dopant 15, it can also ensure that each doped sub-region 13 has a larger formation range that matches the opening range corresponding to the at least three conductive windows 16. Furthermore, along the length of the doped sub-region 13, the morphology at the ends of each doped sub-region 13 is different from the morphology in the middle of the doped sub-region 13. In this case, the morphology at the ends and the middle of each doped sub-region 13 along the length direction can be reasonably set according to the different requirements for the middle and ends of the doped sub-region 13 along the length direction in the actual manufacturing process and actual application scenarios, thereby adjusting the carrier collection capacity of each doped sub-region 13 along the length direction, ensuring that the carrier collection capacity of the doped sub-region 13 along the length direction can meet the operating requirements. In addition, when the dopant 15 is an electrode, the connection strength and contact performance between the electrode and the semiconductor can be adjusted by reasonably controlling the morphology at the ends and the middle of each doped sub-region 13 along the length direction, thereby further improving the photoelectric conversion efficiency of the solar cell.

[0085] In actual applications, the solar cells provided in the embodiments of the present application do not specifically limit the type of dopant. Specifically, the dopant can be a non-metallic dopant such as boron or phosphorus, or a metal dopant such as aluminum, gallium, or indium. When the dopant is a metal dopant such as aluminum, gallium, or indium, the metal dopant can be an electrode located on the side of the semiconductor substrate where the first doped region is formed.

[0086] For the semiconductor substrate described above, the specific structure and material of the semiconductor substrate, as well as the formation position of the first doped region on the semiconductor substrate can be determined according to the type of solar cell.

[0087] For example, when the solar cell provided in the embodiment of the present application is a double-sided contact cell, the semiconductor base may include a semiconductor substrate and a doped semiconductor layer formed on the light-facing side or the backlight side of the semiconductor substrate. The conductivity type of the doped semiconductor layer is opposite to that of the semiconductor substrate. In the above case, the first doped region may be distributed only on the side of the semiconductor substrate away from the doped semiconductor layer; or the first doped region may also be distributed only on the side of the doped semiconductor layer away from the semiconductor substrate; or the first doped region may also be distributed on the side of the semiconductor substrate away from the doped semiconductor layer, and on the side of the doped semiconductor layer away from the semiconductor substrate. In this case, both the light-facing side and the backlight side of the semiconductor substrate have the first doped region, and the conductivity type of the first doped region on the light-facing side is opposite to that of the first doped region on the backlight side.

[0088] Specifically, the semiconductor substrate can be made of semiconductor materials such as silicon, silicon-germanium, germanium, or gallium arsenide. The conductivity type of the semiconductor substrate can be either N-type or P-type. Regarding the doped semiconductor layer, when the conductivity type of the semiconductor substrate is N-type, the conductivity type of the doped semiconductor layer is P-type; when the conductivity type of the semiconductor substrate is P-type, the conductivity type of the doped semiconductor layer is N-type. Furthermore, the doped semiconductor layer can be made of semiconductor materials such as silicon, germanium, silicon carbide, or gallium arsenide. In terms of the internal arrangement of the material, the doped semiconductor layer can be amorphous, microcrystalline, single crystal, nanocrystalline, or polycrystalline.

[0089] For another example: When the solar cell provided in the embodiment of the present application is a back-contact cell, the semiconductor base may include a semiconductor substrate and a doped semiconductor layer formed on a portion of the backlight surface of the semiconductor substrate. The doped semiconductor layer has a conductivity type opposite to that of the semiconductor substrate. In this case, in the actual manufacturing process of the semiconductor substrate, it is only necessary to form an entire doped semiconductor layer covering the backlight surface of the semiconductor substrate and remove a portion of the doped semiconductor layer located on the backlight surface. In this way, two doped regions of opposite conductivity types can be formed on the backlight side, thereby solving the problem of the need to dope the backlight surface twice with opposite conductivity types, which leads to a complicated solar cell manufacturing process.

[0090] Specifically, when the semiconductor base includes the above-mentioned semiconductor substrate and the doped semiconductor layer formed on a partial area of ​​the backlight surface of the semiconductor substrate, the materials and conductivity types of the semiconductor substrate and the doped semiconductor layer can refer to the materials and conductivity types of the semiconductor substrate and the doped semiconductor layer included in the semiconductor substrate when the solar cell is a double-sided contact cell as described above, and will not be repeated here.

[0091] Secondly, the first doped region can be distributed on the side of the doped semiconductor layer facing away from the semiconductor substrate; in this case, the second doped region is formed in the region where the backlight side of the semiconductor substrate is exposed outside the doped semiconductor layer. Alternatively, the first doped region can also be distributed in the region where the backlight side of the semiconductor substrate is exposed outside the doped semiconductor layer, and the second doped region is formed on the side of the doped semiconductor layer facing away from the semiconductor substrate.

[0092] In some cases, the semiconductor substrate may further include a passivation layer located between the semiconductor substrate and the doped semiconductor layer. The passivation layer may passivate at least the portion of the surface where the semiconductor substrate contacts the doped semiconductor layer, thereby reducing the rate at which carriers recombine at the contact point between the two. Furthermore, the doped semiconductor layer formed on the passivation layer may selectively collect carriers of the corresponding conductivity type within the semiconductor substrate, thereby further improving the photoelectric conversion efficiency of the solar cell provided in the embodiment of the present application. Specifically, the material of the passivation layer may be determined based on the material of the doped semiconductor layer.

[0093] For example, when the doped semiconductor layer is a doped amorphous silicon layer, a doped microcrystalline silicon layer, or a mixed layer of doped amorphous silicon and microcrystalline silicon, the passivation layer can be an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, or a mixed layer of intrinsic amorphous silicon and microcrystalline silicon. In this case, the doped semiconductor layer and the passivation layer can form a heterogeneous contact structure.

[0094] For another example, when the doped semiconductor layer is a doped polysilicon layer, the passivation layer is a tunneling passivation layer. In this case, the doped semiconductor layer and the passivation layer can form a tunneling passivation contact structure. Furthermore, the material of the tunneling passivation layer can include any dielectric material having a tunneling passivation effect. For example, the material of the tunneling passivation layer can include one or more of silicon oxide, aluminum oxide, titanium oxide, hafnium dioxide, gallium oxide, tantalum pentoxide, niobium pentoxide, silicon nitride, silicon carbonitride, aluminum nitride, titanium nitride, and titanium nitride carbide.

[0095] When the semiconductor substrate included in the semiconductor base is a P-type semiconductor substrate, the doped semiconductor layer is an N-type doped polycrystalline silicon layer, and a tunneling passivation layer is formed between the P-type semiconductor substrate and the N-type doped polycrystalline silicon layer, the solar cell provided in the embodiment of the present application is a HPBC (composite passivated back contact) cell. The tunneling passivation layer and the N-type doped polycrystalline silicon layer constitute an N-type tunneling passivation contact structure.

[0096] In some cases, as shown in FIG2 , when the solar cell provided in the embodiments of the present application is a back-contact cell, the solar cell may further include a light-facing passivation layer 18 disposed entirely on the light-facing side of the semiconductor substrate 11 to passivate surface defects on the light-facing side of the semiconductor substrate 11 and reduce the carrier recombination rate on the light-facing side. The embodiments of the present application do not specifically limit the material and thickness of the light-facing passivation layer 18.

[0097] For another example, when the solar cell is a passivated emitter and back contact cell, the first doped region is formed only on the backlight side of the semiconductor substrate. This application does not impose any specific restrictions on the structure and material of the semiconductor substrate in this case; any material that can be applied to the solar cell provided in the embodiments of this application is acceptable.

[0098] As for the specific morphology of each part of each doped sub-region included in the first doped region along its own length direction, it can be determined according to the type of dopant and the actual application scenario, as long as the maximum depth of the two ends of each doped sub-region recessed into the semiconductor substrate along the length direction of the doped sub-region can be greater than the maximum depth of the middle part of the doped sub-region recessed into the semiconductor substrate, and / or, as long as the morphology of the two ends of each doped sub-region and the morphology of the middle part of the doped sub-region can be different along the length direction of the doped sub-region.

[0099] Specifically, the longitudinal cross-section of the middle portion of each doped sub-region along its own length direction can be in a straight line, a broken line, an arc, or a wavy shape. As shown in Figures 1 to 3, when the longitudinal cross-section of the middle portion of each doped sub-region 13 along its own length direction is in an arc or wavy shape, the surface of the middle portion of each doped sub-region 13 along its own length direction has an uneven morphology. Compared with a flat surface, an uneven surface has a larger surface area, which is conducive to increasing the formation range of the middle portion of each doped sub-region 13 along its own length direction and enhancing the carrier collection capability of the middle portion of the doped sub-region 13 along its own length direction.

[0100] In addition, the longitudinal cross-section of the end portion of each doped sub-region along its own length direction may be in the shape of a straight line, a sharp angle, a quasi-acute angle with a smooth transition at the end portion away from the conductive window, a peak shape, or a wavy shape. As shown in FIG1 , FIG2 and FIG4 , when the longitudinal cross-sections of the two ends of each doped sub-region 13 along its own length direction are in the shape of a sharp angle, and the end portion away from the conductive window 16 is in the shape of a quasi-acute angle with a smooth transition or a peak shape, the width of each doped sub-region 13 recessed into the semiconductor substrate 11 along its own length direction changes in a similar linear manner, so that the carrier collection capability of each region along the depth direction at each end portion of the doped sub-region 13 along its own length direction is relatively stable, thereby ensuring that each portion at each end portion of the doped sub-region 13 along its own length direction has good carrier collection performance. At the same time, when the dopant 15 is an electrode, the longitudinal cross-sections of the doped sub-region 13 at both ends along its own length direction are sharp-angled, and the ends away from the conductive window 16 have a quasi-acute angle or peak shape with a smooth transition. It can also make the connection strength change trend between the two ends of the dopant 15 along its own length direction and the various regions in the depth direction and the semiconductor substrate 11 more stable, further improving the connection strength between the electrode and the semiconductor substrate 11.

[0101] The three-dimensional morphology of each doped sub-region can be determined according to the type of dopant and the longitudinal cross-sectional shape of the doped sub-region, which is not specifically limited here.

[0102] For example, as shown in Figures 1 to 6 , the central surface of each doped sub-region 13 along its length is formed by a single, cut, quasi-hemispherical surface, or by a plurality of overlapping quasi-hemispherical surfaces; and / or, when viewed through the thickness of the semiconductor substrate 11, the central portion of each doped sub-region 13 along its length is shaped like an abacus bead. In this case, each region along the circumference of the central portion of the doped sub-region 13 is recessed into the semiconductor substrate 11 to approximately the same degree, ensuring that each region along the circumference of the central portion of the doped sub-region 13 has good carrier collection performance.

[0103] For example, the surfaces at both ends of each doped sub-region 13 along its length are triangular pyramid-like surfaces that overlap with the middle portion of the doped sub-region 13, and when viewed in the thickness direction of the semiconductor substrate 11, the two ends of each doped sub-region 13 along its length are rectangular with missing corners. In this case, the three surfaces of the triangular pyramid have good symmetry, which can ensure that the surface areas of the three portions along the circumference of the two ends of the doped sub-region 13 are approximately the same, thereby facilitating that the carrier collection performance corresponding to these three portions is approximately the same.

[0104] As for the maximum depth of each doped sub-region concave into the semiconductor substrate at the middle and both ends along its own length direction and the ratio between the two maximum depths, as well as the maximum width of each doped sub-region at the middle and both ends along its own length direction and the size relationship between the two maximum widths, they can be determined according to the actual application scenario and are not specifically limited here.

[0105] Specifically, the maximum depth of each doped sub-region recessed into the semiconductor substrate at the middle and both ends along its own length direction can be equal; or, as shown in Figures 1 and 2, the maximum depth of each doped sub-region 13 recessed into the semiconductor substrate 11 at both ends along its own length direction is greater than the maximum depth of the middle of the doped sub-region 13 recessed into the semiconductor substrate 11. In this case, as the depth of the corresponding part of the doped sub-region 13 recessed into the semiconductor substrate 11 increases, the formation range of the doped sub-region 13 increases; at the same time, within a certain range, the carrier collection ability of the doped sub-region 13 is proportional to its own formation range. Therefore, compared with the roughly the same depth of each part of the doped sub-region 13 recessed into the semiconductor substrate 11 along the length direction, when the depth of the two ends of each doped sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle part of the doped sub-region 13 recessed into the semiconductor substrate 11, the carrier collection ability of each doped sub-region 13 at both ends along its own length direction can be enhanced, and the carrier recombination rate on the side of the semiconductor substrate 11 where the first doped region 12 is formed can be reduced, which is beneficial to improving the photoelectric conversion efficiency of the solar cell. In addition, when the dopant 15 is an electrode, when the depth of the two ends of the doped sub-region 13 recessed into the semiconductor substrate 11 is greater than the maximum depth of the middle of the doped sub-region 13 recessed into the semiconductor substrate 11, the bonding depth between the electrode and the semiconductor substrate 11 at both ends of each doped sub-region 13 along its own length direction is larger, which can further improve the connection strength between the electrode and the semiconductor substrate 11 and reduce the risk of the electrode detaching from the semiconductor substrate 11; at the same time, it can also increase the contact area between the electrode and the semiconductor substrate 11, thereby reducing the contact resistance between the electrode and the semiconductor substrate 11, improving the contact performance, and further improving the photoelectric conversion efficiency of the solar cell.

[0106] Specifically, in the embodiment of the present application, there is no specific limitation on the specific values ​​of the maximum depths of each doped sub-region recessed into the semiconductor substrate at the middle and both ends along its length direction, and the ratio between the two maximum depths.

[0107] For example, along the length direction of the doped sub-region, the ratio of the maximum depth of the doped sub-region's two ends recessed into the semiconductor substrate to the maximum depth of the doped sub-region's middle portion recessed into the semiconductor substrate may be greater than or equal to 1.61 and less than or equal to 3.46. For example, along the length direction of the doped sub-region, the ratio of the maximum depth of the doped sub-region's two ends recessed into the semiconductor substrate to the maximum depth of the doped sub-region's middle portion recessed into the semiconductor substrate may be 1.61, 1.7, 1.9, 2.0, 2.5, 3.3, 3.46, etc. In this case, along the length direction of the doped sub-region, the ratio of the maximum depth of the doped sub-region's two ends recessed into the semiconductor substrate to the maximum depth of the doped sub-region's middle portion recessed into the semiconductor substrate is within the above range, which can prevent the carrier collection capability of the doped sub-region along its own length direction from being significantly improved due to a small ratio, thereby ensuring that the first doped region has a higher carrier collection capability. When the dopant is an electrode, this can also prevent the increase in the depth of the bond between the electrode and the semiconductor substrate from being insignificant due to a small ratio, thereby ensuring a high connection strength between the electrode and the semiconductor substrate and ensuring high contact performance between the electrode and the semiconductor substrate. In addition, within a certain range, the greater the depth of the corresponding portion of the doped sub-region recessed into the semiconductor substrate, the higher the temperature corresponding to the formation of the doped sub-region by the dopant. Based on this, the ratio of the two maximum depths within the above range can also prevent damage to the semiconductor substrate caused by the high temperature when the doped sub-region is formed by the dopant due to a large ratio, which is beneficial to improving the yield of the solar cell.

[0108] Illustratively, the maximum depth of each doped sub-region recessed into the semiconductor substrate along the middle of its length may be greater than or equal to 10 μm and less than or equal to 16 μm. For example, the maximum depth of each doped sub-region recessed into the semiconductor substrate along the middle of its length may be 10 μm, 12 μm, 13.64 μm, 14 μm, or 16 μm.

[0109] For example, the maximum depth of each doped sub-region recessed into the semiconductor substrate along its longitudinal direction at both ends may be greater than or equal to 30 μm and less than or equal to 40 μm. For example, the maximum depth of each doped sub-region recessed into the semiconductor substrate along its longitudinal direction at the middle portion may be 30 μm, 32 μm, 33.10 μm, 35 μm, 38 μm, or 40 μm.

[0110] As for the maximum width of the middle and both ends of each doped sub-region along its own length direction, the maximum widths of these two parts can be equal; or illustratively, as shown in Figures 5 and 6, the maximum width of the middle of each doped sub-region 13 along its own length direction can also be smaller than the maximum width of the both ends of the doped sub-region 13. In this case, along the direction parallel to the light-facing surface or the backlight surface of the semiconductor substrate, the lateral proportion of the two ends of each doped sub-region 13 along its own length direction is larger, so that the two ends of each doped sub-region 13 along its own length direction have a relatively high lateral carrier collection ability. In addition, when the dopant 15 is an electrode, it can also enhance the connection strength between the electrode and the semiconductor substrate parallel to the light-facing surface or the backlight surface, and increase the contact area between the electrode and the semiconductor substrate parallel to the light-facing surface or the backlight surface, which is beneficial to improving the contact performance between the electrode and the semiconductor substrate.

[0111] Specifically, in the embodiment of the present application, no specific limitation is imposed on the maximum width of the middle and both ends of each doped sub-region along its own length direction.

[0112] Exemplarily, the maximum width of the middle portion of each doped sub-region along its own length direction may be greater than or equal to 30 μm and less than or equal to 40 μm. For example, the maximum width of the middle portion of each doped sub-region along its own length direction may be 30 μm, 32 μm, 34 μm, 36 μm, 38 μm or 40 μm, etc. In this case, the maximum width of the middle portion of each doped sub-region along its own length direction is within the above range, which can prevent the middle portion of the doped sub-region along its own length direction from being unable to collect carriers of the corresponding conductive type in a timely manner due to the small maximum width of the middle portion of the doped sub-region along its own length direction, thereby reducing the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed. At the same time, it can also prevent the semiconductor substrate from being damaged due to the high formation temperature when forming the first doped region due to the large maximum width of the middle portion of the doped sub-region along its own length direction, thereby ensuring that the solar cell has a high yield.

[0113] Exemplarily, the maximum width of each doped sub-region at both ends along its own length direction may be greater than or equal to 54 μm and less than or equal to 72 μm. For example, the maximum width of each doped sub-region at both ends along its own length direction may be 54 μm, 58 μm, 62 μm, 66 μm, 70 μm, or 72 μm. The beneficial effects in this case can be referred to the beneficial effects analysis when the maximum width of the middle portion of each doped sub-region along its own length direction is greater than or equal to 30 μm and less than or equal to 40 μm as described above, and will not be repeated here.

[0114] The surface passivation layer can be made of any insulating material with a passivating effect. For example, the surface passivation layer can be made of at least one of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, and silicon carbide. The thickness of the surface passivation layer can be determined based on the actual application scenario and is not specifically limited here.

[0115] As for the conductive window set in the surface passivation layer, since the dopant needs to pass through the surface passivation layer through the conductive window and form a first doped region in the semiconductor substrate, the distribution and size of the conductive window in the surface passivation layer can be determined according to the distribution and morphology of the first doped region on the light-facing surface and / or backlight surface of the semiconductor substrate.

[0116] In which, a plurality of first doped regions are formed on the light-facing surface and / or the backlight surface of the semiconductor substrate, and thus a plurality of conductive windows are provided in the surface passivation layer. The plurality of conductive window columns comprising the plurality of the above-mentioned conductive windows can all extend along a first direction and be spaced apart along a second direction. The first direction is different from the second direction. Specifically, the first direction and the second direction can be any two directions parallel to the light-facing surface or the backlight surface and different from each other. Preferably, the first direction and the second direction are orthogonal.

[0117] Furthermore, the number of conductive window groups included in a conductive window column is equal to the number of doped sub-regions in each first doped region. Specifically, when each first doped region has only one doped sub-region, each conductive window column also has only one conductive window group. In this case, if the dopant is an electrode, the contact between the electrode and the first doped region is a full-area contact method.

[0118] Alternatively, when each first doped region has multiple doped sub-regions, each conductive window column also has multiple conductive window groups. Based on this, when each conductive window column extends along the first direction, the multiple conductive window groups included in each conductive window column are spaced apart along the first direction, and the multiple conductive window groups included in the same conductive window column correspond one-to-one to the multiple doped sub-regions included in the same first doped region. In this case, there are some areas of the dopant along the length direction that are not in contact with the first doped region. At this time, if the dopant is an electrode, the contact mode between the electrode and the first doped region is a localized contact mode.

[0119] Specifically, when each conductive window column includes multiple conductive window groups spaced apart along the first direction, the embodiment of the present application defines the sum of the lengths of all conductive window groups in the same conductive window column along the first direction as the first length, and the sum of the spacings between each two adjacent conductive window groups in the same conductive window column along the first direction as the second length. The ratio of the above-mentioned first length and the second length can be any value greater than 0 and less than 1. It can be understood that, as shown in Figures 1 and 2, the surface passivation layer 14 can chemically passivate the side of the semiconductor substrate 11 where the first doping region 12 is formed, thereby reducing the carrier recombination rate on the side of the semiconductor substrate 11 where the first doping region 12 is formed. Providing a conductive window 16 in the surface passivation layer 14 will reduce the contact area between the surface passivation layer 14 and the semiconductor substrate 11, but the dopant 15 needs to pass through the surface passivation layer 14 through the conductive window 16 to form the first doping region 12. Based on this, within a certain range, the more conductive windows 16 are provided in the surface passivation layer 14 or the larger their area, the worse the passivation effect of the surface passivation layer 14 on the semiconductor substrate 11, but the larger the surface area of ​​the first doped region 12, the lower the series resistance of the solar cell. Based on this, the first length is the sum of the lengths of all conductive window groups along the first direction in the same conductive window column including multiple conductive windows 16. The larger this value, the more conductive window groups the conductive window column includes or the larger their area. The second length is the sum of the spacings along the first direction between each adjacent conductive window group in the same conductive window column including multiple conductive windows 16. The larger this value, the longer the lengths of the two adjacent conductive window groups included in the same conductive window column of the surface passivation layer 14. In the above case, the first and second lengths, as well as the ratio between them, can be determined based on the surface passivation effect on the side of the semiconductor substrate 11 where the first doped region 12 is formed, and the series resistance requirements of the solar cell in the actual application scenario.

[0120] Alternatively, when each first doped region has only one doped sub-region and each doped sub-region corresponds to at least three conductive windows, if the dopant is an electrode, the contact mode between the electrode and the first doped region is a full-area contact mode.

[0121] Alternatively, when each first doped region has multiple doped sub-regions, and each doped sub-region corresponds to at least three conductive windows, the conductive window group corresponding to each doped sub-region is all of its corresponding conductive windows, and the different conductive window groups corresponding to the same first doped region are spaced apart along the length of the doped sub-region. In this case, there are portions of the dopant along the length that are not in contact with the first doped region. In this case, if the dopant is an electrode, the contact between the electrode and the first doped region is a localized contact.

[0122] Specifically, when different conductive window groups corresponding to the same first doping region are spaced apart along the length direction of the doping sub-region, the embodiment of the present application defines that along the length direction of the doping sub-region, the sum of the lengths of all conductive windows corresponding to the same first doping region along the first direction is the first length, and the sum of the spacings between the conductive window groups corresponding to each two adjacent doping sub-regions in the same first doping region is the second length. The ratio of the above-mentioned first length and the second length can be any value greater than 0 and less than 1. It can be understood that, as shown in Figures 1 and 2, the surface passivation layer 14 can chemically passivate the side of the semiconductor substrate 11 where the first doping region 12 is formed, thereby reducing the carrier recombination rate on the side of the semiconductor substrate 11 where the first doping region 12 is formed. Providing a conductive window 16 in the surface passivation layer 14 will reduce the contact area between the surface passivation layer 14 and the semiconductor substrate 11, but the dopant 15 needs to pass through the surface passivation layer 14 through the conductive window 16 to form the first doping region 12. Based on this, within a certain range, the more the number or the larger the area of ​​the conductive windows 1616 set in the surface passivation layer 14, the worse the passivation effect of the surface passivation layer 14 on the semiconductor substrate 11, but the larger the surface area of ​​the first doping region 12, the smaller the series resistance of the solar cell. Based on this, the above-mentioned first length is the sum of the lengths of all the conductive windows 16 corresponding to the same first doping region 12 along the first direction. The larger this value, the more the number or the larger the area of ​​the conductive windows 16. The second length is the sum of the spacings between the conductive window groups corresponding to each two adjacent doping sub-regions 13 in the same first doping region 12. The larger this value, the longer the length of the portion of the surface passivation layer 14 located between the two adjacent conductive window groups corresponding to the same first doping region 12. In the above case, the size of the first length and the second length, as well as the ratio between the two, can be determined based on the surface passivation effect on the side of the semiconductor substrate 11 where the first doping region 12 is formed, and the requirements for the series resistance of the solar cell in the actual application scenario.

[0123] Exemplarily, the ratio of the first length to the second length may be greater than or equal to 1:9 and less than or equal to 5:5. For example, the ratio of the first length to the second length may be 1:9, 2:8, 3:7, 4:6, or 5:5. In this case, the ratio of the first length to the second length is within the above range, which can prevent the area of ​​the first doped region from being smaller due to the smaller ratio, thereby ensuring that the first doped region has a higher carrier collection performance, which is beneficial to reducing the series resistance of the solar cell. In addition, it can also prevent the contact area between the surface passivation layer and the semiconductor substrate from being larger due to the larger ratio, thereby ensuring that the surface passivation layer has a higher passivation effect on the side of the semiconductor substrate where the first doped region is formed.

[0124] Specifically, the present embodiment provides Table 1 for comparing various parameters corresponding to solar cells when the ratio of the first length to the second length is different. In Experiment 1, 48 solar cells with a first length and a second length satisfying a ratio of 3:7 and 43 solar cells with a first length and a second length satisfying a ratio of 1.5:8.5 were tested, and the average values ​​of the corresponding parameters were obtained. In Experiment 2, 47 solar cells with a first length and a second length satisfying a ratio of 3:7 and 47 solar cells with a first length and a second length satisfying a ratio of 1.5:8.5 were tested, and the average values ​​of the corresponding parameters were obtained. In addition, the solar cells in Experiments 1 and 2 have the same structure except for the above-mentioned ratio of the first length and the second length. Specifically, the above-mentioned solar cells all include a P-type silicon substrate with a velvet surface on the light-facing surface, an aluminum oxide layer and a silicon nitride layer stacked in sequence on the light-facing surface of the P-type silicon substrate, a tunneling oxide layer and an N-type doped polysilicon layer stacked in sequence on a portion of the backlight surface of the P-type silicon substrate, an aluminum oxide layer and a silicon nitride layer stacked in sequence covering the backlight surface and the N-type doped polysilicon layer, and a negative electrode and a positive electrode. The negative electrode penetrates the aluminum oxide layer and silicon nitride layer on the backlight side and contacts the N-type doped polysilicon layer. The positive electrode penetrates the aluminum oxide layer and silicon nitride layer on the backlight side and contacts the corresponding area of ​​the P-type silicon substrate.

[0125] Table 1 Test results of various parameters of solar cells when the ratio of the first length to the second length is different

[0126] Table 1 shows that compared to a first-to-second-length ratio of 3:7, a solar cell with a first-to-second-length ratio of 1.5:8.5 exhibits a higher open-circuit voltage due to a smaller area of ​​damage to the surface passivation layer. However, the resulting conductive window is smaller, resulting in a smaller surface area of ​​the first doped region, which increases the series resistance and reduces the fill factor. Furthermore, a comparison of solar cells with a first-to-second-length ratio of 4:6 and a first-to-second-length ratio of 1.5:8.5 yields the opposite results.

[0127] In addition, the embodiment of the present application defines the length of each conductive window group along the first direction as the third length. It is understandable that each first length is equal to the sum of the third lengths corresponding to all conductive window groups included in the same conductive window column. Among them, the third lengths corresponding to different conductive window groups included in the same conductive window column can be equal or unequal. The third lengths corresponding to different conductive window groups included in different conductive window columns can be equal or unequal.

[0128] It is noteworthy that when the third lengths corresponding to different conductive window groups within the same conductive window column are equal, this facilitates the different conductive window groups within the same conductive window column to have the same specifications. Similarly, when the third lengths corresponding to different conductive window groups within different conductive window columns are equal, this facilitates the different conductive window groups within different conductive window columns to have the same specifications. This eliminates the need for strict manufacturing precision to form conductive window groups of different specifications in fixed positions, thereby reducing the difficulty of manufacturing solar cells.

[0129] In the case where each doped sub-region corresponds to at least three conductive windows, the third length can also be defined as the length of the conductive window group corresponding to each doped sub-region along the length direction of the doped sub-region. It can be understood that each first length is equal to the sum of the third lengths of all conductive window groups corresponding to the same first doped region. The third lengths of different conductive window groups corresponding to the same first doped region may be equal or unequal. The third lengths of different conductive window groups corresponding to different first doped regions may be equal or unequal.

[0130] In the above situation, it is worth noting that, in the same first doping region, when the third lengths of the conductive window groups corresponding to different doping sub-regions are equal, this facilitates the different conductive window groups corresponding to the same first doping region to have the same specifications. Similarly, when the third lengths of the conductive window groups corresponding to two doping sub-regions belonging to different first doping regions are equal, this facilitates the different conductive window groups corresponding to different first doping regions to have the same specifications. This eliminates the need for strict manufacturing precision in order to form conductive window groups of different specifications in fixed positions, thereby reducing the difficulty of manufacturing the solar cell.

[0131] As for the specific value of the third length, it can be determined according to the type of dopant, the formation process of the first doping region, and the actual application scenario, as long as the first length and the second length meet the corresponding ratio.

[0132] Exemplarily, the third length may be greater than or equal to 250 μm and less than or equal to 290 μm. For example, the third length may be 250 μm, 260 μm, 270 μm, 280 μm or 290 μm, etc. In this case, it is possible to prevent the cross-sectional area of ​​each doped sub-region formed by the dopant from being smaller than the cross-sectional area of ​​the conductive window group due to the difficulty in filling the conductive window group with smaller specifications due to the smaller third length, thereby ensuring that each doped sub-region has a higher carrier collection ability due to its larger cross-sectional area. Secondly, it is also possible to prevent the contact area between the surface passivation layer and the semiconductor substrate from being smaller due to the larger third length, thereby ensuring that the surface passivation layer has a higher passivation effect on the side of the semiconductor substrate where the first doped region is formed.

[0133] Furthermore, the embodiment of the present application defines the spacing between each two adjacent conductive window groups along the first direction in the same conductive window column as a fourth length. It can be understood that each second length is equal to the sum of the fourth lengths corresponding to each two adjacent conductive window groups in the same conductive window column. Among them, in the same conductive window column, the fourth lengths corresponding to each two adjacent conductive window groups can be equal or unequal. Secondly, if each pair of conductive window groups is two adjacent conductive window groups in the same conductive window column, the fourth lengths corresponding to the two pairs of conductive window groups belonging to different conductive window columns can be equal or unequal.

[0134] It is noteworthy that in the same conductive window column, when the spacing between each two adjacent conductive window groups along the first direction is the fourth length, the different doped sub-regions included in different first doped regions are distributed at equal intervals. Secondly, when the fourth lengths corresponding to two pairs of conductive window groups belonging to different conductive window columns are equal, the two pairs of conductive window groups belonging to different conductive window columns are distributed at equal intervals, which is conducive to making the different conductive window groups evenly distributed in the surface passivation layer, and further conducive to the first doped region to collect carriers of corresponding conductivity types in each area of ​​the semiconductor substrate parallel to the backlight surface or the light surface in a timely manner, further reducing the carrier recombination rate on the side of the semiconductor substrate where the first doped region is formed.

[0135] In the case where each doped sub-region corresponds to at least three conductive windows, the fourth length can also be defined as the spacing between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region along the length direction of the doped sub-region. It can be understood that each second length is equal to the sum of the fourth lengths corresponding to each two adjacent conductive window groups corresponding to the same first doped region. Among them, in the same first doped region, the fourth lengths of the conductive window groups corresponding to each two adjacent doped sub-regions may be equal or unequal. Secondly, if each pair of doped sub-regions are two adjacent doped sub-regions in the same first doped region, the fourth lengths of the conductive window groups corresponding to the two pairs of doped sub-regions belonging to different first doped regions may be equal or unequal.

[0136] In the above case, it is worth noting that when the spacing between the conductive window groups corresponding to each two adjacent doping sub-regions in the same first doping region is the fourth length, if the fourth lengths of the conductive window groups corresponding to each two adjacent doping sub-regions in the same first doping region are equal, then the different doping sub-regions included in the same first doping region are distributed at equal intervals. Secondly, if the fourth lengths of the conductive window groups corresponding to two pairs of doping sub-regions belonging to different first doping regions are equal, then the two pairs of doping sub-regions belonging to different first doping regions are distributed at equal intervals, which is conducive to making the different conductive window groups evenly distributed in the surface passivation layer, and further conducive to making the first doping region collect the carriers of the corresponding conductive type in each region of the semiconductor substrate parallel to the backlight surface or the light surface in a timely manner, further reducing the carrier recombination rate on the side of the semiconductor substrate where the first doping region is formed.

[0137] As for the specific size of the above-mentioned fourth length, it can be determined based on the number of conductive window groups included in each conductive window column or the number of conductive window groups corresponding to each first doped region, the ratio of the first length to the second length, and the specific size of the third length, and no specific limitation is made here.

[0138] For example: when each conductive window column includes 5 conductive window groups or when each first doped region corresponds to 5 conductive window groups (at this time the first doped region includes 5 doped sub-regions), the ratio of the first length to the second length is 3:7, and the third length is equal to 250μm, the fourth length is equal to 729.17μm.

[0139] The present application also provides another solar cell, which includes: a semiconductor substrate, a surface passivation layer and a dopant. The light-facing surface and / or the backlight surface of the semiconductor substrate have a first doped region. The surface passivation layer is formed on the side of the semiconductor substrate having the first doped region. A plurality of conductive windows are provided in the surface passivation layer. The dopant is used to penetrate the surface passivation layer through the conductive windows to form a first doped region. The first doped region includes at least one doped sub-region. Each doped sub-region corresponds to at least three conductive windows. Along the length direction of the doped sub-region, the morphology at both ends of each doped sub-region is different from the morphology in the middle of the doped sub-region.

[0140] As a possible implementation scheme, the longitudinal cross-section of the middle part of each doped sub-region along its own length direction is arc-shaped or wavy; and / or the longitudinal cross-sections of the two ends of each doped sub-region along its own length direction are sharp-angled, and the ends away from the conductive window have a smooth transition to an acute-angled or peak-shaped shape.

[0141] As a possible implementation scheme, the middle surface of each doped sub-region along its own length direction is composed of a cut single hemispherical surface, or is composed of multiple hemispherical surfaces overlapping each other; and / or, when observed in the thickness direction of the semiconductor substrate, the middle part of each doped sub-region along its own length direction is in the shape of an abacus bead; and / or, the two end surfaces of each doped sub-region along its own length direction are triangular pyramid-like surfaces overlapping with the middle part of the doped sub-region, and when observed in the thickness direction of the semiconductor substrate, the two ends of each doped sub-region along its own length direction are in the shape of a rectangular with missing corners.

[0142] As a possible implementation scheme, the maximum width of each doped sub-region in the middle along its own length direction is smaller than the maximum width of the two ends of the doped sub-region; and / or, the maximum width of each doped sub-region in the middle along its own length direction is greater than or equal to 30 μm and less than or equal to 40 μm; and / or, the maximum width of each doped sub-region in the middle along its own length direction is greater than or equal to 54 μm and less than or equal to 72 μm.

[0143] As a possible implementation solution, along the length direction of the doped sub-region, the maximum depth of each doped sub-region's two ends recessed into the semiconductor substrate is greater than the maximum depth of the middle portion of the doped sub-region recessed into the semiconductor substrate.

[0144] As a possible implementation scheme, along the length direction of the doped sub-region, the ratio of the maximum depth of the two ends of the doped sub-region recessed into the semiconductor substrate to the maximum depth of the middle part of the doped sub-region recessed into the semiconductor substrate is greater than or equal to 1.61 and less than or equal to 3.46.

[0145] As a possible implementation scheme, along the length direction of the doped sub-region, the sum of the lengths of all the conductive windows corresponding to the same first doped region along the first direction is the first length; the conductive window group corresponding to each doped sub-region is all the conductive windows corresponding to itself; along the length direction of the doped sub-region, the sum of the spacings between the conductive window groups corresponding to each adjacent two doped sub-regions in the same first doped region is the second length; the ratio of the first length to the second length is greater than or equal to 1:9 and less than or equal to 5:5.

[0146] As a possible implementation scheme, along the length direction of the doped sub-region, the length of the conductive window group corresponding to each doped sub-region is a third length; wherein, in the same first doped region, the third lengths of the conductive window groups corresponding to different doped sub-regions are equal; and / or, the third lengths of the conductive window groups corresponding to two doped sub-regions belonging to different first doped regions are equal; and / or, the third length is greater than or equal to 250μm and less than or equal to 290μm.

[0147] As a possible implementation scheme, along the length direction of the doped sub-region, the spacing between the conductive window groups corresponding to each two adjacent doped sub-regions in the same first doped region is a fourth length; wherein, in the same first doped region, the fourth lengths of the conductive window groups corresponding to each two adjacent doped sub-regions are equal; and / or, the fourth lengths of the conductive window groups corresponding to two pairs of doped sub-regions belonging to different first doped regions are equal, and each pair of doped sub-regions is two adjacent doped sub-regions in the same first doped region.

[0148] As a possible implementation scheme, the semiconductor base includes a semiconductor substrate and a doped semiconductor layer formed on a partial area of ​​the backlight surface of the semiconductor substrate; the doped semiconductor layer has a conductivity type opposite to that of the semiconductor substrate; the first doped region is distributed in an area of ​​the backlight surface of the semiconductor substrate exposed outside the doped semiconductor layer; and a second doped region is formed on the side of the doped semiconductor layer facing away from the semiconductor substrate.

[0149] As a possible implementation scheme, the semiconductor substrate is a P-type semiconductor substrate, and the doped semiconductor layer is an N-type doped semiconductor layer; the semiconductor base also includes a tunneling passivation layer located between the P-type semiconductor substrate and the N-type doped semiconductor layer.

[0150] As a possible implementation solution, the solar cell is a passivated emitter and back contact cell; the first doped region is formed only on the backlight side of the semiconductor substrate.

[0151] As a possible implementation, both the light-facing surface and the backlight surface of the semiconductor substrate have the first doped region, and the first doped region located on the light-facing side has an opposite conductivity type to the first doped region located on the backlight side. In this application, other technical features of a solar cell provided in this application are also applicable to another solar cell provided in this application, provided there is no conflict, and the same technical features can achieve the same technical effects described in this application. The specific numerical points of the same numerical range features of a solar cell provided in this application are also applicable to another solar cell provided in this application, and will not be repeated here.

[0152] In a second aspect, an embodiment of the present application provides a method for manufacturing a solar cell. The method for manufacturing a solar cell comprises the following steps:

[0153] First, a semiconductor substrate is provided. The specific structure and materials of the semiconductor substrate can be found in the above text and will not be described in detail here.

[0154] In the actual manufacturing process, as described above, when the semiconductor substrate includes the aforementioned P-type semiconductor substrate, the aforementioned tunneling passivation layer, and the aforementioned N-type doped polysilicon layer, chemical vapor deposition or other processes can be used to sequentially form the tunneling passivation layer and the N-type doped polysilicon layer, covering the entire backlight surface of the P-type semiconductor substrate. Subsequently, laser etching or other processes can be used to selectively remove portions of the stacked tunneling passivation layer and the N-type doped polysilicon layer to obtain the semiconductor substrate.

[0155] Next, a surface passivation layer is formed on the light-facing surface and / or the backlight surface of the semiconductor substrate, wherein a plurality of conductive windows are provided in the surface passivation layer.

[0156] Specifically, the material and thickness of the surface passivation layer, as well as the distribution of the conductive windows in the surface passivation layer, can be found in the previous text and will not be described in detail here.

[0157] In the actual manufacturing process, since the subsequently formed dopants need to pass through the surface passivation layer through the conductive window and form a first doping region, the pattern of each conductive window and the specific formation method of the conductive window can be determined according to the morphology of the formed first doping region.

[0158] Exemplarily, forming a surface passivation layer on the light-facing surface and / or the backlight surface of the semiconductor substrate may include the steps of: forming a whole layer of surface passivation material on the light-facing surface and / or the backlight surface of the semiconductor substrate. Next, a laser etching process is used to form a plurality of conductive windows penetrating the surface passivation material to obtain a surface passivation layer. In this case, the laser etching process has a high etching accuracy, so the laser etching process is used to selectively etch the whole layer of surface passivation material, which can improve the manufacturing accuracy of solar cells. In addition, because the energy of the laser spot used in the laser etching process gradually decreases from its center to the edge, and the etching intensity of each part of the laser spot is proportional to the energy of each part, the etching intensity corresponding to each laser spot gradually decreases from its center to the edge. In other words, the etching depth corresponding to each laser spot gradually decreases along the direction from its own center to the edge, which is conducive to making the longitudinal cross-section of each doped sub-region formed after the dopant passes through the surface passivation layer through the conductive window formed by multiple laser spots to be an uneven morphology such as a broken line, arc or wave shape, which is conducive to enhancing the carrier collection ability of each doped sub-region.

[0159] Specifically, the distribution of multiple conductive windows in the surface passivation layer can be determined based on the distribution on the light-facing side or the backlight side of the semiconductor substrate of the first doped region. Exemplarily, multiple conductive window columns including multiple of the above-mentioned conductive windows can all extend along the first direction and be spaced apart along the second direction, and the first direction is different from the second direction. Moreover, when the first doped region includes multiple doped sub-regions, each conductive window column includes multiple conductive window groups spaced apart along the first direction, and the multiple conductive window groups included in the same conductive window column correspond one-to-one to the multiple doped sub-regions included in the same first doped region. Exemplarily, in the case where each of the doped sub-regions corresponds to at least three conductive windows, all the conductive windows corresponding to each doped sub-region included in the first doped region are one conductive window group. When the first doped region includes multiple doped sub-regions, the multiple conductive window groups corresponding to the first doped region are spaced apart along the length direction of the doped sub-region.

[0160] In the case of forming the conductive window by a laser etching process, the pattern of the laser spot used by the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window can be the same as the pattern of the corresponding conductive window. Alternatively, the pattern of the laser spot used by the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window can also be located within the pattern of the corresponding conductive window. In this case, the above-mentioned laser spot pattern and the pattern of the corresponding conductive window can be exactly the same. Alternatively, when the dopant is a structure such as an electrode with a certain burn-through effect, the laser spot pattern and the pattern of the corresponding conductive window may not be strictly corresponding. At this time, in the actual manufacturing process, the corresponding laser spot pattern can be determined based on the accuracy of the laser etching equipment, the pattern of the conductive window, and the type of dopant, thereby reducing the difficulty of the laser etching process.

[0161] As for the case of using laser etching process to form conductive windows, the number, size and distribution of laser spots used by the laser etching process to selectively remove the surface passivation material corresponding to the portion of each conductive window group can be determined according to the morphology of each doped sub-region formed.

[0162] For example, as shown in Figures 1, 2, 5, and 7, when the longitudinal cross-section of each doped sub-region 13 has N arc-shaped recessed portions that are recessed into the semiconductor substrate 11, the number of laser spots 17 used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group is greater than or equal to N+2 and less than or equal to N+4. For example, as shown in Figure 2, when the longitudinal cross-section of each doped sub-region 13 has 10 arc-shaped recessed portions that are recessed into the semiconductor substrate 11, the number of laser spots 17 used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group is greater than or equal to 12 and less than or equal to 14. For another example, as shown in Figure 5, when the longitudinal cross-section of each doped sub-region 13 has 5 arc-shaped recessed portions that are recessed into the semiconductor substrate 11, the number of laser spots 17 used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group is greater than or equal to 7 and less than or equal to 9. In this case, in the longitudinal cross-sectional shape of each doped sub-region 13, there is also a concave portion on each side of the N arc-shaped concave portions that are concave into the semiconductor substrate 11. Each arc-shaped concave portion corresponds to a laser spot 17, and each side concave portion corresponds to at least one laser spot 17. Based on this, when the longitudinal cross-sectional shape of each doped sub-region 13 has N arc-shaped concave portions that are concave into the semiconductor substrate 11, the number of laser spots 17 used by the laser etching process to selectively remove the surface passivation material corresponding to each conductive window group is greater than or equal to N+2 and less than or equal to N+4. A sufficient number of laser spots 17 can be reserved for manufacturing the side concave portions, ensuring that the depth of the side concave portions concave into the semiconductor substrate 11 and the dimensions along the direction parallel to the light-facing surface or the backlight surface can meet the working requirements, thereby improving the yield of the solar cell.

[0163] The size of the laser spot used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group can be determined based on the distance between two adjacent doped sub-regions at their maximum depth recessed into the semiconductor substrate. For example, as shown in FIG2 , if the longitudinal cross-section of each doped sub-region 13 comprises ten arc-shaped recessed portions recessed into the semiconductor substrate 11, and the distance between two adjacent arc-shaped recessed portions at their maximum depth recessed into the semiconductor substrate 11 is 30 μm, the size of the laser spot 17 is approximately 30 μm.

[0164] As for the spacing between two adjacent laser spots in the laser spot used for the laser etching process to selectively remove the portion of the surface passivation material corresponding to each conductive window group, it can be determined according to the type of dopant. Among them, when the dopant does not have a burn-through effect, the two adjacent laser spots can intersect or circumscribe to ensure that a through conductive window group can be obtained. When the dopant is a structure such as an electrode with a certain burn-through effect, the two adjacent laser spots can intersect, circumscribe or separate. Among them, the spacing between two adjacent laser spots can be determined according to the burn-through ability of the dopant and the actual application scenario.

[0165] Exemplarily, in the laser spot used in the laser etching process to selectively remove the surface passivation material corresponding to the portion of the same conductive window group, the spacing between two adjacent laser spots along the first direction can be greater than or equal to -5μm and less than or equal to 5μm. For example: in the laser spot used in the laser etching process to selectively remove the surface passivation material corresponding to the portion of the same conductive window group, the spacing between two adjacent laser spots along the first direction can be -5μm, -3μm, -1μm, 0, 1μm, 3μm or 5μm, etc. Among them, the negative spacing represents the spacing between the two adjacent laser spots. In this case, it can be prevented that the spacing between the two adjacent laser spots along the first direction in the laser spot used for the portion corresponding to the same conductive window group is large, which makes it difficult for the dopant to burn through the portion of the surface passivation layer located between the two adjacent laser spots after the subsequent formation of the dopant to obtain a through conductive window group, thereby improving the precision of the solar cell.

[0166] Next, as shown in Figures 1 and 2, a dopant 15 is formed on the side of the semiconductor substrate 11 corresponding to the surface passivation layer 14. The dopant 15 penetrates the surface passivation layer 14 through the conductive window 16, and forms a first doping region 12 on the side of the semiconductor substrate 11 corresponding to the surface passivation layer 14. The first doping region 12 includes at least one doping sub-region 13. Along the length direction of the first doping sub-region 13, the maximum depth of each doping sub-region 13 recessed into the semiconductor substrate 11 at both ends is greater than the maximum depth of the middle of the doping sub-region 13 recessed into the semiconductor substrate 11, and / or each doping sub-region 13 corresponds to at least three conductive windows 16. Along the length direction of the first doping sub-region 13, the morphology of each doping sub-region 13 at both ends is different from the morphology of the middle of the doping sub-region 13.

[0167] Specifically, the specific formation process of the dopant can be determined according to the size of each conductive window group and the actual application scenario.

[0168] For example, when the dopant is an electrode and the size of the conductive window group is small, the dopant can be formed by processes such as electroplating. Alternatively, when the dopant is an electrode and the size of the conductive window group is relatively large, a screen printing process and a sintering process can be used to form the dopant on the side of the semiconductor substrate corresponding to the surface passivation layer. In this case, the method of forming electrodes by using a printing process and a sintering process is relatively mature. Therefore, when the dopant is an electrode, the difficulty of forming the dopant is reduced by using a screen printing process and a sintering process on the side of the semiconductor substrate corresponding to the surface passivation layer, which is conducive to obtaining a solar cell with a higher yield.

[0169] It should be noted that, as shown in FIG2 , when the dopant 15 is an electrode, after forming the dopant 15 on the side of the semiconductor substrate 11 corresponding to the surface passivation layer 14, the dopant 15 reacts with the semiconductor substrate 11 to form at least a first doped region 12 and an alloy layer formed by the dopant 15 and the semiconductor substrate 11. Furthermore, because the electrode slurry melts and becomes liquid at high temperatures during electrode formation, and the liquid electrode slurry is fluid, the amount of electrode slurry filling the conductive window along its length is greater than the amount of electrode slurry filling the conductive window along its length. This ultimately results in the morphology of each doped sub-region 13 formed by the dopant 15 having different morphologies at its ends than at its center. For example, the maximum depth of each doped sub-region 13 formed by the dopant 15 into the semiconductor substrate 11 can be greater than the maximum depth of the doped sub-region 13 into the semiconductor substrate 11; and / or the maximum width of each doped sub-region 13 formed by the dopant 15 at its ends can be greater than the maximum width of the doped sub-region 13 in its center.

[0170] When the dopant is a non-metallic dopant such as boron or phosphorus, the morphology of the ends of each doped sub-region formed by the dopant can be made different from the morphology of the middle portion by adjusting the injection energy at different positions along the length of the conductive window. For example, the maximum depth of the recess into the semiconductor substrate of the ends of each doped sub-region formed by the dopant is greater than the maximum depth of the recess into the semiconductor substrate of the middle portion of the doped sub-region.

[0171] Furthermore, when the solar cell manufactured by the manufacturing method provided in the embodiment of the present application is a back-contact cell, as shown in FIG2 , a process such as chemical vapor deposition can also be used to form a light-facing passivation layer 18 on the light-facing side of the semiconductor substrate 11. The material and thickness of the light-facing passivation layer 18 can be referred to above.

[0172] The beneficial effects of the second aspect in the embodiments of the present application can be analyzed by referring to the beneficial effects of the first aspect and its various implementation methods, and will not be repeated here.

[0173] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0174] The above describes the embodiments of the present application. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this application. The scope of this application is defined by the appended claims and their equivalents. Without departing from the scope of this application, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of this application.

Claims

1. A solar cell comprising: A semiconductor substrate, wherein the light-facing surface and / or the backlight surface of the semiconductor substrate has a first doped region; A surface passivation layer is formed on a side of the semiconductor substrate having the first doped region; A plurality of conductive windows are provided in the surface passivation layer; The dopant penetrates the surface passivation layer through the conductive window to form the first doping region; the first doping region includes at least one doping sub-region; along the length direction of the doping sub-region, the maximum depth of each of the two ends of the doping sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle of the doping sub-region recessed into the semiconductor substrate.

2. The solar cell according to claim 1, wherein along the length direction of the doped sub-region, a ratio of a maximum depth of the two ends of the doped sub-region recessed into the semiconductor substrate to a maximum depth of the middle portion of the doped sub-region recessed into the semiconductor substrate is greater than or equal to 1.61 and less than or equal to 3.

46.

3. According to the solar cell according to claim 1, each of the doped sub-regions corresponds to at least three of the conductive windows; along the length direction of the doped sub-regions, the morphology of the two ends of each of the doped sub-regions is different from the morphology of the middle part of the doped sub-region.

4. The solar cell according to claim 1, wherein the longitudinal section of each doped sub-region in the middle along its own length direction is arc-shaped or wavy; and / or, The longitudinal sections of the two ends of each doped sub-region along its own length direction are in a sharp-angle shape, and the end away from the conductive window is in a quasi-acute-angle shape or a peak shape with a smooth transition.

5. The solar cell according to claim 1, wherein the middle surface of each doped sub-region along its length direction is composed of a single cut quasi-hemispherical surface, or a plurality of quasi-hemispherical surfaces overlapped with each other; and / or, when observed in the thickness direction of the semiconductor substrate, the middle portion of each doped sub-region along its length direction is in the shape of an abacus bead; And / or, the two end surfaces of each doped sub-region along its own length direction are triangular pyramid-like surfaces overlapping with the middle of the doped sub-region, and when observed in the thickness direction of the semiconductor substrate, the two ends of each doped sub-region along its own length direction are rectangular with missing corners.

6. The solar cell according to claim 5, wherein the maximum width of the middle portion of each doped sub-region along its own length direction is smaller than the maximum width of both ends of the doped sub-region; and / or, The maximum width of each doped sub-region in the middle along its own length direction is greater than or equal to 30 μm and less than or equal to 40 μm; and / or, The maximum width of each doped sub-region at both ends along its own length direction is greater than or equal to 54 μm and less than or equal to 72 μm.

7. The solar cell according to any one of claims 1 to 6, comprising a plurality of conductive window columns extending along a first direction and spaced apart along a second direction; the first direction is different from the second direction; wherein, Each of the conductive window columns includes a plurality of conductive window groups spaced apart along the first direction, and the plurality of conductive window groups included in the same conductive window column correspond one-to-one to the plurality of doped sub-regions included in the same first doped region; the sum of the lengths of all the conductive window groups in the same conductive window column along the first direction is a first length, the sum of the spacings between every two adjacent conductive window groups in the same conductive window column along the first direction is a second length, and the ratio of the first length to the second length is greater than or equal to 1:9 and less than or equal to 5:

5.

8. The solar cell according to claim 7, wherein the length of each of the conductive window groups along the first direction is a third length; wherein, The third lengths corresponding to different conductive window groups included in the same conductive window column are equal; and / or, the third lengths corresponding to different conductive window groups included in different conductive window columns are equal; and / or, the third length is greater than or equal to 250μm and less than or equal to 290μm.

9. The solar cell according to claim 7, wherein in the same conductive window column, the distance between each two adjacent conductive window groups along the first direction is a fourth length; wherein, In the same conductive window column, the fourth lengths corresponding to each two adjacent conductive window groups are equal; and / or, the fourth lengths corresponding to two pairs of conductive window groups belonging to different conductive window columns are equal, and each pair of conductive window groups is two adjacent conductive window groups in the same conductive window column.

10. The solar cell according to any one of claims 1 to 6, wherein the semiconductor base comprises a semiconductor substrate and a doped semiconductor layer formed on a partial area of ​​a backlight surface of the semiconductor substrate; the doped semiconductor layer has a conductivity type opposite to that of the semiconductor substrate; The first doped region is distributed in a region of the semiconductor substrate that is exposed outside the doped semiconductor layer on the backlight side of the semiconductor substrate; a second doped region is formed on a side of the doped semiconductor layer that is away from the semiconductor substrate.

11. The solar cell according to claim 10, wherein the semiconductor substrate is a P-type semiconductor substrate, and the doped semiconductor layer is an N-type doped semiconductor layer; The semiconductor base also includes a tunnel passivation layer located between the P-type semiconductor substrate and the N-type doped semiconductor layer. 12 . The solar cell according to claim 1 , wherein the solar cell is a passivated emitter and back contact cell; and the first doped region is formed only on the backlight side of the semiconductor substrate.

13. The solar cell according to any one of claims 1 to 6, wherein both the light-facing surface and the backlight surface of the semiconductor substrate have the first doped region, and the first doped region located on the light-facing side has a conductivity type opposite to that of the first doped region located on the backlight side.

14. A method for manufacturing a solar cell, comprising: Providing a semiconductor substrate; forming a surface passivation layer on the light-facing surface and / or the backlight surface of the semiconductor substrate; A plurality of conductive windows are provided in the surface passivation layer; forming a dopant on a side of the semiconductor substrate corresponding to the surface passivation layer; The dopant passes through the surface passivation layer through the conductive window and forms a first doping region on a side of the semiconductor substrate corresponding to the surface passivation layer; the first doping region includes at least one doping sub-region; along the length direction of the first doping sub-region, the maximum depth of each of the two ends of the doping sub-region recessed into the semiconductor substrate is greater than the maximum depth of the middle of the doping sub-region recessed into the semiconductor substrate.

15. The method for manufacturing a solar cell according to claim 14, wherein forming a surface passivation layer on the light-facing surface and / or the backlight surface of the semiconductor substrate comprises: Forming a whole layer of surface passivation material on the light-facing surface and / or the backlight surface of the semiconductor substrate; A laser etching process is adopted to form a plurality of the conductive windows penetrating the surface passivation material to obtain the surface passivation layer; wherein, a plurality of conductive window columns including a plurality of the conductive windows extend along a first direction and are spaced apart along a second direction, and the first direction is different from the second direction; each of the conductive window columns includes a plurality of conductive window groups spaced apart along the first direction, and the plurality of conductive window groups included in the same conductive window column correspond one-to-one to the plurality of doped sub-regions included in the same first doped region.

16. The method for manufacturing a solar cell according to claim 15, when the longitudinal cross-sectional shape of each of the doped sub-regions has N arc-shaped recessed portions recessed into the semiconductor substrate, the number of laser spots used by the laser etching process to selectively remove the surface passivation material corresponding to the portion of each conductive window group is greater than or equal to N+2 and less than or equal to N+4.

17. The method for manufacturing a solar cell according to claim 15, wherein the pattern of the laser spot used in the laser etching process to selectively remove the portion of the surface passivation material corresponding to each of the conductive windows is the same as the pattern of the corresponding conductive window; Alternatively, the pattern of the laser spot used by the laser etching process to selectively remove the portion of the surface passivation material corresponding to each of the conductive windows is located within the pattern of the corresponding conductive window.

18. The method for manufacturing a solar cell according to claim 15, wherein in the laser spot used by the laser etching process to selectively remove the portion of the surface passivation material corresponding to the same conductive window group, a spacing between two adjacent laser spots along the first direction is greater than or equal to -5 μm and less than or equal to 5 μm. 19 . The method for manufacturing a solar cell according to claim 14 , wherein the dopant is formed on a side of the semiconductor substrate corresponding to the surface passivation layer by using a screen printing process and a sintering process.

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