Performance analysis method, application method, device, readable medium and program product

Abstract

The present application relates to the technical field of computers, in particular to a performance analysis method, an application method, a device, a readable medium and a program product. According to the method, a plurality of pieces of execution information which can be converted into related performance evaluation indexes are collected in one running process of a target program. The plurality of pieces of execution information may include, but are not limited to, target task start time information, end time information, time information corresponding to a state switching moment of each target thread run by the target program and state information before and after switching, time information corresponding to a CPU frequency point switching moment and frequency point information before and after switching. Furthermore, according to the method, the collected execution information can be used for quickly filtering out associated execution information in a target time period, and the associated execution information that affects a same performance evaluation index can be comprehensively analyzed and converted, so that a more accurate performance analysis result is obtained.

Description

Performance analysis methods, application methods, equipment, readable media, and program products

[0001] This application claims priority to Chinese Patent Application No. 202410165481.5, filed on February 2, 2024, entitled “Performance Analysis Method, Application Method, Apparatus, Readable Medium and Program Product”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of computer technology, and specifically to a performance analysis method, application method, device, readable medium, and program product. Background Technology

[0003] With the continuous development of computer technology, multi-core processing technology has been widely used to improve the processing power of electronic devices such as mobile phones and computers. Devices that support parallel processing by multiple central processing units (CPUs) typically integrate multiple computing cores, enabling the simultaneous execution of multiple applications (APPs) installed on the mobile terminal. To improve user experience, developers often use performance analysis tools to test the performance of programs or the performance of hardware devices such as the CPU of electronic devices. For example, during application performance analysis and optimization, program execution information can be collected and converted into performance evaluation metrics, such as CPU utilization and CPU load, to measure program performance. The program code can then be optimized based on the magnitude of these performance evaluation metrics. Furthermore, in some hardware device testing scenarios, the collected program execution information and converted performance evaluation metrics can be used to analyze the hardware capabilities of one or more CPUs configured in an electronic device. For example, CPU load derived from program execution information can be used to measure the load capacity of each CPU in the electronic device, as well as the overall load capacity or load balancing performance provided by multiple CPUs.

[0004] However, current performance analysis tools collect program execution information in a rather disorganized manner. The processes for collecting various pieces of program execution information are relatively independent, and the collected information is unrelated to each other. As a result, the accuracy of performance analysis results from current performance analysis tools is low, and their applicability is not very flexible.

[0005] Summary of the Invention

[0006] In view of this, this application provides a performance analysis method, application method, device, readable medium, and program product. It can quickly filter relevant execution information within a target time period using collected execution information, and can comprehensively analyze and transform relevant execution information affecting the same performance evaluation metric, thereby obtaining more accurate performance analysis results. Compared to other existing performance analysis schemes, this application offers greater flexibility and supports custom instrumentation code, increasing the convenience of obtaining information from other dimensions. Information filtering can be completed during the collection of execution information from various dimensions, resulting in concentrated and accurate execution data collection results with less redundant data. Furthermore, this application does not require modification of the target program code, thus avoiding impact on the original program and resulting in lower development costs.

[0007] Specifically, in a first aspect, this application provides a performance analysis method applied to an electronic device, comprising: detecting an analysis request from a user instructing the execution of a first program for performance analysis; and, in response to the analysis request, displaying performance analysis results, wherein the performance analysis results are derived based on execution information of the first program during the same execution process, the execution information including at least multiple time information related to a first task of the first program, and the performance analysis results including processor performance analysis results.

[0008] For example, the aforementioned electronic device can be a device capable of running the target program and performance analysis tools, such as a mobile phone or laptop as exemplified below. The first program instructed by the user to run can be the target program as described below. In this embodiment of the application, the term "user" can refer to a developer or analyst. The aforementioned analysis request can be a request from the user to run the target program for performance analysis on the interface of the performance analysis tool running on the electronic device. Correspondingly, the electronic device can collect multiple execution information related to the performance analysis results required by the user during the same run of the target program (e.g., the first program mentioned above).

[0009] Furthermore, the electronic device can determine at least one computing interval corresponding to one or more target tasks of the target program based on the time information in multiple execution information, and then accurately calculate the CPU load in each computing interval when the target thread is running. Finally, it can accurately calculate the CPU load corresponding to each target task, and further calculate the overall CPU load of the target program, thereby obtaining the performance analysis results.

[0010] It is understood that the task load of each task of the target program calculated by the performance analysis method provided in this application is mainly reflected as CPU load. Therefore, the final performance analysis result obtained by the performance analysis method provided in this application can usually include processor performance analysis results, such as CPU load analysis results.

[0011] In one possible implementation of the first aspect above, the electronic device includes one or more CPUs, the processor performance analysis results include CPU performance analysis results, and detecting an analysis request from a user instructing the execution of a first program for performance analysis includes: detecting a first analysis request from a user instructing the execution of a first program for performance analysis of one or more CPUs; or detecting a second analysis request from a user for performance analysis of the first program.

[0012] For example, a performance analysis request made by a user on a performance analysis tool running on an electronic device can be a performance analysis request for an electronic device equipped with one or more CPUs (or a multi-core system) to optimize the balance between CPU computing power and device power consumption in order to pursue higher power consumption benefits, such as the first analysis request mentioned above; or it can be a request to perform performance analysis on a target program developed or tested by a program developer, such as the second analysis request mentioned above.

[0013] In one possible implementation of the first aspect described above, the first program includes one or more tasks, the one or more tasks including the first task, and, in response to an analysis request, displays performance analysis results, including: determining at least one computing interval for calculating the load of the first task, wherein the load of the first task is the CPU load generated by the first task, and the performance analysis results are related to the load of the first task; determining the duration of the computing interval in which the first thread is running in the at least one computing interval, wherein the first thread is the thread executing the first task; obtaining the computing power parameters corresponding to the CPU operating frequency in each computing interval; and determining the load of the first task based on the number of at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval.

[0014] In one possible implementation of the first aspect described above, multiple time information related to the first task of the first program is used to determine the start and end times of each computation interval, and determining at least one computation interval for calculating the load of the first task includes: obtaining start and end time information of the first task in at least one task of the first program, obtaining first time information corresponding to the activity state switching time of the first thread in which the first task is located, wherein the activity state includes the running state, and obtaining second time information corresponding to the frequency switching time of the first CPU running the first thread; and determining at least one computation interval for calculating the load of the first task based on the start time information, end time information, first time information, and second time information.

[0015] In one possible implementation of the first aspect described above, the execution information of the first program during the same run also includes the activity state information of the first thread collected before and after the activity state switching time, and the running state includes a running state and / or a runnable state.

[0016] In one possible implementation of the first aspect above, determining the duration corresponding to the computation interval in which the first thread is in a running state within at least one computation interval includes: determining the first runtime corresponding to the first computation interval in which the first thread is in a running state, and determining the number of first computation intervals in which the first thread is in a running state.

[0017] In one possible implementation of the first aspect described above, the execution information of the first program during the same running process also includes the frequency information of the first CPU collected before and after the frequency switching time, and obtaining the computing power parameters corresponding to the CPU operating frequency in each computing interval includes: obtaining the first frequency information of the first CPU operating in the first computing interval; determining the value of the corresponding first equivalent computing power based on the type of the first CPU and the first frequency information; and determining the value of the first equivalent computing power as the computing power parameter corresponding to the first CPU operating frequency in the first computing interval.

[0018] In one possible implementation of the first aspect above, determining the first task load based on the number of at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval includes: calculating the first CPU load corresponding to the first computing interval based on the first runtime and the value of the first equivalent computing power; and performing cumulative calculation based on the first CPU load corresponding to one or more of the first computing intervals in at least one computing interval to obtain the first task load corresponding to the first task.

[0019] In one possible implementation of the first aspect described above, one or more tasks further include a second task, and, in response to an analysis request, displaying performance analysis results further includes: determining at least one computation interval for calculating the load of the second task, wherein the load of the second task is the CPU load generated by the second task; determining the duration of the computation interval in which the second thread is running in the at least one computation interval, wherein the second thread is the thread executing the second task; obtaining the computing power parameters corresponding to the CPU operating frequency points in each computation interval; and determining the load of the second task based on the number of at least one computation interval, the duration of the computation interval in which the second thread is running, and the computing power parameters corresponding to the CPU operating frequency points in each computation interval.

[0020] In other words, the CPU load of the target program can be the combination of the task loads (i.e., CPU loads) of each task. The above-mentioned "combined calculation" method can be an accumulation operation. For example, first calculate the task load of each task separately, such as the first task load and the second task load mentioned above, and then accumulate the CPU loads of each task to obtain the accurate task load of the target program.

[0021] It is understandable that the target program task load calculated above, combined with the target execution time of the corresponding program or task, can accurately reflect the program code performance of the target program or the CPU performance of the electronic device running the target program.

[0022] In one possible implementation of the first aspect above, displaying performance analysis results in response to an analysis request includes: in response to a first analysis request, performing a combined calculation on a first task load and a second task load to obtain the total load corresponding to one or more CPUs currently operating in the electronic device, determining it as the processor performance analysis result, and displaying it.

[0023] For example, the total load corresponding to one or more CPUs included in the processor performance analysis results above can be the target program task load generated by each CPU of the electronic device during the execution of the target program, that is, the CPU overhead calculated based on the combination of multiple task loads such as the first task load and the second task load. The processor performance analysis results above can be used to guide the electronic device to increase or decrease the operating frequency of the corresponding CPU in a timely manner during the running of one or more target programs, so as to increase or decrease the computing power supply accordingly, thereby achieving the goal of timely optimizing the balance between CPU computing power and device power consumption, and thus pursuing higher power consumption benefits.

[0024] In one possible implementation of the first aspect above, the performance analysis results include first program performance analysis results, and displaying the performance analysis results in response to an analysis request includes: generating and displaying the first program performance analysis results based on the first task load and the second task load in response to a second analysis request.

[0025] For example, the performance analysis result of the first program mentioned above can be the performance analysis result corresponding to the program code performance of the target program provided in this application. This performance analysis result can be used to guide whether code optimization strategies such as reducing program logic complexity or improving algorithm efficiency are needed for the target program.

[0026] In one possible implementation of the first aspect above, the start time information of the first task is obtained based on the execution result of the first instrumentation program, the end time information of the first task is obtained based on the execution result of the second instrumentation program, and the electronic device jumps to run the first instrumentation program based on the first jump instruction in the first program of the instrumentation program; the electronic device jumps to run the second instrumentation program based on the second jump instruction in the first program of the instrumentation program.

[0027] For example, the first jump instruction mentioned above can be a jump instruction inserted at the start point of the target task using a dynamic instrumentation-based tracing method. When the CPU executes this jump instruction, it can jump to the corresponding instrumentation program (such as the first instrumentation program mentioned above), execute it, and collect the system time corresponding to the task start point as the start time information. The second jump instruction mentioned above can be a jump instruction inserted at the end point of the target task using a dynamic instrumentation method. When the CPU executes this jump instruction, it can jump to the corresponding instrumentation program (such as the second instrumentation program mentioned above), execute it, and collect the system time corresponding to the task end point as the end time information.

[0028] In one possible implementation of the first aspect above, the first time information corresponding to the moment of the first thread’s activity state switching is obtained based on the execution result of the third instrumentation program, and the electronic device jumps to run the third instrumentation program based on the third jump instruction in the application code / kernel code used to monitor the activity state of the first thread.

[0029] For example, the aforementioned first time information can be the time information corresponding to any activity state transition moment of the target thread, hereinafter referred to as the time information corresponding to the state transition moment. Examples include the time information corresponding to state transition moments ①, ②, ③, and ④ as shown below. A jump instruction corresponding to the execution of the aforementioned third instrumentation program to collect the time information corresponding to each of the aforementioned state transition moments is triggered. For example, the aforementioned third jump instruction can be inserted into the application code / kernel code used to monitor the activity state of the target thread using a dynamic instrumentation-based tracing method. In some embodiments, the aforementioned application code / kernel code can be integrated into the thread state acquisition module 812 to implement the collection of the time information corresponding to the activity state transition moment of the target thread, as well as the state information before and after the corresponding transition moment.

[0030] In one possible implementation of the first aspect above, the second time information corresponding to the frequency switching time of the first CPU is obtained based on the execution result of the fourth instrumentation program, and the electronic device jumps to run the fourth instrumentation program based on the fourth jump instruction in the application code / kernel code that can listen to the frequency switching event of the first CPU.

[0031] For example, the aforementioned second time information may be the time information corresponding to the CPU's operating frequency switching time at each moment in the electronic device, i.e., the time information corresponding to the frequency switching time as described below. Examples include the time information corresponding to frequency switching times ①, ②, ③, ④, and ⑤ as illustrated below. In some embodiments, the aforementioned application code / kernel code can be integrated into the CPU frequency acquisition module 813 to acquire the time information corresponding to the CPU frequency switching time and the CPU frequency information before and after the corresponding switching time.

[0032] Secondly, this application provides a performance analysis method applied to a first electronic device and a second electronic device. The method includes: the first electronic device detecting an analysis request from a user instructing the execution of a first program for performance analysis; the first electronic device responding to the analysis request sending a run instruction corresponding to the first program to the second electronic device; the second electronic device running the first program in response to the run instruction; and the first electronic device displaying performance analysis results based on execution information collected by the second electronic device during the same execution of the first program, wherein the performance analysis results are derived based on the execution information of the first program during the same execution, the execution information including at least multiple time information related to a first task of the first program, and the performance analysis results including processor performance analysis results.

[0033] For example, the first electronic device mentioned above could be a device running performance analysis tools, such as a laptop or other electronic device. The second electronic device mentioned above could be a device running the target program, such as a mobile phone or other electronic device as exemplified below.

[0034] In one possible implementation of the second aspect above, the first program includes one or more tasks, the one or more tasks include the first task, and the first electronic device displays performance analysis results based on execution information collected by the second electronic device during the same execution of the first program, including: the first electronic device receiving the execution information collected by the second electronic device and determining at least one computing interval for calculating the first task load based on the execution information, wherein the first task load is the CPU load generated corresponding to the first task, and the performance analysis results are related to the first task load; the first electronic device determining the duration corresponding to the computing interval in which the first thread is in a running state in the at least one computing interval, wherein the first thread is the thread executing the first task; the first electronic device acquiring the computing power parameters corresponding to the CPU operating frequency points in each computing interval; and the first electronic device determining the first task load based on the number of at least one computing interval, the duration corresponding to the computing interval in which the first thread is in a running state, and the computing power parameters corresponding to the CPU operating frequency points in each computing interval.

[0035] In one possible implementation of the second aspect described above, the first electronic device determines at least one computation interval for calculating the first task load based on execution information, including: the first electronic device acquiring start time information and end time information of a first task in at least one task of a first program; the first electronic device acquiring first time information corresponding to the activity state switching time of the first thread in which the first task is located, wherein the activity state includes the running state; and the first electronic device acquiring second time information corresponding to the frequency switching time of the first CPU running the first thread, wherein the first CPU is any one of one or more CPUs of the second electronic device; the first electronic device determines at least one computation interval for calculating the first task load based on the start time information, end time information, first time information, and second time information.

[0036] In one possible implementation of the second aspect above, the execution information of the first program during the same run also includes the activity state information of the first thread collected before and after the activity state switching time, and the running state includes the running state and / or the runnable state.

[0037] In one possible implementation of the second aspect above, the first electronic device determines the duration corresponding to the computing interval in which the first thread is in a running state within at least one computing interval, including: the first electronic device determines the first runtime corresponding to the first computing interval in which the first thread is in a running state, and the first electronic device determines the number of first computing intervals in which the first thread is in a running state.

[0038] In one possible implementation of the second aspect described above, the execution information of the first program during the same running process also includes the frequency information of the first CPU collected before and after the frequency switching time. Furthermore, the first electronic device obtains the computing power parameters corresponding to the CPU operating frequency in each computing interval, including: the first electronic device obtains the first frequency information of the first CPU operating in the first computing interval; the first electronic device determines the value of the corresponding first equivalent computing power based on the type of the first CPU and the first frequency information; and the first electronic device determines the value of the first equivalent computing power as the computing power parameter corresponding to the first CPU operating frequency in the first computing interval.

[0039] In one possible implementation of the second aspect above, the first electronic device determines the first task load based on the number of at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval. This includes: the first electronic device calculating the first CPU load corresponding to the first computing interval based on the first runtime and the value of the first equivalent computing power; and the first electronic device performing cumulative calculation based on the first CPU load corresponding to one or more of the first computing intervals in the at least one computing interval to obtain the first task load corresponding to the first task.

[0040] In one possible implementation of the second aspect described above, one or more tasks further include a second task, and the first electronic device displays performance analysis results based on execution information collected by the second electronic device during the same execution of the first program, including: the first electronic device determining at least one computing interval for calculating the second task load, wherein the second task load is the CPU load generated by the second task; the first electronic device determining the duration corresponding to the computing interval in which the second thread is running in the at least one computing interval, wherein the second thread is the thread executing the second task; the first electronic device acquiring the computing power parameters corresponding to the CPU operating frequency points in each computing interval; the first electronic device determining the second task load based on the number of at least one computing interval, the duration corresponding to the computing interval in which the second thread is running, and the computing power parameters corresponding to the CPU operating frequency points in each computing interval; and the first electronic device generating and displaying performance analysis results based on the first task load and the second task load.

[0041] Thirdly, this application provides a method for applying performance analysis results to an electronic device. The electronic device includes a performance analysis tool, which is used to execute the performance analysis method provided by the first aspect and various possible implementations of the first aspect to obtain performance analysis results. The performance analysis results include CPU load analysis results corresponding to multiple programs running within a first time period. The method includes: establishing a first coordinate system, wherein the horizontal axis of the first coordinate system represents task load and the vertical axis represents CPU computing power; determining a first reference line in the first coordinate system based on the maximum screen frame rate of the electronic device, wherein the task load corresponding to the coordinate point on the first reference line and the CPU computing power provided by the electronic device satisfy a first equilibrium condition, the first equilibrium condition being used to control the CPU computing power provided by the electronic device and the power consumption of the electronic device to reach a balanced state; and determining a program optimization strategy for multiple programs based on the positional relationship between the landing point of the CPU load analysis results corresponding to multiple programs in the first coordinate system and the first reference line.

[0042] For example, the first coordinate system mentioned above can be the computing power-load analysis coordinate system exemplified in Figure 7 below.

[0043] Correspondingly, the aforementioned first reference line can be the 120Hz computing power-power balancing line shown in Figure 7 below. The positional relationship between the landing points of the CPU load analysis results corresponding to multiple programs in the first coordinate system and the first reference line can include over-supply areas where the landing points are above the 120Hz computing power-power balancing line and under-supply areas where the landing points are below the 120Hz computing power-power balancing line. For landing points in the over-supply area, the main consideration is how to obtain higher power consumption benefits. This can be achieved by reducing the CPU's operating frequency, i.e., having the corresponding CPU operate at a lower frequency, thereby reducing the CPU computing power supply and improving energy efficiency or reducing power consumption. For landing points in the under-supply area, the CPU's operating frequency can be increased, i.e., having the corresponding CPU operate at a higher frequency, thereby increasing the CPU computing power supply, shortening the task execution time, and ultimately enabling the target task to be completed within the target time. In other embodiments, for landing points in the under-supply area, the CPU load can also be reduced by decreasing the program logic complexity or improving algorithm efficiency, thereby achieving the goal of enabling the target task to be completed within the target time.

[0044] In one possible implementation of the third aspect above, the method further includes: determining a second reference line in a first coordinate system based on the maximum task load that the CPU computing power provided by the electronic device can support; wherein the task load corresponding to the coordinate point on the second reference line and the CPU computing power provided by the electronic device satisfy a second equilibrium condition; wherein the second equilibrium condition is used to control the CPU computing power provided by the electronic device to reach an equilibrium state with the maximum load that the electronic device can support; and determining a program optimization strategy for multiple programs based on the positional relationship between the landing point of the CPU load analysis results corresponding to multiple programs in the first coordinate system and the second reference line.

[0045] For example, the second reference line mentioned above can be the 120Hz maximum load line shown in Figure 7 below. For each coordinate point falling to the right of the 120Hz maximum load line, i.e., the aforementioned points, they fall within the overload zone. At this point, the CPU's operating frequency cannot be increased further, meaning the CPU's computing power supply cannot be increased further. In this situation, the load can be reduced by optimizing the program code, such as decreasing program logic complexity or improving algorithm efficiency, ultimately allowing the target task to be completed within the target time.

[0046] In one possible implementation of the third aspect above, the program optimization strategy for the multiple programs includes at least one of the following: increasing the operating frequency of one or more CPUs running the first program among the multiple programs; decreasing the operating frequency of one or more CPUs running the first program among the multiple programs; reducing the program code logic complexity of the first program among the multiple programs; and optimizing the algorithm involved in the first program among the multiple programs.

[0047] Fourthly, this application provides an electronic device, including: one or more processors; one or more memories; the one or more memories storing one or more programs, which, when executed by one or more processors, cause the electronic device to perform the performance analysis method provided by the first aspect and various possible implementations of the first aspect, or the performance analysis result application method provided by the third aspect and various possible implementations of the third aspect.

[0048] Fifthly, this application provides a computer-readable medium storing instructions that, when executed on a computer, cause the computer to perform the performance analysis method provided by the first aspect and various possible implementations thereof, or the performance analysis result application method provided by the third aspect and various possible implementations thereof.

[0049] Sixthly, this application provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the performance analysis method provided by the first aspect and various possible implementations of the first aspect, or the performance analysis result application method provided by the third aspect and various possible implementations of the third aspect.

[0050] The beneficial effects of the second, fourth to sixth aspects mentioned above can be referred to the relevant descriptions in the first aspect and its various possible implementations, as well as the third aspect and its various possible implementations, and will not be repeated here. Attached Figure Description

[0051] Figure 1a shows a schematic diagram of a performance analysis scenario.

[0052] Figure 1b shows a comparison of different ways performance analysis tools collect execution information.

[0053] Figure 1c shows a schematic diagram illustrating the implementation principle of a performance analysis method provided in an embodiment of this application.

[0054] Figure 2 shows a schematic diagram illustrating the implementation principle of the dynamic piling technology provided in the embodiments of this application.

[0055] Figure 3 shows a schematic diagram illustrating the implementation principle of a static piling technology.

[0056] Figure 4 shows a schematic diagram of the implementation process of a performance analysis method provided in an embodiment of this application.

[0057] Figure 5 shows an example table of computing power parameters corresponding to different types of CPUs at different frequency points, provided by an embodiment of this application.

[0058] Figure 6 shows a schematic diagram of the interactive process of a performance analysis method provided in an embodiment of this application.

[0059] Figure 7 shows a schematic diagram of computing power-load analysis coordinates based on performance analysis results provided in an embodiment of this application.

[0060] Figure 8 shows a schematic diagram of the software structure of a performance analysis tool provided in an embodiment of this application.

[0061] Figure 9 shows a schematic diagram of the hardware structure of an electronic device 100 provided in an embodiment of this application.

[0062] Figure 10 shows a schematic diagram of the operating system software structure of an electronic device 100 provided in an embodiment of this application. Detailed Implementation

[0063] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0064] It is understood that the electronic devices in the embodiments of this application may also be referred to as terminals, terminal equipment, user equipment (UE), mobile stations (MS), mobile terminals (MT), etc. Terminal equipment may include mobile phones, tablets, laptops, wearable devices, computers with wireless transceiver capabilities, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, and so on.

[0065] Figure 1a shows a schematic diagram of a performance analysis scenario.

[0066] Referring to Figure 1a, this scenario may include a mobile phone 10 and a laptop 20. The mobile phone 10 may have one or more applications to be analyzed, hereinafter referred to as the target applications, installed on it. The laptop 20 may run performance analysis tools, such as an integrated development environment (IDE), etc., without limitation.

[0067] Both the mobile phone 10 and the laptop 20 described above can be electronic devices employing multi-core processing technology. For example, the multi-core processor of the mobile phone 10 may include CPU0, CPU1, CPU2, etc. In other embodiments, the scenarios applicable to the performance analysis method provided in this application may also include only mobile phones or only computers, or may include terminal devices such as the aforementioned tablet computers, without any limitations.

[0068] As mentioned earlier, developers typically use performance analysis tools to test program performance or CPU performance.

[0069] Referring again to Figure 1a, the performance analysis tool running on the laptop 20 can perform performance analysis on the target program on the mobile phone 10 and display the performance analysis results 101 as shown in Figure 1a. These performance analysis results can include analysis of function execution on each CPU, analysis of CPU operating frequency (hereinafter referred to as frequency point), analysis of CPU interrupts, and CPU utilization. Specifically, function execution on each CPU includes, for example, functions executed on CPU0 such as "audioserver()", "traced_prob()", and "com.ss.and()". CPU operating frequencies include, for example, the operating frequency of CPU0 (0.88GHz), CPU1 (1.22GHz), and CPU2 (3.5GHz). CPU interrupt information includes, for example, the frequency, time, and duration of CPU interrupts during program execution. All of these performance analysis results 101 rely on collected program execution information (hereinafter referred to as execution information).

[0070] Referring to Figure 1b, current performance analysis tools can collect execution information in two ways: Method 1 and Method 2.

[0071] Method 1: Trace. This method records all execution information (or execution data) generated during a program's execution over a period of time, and then filters out the corresponding execution information for that time period for performance analysis. As an example, referring to Figure 1b, during a specific run of target program A (e.g., the i-th run), the entire execution information can be collected using the trace command. Then, based on the collected execution information, it is filtered to obtain execution information 01, execution information 02, execution information 03, etc., required for performance analysis. Ultimately, the CPU utilization and the activity status of each thread during the application's (e.g., target program A) execution process can be analyzed. This method can capture all information and events over the entire time period, and its advantage is that the collected execution data is relatively accurate. However, its disadvantage is the significant overhead introduced by recording all information and events during the collection process.

[0072] If developers want to analyze the workload of a target task, they can only use static instrumentation to collect time information about the task's start and end points, thereby identifying the task's execution time period. Static instrumentation refers to modifying the source code during the compilation phase, i.e., pre-embedding instrumentation code into the target program and recompiling it to generate the target program. Referring to Figure 1c, the instruction stream of the target program before instrumentation might include, for example, instructions 01, 02, 03, 04, 05, and 06. After inserting instrumentation code into the target program using static instrumentation, such as inserting instrumentation code X1 and instrumentation code X2 as shown in Figure 1c, the recompiled target program's instruction stream might include instructions 01, 02, 03, instrumentation code X1, 04, 05, 06, and instrumentation code X2. At runtime, the recompiled target program is loaded into memory. Then, during the process of the target program's code being loaded and executed by the CPU, the instrumentation code within it is executed to collect a specific piece of execution information as indicated by the instrumentation code.

[0073] Referring to Figure 1c, if the target task starts execution from instruction 04, when the target program executes to instrumentation code X1, the system time for the completion of instruction 03 can be collected based on the execution result of instrumentation code X1, serving as the target task start time information. If the target task ends when instruction 06 completes execution, when the target program executes to instrumentation code X2, the system time for the completion of instruction 06 can be collected based on the execution result of instrumentation code X2, serving as the target task end time information.

[0074] However, the aforementioned tracing method based on static instrumentation has the following drawbacks: First, the data collection points determined by static instrumentation are fixed and lack flexibility, making it difficult to identify the target segment to be analyzed during the analysis process (unless instrumentation is performed beforehand). Second, the execution data collected by static instrumentation is independent of each other, with weak correlation, and may also collect redundant information, which still needs to be filtered; otherwise, it cannot be directly used for in-depth performance analysis. Third, static instrumentation leads to the modification and recompilation of program code, a very cumbersome process that requires developers or analysts to have a sufficient understanding of the code. Even so, the entire tracing process based on static instrumentation is time-consuming and inefficient.

[0075] Method 2: Sampling. This method collects data information at regular intervals. In other words, the multiple execution information pieces collected by electronic devices such as mobile phone 10 through sampling in this method may be obtained during multiple runs of the same target program. Referring to Figure 1b, for example, execution information 01 is collected during the first run of target program A, i.e., execution information 01 is collected during a single run. Similarly, execution information 02 is collected during the second run of target program A, ..., execution information 03 is collected during the Nth run of target program A, and so on. After collecting execution information through the above sampling method, for example, the running time of a function in the target time period, the CPU running time of a certain function, and the waiting time when the function is not running on the CPU can be analyzed.

[0076] The advantage of the above sampling method is that it incurs relatively low overhead in acquiring execution information or execution data. However, its disadvantage is that it requires a sufficiently large sample size; otherwise, the results may not be accurate enough, and it is often difficult to collect the necessary execution data in a single execution.

[0077] To address the aforementioned issues, this application provides a performance analysis method. Specifically, this method collects multiple execution information items that can be converted into relevant performance evaluation metrics during a single run of a target program. This execution information may include, but is not limited to, the start and end times of the target task, the time information corresponding to the state transitions of each target thread running the target program, and the state information before and after the transitions, the time information corresponding to the CPU frequency transitions, and the frequency information before and after the transitions. Furthermore, this method can quickly filter out related execution information within a target time period using the collected execution information, and can comprehensively analyze and transform related execution information affecting the same performance evaluation metric, thereby obtaining more accurate performance analysis results. In other words, the performance analysis method provided by this application can balance low overhead and high efficiency in the execution information collection process, while also improving the accuracy of the performance analysis results.

[0078] For example, referring to Method 3 shown in Figure 1b, electronic devices such as mobile phones 10, based on the performance analysis method provided in this application, can collect execution information 01, execution information 02, execution information 03, etc., during the i-th run of the target program A. That is, electronic devices such as mobile phones 10, based on the performance analysis method provided in this application, can collect multiple execution information that can be converted into relevant performance evaluation indicators during a single program run. Here, i can be a natural number such as 1, 2, 3…N. Based on this, the laptop 20 or mobile phone 10 can convert the collected execution information 01, execution information 02, execution information 03, etc., into one or more performance evaluation indicators required by the developers.

[0079] The process of converting the above into relevant performance evaluation indicators may include, for example, first analyzing at least one computation interval corresponding to one or more target tasks of the target program based on the aforementioned time information, and then calculating the CPU load corresponding to the threads running the target tasks within each computation interval. This allows for accurate calculation of the CPU load corresponding to each target task, and further calculation of the overall CPU load of the target program. It can be understood that the CPU load described above represents the actual amount of CPU resources occupied during the execution of each target program, and the CPU load corresponding to one or more target tasks included in each target program can also be referred to as task load below.

[0080] When calculating the CPU load within each computation interval, it can be determined by the runtime of the target thread within the defined computation interval and the computing power provided by the CPU running the target thread. The computing power provided by the CPU can be calculated based on the computing power parameters corresponding to the CPU's current operating frequency. These parameters may include, for example, equivalent computing power. The magnitude of this equivalent computing power can be determined by the CPU's current operating frequency (i.e., frequency point) and the CPU type. Specific calculation methods can be found in the descriptions in the detailed embodiments below, in conjunction with the accompanying drawings, and will not be elaborated upon here.

[0081] It is understandable that among the various execution information collected during a single program execution, some may be execution information related to the running processes or threads of the system, such as the time information corresponding to the state transition of each target thread and the state information before and after the transition; others may be execution information related to CPU operation, such as the time information corresponding to the CPU frequency transition and the frequency information before and after the transition. These different execution information can be replaced with jump instructions at specified instrumentation points during the execution of the target program, triggering a jump to the corresponding instrumented code for execution and information collection. For example, during the execution of the target program, the CPU of the electronic device can execute jump instructions added to the relevant application code / kernel code to jump to the corresponding instrumented code, execute and collect the time information corresponding to the state transition of each target thread and the state information before and after the transition. As another example, during the execution of the target program, the CPU of the electronic device can also execute jump instructions added to the target program to jump to the corresponding instrumented code, execute and collect the target task start time information, end time information, etc.

[0082] In this embodiment, the jump instruction may include a jump instruction or a trap instruction. The jump instruction triggers a jump to the execution of specified instrumented code and is generally used for jumps within the same memory space. It does not involve register switching and does not require saving the context. The trap instruction, on the other hand, is used for switching between different memory spaces, such as jumping from user mode to kernel mode. It requires saving the context (e.g., various registers and status information) before the jump and restoring the context upon return.

[0083] It is understood that the instrumentation points specified above can be, for example, instrumentation locations pre-set by developers using performance analysis tools before the target program runs, based on actual analysis needs. This pre-setting can be achieved, for example, by using the performance analysis tool on an electronic device to find the code address or function name of the instrumentation point based on the program's binary file, such as the instruction address or function name corresponding to the task start point or task end point. Thus, during the loading and running of the target program by the performance analysis tool, the electronic device can identify the corresponding instrumentation location based on the corresponding instruction address or function name, i.e., identify the specified instrumentation point, and then replace the instruction at that specified instrumentation point with a jump instruction to trigger the execution of the instrumented code. In some embodiments, the above-mentioned tracing method of adding jump instructions during program execution to trigger the execution of instrumented code can also be called a dynamic instrumentation-based tracing method or a tracing method implemented based on dynamic instrumentation.

[0084] Referring to Figure 2, the instruction flow of the target program before instrumentation may include, for example, instructions 01, 02, 03, 04, 05, and 06 in sequence. This application implements the tracing process based on dynamic instrumentation. After the code file (e.g., an executable binary file) corresponding to the target program is loaded into the corresponding memory space, the performance analysis tool running on the corresponding electronic device can, when loading the code file to prepare for running the target program or after the target program starts running, determine the instrumentation point in the target program as indicated by a technician, i.e., the specified instrumentation point. This specified instrumentation point may be an instruction before the target task begins execution, such as instruction 03. Then, during the execution of the target program, the electronic device can replace the instruction at this instrumentation point with a jump instruction. This jump instruction may include, for example, jump instruction X1 and jump instruction X2 as shown in Figure 2. The instrumentation point replaced by jump instruction X1 may be an instruction before the task start point of the target task, such as instruction 03, where the task start point instruction may be, for example, instruction 04 as shown in Figure 2. The jump instruction X1 corresponds to the instrumentation code X1 that is executed during the jump, which can trigger the collection of the system time corresponding to the starting point of the task as the target task start time information.

[0085] Similarly, the instrumentation point corresponding to the jump instruction X2 mentioned above can be an instruction after the task's end point, such as instruction 06. The instruction at the task's end point could be, for example, instruction 05 as shown in Figure 2. The instrumentation code X2 executed by the jump instruction X2 can trigger the collection of the system time corresponding to the task's end point, which serves as the target task's end time information.

[0086] It is understandable that instrumented code and the instruction stream of the target program can be executed sequentially. During the execution of the instrumented code, the instructions preceding the corresponding instrumentation point can be saved to the corresponding memory space before execution. Then, after the instrumented code completes execution, the corresponding CPU can load the saved instructions before the instrumentation point and continue execution, executing that instruction and subsequent instructions. For example, referring to Figure 2, the corresponding CPU of the electronic device can save instruction 03 when the target program executes to the corresponding jump instruction. After the instrumented code X1 triggered by the jump instruction completes execution, the corresponding CPU can execute the saved instruction 03, and then continue executing instructions 04, 05, etc. Similarly, the corresponding CPU can save instruction 06 to the memory space when the target program executes to the corresponding jump instruction. After the instrumented code X1 triggered by the jump instruction completes execution, the corresponding CPU can execute the saved instruction 06 and subsequent instructions.

[0087] In other words, based on the performance analysis method provided in this application, the execution order of the code instruction flow after instrumentation by dynamic instrumentation shown in Figure 2 can be: execute instruction 01 → execute instruction 02 → execute jump instruction X1 (at this time, save instruction 03) → jump and execute instrumented code X1 → execute saved instruction 03 → execute instruction 04 → execute instruction 05 → execute jump instruction X2 (at this time, save instruction 06) → jump and execute instrumented code X2 → execute saved instruction 06.

[0088] It is understood that the performance analysis method provided in this application, which collects execution information based on the aforementioned dynamic instrumentation tracing method, has the following advantages compared to the aforementioned static instrumentation tracing method: Firstly, it is more flexible, as the aforementioned dynamic instrumentation-based tracing can easily insert instrumentation points and collect the required execution information. Secondly, the aforementioned dynamic instrumentation-based tracing supports custom instrumentation code, thus enabling the acquisition of other dimensions of information at any time during the collection process, such as checking which thread is undergoing a state transition during a state transition. This process can focus only on the collection thread, thus enabling information filtering during the collection of execution information from various dimensions, resulting in concentrated and accurate execution data collection results with less redundant data. Thirdly, the aforementioned dynamic instrumentation does not require modification of the target program code, therefore it does not affect the original program. Developers or analysts do not need to have extensive knowledge of the code details to implement instrumentation, resulting in low development costs.

[0089] It is understandable that if the target program needs to execute multiple target tasks during its operation, then at the start and end points of each target task, the corresponding specified instrumentation points can be replaced with jump instructions to trigger a jump to the corresponding instrumentation code to collect the start and end time information of each task.

[0090] Meanwhile, during the execution of the target program illustrated in Figure 2, the system performance analysis tool of the electronic device can also detect whether the instrumented jump instructions in the relevant application code / kernel code enable dynamic instrumentation, or whether the conditions for executing the dynamically instrumented content (e.g., instrumented code) are met. Furthermore, when the execution conditions are met, the electronic device can trigger a jump to the corresponding instrumented code (e.g., instrumented code X1 shown in Figure 2) when executing the target program to the jump instruction (e.g., jump instruction X1 shown in Figure 2), without any restrictions.

[0091] In summary, based on the dynamic instrumentation method illustrated in Figure 2, the electronic device can collect the start and end time information of one or more target tasks of the target program. Similarly, the electronic device can also use the dynamic instrumentation method shown in Figure 2 to collect the time information corresponding to the moment when the activity state of the target thread in the target program changes, as well as the time information corresponding to the moment when the CPU operating frequency of the target thread running in the electronic device changes. Based on the collection of the above-mentioned time information achieved by the dynamic instrumentation method, as well as the collection of the target thread's state information and the CPU frequency information described below, the electronic device can further perform performance analysis of CPU load and other indicators, thereby realizing performance analysis of the target program or the CPU and other hardware devices of the electronic device.

[0092] Specifically, referring to Figure 3, during the execution of the target program, when the target thread activity state of the target program changes, the electronic device system can jump to execute the corresponding instrumentation code based on the jump instruction added in the application code / kernel code that monitors the target thread activity state, and then collect the system time corresponding to the switching moment as the time information corresponding to the state switching moment, and record the target thread activity state before and after the switching moment as the collected state information.

[0093] It is understood that the target task shown in Figure 3 can be any one of one or more tasks executed in the target program. Developers can use performance analysis tools to set the start and end points of the target task as specified instrumentation points. The target task starts running from the start point and ends at the end point. The time interval between the end time information corresponding to the end point and the start time information corresponding to the start point is the "target task execution interval" shown in Figure 3. Before the start point of the target task arrives, i.e., before the target task is executed, the target thread can be in a running state executing other tasks, or in a sleeping or unsleeping state after the completion of its task. Furthermore, when the target thread is in a sleeping state, the CPU of the electronic device may switch to a higher operating frequency due to other program threads running.

[0094] Referring to Figure 3, the aforementioned state transition times correspond to the target thread's activity state, which may include transitioning from a running state to a sleeping state, from a sleeping state to a runnable state, and from a runnable state to a running state. Correspondingly, the state transition times collected by the system may include, for example, the state transition times ①, ②, ③, and ④ shown in Figure 3.

[0095] Referring again to Figure 3, the electronic device system can, during the execution of the target program, execute corresponding instrumentation code based on a jump instruction when the CPU frequency of the target thread changes (also known as the frequency switching moment). It collects the system time corresponding to this switching moment as the time information for the frequency switching moment, and records the CPU operating frequency before and after the switching moment as the collected frequency information. Referring to Figure 3, the collected time information for the frequency switching moments can include the time information corresponding to CPU frequency switching moment ①, CPU frequency switching moment ②, CPU frequency switching moment ③, CPU frequency switching moment ④, frequency switching moment ⑤, and frequency switching moment ⑥, etc. Correspondingly, the frequency information collected at each frequency switching moment can include 0.88GHz, 0.96GHz, 1.03GHz, 1.13GHz, and 1.22GHz, as exemplified in Figure 3.

[0096] Based on the collected program execution information, the performance analysis tool running on the electronic device can first determine one or more calculation intervals for calculating evaluation indicators such as CPU load, and then accurately calculate the total task load, i.e., CPU load, during the execution of the target program based on the duration of the target thread in each calculation interval. Based on the performance analysis method provided in this application, the electronic device can also calculate other performance evaluation indicators, such as one or more of the following: CPU runtime, CPU utilization, and execution information of relevant functions in the target program; no limitation is imposed here.

[0097] Referring to Figure 3, the multiple computation intervals during the execution of the target program can be determined comprehensively based on the time information related to the start and end points of the target tasks in the lifecycle of the target program, the time information corresponding to the changes in the activity states of each target thread during the execution process (i.e., the aforementioned state switching moments), and the time information corresponding to the timing of CPU frequency switching. For example, one or more computation intervals for each target task can be determined based on the result of the intersection operation of the time periods formed by the aforementioned time information.

[0098] Therefore, the performance analysis method provided in this application, based on the aforementioned dynamic instrumentation tracking method that collects multiple time-related information related to the target task, can more accurately identify the time period during which the target task is executed, and can more accurately determine the effective computation interval for calculating the target task load. Based on this, the performance analysis results obtained using the performance analysis method provided in this application can also be more accurate.

[0099] Referring to Figure 3, for example, based on the result of the intersection operation of the time segments formed by the above-mentioned time information, it can be determined that the starting time of calculation interval 01 can be the starting time information corresponding to the task start point, and the ending time can be the time information corresponding to the CPU frequency switching moment ①. For another example, based on the result of the intersection operation of the time segments formed by the above-mentioned time information, it can be determined that the starting time of calculation interval 02 is the time information corresponding to the CPU frequency switching moment ①, and the ending time can be the time information corresponding to the CPU frequency switching moment ②. For yet another example, it can also be determined that the starting time of calculation interval 03 is the time information corresponding to the CPU frequency switching moment ②, and the ending time can be the time information corresponding to the state switching moment ① of the corresponding target thread. It can also be determined that the starting time of calculation interval 04 is the time information corresponding to the CPU frequency switching moment ③, and the ending time can be the time information corresponding to the CPU frequency switching moment ④. It can also be determined that the starting time of calculation interval 05 is the time information corresponding to the CPU frequency switching moment ④, and the ending time can be the time information corresponding to the state switching moment ③. For example, based on the result of the intersection operation of the time periods formed by the above time information, it can be determined that the starting time of the calculation interval 06 can be the time information corresponding to the CPU frequency switching time ⑤, and the ending time can be the ending time information corresponding to the task ending point in the life cycle of the target program.

[0100] In some embodiments, the intersection operation can also be performed based on partial state transition times of the target thread. For example, the state transition time corresponding to the transition from the sleep state to the running ready state may not participate in the intersection operation, i.e., it may not be used as the start or end time of any of the above calculation intervals. Therefore, the end time of calculation interval 05 shown in Figure 3 can be determined based on the time information corresponding to the state transition time ③ from the running ready state to the running state, without any limitation. Furthermore, calculation interval X can also be included between calculation interval 05 and calculation interval 06 shown in Figure 3. The start time of calculation interval X can be the time information corresponding to the state transition time ③, and the end time can be the time information corresponding to the frequency point transition time ⑤.

[0101] Referring again to Figure 3, the target program may include one or more target tasks, and each target task may determine one or more computation intervals based on the performance analysis method provided in this application. The state of any target thread within each computation interval may include a running state, a sleeping state, or a runnable state. When calculating the CPU load of the target task, the following formula (1) can be used to complete the calculation:

[0102] Wherein, "task load" represents the total CPU load corresponding to each target task executed on the CPU; "number of computation intervals" represents the number of computation intervals determined based on the performance analysis method provided in this application within the execution interval of the target task, and this number can be a natural number; "runtime" represents the duration of any target thread in the running state within each computation interval; and "equivalent computing power" represents the value of the equivalent computing power corresponding to the CPU frequency point of the running target task in each computation interval, that is, the equivalent computing power size.

[0103] For the example shown in Figure 3, the above runtime can be the cumulative value of the time interval during which the target thread is in the running state. Based on the task load calculation result corresponding to the above formula (1), it can be:

[0104] Task load = Duration of computation interval 01 × equivalent computing power 01 + Duration of computation interval 02 × equivalent computing power 02 + Duration of computation interval 03 × equivalent computing power 03 + (computation interval X) × (equivalent computing power X) + computation interval 06 × equivalent computing power 06.

[0105] Among them, equivalent computing power 01, equivalent computing power 02, equivalent computing power 03, equivalent computing power X and equivalent computing power 06 are the equivalent computing power values ​​of the CPU working at the corresponding frequency point within the corresponding computing interval.

[0106] It is understood that electronic devices implementing the performance analysis method provided in this application can pre-store the equivalent computing power values ​​corresponding to various types and frequencies of CPUs. Referring to the example shown in Figure 3, for the same type of CPU, such as an E-Core CPU, the equivalent computing power value corresponding to a frequency of 0.88 GHz can be 152; the equivalent computing power value corresponding to a frequency of 0.96 GHz can be 190; the equivalent computing power value corresponding to a frequency of 1.03 GHz can be 223; the equivalent computing power value corresponding to a frequency of 1.13 GHz can be 250; and the equivalent computing power value corresponding to a frequency of 1.22 GHz can be 303. The aforementioned equivalent computing power 01, equivalent computing power 02, equivalent computing power 03, equivalent computing power X, and equivalent computing power 06 can be any of the equivalent computing power values ​​in the above examples or other corresponding equivalent computing power values, without limitation or further description.

[0107] Therefore, based on the above formula (1), the electronic device can calculate the task load corresponding to each target task, and thus accurately calculate the performance indicators such as the CPU load required for the execution of the target program. This CPU load can be used to measure the performance of the target program, thereby guiding the direction and process of performance optimization for the target program. This CPU load can also be used to measure the performance of each CPU running the target program, thus guiding the electronic device to optimize the balance between CPU computing power and device power consumption by adjusting the CPU operating frequency, etc.

[0108] In other embodiments, the target program described above may also run on a virtual machine, and performance analysis tools such as the aforementioned IDE may also run on a server or other electronic device with one or more processors, without limitation.

[0109] In summary, the performance analysis method provided in this application, based on dynamic instrumentation, does not intrude on the target program's code and does not require recompiling or modifying the target program's code. Thus, the aforementioned method of obtaining multiple execution information related to the target program's execution process during runtime, based on dynamic instrumentation, greatly improves the applicability and flexibility of the performance analysis method. It can be applied to scenarios where performance analysis is used to optimize business code in target programs under development or already developed, and it can also be applied to performance analysis scenarios for various types and operating frequencies of CPUs.

[0110] The specific implementation process of the performance analysis method provided in this application will be described in detail below with reference to specific embodiments and accompanying drawings.

[0111] The following describes in detail, with reference to Example 1, the specific implementation process of the performance analysis method provided in this application on a single electronic device.

[0112] Example 1

[0113] The performance analysis method provided in this application can be applied to scenarios where electronic devices such as mobile phones 10 or laptops 20 are implemented independently.

[0114] Figure 4 illustrates a schematic diagram of the implementation process of a performance analysis method according to an embodiment of this application. It can be understood that the executing entity for each step in this implementation process can be the mobile phone 10 or laptop 20 in the performance analysis scenario shown in Figure 1a above, and in other embodiments, it can also be other terminal devices, such as tablet computers.

[0115] As shown in Figure 4, the implementation process may include the following steps:

[0116] 401: In response to a user action that runs the target program, the target program is executed.

[0117] For example, a developer can run a target program through the interface of a performance analysis tool running on the mobile phone 10 or laptop 20. Correspondingly, the mobile phone 10 or laptop 20 can run the target program in response to the user's operation. The developer can be the user of the performance analysis tool running on the mobile phone 10 or laptop 20. This interface can be referenced to the performance analysis interface displayed on the laptop 20 in the scenario shown in Figure 1a above.

[0118] It is understood that the performance analysis tool interface displayed on the mobile phone 10 can be an interface style adapted to the screen size of the mobile phone 10. In other embodiments, the performance analysis tool interface displayed on the laptop 20 may also differ from the interface style exemplified in Figure 1a above, and no restrictions are imposed here.

[0119] 402: Replace the instrumentation point specified in the target program with a jump instruction to perform instrumentation.

[0120] For example, the target program can be any application installed on mobile phone 10, any software program installed on laptop 20, or a test program deployed and installed by the developer on mobile phone 10 or laptop 20; there are no restrictions here. The instrumentation point specified in the target program can be the location specified by the developer after the target program to be analyzed is loaded into memory space, by inputting the instruction address or function name corresponding to the instrumentation point, i.e., the instrumentation point specified above. It can be understood that this instrumentation point is usually the location where the developer designs and replaces it with a jump instruction in the target program according to the actual performance analysis requirements. The developer can design the instrumentation point by inputting the instruction address or function name used to locate the corresponding instrumentation point into the performance analysis tool running on the electronic device. The jump instruction that replaces the specified instrumentation point, such as the jump instruction, can be an instruction that does not affect the code integrity of the target program. This jump instruction can trigger a jump to the specified program or code. After the program or code to which the jump is made has finished executing, the execution can jump back to the target program code after the jump instruction to continue.

[0121] In some embodiments, the mobile phone 10 or laptop 20 can analyze its own CPU performance by running a target program. For example, for multi-core terminal devices such as the mobile phone 10 or laptop 20, the load capacity, computing power, code execution capability, or fault recovery capability of the CPUs of various big and small core types included in the terminal device can be analyzed. In other embodiments, the mobile phone 10 or laptop 20 can analyze the code performance of the target program by running the target program. The performance analysis results can be used to guide developers to optimize the code of the target program, i.e., to perform program code tuning.

[0122] It can be understood that the implementation principle of replacing the specified instrumentation point with a jump instruction for instrumentation can be referred to the implementation principle of the dynamic instrumentation technology illustrated in Figure 2 above.

[0123] 403: Execution to jump instruction, jumps to the instrumentation program indicated by the instruction to continue execution.

[0124] For example, when the target program's code runs on the CPUs of the mobile phone 10 or laptop 20, and the CPU reaches a jump instruction, it can trigger a jump to a specified program to continue executing the program's content, such as jumping to an instrumentation program to continue executing the instrumentation content. The instrumentation program can be, for example, instrumentation code X1 or instrumentation code X2 as illustrated in Figure 2 above.

[0125] It's understandable that after the jump instruction in the code-like sequence has finished executing, a jump can be triggered to return to the next line of code in the target program to continue execution. In this way, the target program's code can maintain its integrity, and its execution process can remain unaffected by the instrumented code.

[0126] 404: During the instrumentation process, multiple execution information items were collected.

[0127] For example, the instrumentation content of the instrumentation program described above may include collection instructions or functions for multiple execution information, such as hook functions. Based on the collection instructions or functions in the instrumentation program, the mobile phone 10 or laptop 20 can synchronously collect multiple execution information during the execution of the target program's code. In the embodiments of this application, the multiple execution information may include target task start time information, end time information, time information corresponding to the state switching time of each target thread running the target program and the state information before and after the switching, time information corresponding to the CPU frequency switching time and the frequency information before and after the switching, etc. In other embodiments, the multiple execution information may also include other information that can affect the level or magnitude of evaluation indicators in the final analysis, which is not limited here.

[0128] It is understandable that since the aforementioned multiple execution information items are collected based on the same execution process, the collection conditions for each item, such as the execution duration of each target task in the target program, the execution duration of the target program on each thread, and changes in activity status, are consistent. Therefore, there is an interrelationship among the multiple execution information items collected during the same runtime process. Comprehensive calculation based on the collected multiple execution information items can improve the accuracy of the calculation results. The specific calculation process can be found in the descriptions of the relevant steps below, and will not be elaborated upon here.

[0129] 405: Based on multiple time information in multiple execution information, determine at least one calculation interval corresponding to each target task.

[0130] For example, the mobile phone 10 or the laptop 20 can comprehensively determine at least one calculation interval corresponding to the target task based on multiple time information such as the start time and end time information of the target task, the time information corresponding to the state switching time of the target thread, and the time information of the CPU frequency switching time.

[0131] Referring to Figure 3 above, by taking the intersection of the execution interval of the target task in the life cycle of the target program, the state switching time corresponding to the change of the activity state on the target thread, and the frequency switching time of the change of the relevant CPU frequency, multiple calculation intervals such as calculation interval 01, calculation interval 02, calculation interval 03, calculation interval 04, calculation interval 05, and calculation interval 06 corresponding to the execution process of the target task can be determined. Specifically, calculation interval 01 can be a time period calculated based on the start time information corresponding to the task start point and the time information corresponding to the CPU frequency switching time ①; calculation interval 02 can be a time period calculated based on the time information corresponding to the CPU frequency switching time ① and the time information corresponding to the CPU frequency switching time ②; calculation interval 03 can be a time period calculated based on the time information corresponding to the CPU frequency switching time ② and the time information corresponding to the state switching time ①; calculation interval 04 can be a time period calculated based on the time information corresponding to the CPU frequency switching time ③ and the time information corresponding to the frequency switching time ④; calculation interval 05 can be a time period calculated based on the time information corresponding to the CPU frequency switching time ④ and the time information corresponding to the state switching time ③; and calculation interval 06 can be a time period calculated based on the time information corresponding to the CPU frequency switching time ⑤ and the end time information corresponding to the task end point, which will not be elaborated further here.

[0132] It is understood that the target program can execute one or more target tasks during its operation. At least one computational interval corresponding to each target task can be determined using the method described above, and will not be elaborated upon here.

[0133] 406: Retrieves the CPU frequency information and the target thread's activity state within each computation interval from multiple execution information.

[0134] For example, among the various execution information collected during the execution of a target program, the activity state of the target thread before and after the state transition, such as running, sleeping, and runnable states, are also included. The target thread in the running state requires CPU resources and generates CPU load. In other embodiments, the target thread in the runnable state may also require CPU resources and generate CPU load. Therefore, when calculating CPU load subsequently, the performance analysis tool running on the mobile phone 10 or laptop 20 can obtain the activity state of the target thread within each calculation interval, and then filter out the duration of the running state, or the duration of both the running and runnable states.

[0135] In addition, the execution information also includes the CPU's operating frequency within each computational interval, i.e., frequency information. At this time, the performance analysis tool running on the mobile phone 10 or laptop 20 can obtain this frequency information.

[0136] 407: Convert the CPU operating frequency information within each computing interval into equivalent CPU computing power parameters.

[0137] For example, the CPU computing power parameters mentioned above may include equivalent computing power. Referring to the matching table between CPU operating frequency and equivalent computing power illustrated in Figure 3, i.e., the "CPU Computing Power Table" shown in Figure 3, the CPU operating frequency information obtained above can be converted into equivalent computing power values. For example, when the frequency information is 0.88GHz, the equivalent computing power value is 152; when the frequency information is 0.96GHz, the equivalent computing power value is 190; when the frequency information is 1.03GHz, the equivalent computing power value is 223; when the frequency information is 1.13GHz, the equivalent computing power value is 250; and when the frequency information is 1.22GHz, the equivalent computing power value can be 303, etc.

[0138] It is understandable that the "computing power table" shown in Figure 3 above can be a matching relationship between the frequency information and the equivalent computing power of CPUs of the same type. For example, it can be a matching relationship between different frequencies of small-core CPUs and their corresponding equivalent computing power. According to this matching relationship, the higher the operating frequency of a CPU of the same type, that is, the higher the CPU frequency, the higher the corresponding equivalent computing power value, that is, the greater the equivalent computing power.

[0139] The matching relationship between frequency information and equivalent computing power for different types of CPUs can be seen in Figure 5. Different types of CPUs operating at the same frequency may have different equivalent computing power values. For example, the equivalent computing power value for a small-core CPU operating at 0.88GHz is 152, while the equivalent computing power value for a medium-core CPU operating at 0.88GHz is 331. As another example, the equivalent computing power value for a small-core CPU operating at 0.96GHz is 190, while the equivalent computing power value for a medium-core CPU operating at 0.96GHz is 437. Furthermore, the equivalent computing power value for a medium-core CPU operating at 2.00GHz is 1564, while the equivalent computing power value for a large-core CPU operating at 2.00GHz is 1613, and so on. The computing power table shown in Figure 5 can be a preset matching relationship between the frequency and equivalent computing power of different types of CPUs in the mobile phone 10 or laptop 20, and is not limited here.

[0140] 408: Calculate the CPU load for each target task based on the runtime of each computation interval when the target thread is in a running state and the CPU computing power parameters of the corresponding computation interval.

[0141] For example, the performance analysis tool running on the mobile phone 10 or laptop 20 can first determine the time period of each computing interval and the corresponding duration of the target thread in the running state, and determine the runtime of each computing interval. Then, according to the above formula (1), the runtime of each computing interval obtained above and the equivalent computing power of the CPU working in the corresponding computing interval are substituted into the formula (1) for calculation, and finally the CPU load corresponding to the target task can be calculated.

[0142] It is understood that the CPU load corresponding to each target task calculated above can also be described as the task load of the target task in some other embodiments, which represents the amount of CPU resources actually consumed during the operation of the target task.

[0143] 409: Calculate the CPU load corresponding to the target program by combining the CPU load of each target task.

[0144] As mentioned above, a target program may include one or more target tasks. For example, when a target program includes one target task, the CPU load of the target task calculated above is the CPU load of the target program. When a target program includes multiple target tasks, the sum of the CPU loads of the multiple target tasks calculated above can be used as the CPU load of the target program. It can be understood that the CPU load of the target program calculated above can also be described as the task load of the target program in some other embodiments, which represents the amount of CPU resources actually consumed during the execution of the target program.

[0145] It is understood that the CPU load of the target task and / or the CPU load of the target program calculated above can be presented as performance analysis results on the performance analysis interface. The specific format in which these performance analysis results are presented will be explained below with reference to relevant figures, and will not be elaborated here.

[0146] Based on the execution process of steps 401 to 409 above, the performance analysis method provided by this application can realize the synchronous collection of multiple execution information required for performance analysis during one run of the target program. Furthermore, when performing performance analysis based on the collected multiple execution information, it can comprehensively analyze the various computing intervals that consume CPU resources by integrating multiple time information, thereby accurately calculating the task load of the target task and / or the task load of the target program, which improves the accuracy of the performance analysis results.

[0147] It is understood that in other embodiments, when the mobile phone 10 or the laptop 20 executes the performance analysis method provided in this application, it can also analyze other evaluation indicators based on multiple execution information collected during one run of the target program, so as to analyze the performance of the target program or the CPU performance of the mobile phone 10 and other electronic devices, etc., without limitation.

[0148] Example 2

[0149] The performance analysis method provided in this application can be applied to scenarios where mobile phone 10 interacts with laptop 20 or other electronic devices.

[0150] Figure 6 illustrates an interactive flow diagram of a performance analysis method according to an embodiment of this application. It can be understood that the execution entities involved in each step of this interactive flow may include the mobile phone 10 and laptop 20 in the scenario shown in Figure 1a above, and in other embodiments may also involve other terminal devices, such as tablet computers.

[0151] As shown in Figure 6, the implementation process may include the following steps:

[0152] 601: Laptop 20 performance analysis tool.

[0153] For example, the laptop 20 can run the performance analysis tool in response to a developer's instruction to do so, and display the performance analysis interface. This performance analysis interface can be referenced from the interface showing performance analysis result 101 in the scenario illustrated in Figure 1a above, and will not be described in detail here.

[0154] 602: Notebook 20 sends a communication connection request based on a performance analysis tool.

[0155] For example, developers can operate the electronic device, such as mobile phone 10, connected to the target program being analyzed, on the performance analysis interface displayed on laptop 20. Prior to this, it is understood that a wireless communication connection can be pre-established between mobile phone 10 and laptop 20, such as a communication connection established based on wireless communication methods like Bluetooth (BT), Wireless Fidelity (Wi-Fi), or distributed soft bus. In other implementation scenarios, the target program to be analyzed can be an application applicable to the operating system of electronic devices such as mobile phones. Developers can pre-connect mobile phone 10 and laptop 20 via a cable, which can be a communication cable with an interface type such as Universal Serial Bus (USB) or High Definition Multimedia Interface (HDMI). No limitations are imposed here.

[0156] 603: Notebook 20 detected a user action that instructed the execution of the target program.

[0157] For example, a developer can click the run control or similar tool on the performance analysis interface displayed on the laptop 20 to instruct the target program to run. At this time, the laptop 20 can detect the user operation instructing the target program to run, and can then respond to the developer's operation, i.e., respond to the user operation, and continue to execute the following step 604, such as sending the run command.

[0158] 604: The laptop 20 sends the execution instructions and instrumentation instructions corresponding to the target program to the mobile phone 10.

[0159] For example, the above-mentioned execution instruction is used to instruct the mobile phone 10 to run the target program. The above-mentioned instrumentation instruction can be used to instruct the mobile phone 10 to replace a specified instrumentation point with a jump instruction during the execution of the target program. This instrumentation instruction may include information describing the instrumentation point, or instrumentation location, specified in the target program code file, as well as adding a jump instruction to the running target program and the instrumentation program to be executed. This instrumentation program may, for example, be instrumentation code X1 or instrumentation code X2 as illustrated in Figure 2 above, etc., and will not be elaborated upon here.

[0160] 605: Mobile phone 10 responds to the run command and runs the target program.

[0161] 606: Mobile phone 10 responds to the instrumentation command and replaces the instrumentation point specified in the target program with a jump command to perform instrumentation.

[0162] For details on the specific process of replacing the specified instrumentation point with a jump instruction for instrumentation, please refer to the relevant description of step 402 in the above embodiment 1, which will not be repeated here.

[0163] 607: Mobile phone 10 runs to a jump instruction, which jumps to the instrumentation program indicated by the instruction to continue running.

[0164] For details on the execution process of the instrumentation program based on the jump instruction, please refer to the relevant description of step 403 in the above embodiment 1, which will not be repeated here.

[0165] 608: During the instrumentation process, the mobile phone 10 collects multiple execution information.

[0166] For example, the multiple execution information may include target task start time information, end time information, time information corresponding to the state switching time of each target thread run by the target program and the state information before and after the switching, time information corresponding to the CPU frequency switching time and the frequency information before and after the switching, etc.

[0167] For details on the execution process of collecting multiple execution information, please refer to the relevant description of step 404 in the above embodiment 1, which will not be repeated here.

[0168] It is understood that during the collection of multiple execution information items, the mobile phone 10 can save the execution information in real time, for example, to the memory space allocated by the system for the target program. Then, after the collection is completed, step 609 can be executed to send the collected execution information items to the laptop 20. In other embodiments, the mobile phone 10 can also send the multiple execution information items collected during the target program's execution to the laptop 20 in real time, without limitation.

[0169] 609: Mobile phone 10 sends multiple execution information collected to laptop 20.

[0170] For example, after information collection is completed, mobile phone 10 can send the collected execution information to laptop 20.

[0171] 610: The laptop 20 saves the received execution information to memory space.

[0172] For example, the memory space may be the storage space allocated by the system of the laptop 20 for the performance analysis tool. This memory space can be used to store the target program to be analyzed, or it can be used to store the target program for performing performance analysis on the CPU of electronic devices such as the laptop 20. In the embodiments of this application, the memory space can be used to store multiple execution information received from the mobile phone 10.

[0173] As mentioned above, the above-mentioned execution information is program execution information collected synchronously during the running of the target program on the mobile phone 10.

[0174] 611: Notebook 20 determines at least one calculation interval corresponding to each target task based on multiple time information in multiple execution information.

[0175] 612: The notebook 20 obtains the CPU frequency information and the activity status of the target thread in each calculation interval from multiple execution information.

[0176] 613: The notebook 20 converts the CPU frequency information of each computing interval into equivalent CPU computing power parameters.

[0177] 614: Based on the runtime of each computing interval when the target thread is in a running state and the CPU computing power parameters of the corresponding computing interval, the notebook 20 calculates the CPU load corresponding to each target task.

[0178] 615: The laptop 20 integrates the CPU load of each target task and calculates the CPU load corresponding to the target program.

[0179] The specific execution process of steps 611 to 615 above can be referred to the relevant descriptions of steps 406 to 409 in the above embodiment 1, and will not be repeated here.

[0180] It is understood that in application scenarios where two or more devices interact to implement the performance analysis method provided in this application, the electronic device running the target program (e.g., mobile phone 10) can be responsible for collecting multiple program execution information during a single run of the target program to serve as raw data for performance analysis. These execution information items may have temporal or content-related correlations. Another electronic device running the performance analysis tool (e.g., laptop 20) can then comprehensively analyze and obtain performance analysis results based on the correlated execution information items, such as the CPU load or task load of the target program. This improves the accuracy of the performance analysis results.

[0181] Furthermore, based on the performance analysis methods provided in Embodiments 1 and 2 above, this application instrumentes the target program by replacing specified instrumentation points with jump instructions during program execution and collecting execution information. This dynamic instrumentation effectively improves the applicability and flexibility of the performance analysis method provided in this application. For example, this method can be applied not only to target programs under development for code optimization through performance analysis, but also to released target programs for performance analysis testing to guide subsequent program optimization strategies. For CPUs in electronic devices, the performance analysis method provided in this application can also support performance analysis of various CPU types, including large and small cores, for computing power or load capacity. Moreover, the relevant performance analysis results can guide the electronic device's system to adjust its load during the execution of the target program on the CPU. Specific details can be found in the exemplary descriptions below in conjunction with the accompanying drawings, which will not be elaborated upon here.

[0182] Figure 7 shows a schematic diagram of computing power-load analysis coordinates established based on performance analysis results, according to this application.

[0183] Taking a scenario where an electronic device executes multiple interface display tasks while running multiple target programs as an example, for instance, if the electronic device has a frame rate of 120Hz, meaning it can refresh 120 frames of interface images per second, then the electronic device can complete the drawing, rendering, and displaying of one frame of interface image in 8.3ms. Here, one or more target programs can be one or more applications or software programs currently running on the electronic device, such as multiple applications running on mobile phone 10, or multiple software programs running on laptop 20, etc.

[0184] Referring to Figure 7, the horizontal axis of this computing power-load analysis coordinate represents the load, which is the load consumed by the interface display tasks of each target program currently being executed by the electronic device. This load can be the CPU load or task load value of one or more target programs calculated based on the performance analysis method provided in this application.

[0185] Referring again to Figure 7, the vertical axis of this computing power-load analysis coordinate represents the average computing power, which is the ratio between the load consumed by the interface display tasks of each target program currently being executed by the electronic device and the runtime of the relevant task threads. This runtime can be referenced from the sum of the running times of each target thread shown in Figure 2 above. This average computing power can be obtained, for example, by dividing the total CPU load of each interface display task calculated by the performance analysis method of this application by the sum of the running times of each target thread.

[0186] It is understandable that the more complex the application or software program running on an electronic device within the same time period and / or the lower the program execution efficiency, the greater the CPU computing power consumed by the interface display task corresponding to each target program will be.

[0187] Referring back to Figure 7, the x-axis and y-axis of each point in the computing power-load analysis coordinate system correspond to the computing power-load of the interface display task completed per second for each frame of interface images. It can be understood that once the CPU configuration of an electronic device is determined, a balance can be achieved between the CPU computing power it can provide and the power consumption of the device. For the same load, running at a high frequency results in a shorter runtime, but high frequencies often have lower energy efficiency and higher power consumption. Conversely, running at a low frequency results in a longer runtime but higher energy efficiency and lower power consumption. Therefore, considering the target allowable runtime, such as 8.3ms, using a frequency that achieves a task completion time of exactly 8.3ms ensures timely task completion while minimizing power consumption. Referring to the computing power-load analysis coordinate system shown in Figure 7, the coordinate points falling on the 120Hz computing power-power balance line indicate a balance between the computing power and power consumption provided by the electronic device for the task at that coordinate point.

[0188] Using the 120Hz computing power-power balance line as the boundary, for each coordinate point falling to the left of this line, the relationship between the computing power provided by the corresponding electronic device for the task and the power consumption of the electronic device can be maintained in a state of supply exceeding demand. At this time, the computing power supply and the power consumption of the electronic device can be balanced by adjusting the CPU operating frequency of the electronic device, i.e., switching the frequency point. Referring to Figure 7, in this state, the electronic device may experience either insufficient or excessive computing power supply.

[0189] For example, a coordinate point falling within the undersupply zone shown in Figure 7 corresponds to a task execution time greater than the target time, indicating that CPU computing power supply is less than CPU load. In this case, increasing the CPU's operating frequency (i.e., having the CPU operate at a higher frequency) can increase CPU computing power supply, shorten task execution time, and ultimately enable the target task to complete within the target time. In other embodiments, CPU load can also be reduced by decreasing program logic complexity or improving algorithm efficiency, thereby achieving the goal of enabling the target task to complete within the target time. The aforementioned target time can be the execution duration set by application code / kernel code developers based on performance optimization goals.

[0190] For example, at coordinate points falling within the oversupply zone shown in Figure 7, the corresponding task execution time is less than the target time, indicating that the CPU computing power supply is greater than the CPU load. In this case, the CPU computing power supply can be reduced by lowering the CPU's operating frequency, i.e., having the CPU operate at a lower frequency. It can be understood that a lower frequency is beneficial for improving energy efficiency or reducing power consumption. In other words, for coordinate points in the oversupply zone, the main consideration is how to obtain greater power consumption benefits.

[0191] Referring back to Figure 7, for the coordinate points falling to the right of the 120Hz maximum load line, i.e., those in the overload zone, the corresponding CPU operating frequency cannot be increased further, meaning the CPU computing power supply cannot be increased any further. To address this, the problem of completing the target task within the target time can be solved by optimizing the program code, such as reducing program logic complexity or improving algorithm efficiency, thereby reducing the load and ultimately enabling the target task to be completed within the target time.

[0192] Figure 8 illustrates a software structure diagram of a performance analysis tool according to an embodiment of this application. In this embodiment, the performance analysis tool can be deployed and installed on electronic devices such as the aforementioned mobile phone 10 and / or laptop 20. In other embodiments, the performance analysis tool can also be deployed and installed on other electronic devices that need to perform performance analysis tasks, such as tablet computers, etc., without limitation.

[0193] As shown in Figure 8, the system software structure of the electronic device 100 may include an execution information acquisition module 810, an evaluation index conversion module 820, and a performance analysis module 830.

[0194] The execution information acquisition module 810 is used to collect multiple execution information items during the execution of the target program. In this embodiment, the execution information acquisition module 810 may include a dynamic instrumentation module 811, a thread state acquisition module 812, and a CPU frequency acquisition module 813.

[0195] The dynamic instrumentation module 811 is used to obtain the instruction address or function name corresponding to the specified instrumentation point input by the developer, and replace it with a jump instruction at the specified instrumentation point during the execution of the target program. As mentioned earlier, this jump instruction can be used to jump to the instrumented code specified by the developer to continue execution, so as to collect information such as the system time corresponding to the instrumentation point. The specified instrumentation point can be in the code of the target program, or in the application code / kernel code. The application code / kernel code can be the code corresponding to the system process or thread that needs to be called during the execution of the target program.

[0196] The thread state acquisition module 812 is used to collect information related to the activity state changes of the execution threads (also known as target threads) corresponding to each target task of the target program in real time during the program's execution. This includes the time information corresponding to the state transition of each target thread and the state information before and after the transition. For details, please refer to Figures 2 and 3 above and related descriptions, which will not be elaborated here.

[0197] The CPU frequency acquisition module 813 is used to collect information related to the operating frequency changes of each CPU executing the task code in real time during the execution of the target program, including the time information corresponding to the CPU frequency switching moment and the frequency information before and after the switching. For details, please refer to Figure 3 above and other related descriptions, which will not be repeated here.

[0198] The evaluation index conversion module 820 may include a computing power conversion module 821 and an evaluation index calculation module 822, etc. Among them:

[0199] The computing power conversion module 821 is used to convert the collected CPU frequency information into corresponding equivalent computing power. As mentioned earlier, the magnitude of the equivalent computing power can be determined by the CPU's current operating frequency (i.e., frequency point) and the CPU type. For details, please refer to Figure 5 above and related descriptions, which will not be elaborated upon here.

[0200] The evaluation index calculation module 822 is used to calculate the values ​​of relevant evaluation index parameters based on the collected execution information, that is, to convert the various program execution information into relevant performance evaluation indicators. For example, the evaluation index calculation module 822 can determine at least one computing interval corresponding to each target task based on the collected time information, and combine it with the equivalent computing power obtained by the computing power conversion module 821 from the relevant CPU to calculate the CPU load during the execution of each target task, as well as the comprehensive CPU load of the target program. In this embodiment, the CPU load is the task load.

[0201] The performance analysis module 830 is used to measure the performance of the target program or analyze the CPU load balancing performance of the electronic device based on the performance evaluation indicators calculated above, such as the CPU load corresponding to each target task or target program. In this embodiment, the analysis results of the CPU load balancing performance can be reflected in the computing power-load analysis coordinates shown in Figure 7. In other embodiments, it can also be reflected in other forms of performance analysis results, which are not limited here.

[0202] Figure 9 shows a schematic diagram of the hardware structure of an electronic device according to an embodiment of this application. It is understood that the electronic device can be the aforementioned mobile phone 10, the aforementioned laptop 20, or other electronic devices, and no limitation is made herein.

[0203] Electronic device 100 may include processor 110, external memory interface 120, internal memory 121, universal serial bus (USB) interface 130, charging management module 140, power management module 141, battery 142, antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, sensor module 180, button 190, motor 191, indicator 192, camera 193, display screen 194, and subscriber identity module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0204] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0205] Processor 110 may include one or more processing units, such as application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU). These different processing units may be independent devices or integrated into one or more processors.

[0206] The controller can generate operation control signals based on the instruction opcode and timing signals to complete the control of instruction fetching and execution.

[0207] In this embodiment, the processor 110 of the electronic device 100 can control the fetching and instruction loading via a controller to implement the steps in the process shown in Figure 4 of Embodiment 1 or the steps shown in Figure 6 of Embodiment 2, thereby realizing the performance analysis method provided in this application. Specific implementation processes can be found in the relevant descriptions in Embodiments 1 and 2, and will not be repeated here.

[0208] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the aforementioned memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0209] In some embodiments, the processor 110 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a SIM card interface, and / or a universal serial bus (USB) interface, etc.

[0210] The wireless communication function of electronic device 100 can be realized through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor, etc.

[0211] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover one or more communication frequency bands. Different antennas can also be multiplexed to improve antenna utilization. For example, antenna 1 can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antennas can be used in conjunction with tuning switches.

[0212] The mobile communication module 150 can provide solutions for wireless communication, including 2G / 3G / 4G / 5G, applied to the electronic device 100. The mobile communication module 150 may include at least one filter, switch, power amplifier, low-noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves via antenna 1, and perform filtering, amplification, and other processing on the received electromagnetic waves before transmitting them to a modem processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modem processor and convert it into electromagnetic waves for radiation via antenna 1. In some embodiments, at least some functional modules of the mobile communication module 150 may be housed in the processor 110. In some embodiments, at least some functional modules of the mobile communication module 150 and at least some modules of the processor 110 may be housed in the same device.

[0213] The wireless communication module 160 can provide solutions for wireless communication applications on the electronic device 100, including wireless local area networks (WLAN) (such as Wi-Fi), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR). The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via antenna 2, performs frequency modulation and filtering of the electromagnetic wave signal, and sends the processed signal to processor 110. The wireless communication module 160 can also receive signals to be transmitted from processor 110, perform frequency modulation and amplification, and convert them into electromagnetic waves for radiation via antenna 2.

[0214] In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, enabling electronic device 100 to communicate with networks and other devices via wireless communication technology. The aforementioned wireless communication technology may include Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technologies, etc. The aforementioned GNSS may include the Global Positioning System (GPS), the Global Navigation Satellite System (GLONASS), the BeiDou Navigation Satellite System (BDS), the Quasi-Zenith Satellite System (QZSS), and / or satellite-based augmentation systems (SBAS).

[0215] Electronic device 100 implements display functions through a GPU, display screen 194, and application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU performs mathematical and geometric calculations and is used for graphics rendering. Processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information. Electronic device 100 can implement shooting functions through an ISP, camera 193, video codec, GPU, display screen 194, and application processor.

[0216] Camera 193 is used to capture still images or videos. An object is projected onto a photosensitive element by generating an optical image through the lens. The photosensitive element can be a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, which is then passed to an ISP for conversion into a digital image signal. The ISP outputs the digital image signal to a DSP for processing. The DSP converts the digital image signal into image signals in standard RGB, YUV, or other formats. In some embodiments, the electronic device 100 may include one or N cameras 193, where N is a positive integer greater than 1.

[0217] The external storage interface 120 can be used to connect an external memory card, such as a MicroSD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, music, video, and other files can be saved on the external memory card.

[0218] Internal memory 121 can be used to store computer executable program code, including instructions. Internal memory 121 may include a program storage area and a data storage area. Furthermore, internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc. Processor 110 executes various functional applications and data processing of electronic device 100 by running instructions stored in internal memory 121 and / or instructions stored in memory disposed within the processor.

[0219] Electronic device 100 can implement audio functions, such as music playback and recording, through audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor.

[0220] Buttons 190 include a power button, volume buttons, etc. Buttons 190 can be mechanical buttons or touch-sensitive buttons. Electronic device 100 can receive button input and generate key signal inputs related to user settings and function control of electronic device 100.

[0221] Motor 191 can generate vibration alerts. Motor 191 can be used for incoming call vibration alerts or for touch vibration feedback. For example, different vibration feedback effects can correspond to touch operations performed on different applications (such as taking photos, playing audio, etc.). Motor 191 can also correspond to different vibration feedback effects for touch operations performed on different areas of the display screen 194. Different application scenarios (such as time reminders, receiving messages, alarm clocks, games, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect can also be customized.

[0222] Indicator 192 can be an indicator light, used to indicate charging status, power changes, or to indicate messages, missed calls, notifications, etc.

[0223] The SIM card interface 195 is used to connect a SIM card. The SIM card can be inserted into or removed from the SIM card interface 195 to make contact with and separate from the electronic device 100. The electronic device 100 can support one or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 195 can support Nano SIM cards, Micro SIM cards, SIM cards, etc. Multiple cards can be inserted into the same SIM card interface 195 simultaneously. The types of these multiple cards can be the same or different. The SIM card interface 195 is also compatible with different types of SIM cards. The SIM card interface 195 is also compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as calls and data communication. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0224] Figure 10 shows a schematic diagram of the operating system software structure of an electronic device according to an embodiment of this application.

[0225] It is understood that the operating system of electronic device 100 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application embodiment uses the layered architecture Android system as an example to exemplify the system software structure of electronic device 100.

[0226] A layered architecture divides software into several layers, each with a clear role and function. Layers communicate with each other through software interfaces. In some embodiments, Android... TM The system is divided into four layers, from top to bottom: application layer, application framework layer, and Android. TM runtime (Android) TM runtime and system libraries, as well as the kernel layer.

[0227] As shown in Figure 10, the application layer can include a series of application packages. These application packages can include applications such as camera, gallery, calendar, calling, map, navigation, WLAN, Bluetooth, music, video, and SMS.

[0228] The application framework layer provides application programming interfaces (APIs) and a programming framework for applications in the application layer. The application framework layer includes some predefined functions.

[0229] The application framework layer may include a window manager, content provider, view system, phone manager, resource manager, notification manager, etc.

[0230] The window manager is used to manage windowed applications. It can retrieve screen size, determine the presence of a status bar, lock the screen, and capture screenshots, among other things.

[0231] Content providers store and retrieve data, making that data accessible to applications. This data can include videos, images, audio, phone calls made and received, browsing history and bookmarks, phone books, etc.

[0232] A view system includes visual controls, such as controls for displaying text and controls for displaying images. View systems can be used to build applications. A display interface can consist of one or more views. For example, a display interface including a text notification icon could include views for displaying text and views for displaying images.

[0233] The phone manager is used to provide communication functions for electronic device 100. For example, it manages call status (including connection and disconnection).

[0234] The file explorer provides applications with various resources, such as localized strings, icons, images, layout files, video files, and more.

[0235] The notification manager allows applications to display notifications in the status bar. These notifications can be used to deliver informational messages and can disappear automatically after a short pause, requiring no user interaction. For example, the notification manager can be used to notify users of download completion or message alerts. The notification manager can also display notifications as icons or scrolling text in the top status bar, such as notifications from background applications, or as dialog boxes on the screen. Examples include displaying text messages in the status bar, emitting sounds, vibrating electronic devices, and flashing indicator lights.

[0236] Android TM Runtime includes core libraries and a virtual machine. Android TMruntime is responsible for Android TM System scheduling and management.

[0237] The core library consists of two parts: one part is the functionalities that need to be called by the Java language, and the other part is the Android core library.

[0238] The application layer and application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0239] System libraries can include multiple functional modules. For example: surface manager, media libraries, 3D graphics processing libraries (e.g., OpenGL ES), 2D graphics engines (e.g., SGL), etc.

[0240] The Surface Manager is used to manage the display subsystem and provides the blending of 2D and 3D layers for multiple applications.

[0241] The media library supports playback and recording of various common audio and video formats, as well as still image files. It supports multiple audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, and PNG.

[0242] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0243] A 2D graphics engine is a graphics engine for 2D drawing.

[0244] The kernel layer is the layer between hardware and software. The kernel layer contains at least the display driver, camera driver, audio driver, and sensor driver.

[0245] This application also provides a computer program product for implementing the performance analysis methods provided in the above embodiments.

[0246] Various embodiments of the mechanisms disclosed in this application can be implemented in hardware, software, firmware, or combinations of these implementation methods. Embodiments of this application can be implemented as computer program modules or module code executable on a programmable system, the programmable system including at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.

[0247] Computer program modules or module code can be applied to input instructions to perform the functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, the processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application-specific integrated circuit (ASIC), or a microprocessor.

[0248] Module code can be implemented using a high-level modular language or an object-oriented programming language to communicate with the processing system. Assembly language or machine language can also be used to implement module code when needed. In fact, the mechanisms described in this application are not limited to any particular programming language. In either case, the language can be a compiled language or an interpreted language.

[0249] In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored thereon on one or more temporary or non-temporary machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors. For example, the instructions may be distributed via a network or through other computer-readable media. Therefore, machine-readable media may include any mechanism for storing or transmitting information in a machine-readable (e.g., computer-readable) form, including but not limited to floppy disks, optical disks, optical discs, magneto-optical disks, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic cards or optical cards, flash memory, or tangible machine-readable storage for transmitting information (e.g., carrier waves, infrared signals, digital signals, etc.) using the Internet in the form of electrical, optical, acoustic, or other forms of propagated signals. Therefore, machine-readable media include any type of machine-readable medium suitable for storing or transmitting electronic instructions or information in a machine-readable (e.g., computer-readable) form.

[0250] In this specification, the reference to "an embodiment" or "an embodiment" means that a specific feature, structure, or characteristic described in connection with the embodiment is included in at least one exemplary implementation or technology disclosed according to an embodiment of this application. The appearance of the phrase "in an embodiment" in various places in the specification does not necessarily refer to the same embodiment.

[0251] The disclosure of embodiments of this application also relates to means for performing operations in text. This means may be specifically constructed for the claimed purpose or may include a general-purpose computer selectively activated or reconfigured by a computer program stored in a computer. Such a computer program may be stored on a computer-readable medium, such as, but not limited to, any type of disk, including floppy disks, optical disks, CD-ROMs, magneto-optical disks, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic or optical cards, application-specific integrated circuits (ASICs), or any type of medium suitable for storing electronic instructions, and each may be coupled to a computer system bus. Furthermore, the computer mentioned in the specification may include a single processor or may employ an architecture involving multiple processors for increased computing power.

[0252] Furthermore, the language used in this specification has been primarily chosen for readability and instructional purposes and may not have been chosen to depict or limit the disclosed subject matter. Therefore, the embodiments disclosed in this application are intended to illustrate, and not limit, the scope of the concepts discussed herein.

Claims

1. A performance analysis method applied to electronic devices, characterized in that, include: An analysis request was detected, indicating that the user had instructed the first program to be run for performance analysis. In response to the analysis request, performance analysis results are displayed, wherein the performance analysis results are derived based on the execution information of the first program during the same run, the execution information including at least multiple time information related to the first task of the first program, and the performance analysis results include processor performance analysis results.

2. The method according to claim 1, characterized in that, The electronic device includes one or more CPUs, and the processor performance analysis results include CPU performance analysis results, and... The detected analysis request, indicating that the user has instructed the first program to be run for performance analysis, includes: A first analysis request is detected, instructing the user to run a first program to perform performance analysis on the one or more CPUs; or... A second analysis request from the user to perform performance analysis on the first program was detected.

3. The method according to claim 2, characterized in that, The first program includes one or more tasks, and the one or more tasks include the first task, and, The response to the analysis request, displaying performance analysis results, includes: Determine at least one computation interval for calculating the first task load, wherein the first task load is the CPU load generated by the first task, and the performance analysis result is related to the first task load; Determine the duration corresponding to the computation interval in which the first thread is in a running state within the at least one computation interval, wherein the first thread is the thread that executes the first task; Obtain the computing power parameters corresponding to the CPU operating frequency points within each computing interval; The first task load is determined based on the number of the at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval.

4. The method according to claim 3, characterized in that, The multiple time information related to the first task of the first program is used to determine the start and end times of each of the calculation intervals, and, Determining at least one computation interval for calculating the first task load includes: Obtain the start time and end time information of the first task in at least one task of the first program, and, Obtain the first-time information corresponding to the moment when the activity state of the first thread where the first task is located changes, wherein the activity state includes the running state, and Obtain the second time information corresponding to the frequency switching time of the first CPU running the first thread; Based on the start time information, the end time information, the first time information, and the second time information, at least one calculation interval for calculating the first task load is determined.

5. The method according to claim 4, characterized in that, The execution information of the first program during the same run also includes the activity state information of the first thread collected before and after the activity state switching time, and, The operating status includes the running status and / or the runnable status.

6. The method according to claim 5, characterized in that, Determining the duration corresponding to the computation interval in which the first thread is in a running state within the at least one computation interval includes: Determine the first runtime corresponding to the first computation interval in which the first thread is running, and, Determine the number of first computation intervals in which the first thread is running.

7. The method according to claim 6, characterized in that, The execution information of the first program during the same run also includes the frequency information of the first CPU collected before and after the frequency switching time, and... The step of obtaining the computing power parameters corresponding to the CPU operating frequency points within each computing interval includes: Obtain the first frequency point information of the first CPU operating within the first calculation interval; Based on the type of the first CPU and the first frequency information, the corresponding value of the first equivalent computing power is determined; The value of the first equivalent computing power is determined as the computing power parameter corresponding to the frequency point at which the first CPU operates within the first computing interval.

8. The method according to claim 7, characterized in that, The determination of the first task load based on the number of the at least one computation interval, the duration of the computation interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency points within each computation interval includes: Based on the first runtime and the first equivalent computing power, calculate the first CPU load corresponding to the first computing interval; The first task load corresponding to the first task is obtained by accumulating the first CPU load corresponding to one or more of the first calculation intervals in the at least one calculation interval.

9. The method according to claim 8, characterized in that, The one or more tasks also include a second task, and, The response to the analysis request, displaying the performance analysis results, also includes: Determine at least one computation interval for calculating the second task load, wherein the second task load is the CPU load generated by the second task; Determine the duration corresponding to the calculation interval in which the second thread is in a running state within the at least one calculation interval, wherein the second thread is the thread that executes the second task; Obtain the computing power parameters corresponding to the CPU operating frequency points within each computing interval; The second task load is determined based on the number of the at least one computing interval, the duration of the computing interval in which the second thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval.

10. The method according to claim 9, characterized in that, The response to the analysis request, displaying performance analysis results, includes: In response to the first analysis request, the first task load and the second task load are combined for calculation to obtain the total load corresponding to one or more CPUs currently working in the electronic device, which is then determined as the processor performance analysis result and displayed.

11. The method according to claim 9, characterized in that, The performance analysis results include the performance analysis results of the first program, and, The response to the analysis request, displaying performance analysis results, includes: In response to the second analysis request, the first program performance analysis results are generated and displayed based on the first task load and the second task load.

12. The method according to any one of claims 3 to 11, characterized in that, The start time information of the first task is obtained based on the execution results of the first instrumentation program, and the end time information of the first task is obtained based on the execution results of the second instrumentation program. The electronic device jumps to run the first instrumentation program based on the first jump instruction in the first program; The electronic device jumps to run the second instrumentation program based on the second jump instruction in the first program.

13. The method according to any one of claims 3 to 11, characterized in that, The first-time information corresponding to the moment the activity state of the first thread changes is obtained based on the execution results of the third instrumentation program, and... The electronic device jumps to run the third instrumentation program based on a third jump instruction in the application code / kernel code used to monitor the activity state of the first thread.

14. The method according to any one of claims 4 to 11, characterized in that, The second time information corresponding to the frequency switching time of the first CPU is obtained based on the execution results of the fourth instrumentation program, and... The electronic device jumps to run the fourth instrumentation program based on the fourth jump instruction inserted in the application code / kernel code that is capable of listening to the frequency switching event of the first CPU.

15. A performance analysis method, applied to a first electronic device and a second electronic device, characterized in that, include: The first electronic device detects an analysis request from the user instructing the user to run a first program for performance analysis; In response to the analysis request, the first electronic device sends a running instruction corresponding to the first program to the second electronic device; The second electronic device executes the first program in response to the running instruction; The first electronic device displays performance analysis results based on the execution information collected by the second electronic device during the same run of the first program. The performance analysis results are derived from the execution information of the first program during the same run. The execution information includes at least multiple time-related information items related to the first task of the first program, and the performance analysis results include processor performance analysis results.

16. The method according to claim 15, characterized in that, The first program includes one or more tasks, and the one or more tasks include the first task, and, The first electronic device displays performance analysis results based on execution information collected by the second electronic device during the same execution of the first program, including: The first electronic device receives the execution information collected by the second electronic device and determines at least one calculation interval for calculating the first task load based on the execution information, wherein the first task load is the CPU load generated by the first task, and the performance analysis result is related to the first task load. The first electronic device determines the duration corresponding to the computing interval in which the first thread is in a running state within the at least one computing interval, wherein the first thread is the thread that executes the first task; The first electronic device acquires the computing power parameters corresponding to the CPU's operating frequency points within each computing interval; The first electronic device determines the first task load based on the number of the at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval.

17. The method according to claim 16, characterized in that, The first electronic device determines at least one computation interval for calculating the first task load based on the execution information, including: The first electronic device acquires the start time information and end time information of the first task in at least one task of the first program, and, The first electronic device acquires first-time information corresponding to the moment when the activity state of the first thread where the first task is located changes, wherein the activity state includes the running state, and The first electronic device acquires second time information corresponding to the frequency switching time of the first CPU running the first thread, wherein the first CPU is any one of one or more CPUs of the second electronic device; The first electronic device determines at least one calculation interval for calculating the first task load based on the start time information, the end time information, the first time information, and the second time information.

18. The method according to claim 17, characterized in that, The execution information of the first program during the same run also includes the activity state information of the first thread collected before and after the activity state switching time, and, The operating status includes the running status and / or the runnable status.

19. The method according to claim 18, characterized in that, The first electronic device determines the duration corresponding to the computation interval in which the first thread is in a running state within the at least one computation interval, including: The first electronic device determines the first runtime corresponding to the first computation interval in which the first thread is running, and, The first electronic device determines the number of first computation intervals in which the first thread is running.

20. The method according to claim 19, characterized in that, The execution information of the first program during the same run also includes the frequency information of the first CPU collected before and after the frequency switching time, and... The first electronic device acquires the computing power parameters corresponding to the CPU operating frequency points within each computing interval, including: The first electronic device acquires the first frequency point information of the first CPU operating within the first computing interval; The first electronic device determines the value of the corresponding first equivalent computing power based on the type of the first CPU and the first frequency point information; The first electronic device determines the value of the first equivalent computing power as the computing power parameter corresponding to the frequency point at which the first CPU operates within the first computing interval.

21. The method according to claim 20, characterized in that, The first electronic device determines the first task load based on the number of the at least one computing interval, the duration of the computing interval in which the first thread is running, and the computing power parameters corresponding to the CPU operating frequency points within each computing interval, including: The first electronic device calculates the first CPU load corresponding to the first computing interval based on the first runtime and the value of the first equivalent computing power. The first electronic device calculates the first task load corresponding to the first task by accumulating the first CPU load corresponding to one or more of the at least one calculation intervals.

22. The method according to claim 21, characterized in that, The one or more tasks also include a second task, and, The first electronic device displays performance analysis results based on execution information collected by the second electronic device during the same execution of the first program, including: The first electronic device determines at least one computation interval for calculating the second task load, wherein the second task load is the CPU load generated corresponding to the second task; The first electronic device determines the duration corresponding to the computing interval in which the second thread is in a running state within the at least one computing interval, wherein the second thread is the thread that executes the second task; The first electronic device acquires the computing power parameters corresponding to the CPU's operating frequency points within each computing interval; The first electronic device determines the second task load based on the number of the at least one computing interval, the duration of the computing interval in which the second thread is running, and the computing power parameters corresponding to the CPU operating frequency in each computing interval. The first electronic device generates and displays the performance analysis results based on the first task load and the second task load.

23. A method for applying performance analysis results to electronic devices, characterized in that, The electronic device includes a performance analysis tool, wherein the performance analysis tool is used to execute the performance analysis method according to any one of claims 1 to 14 to obtain performance analysis results, the performance analysis results including CPU load analysis results corresponding to multiple programs running within a first time period, and... The method includes: Establish a first coordinate system, wherein the horizontal axis of the first coordinate system represents the task load and the vertical axis represents the CPU computing power; Based on the maximum screen frame rate of the electronic device, a first reference line is determined in the first coordinate system, wherein the task load corresponding to the coordinate point on the first reference line and the CPU computing power provided by the electronic device satisfy a first balance condition. The first balance condition is used to control the CPU computing power provided by the electronic device and the power consumption of the electronic device to reach a balanced state. Based on the positional relationship between the CPU load analysis results corresponding to the multiple programs and the landing points in the first coordinate system and the first reference line, a program optimization strategy for the multiple programs is determined.

24. The application method according to claim 23, characterized in that, The method further includes: Based on the maximum task load that the CPU computing power provided by the electronic device can support, a second reference line is determined in the first coordinate system. The task load corresponding to the coordinate point on the second reference line and the CPU computing power provided by the electronic device satisfy a second balance condition. The second balance condition is used to control the CPU computing power provided by the electronic device to reach a balanced state with the maximum load that the electronic device can support. Based on the positional relationship between the CPU load analysis results corresponding to the multiple programs in the first coordinate system and the second reference line, a program optimization strategy for the multiple programs is determined.

25. The application method according to claim 23 or 24, characterized in that, The program optimization strategy for the plurality of programs includes at least one of the following: Increase the operating frequency of one or more CPUs running the first program of the plurality of programs; Reduce the operating frequency of one or more CPUs running the first program of the plurality of programs; Reduce the program code logic complexity of the first program among the multiple programs; The algorithm involved in the first program among the plurality of programs is optimized.

26. An electronic device, characterized in that, include: One or more processors; One or more memories; the one or more memories store one or more programs, which, when executed by the one or more processors, cause the electronic device to perform the performance analysis method of any one of claims 1 to 14, or the performance analysis result application method of any one of claims 23 to 25.

27. A computer-readable medium, characterized in that, The readable medium stores instructions that, when executed on a computer, cause the computer to perform the performance analysis method of any one of claims 1 to 14, or the performance analysis result application method of any one of claims 23 to 25.

28. A computer program product, characterized in that, It includes a computer program / instruction, which, when executed by a processor, implements the performance analysis method of any one of claims 1 to 14, or implements the performance analysis result application method of any one of claims 23 to 25.

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