Circuit board and display apparatus

Abstract

A circuit board and a display apparatus. The circuit board is provided with a main body area, a bending area and a bonding area, which are connected in sequence. The circuit board comprises a plurality of stacked electrically conductive layers. The circuit board further comprises a first signal line, wherein the first signal line comprises a plurality of first traces and a plurality of second traces; the first traces are arranged in the main body area and extend in a first direction; the second traces are arranged in the bending area, with one end of each second trace extending to the main body area to be connected to one first trace, and the other end of each second trace extending to the bonding area; the first direction points from the main body area to the bending area; the plurality of first traces are arranged on different electrically conductive layers; the orthographic projections of at least two first traces on a reference plane overlap, with two ends of an overlapping part being connected; and the reference plane is parallel to a surface of each electrically conductive layer.

Description

Circuit boards and display devices

[0001] This application claims priority to Chinese patent application No. 202410323723.9, filed on March 20, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of display technology, and more particularly to a circuit board and a display device. Background Technology

[0003] With the development of display technology, display devices (such as mobile phones, laptops, or tablets) are increasingly used in people's lives. Among them, organic light-emitting diode (OLED) display devices have received widespread attention due to their advantages such as active light emission, wide viewing angle, high contrast, fast response speed, low power consumption, and ultra-thin design. Summary of the Invention

[0004] On one hand, a circuit board is provided. The circuit board has a main body region, a bending region, and a bonding region connected in sequence. The circuit board includes multiple conductive layers stacked together. The circuit board also includes a first signal line, which includes multiple first traces and second traces; the first traces are disposed in the main body region and extend along a first direction; the second traces are disposed in the bending region, with one end extending to the main body region and connecting with the first trace, and the other end extending to the bonding region; the first direction points from the main body region to the bending region; the multiple first traces are disposed in different conductive layers, and the orthographic projections of at least two first traces on a reference plane overlap, with the two ends of the overlapping portion connected; the reference plane is parallel to the surface of the conductive layer.

[0005] In some embodiments, the multilayer conductive layer includes a first conductive layer and / or a second conductive layer. The first conductive layer includes a second signal line; the signal transmitted by the second signal line is different from the signal transmitted by the first signal line, and the linewidth of the second signal line is smaller than the sum of the linewidths of the plurality of first traces; the plurality of first traces includes a first sub-line, which is disposed on the first conductive layer. The second conductive layer is disposed on one side of the first conductive layer along a third direction, and the second conductive layer includes a third signal line, the linewidth of which is smaller than the sum of the linewidths of the plurality of first traces; the signal transmitted by the third signal line is different from the signal transmitted by the first signal line; the plurality of first traces further includes a second sub-line, which is disposed on the second conductive layer, and the third direction is perpendicular to the first conductive layer.

[0006] In some embodiments, the orthographic projection of the second sub-line on the reference plane overlaps with the orthographic projection of the first sub-line on the reference plane;

[0007] In some embodiments, the circuit board further includes at least one insulating layer. The at least one insulating layer is disposed between the first conductive layer and the second conductive layer; the at least one insulating layer has a connection hole; the first sub-wire includes a defined segment, the defined segment of the first sub-wire extending into the connection hole and connecting to the second sub-wire.

[0008] In some embodiments, the first sub-line includes a defined segment whose length is equal to the shorter of the first sub-line and the second sub-line.

[0009] In some embodiments, the first sub-line includes a plurality of defined line segments, the length of which is less than the length of the first sub-line and less than the length of the second sub-line, and the plurality of defined line segments are spaced apart along the first direction.

[0010] In some embodiments, the line widths of the plurality of first traces are equal.

[0011] In some embodiments, the second trace is disposed on the same layer as one of the first traces.

[0012] In some embodiments, the resistivity of the plurality of first traces is equal, and the linewidth of the second trace is greater than or equal to the sum of the linewidths of the plurality of first traces.

[0013] In some embodiments, at least two first traces have different resistivities, the second trace is connected to the one with the smaller resistivity among the plurality of first traces, and the linewidth of the second trace is less than the sum of the linewidths of the plurality of first traces.

[0014] In some embodiments, the multilayer conductive layer further includes a third conductive layer. The third conductive layer is a different conductive layer from the conductive layer containing the first trace; the second trace is disposed on the third conductive layer.

[0015] In some embodiments, the outermost conductive layer of the multilayer conductive layers containing the plurality of first traces is the fourth conductive layer and the fifth conductive layer; the third conductive layer is disposed on the side of the fourth conductive layer and the fifth conductive layer that is away from the other.

[0016] In some embodiments, the sum of the line widths of the plurality of first traces is greater than or equal to 0.8 mm.

[0017] In some embodiments, the width of the first trace is less than 0.8 mm.

[0018] In some embodiments, the width of the circuit board located in the main body area along the second direction is 11mm to 13mm; the second direction intersects the first direction.

[0019] On the other hand, a display device is provided. The display device includes a display panel and a circuit board as described in any of the above embodiments. The display panel has a display side and a non-display side disposed opposite to each other. The circuit board is disposed on the non-display side of the display panel and connected to the display panel. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0021] Figure 1 is a structural diagram of a display device according to some embodiments;

[0022] Figure 2 is another structural diagram of a display device according to some embodiments;

[0023] Figure 3 is another structural diagram of a display device according to some embodiments;

[0024] Figure 4 is a structural diagram of a display panel according to some embodiments, including a main body, a bent portion, and a binding portion;

[0025] Figure 5 is a structural diagram of a circuit board in a display device according to some embodiments, without bending.

[0026] Figure 6 shows the structure of a circuit board bent in a display device according to some embodiments;

[0027] Figure 7 is a structural diagram of a circuit board according to some embodiments;

[0028] Figure 8 is a cross-sectional view along section line AA in Figure 7;

[0029] Figure 9 is a structural diagram of a circuit board including a first conductive layer according to some embodiments;

[0030] Figure 10 is a structural diagram of a circuit board including a second conductive layer according to some embodiments;

[0031] Figure 11 is a structural diagram of a second routing line including a defined line segment according to some embodiments;

[0032] Figure 12 is a structural diagram of a second wiring according to some embodiments, which includes multiple defined line segments;

[0033] Figure 13 is a cross-sectional view along section line BB in Figure 7. Detailed Implementation

[0034] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0035] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0036] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0037] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0038] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0039] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0040] As used herein, depending on the context, the term “if” may optionally be interpreted as meaning “when”, “in the event of”, “in response to determination”, or “in response to detection”. Similarly, depending on the context, the phrase “if it is determined that…” or “if [the stated condition or event] is detected” may optionally be interpreted as meaning “in the event of determination that…”, “in response to determination that…”, “when [the stated condition or event] is detected”, or “in response to the detection of [the stated condition or event]”.

[0041] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0042] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0043] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0044] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0045] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0046] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0047] As shown in FIG1, some embodiments of the present disclosure provide a display device 1000, which can be any device that displays text or images, whether moving (e.g., video) or fixed (e.g., still images).

[0048] For example, the display device 1000 can be any product or component with display function, such as a television, laptop computer, tablet computer, mobile phone, personal digital assistant (PDA), navigator, wearable device, augmented reality (AR) device, virtual reality (VR) device, in-vehicle display, or flight display.

[0049] In some examples, as shown in Figure 1, the display device 1000 can be a portable display product. For example, the display device 1000 can be a mobile phone as shown in Figure 1.

[0050] In some other examples, as shown in Figure 2, the display device 1000 can be a wearable device. For example, the display device 1000 can be a watch as shown in Figure 2.

[0051] The following uses a mobile phone as an example to illustrate some embodiments of this disclosure. However, the implementation of this disclosure is not limited to this, and the display device can also be a watch, as long as the same technical concept is applied.

[0052] In some embodiments, as shown in FIG3, the display device 1000 includes a display panel 100, a housing 200, and a cover plate 300.

[0053] The display panel 100 has a display side 100A and a non-display side 100B. The display side 100A refers to the side of the display panel 100 that can emit light (the upper side of the display panel 100 in Figure 3), and the non-display side 100B refers to the other side opposite to the display side 100A (the lower side of the display panel 100 in Figure 3).

[0054] The aforementioned display panel 100 comes in various types, and can be selected and configured according to actual needs.

[0055] For example, the display panel 100 described above may be an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, an active matrix organic light-emitting diode (AMOLED) display panel, a liquid crystal display (LCD) display panel, or a mini / micro light-emitting display (MLED) display panel, etc. The embodiments disclosed herein do not impose specific limitations.

[0056] As shown in Figure 3, the housing 200 can be a box-shaped structure with an opening, the display panel 100 can be disposed inside the housing 200, and the cover plate 300 is disposed on the display side of the display panel 100 and located at the opening of the housing 200.

[0057] As shown in Figure 3, the longitudinal section of the housing 200 can be U-shaped, for example. The display panel 100 is disposed inside the housing 200, and the cover plate 300 is disposed at the opening of the housing 200.

[0058] In some embodiments, as shown in FIG4, the display panel 100 is a flexible display panel. The display panel 100 includes a main body portion 110, a bending portion 120, and a binding portion 130 connected in sequence. Along the second direction Y, the bending portion 120 is located on one side of the main body portion 110, and the binding portion 130 is located on the side of the bending portion 120 away from the main body portion 110, that is, the bending portion 120 is located between the main body portion 110 and the binding portion 130.

[0059] The main body 110 can be the portion of the display panel 100 used to display images. As shown in FIG4, the main body 110 has a display side 100A and a non-display side 100B disposed opposite to each other. It should be noted that the display side 100A refers to the side of the main body 110 where the image is displayed (the upper side of the main body 110 in FIG4), and the non-display side 100B refers to the other side opposite to the display side 100A (the lower side of the main body 110 in FIG4).

[0060] As shown in Figures 5 and 6, through a bending process, the bending portion 120 can be bent along a bending axis extending in the first direction X toward the non-display side 100B of the main body portion 110 of the display panel 100, causing the binding portion 130 to bend to the non-display side 100B of the main body portion 110, thereby reducing the bezel of the display device 1000 (as shown in Figures 1 and 2). Note that the bending axis is not an actual structure present in the display panel 100, but is a concept presented to illustrate the bending process of the display panel 100.

[0061] Based on this, as shown in Figures 4, 5, and 6, the display device 1000 further includes a driver chip 400, which can be disposed on the bonding portion 130. As shown in Figures 5 and 6, when the display panel 100 is bent, the driver chip 400 is disposed on the side of the bonding portion 130 away from the main body. The driver chip 400 is configured to provide data signals required for displaying the image to the main body 110 through the bonding portion 130 and the bent portion 120, so as to control the display panel 100 to display images.

[0062] The driver chip 400 includes at least one of microchips such as a source driver chip, a touch chip, a timing controller, and a gamma circuit. The embodiments disclosed herein are not specifically limited.

[0063] In some embodiments, as shown in Figures 4, 5, and 6, the display device 1000 further includes a circuit board 600. Along the third direction Z, the circuit board 600 is disposed on the side of the driver chip 400 near the bonding portion 130, i.e., the circuit board 600 and the driver chip 400 are disposed on the same side of the bonding portion 130. Along the second direction Y, the circuit board 600 is disposed on the side of the driver chip 400 away from the bending portion 120, and the circuit board 600 is disposed on the bonding portion 130. The circuit board 600 is connected to the driver chip 400 and the bonding portion 130, so that the driver chip 400 can provide the data signals required for displaying the image to the display panel 100 through the circuit board 600.

[0064] In some examples, as shown in Figure 5, the circuit board 600 has a main body area 610, a bending area 620 and a bonding area 630 connected in sequence.

[0065] In the flattened state, the main body area 610, the bending area 620, and the bonding area 630 are arranged along the first direction X. Along the first direction X, the length of the circuit board 600 is greater than the width of the display panel 100. As shown in FIG6, in the bent state, the circuit board 600 located in the bending area 620 bends towards the side of the circuit board 600 located in the main body area 610 near the bonding portion 130, so that the circuit board 600 located in the bonding area 630 bends to the side of the circuit board 600 in the main body area 610 near the bonding portion 130. Thus, along the first direction X, the length of the circuit board 600 is less than the width of the display panel 100, and the circuit board 600 does not affect the installation of the display panel 100 and the housing 200.

[0066] As shown in Figure 6, the circuit board 600 located in the main body area 610 is connected to the driver chip 400, and the circuit board 600 located in the bonding area 630 is connected to the bonding part 130. In this way, the driver chip 400 provides the data signals required for displaying the screen to the main body 110 through the bonding part 130 and the bending part 120, so as to control the display panel 100 to display images.

[0067] In some examples, as shown in Figure 5, the width of the main body region 610 along the second direction Y is greater than the width of the binding region 630, and also greater than the width of the bending region 620 along the second direction Y. The second direction Y intersects the first direction X; for example, the second direction Y is perpendicular to the first direction X.

[0068] In some embodiments, as shown in FIG7, the circuit board 600 includes multiple conductive layers 601 stacked together.

[0069] For example, the circuit board 600 includes two, three, four, five, or eight conductive layers 601 stacked together, and the embodiments disclosed herein do not specifically limit this.

[0070] For example, the material of the conductive layer 601 may include a metal. For instance, the material of the conductive layer 601 may include copper or silver, which would result in better conductivity and lower resistance for the circuit board 600.

[0071] The circuit board 600 also includes multiple signal lines 1, which are disposed on the multilayer conductive layer 601. For example, the multiple signal lines 1 include at least one of the following: a signal line for transmitting a first power signal, a signal line for transmitting a second power signal, a signal line for transmitting a touch signal, a signal line for transmitting a communication protocol, a signal line for transmitting a data signal, a signal line for transmitting a reset signal, and a signal line for transmitting a logic signal.

[0072] As shown in Figure 7, the multiple signal lines 1 include a first type of signal line 11 and a second type of signal line 12. The first type of signal line 11 needs to carry a large current. For example, the first type of signal line 11 includes at least one of a signal line that transmits a first power signal, a signal line that transmits a second power signal, and a signal line that transmits a logic signal.

[0073] The second type of signal line 12 needs to carry a smaller current. For example, the second type of signal line 12 includes at least one of the following: a signal line for transmitting touch signals, a signal line for transmitting communication protocols, a signal line for transmitting data signals, and a signal line for transmitting reset signals.

[0074] In related technologies, a first type of signal line includes a first signal line, which in turn includes a first trace and a second trace. The first trace is disposed in the main body area, and the second trace is disposed in the bending area, with one end extending to the main body area and connecting to the first trace, and the other end extending to the bonding area. The first trace is disposed on a conductive layer and needs to carry a large current; therefore, the first trace has a relatively wide line width (e.g., greater than or equal to 0.8 mm, example 1 mm). The wider first trace results in a wider circuit board along the second direction in the main body area, thus causing the circuit board to occupy a larger space in the display device.

[0075] To address the aforementioned technical problems, some embodiments of this disclosure provide a circuit board 600. As shown in FIG7, the first signal line 61 includes multiple first traces 611 and second traces 612. Exemplarily, the first signal line 61 includes two, three, four, five, or six first traces 611.

[0076] The following uses the example of the first signal line 61 including two first traces 611 to illustrate some embodiments of the present disclosure. However, the implementation of the present disclosure is not limited to this, and it is also possible to consider that the first signal line 61 includes four or six first traces 611, as long as the same technical concept is applied.

[0077] As shown in Figure 7, a first trace 611 is disposed in the main body region 610 and extends along the first direction X. A second trace 612 is disposed in the bending region 620, with one end extending to the main body region 610 and connecting with the first trace 611, and the other end extending to the bonding region 630. As shown in Figure 8, multiple first traces 611 are disposed in different conductive layers 601, and at least two first traces 611 have their orthographic projections overlapping on the reference plane, with the overlapping portions connected at both ends. It can be understood that the ends of the first traces 611 whose orthographic projections do not overlap are connected away from the second trace 612.

[0078] In other words, the first trace in the related technology is split into multiple first traces 611, and the multiple first traces 611 are arranged in parallel. The total current that the multiple first traces 611 arranged in parallel need to carry is equal to the sum of the currents that the first traces in the related technology need to carry. That is, the current that the first traces 611 provided in some embodiments of this disclosure need to carry is less than the current that the related technology needs to carry. Therefore, the line width of the first traces 611 provided in some embodiments of this disclosure is less than the line width of the first traces in the related technology, and the sum of the line widths of the multiple first traces 611 provided in some embodiments of this disclosure is equal to the line width of the first traces in the related technology. Along the second direction Y, the first traces 611 that overlap in orthographic projection share a portion of the space, which can reduce the width of the multiple first traces 611 along the second direction Y, reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y, and thus reduce the space occupied by the circuit board 600, which can increase the space occupied by other components in the display device (e.g., batteries and antennas, which are arranged opposite to the circuit board 600 located in the main body area 610).

[0079] Experiments have shown that, compared to circuit boards in related technologies, in some embodiments of this disclosure, the reduction in width of the circuit board 600 located in the main body region 610 along the second direction Y is greater than or equal to 1.5 mm. For example, 1.5 mm, 1.7 mm, or 2 mm.

[0080] In some examples, the width of the circuit board 600 located in the main body area 610 along the second direction Y is reduced from 14mm to 16mm to 11mm to 13mm.

[0081] For example, the width of circuit board 600 along the second direction Y is 11mm, 12mm or 13mm.

[0082] For example, increasing the space occupied by the battery allows for a larger battery, thereby increasing its capacity and improving the standby time of the display device 1000. Alternatively, increasing the space occupied by the antenna allows for a larger antenna, increasing its effective area and improving its transmit or receive power.

[0083] As shown in Figure 8, the second trace 612 is disposed in a conductive layer 601. In this way, the thickness of the circuit board 600 located in the bending area 620 is thinner, thereby making the circuit board 600 located in the bending area 620 more flexible. When bending the circuit board 600, the better flexibility of the circuit board 600 located in the bending area 620 can reduce the bending stress of the circuit board 600.

[0084] In some embodiments, the orthographic projections of any two first traces 611 on the reference plane overlap, and the two ends of the overlapping portion are connected. In this way, the width of the multiple first traces 611 along the second direction Y can be further reduced, thereby reducing the width of the circuit board 600 located in the main body area 610 along the second direction Y.

[0085] In some embodiments, as shown in Figures 7 and 8, the first signal line 61 includes two first traces 611 and one second trace 612. Along a first direction X, the two ends of the two first traces 611 are flush and connected. The orthographic projections of the two first traces 611 onto the reference plane overlap.

[0086] In some embodiments, as shown in FIG7, the circuit board 600 further includes a plurality of bonding pins 602 disposed in a bonding area 630, and at least one bonding pin 602 is connected to a second trace 612 extending to the bonding area 630.

[0087] In some embodiments, as shown in FIG7 and FIG8, the multilayer conductive layer 601 includes a first conductive layer 6011 and / or a second conductive layer 6012.

[0088] As shown in Figures 7, 8, and 9, when the multilayer conductive layer 601 includes a first conductive layer 6011, the first conductive layer 6011 includes a second signal line 62. The signal transmitted by the second signal line 62 is different from the signal transmitted by the first signal line 61. For example, the second signal line 62 is used to transmit touch signals or communication protocols. The line width of the second signal line 62 is less than the sum of the line widths of the multiple first traces 611, that is, the line width of the second signal line 62 is narrower. The narrower signal line will not cause the width of the circuit board 600 along the second direction Y to be wider. Therefore, it is not necessary to split the second signal line 62. That is, the second signal line 62 is only provided in the first conductive layer 6011. In other words, the first conductive layer 6011 is the conductive layer 601 that was originally provided, and it is not a new conductive layer 601 provided for the purpose of providing the split first traces 611.

[0089] As shown in Figures 7, 8 and 9, the multiple first traces 611 include first sub-traces 6111. The first sub-traces 6111 are disposed on the first conductive layer 6011. That is, the first sub-traces 6111 and the second signal line 62 are made of the same material and disposed on the same layer. In this way, the thickness of the circuit board 600 can be reduced, which is beneficial to reducing the thickness of the display device 1000.

[0090] As shown in Figures 7, 8 and 10, when the multilayer conductive layer 601 further includes a second conductive layer 6012, the second conductive layer 6012 is disposed on one side of the first conductive layer 6011 along the third direction Z, and the third direction Z is perpendicular to the first conductive layer 6011.

[0091] The second conductive layer 6012 includes a third signal line 63. The signal transmitted by the third signal line 63 is different from the signal transmitted by the first signal line 61; for example, the third signal line 63 is used for grounding. The line width of the third signal line 63 is less than the sum of the line widths of the multiple first traces 611, that is, the line width of the third signal line 63 is narrower. The narrower signal line will not cause the circuit board 600 to be wider along the second direction Y. Therefore, it is not necessary to split the third signal line 63; that is, the third signal line 63 is only provided in the second conductive layer 6012. In other words, the second conductive layer 6012 is the original conductive layer 601, not a newly added conductive layer 601 for setting up the split first traces 611.

[0092] As shown in Figures 7, 8 and 10, the multiple first traces 611 include second sub-traces 6112. The second sub-traces 6112 are disposed on the second conductive layer 6012. That is, the second sub-traces 6112 and the third signal line 63 are made of the same material and disposed on the same layer. In this way, the thickness of the circuit board 600 can be further reduced, which is beneficial to reducing the thickness of the display device 1000.

[0093] In some examples, as shown in Figure 8, the multilayer conductive layer 601 includes a first conductive layer 6011 and a second conductive layer 6012. The circuit board 600 includes two first traces 611, meaning that the multiple first traces 611 only include a first sub-trace 6111 and a second sub-trace 6112. The first sub-trace 6111 is disposed on the first conductive layer 6011, and the second sub-trace 6112 is disposed on the second conductive layer 6012. In this way, it is not necessary to add a new conductive layer 601, thus keeping the thickness of the circuit board 600 constant.

[0094] In some embodiments, as shown in Figures 11 and 12, the orthographic projection of the second sub-line 6112 on the reference plane overlaps with the orthographic projection of the first sub-line 6111 on the reference plane. The circuit board 600 also includes at least one insulating layer 603. The at least one insulating layer 603 is disposed between the first conductive layer 6011 and the second conductive layer 6012, and has a connection hole 6021. The second sub-line 6112 includes a defined segment 6101, which extends into the connection hole 6021 and connects to the second sub-line 6112. This, on the one hand, makes the electrical connection between the first sub-line 6111 and the second sub-line 6112 more robust; on the other hand, it reduces the total resistance of the first sub-line 6111 and the second sub-line 6112, thereby reducing the total resistance of the multiple first traces 611.

[0095] For example, the first conductive layer 6011 and the second conductive layer 6012 are adjacent conductive layers 601, and the circuit board 600 includes an insulating layer 603. Alternatively, for example, at least one conductive layer 601 is disposed between the first conductive layer 6011 and the second conductive layer 6012, and the circuit board 600 includes multiple insulating layers 603.

[0096] In some examples, as shown in Figure 11, the first sub-line 6111 includes a defined segment 6101, the length of which is equal to the shorter of the first sub-line 6111 and the second sub-line 6112.

[0097] In other examples, as shown in Figure 12, the first sub-line 6111 includes a plurality of set line segments 6101, the length of which is less than the length of the first sub-line 6111 and less than the length of the second sub-line 6112, and the plurality of set line segments 6101 are spaced apart along the first direction X.

[0098] In some embodiments, the line widths of the multiple first traces 611 are equal, which can reduce the difference in resistance between the multiple first traces 611, thereby reducing the difference in signal timing between the multiple first traces 611.

[0099] Based on this, along the second direction Y, the boundaries of the orthographic projections of at least two first traces 611 on the reference plane coincide. In this way, the shared space of the first traces 611 with overlapping orthographic projections increases, which can further reduce the width of multiple first traces 611 along the second direction Y and reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y.

[0100] In other embodiments, at least two first traces 611 have unequal linewidths. Exemplarily, any two first traces 611 may have unequal linewidths. The width of the first traces 611 included in each conductive layer 601 can be set according to actual conditions.

[0101] In some embodiments, as shown in FIG13, the second trace 612 is disposed on the same layer as a first trace 611, that is, the second trace 612 and the first trace 611 are made of the same material and disposed on the same layer. In this way, the thickness of the circuit board 600 can be reduced, which is beneficial to reducing the thickness of the display device 1000.

[0102] It is understandable that the current carried by the second trace 612 is equal to the sum of the circuits carried by the multiple first traces 611. Therefore, the line width of the second trace 612 is greater than the line width of the first trace 611 that is set on the same layer.

[0103] In some examples, the resistivity of multiple first traces 611 is equal, that is, the material of multiple first traces 611 is the same, and the line width of the second trace 612 is greater than or equal to the sum of the line widths of multiple first traces 611. In this way, the uniformity of materials in the circuit board 600 can be improved and the manufacturing cost of the circuit board 600 can be reduced.

[0104] In other examples, at least two first traces 611 have different resistivities, that is, at least two first traces 611 are made of different materials. The second trace 612 is connected to the one with the lower resistivity among the multiple first traces 611. The line width of the second trace 612 is less than the sum of the line widths of the multiple first traces 611. In this way, the line width of the second trace 612 can be reduced, the width of the circuit board 600 located in the bending area 620 and the bonding area 630 along the second direction Y can be reduced, thereby reducing the space occupied by the circuit board 600.

[0105] In some other embodiments, as shown in Figures 11 and 12, the multilayer conductive layer 601 further includes a third conductive layer 6013, which is a different conductive layer 601 from the conductive layer 601 where the first trace 611 is located, and the second trace 612 is disposed on the third conductive layer 6013.

[0106] The third conductive layer 6013 can be disposed between two adjacent conductive layers 601 in the multilayer conductive layer 601 where the first trace 611 is located, or it can be disposed on one side of the multilayer conductive layer 601 where the first trace 611 is located along the third direction Z. The third direction Z is perpendicular to the conductive layer 601.

[0107] In some examples, as shown in Figure 8, the outermost conductive layer 601 of the multilayer conductive layer 601 containing the multiple first traces 611 is the fourth conductive layer 6014 and the fifth conductive layer 6015. The third conductive layer 6013 is disposed on the side of the fourth conductive layer 6014 and the fifth conductive layer 6015 that is away from the other.

[0108] For example, the third conductive layer 6013 is disposed on the side of the fourth conductive layer 6014 away from the fifth conductive layer 6015. Alternatively, for example, the third conductive layer 6013 is disposed on the side of the fifth conductive layer 6015 away from the fourth conductive layer 6014.

[0109] Based on this, the third conductive layer 6013 is disposed on the side of the fourth conductive layer 6014 and the fifth conductive layer 6015 near the bonding part 130. In this way, the bending radius of the circuit board 600 can be reduced, which is beneficial to increasing the distance between the housing 200 and the circuit board 600 located in the bending area 620, and reducing the impact of the circuit board 600 on the housing 200.

[0110] As shown in Figure 8, when the circuit board 600 includes two first traces 611, the fourth conductive layer 6014 can be one of the first conductive layer 6011 and the second conductive layer 6012, and the fifth conductive layer 6015 can be the other of the first conductive layer 6011 and the second conductive layer 6012.

[0111] In some embodiments, the sum of the line widths of the plurality of first traces 611 is greater than or equal to 0.8 mm. For example, the sum of the line widths of the plurality of first traces 611 is 0.8 mm, 1 mm, or 1.5 mm. That is, when the line width of the signal line is greater than or equal to 0.8 mm, the signal line results in a wider width of the circuit board 600 located in the main body area 610 along the second direction Y, thus causing the circuit board to occupy a larger space in the display device. Therefore, it is necessary to configure the signal line as described above, that is, to split the signal line into multiple first traces 611 to reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y.

[0112] In some embodiments, the line width of the first trace 611 is less than 0.8 mm. For example, the line width of the first trace 611 is 0.05 mm, 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, or 0.75 mm.

[0113] In other words, splitting a wider signal line into signal lines with a width of less than 0.8 mm can reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y.

[0114] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0115] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A circuit board having a main body area, a bending area, and a bonding area connected in sequence; the circuit board comprising multiple conductive layers stacked together; The circuit board further includes a first signal line, which includes multiple first traces and second traces; the first traces are disposed in the main body area and extend along a first direction; the second traces are disposed in the bending area, with one end extending to the main body area and connecting with the first trace, and the other end extending to the bonding area; the first direction points from the main body area to the bending area; The plurality of first traces are disposed on different conductive layers, and at least two first traces have overlapping orthographic projections on a reference plane, with the two ends of the overlapping portion connected; the reference plane is parallel to the surface of the conductive layer.

2. The circuit board of claim 1, wherein, The multilayer conductive layer includes: A first conductive layer includes a second signal line; the signal transmitted by the second signal line is different from the signal transmitted by the first signal line, and the line width of the second signal line is smaller than the sum of the line widths of the plurality of first traces; the plurality of first traces include a first sub-line, and the first sub-line is disposed on the first conductive layer; and / or, A second conductive layer is disposed on one side of the first conductive layer along a third direction. The second conductive layer includes a third signal line, the line width of which is smaller than the sum of the line widths of the plurality of first traces. The signal transmitted by the third signal line is different from the signal transmitted by the first signal line. The plurality of first traces also include a second sub-line, which is disposed on the second conductive layer. The third direction is perpendicular to the first conductive layer.

3. The circuit board of claim 2, wherein, The orthographic projection of the second sub-line on the reference plane overlaps with the orthographic projection of the first sub-line on the reference plane; The circuit board also includes: At least one insulating layer is disposed between the first conductive layer and the second conductive layer; the at least one insulating layer has a connection hole; the first sub-wire includes a predetermined segment, the predetermined segment of the first sub-wire extending into the connection hole and connecting to the second sub-wire.

4. The circuit board of claim 3, wherein, The first sub-line includes a defined segment whose length is equal to the shorter of the first sub-line and the second sub-line.

5. The circuit board of claim 3, wherein, The first sub-line includes multiple defined line segments, the length of which is less than the length of the first sub-line and less than the length of the second sub-line, and the multiple defined line segments are spaced apart along the first direction.

6. The circuit board according to any one of claims 1 to 5, wherein The widths of the multiple first traces are equal.

7. The circuit board according to any one of claims 1 to 5, wherein The second trace is installed on the same layer as one of the first traces.

8. The circuit board of claim 7, wherein, The resistivity of the plurality of first traces is equal, and the linewidth of the second trace is greater than or equal to the sum of the linewidths of the plurality of first traces.

9. The circuit board of claim 7, wherein, At least two first traces have different resistivities, the second trace is connected to the one with the smaller resistivity among the plurality of first traces, and the line width of the second trace is less than the sum of the line widths of the plurality of first traces.

10. The circuit board according to any one of claims 1 to 5, wherein, The multilayer conductive layer further includes: The third conductive layer is a different conductive layer from the conductive layer where the first trace is located; the second trace is disposed on the third conductive layer.

11. The circuit board of claim 10, wherein, The outermost conductive layers of the multilayer conductive layers containing the multiple first traces are the fourth and fifth conductive layers; the third conductive layer is disposed on the side of the fourth and fifth conductive layers that is away from the other.

12. The circuit board according to any one of claims 1 to 5, wherein, The sum of the line widths of the multiple first traces is greater than or equal to 0.8 mm.

13. The circuit board according to any one of claims 1 to 5, wherein The width of the first trace is less than 0.8mm.

14. The circuit board according to any one of claims 1 to 5, wherein, The width of the circuit board located in the main body area along the second direction is 11mm to 13mm; the second direction intersects the first direction.

15. A display device, comprising: Display panel; It has a display side and a non-display side that are set relative to each other; The circuit board as described in any one of claims 1 to 14 is disposed on the non-display side of the display panel and connected to the display panel.

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