Selective data corruption before actual erase operation for data security
WO2025245163A1PCT designated stage Publication Date: 2025-11-27MICROCHIP TECHNOLOGY INC
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Patent Information
- Application Number
- PCT/US2025/030270
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-01-18
- Filing Date
- 2025-05-20
- Publication Date
- 2025-11-27
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Figure US2025030270_27112025_PF_FP_ABST
Abstract
In some implementations, a controller may receive a command to perform an erase operation to erase data stored in a block of a non-volatile memory device. The controller may determine a size of the data identified by the command. The controller may provide, based on the size of the data, a programming pulse to a location, of the block, that stores the data, wherein the programming pulse is provided to write predetermined data at the location. The controller may perform an erase operation on the block after writing the predetermined data.
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