Display substrate and display device

Abstract

A display substrate and a display device. The display substrate comprises a display area (100), a hole area (300) located in the display area (100), and an encapsulation area (200) located between the display area (100) and the hole area (300). The encapsulation area (200) comprises at least one isolation structure provided on a base (101), and conductive material layers (52). The conductive material layers (52) are arranged on the side of the at least one isolation structure distant from the base (101). The at least one isolation structure comprises a conductive structure and an insulating dielectric layer (60); the conductive structure at least comprises a top surface on the side distant from the base (101); and at least part of the insulating dielectric layer (60) is arranged between the corresponding conductive material layer (52) and the top surface.

Description

Display substrate, display device Technical Field

[0001] This article relates to, but is not limited to, the field of display technology, specifically to a display substrate and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and quantum dot light-emitting diodes (QLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, flexibility, and low cost. With the continuous development of display technology, flexible displays using OLEDs or QLEDs as light-emitting devices and controlled by thin-film transistors (TFTs) have become the mainstream products in the display field.

[0003] Summary of the Invention

[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0005] On one hand, this disclosure provides a display substrate, including a display area, an aperture area located in the display area, and an encapsulation area located between the display area and the aperture area. The encapsulation area includes at least one isolation structure disposed on a substrate and a conductive material layer. The conductive material layer is disposed on the side of the at least one isolation structure away from the substrate. The at least one isolation structure includes a conductive structure and an insulating dielectric layer. The conductive structure includes at least a top surface on the side away from the substrate. At least a portion of the insulating dielectric layer is disposed between the conductive material layer and the top surface.

[0006] In an exemplary embodiment, the top surface of the conductive structure includes a groove and a first flat region and a second flat region located on opposite sides of the groove. The first flat region and the second flat region are both parallel to the substrate. The groove is recessed toward the substrate. At least a portion of the insulating dielectric layer covers the first flat region and the second flat region. The insulating dielectric layer is disposed between the first flat region and the second flat region and the conductive material layer.

[0007] In an exemplary embodiment, the groove includes inner sidewalls located on opposite sides, at least one of the inner sidewalls on opposite sides includes a third flat surface, the insulating dielectric layer covers the third flat surface, and the insulating dielectric layer is disposed between the conductive material layer and the third flat surface.

[0008] In an example embodiment, the conductive structure comprises a first conductive structure layer and a second conductive structure layer stacked in sequence along the direction away from the substrate, the inner sidewalls of the opposite sides of the first conductive structure layer and the second conductive structure layer are respectively the inner sidewalls of the opposite sides of the groove; or, the conductive structure comprises a first conductive structure layer and a second conductive structure layer stacked in sequence along the direction away from the substrate, the inner sidewalls of the opposite sides of the second conductive structure layer cover respectively the inner sidewalls of the opposite sides of the first conductive structure layer, the inner sidewalls of the opposite sides of the second conductive structure layer are respectively the inner sidewalls of the opposite sides of the groove; or, the conductive structure comprises a conductive structure layer, the inner sidewalls of the opposite sides of the conductive structure layer are respectively the inner sidewalls of the opposite sides of the groove, the conductive structure layer comprises a first conductive layer and a second conductive layer stacked in sequence along the direction away from the substrate.

[0009] In an example embodiment, the groove comprises inner sidewalls of opposite sides, at least one of the inner sidewalls of the opposite sides of the groove comprises a second undercut structure and a third flat surface, the third flat surface is connected to the side of the second undercut structure away from the substrate, the insulating medium layer covers the third flat surface, the insulating medium layer exposes the second undercut structure, the conductive material layer on the insulating medium layer is disconnected from the conductive material layer at the bottom of the groove at the second undercut structure.

[0010] In an example embodiment, the conductive structure comprises a first conductive structure layer and a second conductive structure layer stacked in sequence along the direction away from the substrate, the inner sidewalls of the opposite sides of the first conductive structure layer and the second conductive structure layer are respectively the inner sidewalls of the opposite sides of the groove, at least one of the inner sidewalls of the opposite sides of the first conductive structure layer comprises the second undercut structure, at least one of the inner sidewalls of the opposite sides of the second conductive structure layer comprises the third flat surface.

[0011] In an example embodiment, the groove comprises inner sidewalls of opposite sides, at least one of the inner sidewalls of the opposite sides of the groove comprises a second undercut structure, the insulating medium layer exposes the second undercut structure, the conductive material layer on the insulating medium layer is disconnected from the conductive material layer at the bottom of the groove at the second undercut structure.

[0012] In an exemplary embodiment, the conductive structure includes a conductive structure layer, wherein the inner sidewalls of the conductive structure layer on opposite sides are the inner sidewalls of the groove on opposite sides, and the conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along a direction away from the substrate, wherein at least one of the inner sidewalls of the second conductive layer on opposite sides includes the second undercut structure.

[0013] In an exemplary embodiment, the conductive structure includes outer sidewalls on opposite sides, the top surface is connected to the side of the outer sidewalls on opposite sides of the conductive structure away from the substrate, at least one of the outer sidewalls on opposite sides of the conductive structure includes a fourth flat surface, the insulating dielectric layer covers the fourth flat surface, and the insulating dielectric layer is disposed between the conductive material layer and the fourth flat surface.

[0014] In an exemplary embodiment, the conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein the outer side walls of the first conductive structure layer and the second conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides; or, the conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein at least one outer side wall of the second conductive structure layer covers the outer side wall of the first conductive structure layer, and the outer side wall of at least one side of the second conductive structure layer includes a fourth flat surface; or, the conductive structure includes a conductive structure layer, wherein the outer side walls of the conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides, and the conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along a direction away from the substrate.

[0015] In an exemplary embodiment, the conductive structure includes outer sidewalls on opposite sides, and the top surface is connected to the side of the outer sidewalls on opposite sides of the conductive structure away from the substrate. At least one of the outer sidewalls on opposite sides of the conductive structure includes a first undercut structure and a fourth flat surface. The fourth flat surface is connected to the side of the first undercut structure away from the substrate. The insulating dielectric layer covers the fourth flat surface and exposes the first undercut structure. The insulating dielectric layer is disposed between the conductive material layer and the fourth flat surface. The conductive material layer is disconnected at the first undercut structure.

[0016] In an exemplary embodiment, the conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate. The outer side walls of the first conductive structure layer and the second conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides. At least one of the outer side walls of the first conductive structure layer on opposite sides includes the first undercut structure, and at least one of the outer side walls of the second conductive structure layer on opposite sides includes the fourth flat surface.

[0017] In an exemplary embodiment, the conductive structure includes outer sidewalls on opposite sides, the top surface is connected to the side of the outer sidewalls on opposite sides of the conductive structure away from the substrate, at least one of the outer sidewalls on opposite sides of the conductive structure includes a first undercut structure, the insulating dielectric layer exposes the first undercut structure, and the conductive material layer is disconnected at the first undercut structure.

[0018] In an exemplary embodiment, the conductive structure includes a conductive structure layer, wherein the outer side walls of the conductive structure layer on opposite sides are respectively the outer side walls of the conductive structure on opposite sides. The conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along a direction away from the substrate, and at least one of the outer side walls of the second conductive layer on opposite sides includes the first undercut structure.

[0019] On the other hand, this disclosure also provides a display device including any of the display substrates described above.

[0020] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description

[0021] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0022] Figure 1 is a cross-sectional view of a display substrate;

[0023] Figure 2 is a cross-sectional view of a first partition structure and a second electrode material of a display substrate;

[0024] Figure 3 is a schematic diagram of the planar structure of a display substrate according to an embodiment of the present disclosure;

[0025] Figure 4 is a schematic diagram of the planar structure of the display area of ​​the display substrate of this disclosure;

[0026] Figure 5 is a cross-sectional structural diagram of a display substrate according to an embodiment of the present disclosure;

[0027] Figure 6 is a cross-sectional schematic diagram of an isolation structure of a display substrate according to an embodiment of the present disclosure;

[0028] Figure 7 is a schematic diagram showing the formation of the first conductive layer, the second conductive layer and the third conductive layer during the fabrication process of the display substrate according to an embodiment of the present disclosure;

[0029] Figure 8 is a schematic diagram showing the formation of the fourth conductive layer, the fifth conductive layer and the sixth conductive layer during the fabrication process of the display substrate according to an embodiment of the present disclosure;

[0030] Figure 9 is a schematic diagram showing the process of etching away the third conductive layer, the fourth conductive layer, the fifth conductive layer and the sixth conductive layer during the fabrication of the display substrate according to an embodiment of the present disclosure.

[0031] Figure 10 is a schematic diagram showing the formation of an insulating dielectric layer during the fabrication process of the display substrate according to an embodiment of this disclosure;

[0032] Figure 11 is a schematic diagram showing the first undercut structure formed during the fabrication process of the display substrate according to an embodiment of the present disclosure;

[0033] Figure 12 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0034] Figure 13 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0035] Figure 14 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0036] Figure 15 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0037] Figure 16 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0038] Figure 17 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0039] Figure 18 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure;

[0040] Figure 19 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this disclosure clearer, embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation methods can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be varied in various forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0042] The scale of the figures in this disclosure can be used as a reference in actual manufacturing processes, but is not limited thereto. For example, the aspect ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the quantities shown in the figures. The figures described in this disclosure are only schematic diagrams of the structure, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0043] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0044] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0045] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0046] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0047] In this specification, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" may sometimes be interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged, and the "source terminal" and "drain terminal" can be interchanged.

[0048] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0049] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0050] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0051] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0052] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0053] Figure 1 is a cross-sectional view of a display substrate. As shown in Figure 1, the display substrate includes a display area 100', an encapsulation area 200', and an aperture area 300'. The aperture area 300' is located within the display area 100', and the encapsulation area 200' is located between the display area 100' and the aperture area 300', forming an annular region surrounding the aperture area 300'. The display area 100' includes a driving circuit layer, a light-emitting structure layer, and an encapsulation structure layer sequentially disposed along a direction away from the substrate 101'. The light-emitting structure layer includes at least one light-emitting device, which includes a first electrode, a light-emitting functional layer, and a second electrode 32' stacked sequentially along a direction away from the substrate 101'. An encapsulation structure layer is disposed on the side of the second electrode 32' away from the substrate, and includes a first inorganic encapsulation layer 41', an organic encapsulation layer 43', and a second inorganic encapsulation layer 42' stacked sequentially along a direction away from the substrate 101'. The encapsulation region 200' may include at least one first partition structure 21', at least one barrier 23', and at least one second partition structure 22' arranged sequentially along a direction away from the display region 100'. The second electrode material 32-1' covers the encapsulation region 200' and is disposed on the side of the second electrode 32'. The structure is broken at the junction of the first inorganic encapsulation layer 21' and at least one second partition structure 22', forming two mutually isolated parts; the first inorganic encapsulation layer 41', the organic encapsulation layer 43', and the second inorganic encapsulation layer 42' in the encapsulation structure layer all cover at least one first partition structure 21' and are not separated by at least one first partition structure 21'; the organic encapsulation layer 43' in the encapsulation structure layer extends to the barrier wall 23' and is blocked by the barrier wall 23', which prevents the organic encapsulation layer 43 from overflowing to the second partition structure 22'; the first inorganic encapsulation layer 41' and the second inorganic encapsulation layer 42' in the encapsulation structure layer extend to the second partition structure 22', cover the second partition structure 22', and are not separated by the second partition structure 22'.

[0054] The inventors of this application have discovered that positive ions (such as potassium ions) and water vapor in the environment can enter the encapsulation region 200' from the edge of the aperture region 300' along the light-emitting functional layer material. Due to incomplete isolation, the second electrode material 32-1' on the encapsulation region 200' will carry a negative charge. The negative charge of the second electrode material 32-1' reacts with the water vapor in an electrolytic reaction, and the water vapor electrolysis produces hydroxide ions (OH-). The hydroxide ions (OH-) and positive ions form a strongly alkaline environment, which reacts with the silicon oxide compound in the first inorganic encapsulation layer 41' in the encapsulation structure layer, causing the first inorganic encapsulation layer 41' to form holes or expand, reducing the encapsulation effect, accelerating water vapor infiltration, and causing GDSH (black spots at the edge of the aperture).

[0055] Figure 2 is a cross-sectional view of a first partition structure and a second electrode material of a display substrate. Figure 2 can be considered an enlarged view of section a' in Figure 1. According to the inventors' research, as shown in Figure 2, the first isolation structure in the relevant display substrate includes a first conductive layer 21-1', a second conductive layer 21-2', and a third conductive layer 21-3' stacked sequentially along the direction away from the substrate. The first conductive layer 21-1' and the third conductive layer 21-3' can be titanium, and the second conductive layer 21-2' can be aluminum. The second electrode material 32-1' is broken at the undercut structure of the first isolation structure 21', forming two mutually isolated parts. The first part of the first isolation structure 21' is in contact with the sidewall of the second conductive layer 21-2', and the second part of the first isolation structure 21' is located on the surface of the third conductive layer 21-3' away from the substrate and is in contact with the third conductive layer 21-3'. This results in the first part and the second part of the first isolation structure 21' being electrically connected through the first isolation structure, and the first parts of adjacent first isolation structures 21' being electrically connected through the first isolation structure, thereby preventing the second electrode material 32-1' from being completely de-energized.

[0056] This disclosure provides a display substrate, including a display area, an aperture area located in the display area, and an encapsulation area located between the display area and the aperture area. The encapsulation area includes at least one isolation structure disposed on a substrate and a conductive material layer. The conductive material layer is disposed on the side of the at least one isolation structure away from the substrate. The at least one isolation structure includes a conductive structure and an insulating dielectric layer. The conductive structure includes at least a top surface on the side away from the substrate. At least a portion of the insulating dielectric layer is disposed between the conductive material layer and the top surface.

[0057] The display substrate of this disclosure will be illustrated by some exemplary embodiments below.

[0058] Figure 3 is a schematic diagram of the planar structure of a display substrate according to an embodiment of the present disclosure. As shown in Figure 3, on a plane parallel to the display substrate, the display substrate includes a display area 100, an encapsulation area 200, and an aperture area 300. The aperture area 300 is located within the display area 100, and the encapsulation area 200 is located between the display area 100 and the aperture area 300, forming an annular region surrounding the aperture area 300. The position of the aperture area 300 within the display area 100 is not limited, and its shape is also not limited. It can be an ellipse as shown in Figure 3, or it can be a circle, square, rhombus, or other polygons.

[0059] In an exemplary embodiment, the display area 100 may include a driving circuit layer disposed on a substrate and a light-emitting structure layer disposed on the side of the driving circuit layer away from the substrate. The driving circuit layer may include a pixel driving circuit, which may include multiple transistors and a storage capacitor. The light-emitting structure layer may include multiple light-emitting units, each of which may include at least a light-emitting device. The light-emitting device may include a first electrode, a light-emitting functional layer, and a second electrode. The first electrode is connected to the pixel driving circuit, the light-emitting functional layer is connected to the first electrode, and the second electrode is connected to the light-emitting functional layer. The light-emitting functional layer emits light under the drive of the first and second electrodes. The encapsulation area 200 includes at least one isolation structure for isolating the light-emitting functional layer and the second electrode. The structural film layer in the aperture area 300 is removed to allow for the mounting of various devices, such as cameras and sensors.

[0060] In an exemplary embodiment, the light-emitting functional layer may include a light-emitting layer (EML) and any one or more of the following: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0061] Figure 4 is a schematic diagram of the planar structure of the display area of ​​the display substrate of this disclosure. As shown in Figure 4, the display area of ​​the display substrate may include multiple pixel units P arranged in a matrix. At least one of the multiple pixel units P includes a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. The first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each include a pixel driving circuit and a light-emitting device. The pixel driving circuit in the sub-pixel is configured to output a corresponding current to the light-emitting device. The light-emitting device in the sub-pixel is connected to the pixel driving circuit of its respective sub-pixel, and the light-emitting device is configured to emit light of a corresponding brightness in response to the current output by the pixel driving circuit of its respective sub-pixel.

[0062] In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel that emits red (R) light, the second sub-pixel P2 may be a blue sub-pixel that emits blue (B) light, and the third sub-pixel P3 may be a green sub-pixel that emits green (G) light.

[0063] In an exemplary embodiment, the shape of the sub-pixels can be any one or more of triangles, squares, rectangles, rhombuses, trapezoids, parallelograms, pentagons, hexagons, and other polygons, and can be arranged in a horizontal parallel, vertical parallel, X-shaped, cross-shaped, triangular, square, diamond-shaped, or delta-shaped manner, etc., which are not limited herein.

[0064] Figure 5 is a cross-sectional view of a display substrate according to an embodiment of the present disclosure, wherein Figure 5 can be a cross-sectional view along the A-A' direction in Figure 3. As shown in Figure 5, the display substrate may include a display area 100, an encapsulation area 200, and an aperture area 300. The aperture area 300 is located in the display area 100, and the encapsulation area 200 is disposed between the display area 100 and the aperture area 300. The encapsulation area 200 is an annular region surrounding the aperture area 300'. The encapsulation area 200 may include a first partition area 210, a barrier area 230, and a second partition area 220, which are arranged sequentially along a direction away from the display area 100.

[0065] In an exemplary embodiment, in a direction perpendicular to the display substrate, the display area 100 of the display substrate may include a first inorganic dielectric layer 102 disposed on a substrate 101, a first gate disposed on the side of the first inorganic dielectric layer 102 away from the substrate, a first gate insulating layer 103 disposed on the side of the first gate remote from the substrate, a second gate disposed on the side of the first gate insulating layer 103 away from the substrate, a second gate insulating layer 104 disposed on the side of the second gate remote from the substrate, a second inorganic dielectric layer 105 disposed on the side of the second gate insulating layer 104 away from the substrate, a first source / drain electrode layer disposed on the side of the second inorganic dielectric layer 105 away from the substrate, a first organic dielectric layer 106 disposed on the side of the first source / drain electrode layer away from the substrate, a second source / drain electrode layer disposed on the side of the first organic dielectric layer 106 away from the substrate, and a second electrode 51 disposed on the side of the second source / drain electrode layer away from the substrate. The first source / drain electrode layer includes at least one first source / drain electrode 21, and the second source / drain electrode layer includes at least one second source / drain electrode 22. Both the first source / drain electrode 21 and the second source / drain electrode 22 may include a first metal layer, a second metal layer, and a third metal layer stacked sequentially along a direction away from the substrate. For example, the first and third metal layers can be titanium, and the second metal layer can be aluminum.

[0066] In an exemplary embodiment, the display area 100 of the display substrate further includes an encapsulation structure layer disposed on the side of the second electrode 31 away from the substrate. The encapsulation structure layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked sequentially along the direction away from the substrate 101. The first inorganic encapsulation layer, the organic encapsulation layer, and the second inorganic encapsulation layer in the encapsulation structure layer all extend to the first partition region 210. The organic encapsulation layer in the encapsulation structure layer extends to the barrier region 230 and is blocked by the barrier region 230, preventing the organic encapsulation layer from overflowing to the second partition region 220. The first inorganic encapsulation layer and the second inorganic encapsulation layer in the encapsulation structure layer cover the barrier region 230 and extend to the second partition region 220.

[0067] In an exemplary embodiment, in a direction perpendicular to the display substrate, the first isolation region 210 of the display substrate may include a first inorganic dielectric layer 102 disposed on a substrate 101, a plurality of first pad layers 31 disposed on the side of the first inorganic dielectric layer 102 away from the substrate, a first gate insulating layer 103 disposed on the side of the plurality of first pad layers 31 away from the substrate, a plurality of second pad layers 32 disposed on the side of the first gate insulating layer 103 away from the substrate, a second gate insulating layer 104 disposed on the side of the second pad layers 32 away from the substrate, a second inorganic dielectric layer 105 disposed on the side of the second gate insulating layer 104 away from the substrate, a first isolation structure 41 and a second isolation structure 42 disposed on the side of the second inorganic dielectric layer 105 away from the substrate, and a conductive material layer 52 disposed on the side of the first isolation structure 41 and the second isolation structure 42 away from the substrate.

[0068] In an exemplary embodiment, the conductive material layer 52 may be located on the same film layer as the second electrode of the display area, and may use the same material. The conductive material layer 52 is the portion of the second electrode that extends into the encapsulation area 200.

[0069] In an exemplary embodiment, a plurality of first pad layers 31 are spaced apart along a direction parallel to the substrate. The plurality of first pad layers 31 are correspondingly disposed with the first isolation structure 41 and the second isolation structure 42. The orthographic projection of each first pad layer 31 on the substrate 101 overlaps with the orthographic projection of the corresponding first isolation structure 41 or second isolation structure 42 on the substrate 101. Each first pad layer 31 can raise the height of the corresponding first isolation structure 41 or second isolation structure 42, increasing the distance between the surface of the corresponding first isolation structure 41 or second isolation structure 42 away from the substrate and the substrate surface. The plurality of first pad layers 31 can be located in the same film layer as the first gate in the display area 100, and are fabricated using the same material and the same process, thereby simplifying the manufacturing process.

[0070] In an exemplary embodiment, a plurality of second pad layers 32 are spaced apart along a direction parallel to the substrate. The plurality of second pad layers 32 are correspondingly disposed with the first isolation structure 41 and the second isolation structure 42. The orthographic projection of each second pad layer 32 on the substrate 101 overlaps with the orthographic projection of the corresponding first isolation structure 41 or second isolation structure 42 on the substrate 101. Each second pad layer 32 can raise the height of the corresponding first isolation structure 41 or second isolation structure 42, increasing the distance between the surface of the corresponding first isolation structure 41 or second isolation structure 42 away from the substrate and the substrate surface. The plurality of second pad layers 32 can be located in the same film layer as the second gate in the display area 100, and are fabricated using the same material and the same preparation process, thereby simplifying the manufacturing process.

[0071] In an exemplary embodiment, both the first isolation structure 41 and the second isolation structure 42 are provided with an undercut structure. The conductive material layer 52 covers the first isolation structure 41 and the second isolation structure 42 and is disconnected at the undercut structure of the first isolation structure 41 and the second isolation structure 42 to form two mutually disconnected parts.

[0072] In an exemplary embodiment, the first isolation structure 41 may include a conductive structure and an insulating dielectric layer 60 stacked sequentially along a direction away from the substrate 101. At least a portion of the insulating dielectric layer 60 is disposed on the surface of the conductive structure away from the substrate and is in contact with the conductive structure. At least a portion of the conductive structure has an undercut structure on its side, and the conductive material layer 52 is broken at the undercut structure to form two mutually disconnected material portions. At least a portion of the conductive material layer 52 is located on the surface of the insulating dielectric layer 60 away from the substrate, and the insulating dielectric layer 60 isolates the conductive material layer 52 from the conductive structure.

[0073] In an exemplary embodiment, the second isolation structure 42 may be located in the same film layer as the first source / drain electrode 21 or the second source / drain electrode 22, and may be fabricated using the same material and the same fabrication process, thereby simplifying the process. For example, the second isolation structure 42 includes a first dielectric layer, a second dielectric layer, and a third dielectric layer sequentially disposed along a direction away from the substrate. The side surface of the second dielectric layer is recessed relative to the side surfaces of the first and third dielectric layers, forming an undercut structure.

[0074] In an exemplary embodiment, a plurality of second isolation structures 42 are spaced apart along the direction parallel to the base, and at least one first isolation structure 41 is located on the side of the plurality of second isolation structures 42 near the retaining wall area 230. At least one first isolation structure 41 may be located on the edge region of the first partition area 210 near the retaining wall area 230.

[0075] The present disclosure embodiment shows that the substrate simplifies the process by setting the first isolation structure 41 in the edge region of the first partition region 210 near the barrier region 230.

[0076] In some embodiments, the first isolation structure may be located between adjacent second isolation structures; or, the first isolation structure may be located on the side of multiple second isolation structures closer to the display area.

[0077] In an exemplary embodiment, the barrier region 230 of the display substrate may include a first inorganic dielectric layer 102 disposed on the substrate 101, a first gate insulating layer 103 disposed on the side of the first inorganic dielectric layer 102 away from the substrate, a second gate insulating layer 104 disposed on the side of the first gate insulating layer 103 away from the substrate, a second inorganic dielectric layer 105 disposed on the side of the second gate insulating layer 104 away from the substrate, and a barrier 43 disposed on the side of the second inorganic dielectric layer 105 away from the substrate. The barrier 43 is configured to block the overflow of the organic encapsulation layer in the encapsulation structure layer and prevent the organic encapsulation layer in the encapsulation structure layer from extending to the second isolation region 220.

[0078] In an exemplary embodiment, the second isolation region 220 of the display substrate may include a first inorganic dielectric layer 102 disposed on the substrate 101, a plurality of third pad layers 33 disposed on the side of the first inorganic dielectric layer 102 away from the substrate, a first gate insulating layer 103 disposed on the side of the plurality of third pad layers 33 away from the substrate, a plurality of fourth pad layers 34 disposed on the side of the first gate insulating layer 103 away from the substrate, a second gate insulating layer 104 disposed on the side of the fourth pad layers 34 away from the substrate, a second inorganic dielectric layer 105 disposed on the side of the second gate insulating layer 104 away from the substrate, a plurality of third isolation structures 43 disposed on the side of the second inorganic dielectric layer 105 away from the substrate, and a conductive material layer 52 disposed on the side of the plurality of third isolation structures 43 away from the substrate.

[0079] In an exemplary embodiment, a plurality of third pad layers 33 are spaced apart along a direction parallel to the substrate. Each of the third pad layers 33 corresponds to a plurality of second isolation structures 42. The orthographic projection of each third pad layer 33 onto the substrate 101 overlaps with the orthographic projection of the corresponding second isolation structure 42 onto the substrate 101. Each third pad layer 33 can raise the height of the second isolation structure 42, increasing the distance between the surface of the second isolation structure 42 away from the substrate and the substrate surface. The plurality of third pad layers 33 can be located in the same film layer as the first gate in the display area 100, and are fabricated using the same material and the same process, thereby simplifying the manufacturing process.

[0080] In an exemplary embodiment, a plurality of fourth pad layers 34 are spaced apart along the direction parallel to the substrate. Each of the fourth pad layers 34 corresponds to a plurality of second isolation structures 42. The orthographic projection of each fourth pad layer 34 onto the substrate 101 overlaps with the orthographic projection of the corresponding second isolation structure 42 onto the substrate 101. Each fourth pad layer 34 can raise the height of the second isolation structure 42, increasing the distance between the surface of the second isolation structure 42 away from the substrate and the substrate surface. The plurality of fourth pad layers 34 can be located in the same film layer as the second gate in the display area 100, and are fabricated using the same material and the same process, thereby simplifying the manufacturing process.

[0081] In an exemplary embodiment, a plurality of third isolation structures 43 are spaced apart along a direction parallel to the substrate. The third isolation structures 43 may be located in the same film layer as the first source / drain electrode 21 or the second source / drain electrode 22, and may be fabricated using the same material and the same fabrication process, thereby simplifying the process. For example, the third isolation structure 43 includes a fourth dielectric layer, a fifth dielectric layer, and a sixth dielectric layer sequentially disposed along a direction away from the substrate. The side surface of the fifth dielectric layer is recessed compared to the side surfaces of the fourth and sixth dielectric layers, forming an undercut structure.

[0082] In some embodiments, at least one first isolation structure is located in the second partition area. At least one first isolation structure is located on the side of the plurality of third isolation structures near the retaining wall area, and at least one first isolation structure may be located in the edge area of ​​the second partition area near the retaining wall area.

[0083] In this embodiment of the display substrate, the first isolation structure is disposed in the edge region of the second partition area near the barrier region, so that the first isolation structure is close to the display area and far away from the hole area, thereby ensuring the power-off effect.

[0084] In some embodiments, the first isolation structure may be located between adjacent third isolation structures; or, the first isolation structure may be located on the side of the plurality of third isolation structures away from the retaining wall area.

[0085] Figure 6 is a cross-sectional schematic diagram of an isolation structure of a display substrate according to an embodiment of the present disclosure. The isolation structure of the present disclosure can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 6, the first isolation structure 41 may include a conductive structure and an insulating dielectric layer 60 stacked sequentially along a direction away from the substrate 101. The surface of the conductive structure near the substrate is in contact with the second inorganic dielectric layer 105, and the top surface of the conductive structure away from the substrate is in contact with the surface of the insulating dielectric layer 60 near the substrate. A conductive material layer 52 is disposed on the top surface of the insulating dielectric layer 60 away from the substrate.

[0086] In an exemplary embodiment, the conductive structure may be located in the same film layer as at least a portion of the film layer of at least one of the first source / drain electrode and the second source / drain electrode in the display area, and may be prepared using the same material and the same preparation process, thereby simplifying the process.

[0087] In an exemplary embodiment, the insulating dielectric layer 60 can be an organic material. The insulating dielectric layer 60 can be located in the same film layer as at least one of the first organic dielectric layer and the second organic dielectric layer in the display area, and can be prepared using the same material and the same preparation process, thereby simplifying the process. For example, the insulating dielectric layer 60 can be located in the same film layer as the second organic dielectric layer in the display area, and can be prepared using the same material and the same preparation process.

[0088] In some embodiments, the first isolation structure may include a plurality of conductive structures stacked sequentially along a direction away from the substrate, such as two conductive structures, three conductive structures, four conductive structures, etc., which will not be described in detail herein.

[0089] In an exemplary embodiment, the conductive structure includes a conductive structure layer 61, which includes a first conductive layer 61-1 and a second conductive layer 61-2 stacked sequentially along a direction away from the substrate 101. The second conductive layer 61-2 is disposed on the surface of the first conductive layer 61-1 away from the substrate 101, and the thickness of the second conductive layer 61-2 is greater than the thickness of the first conductive layer 61-1.

[0090] In an exemplary embodiment, the first conductive layer 61-1 may be a metal, for example, the first conductive layer 61-1 may be titanium.

[0091] In an exemplary embodiment, the first conductive layer 61-1 may be located in the same film layer as the first metal layer of the first source / drain electrode or the second source / drain electrode, and may be prepared using the same materials and the same fabrication process, thereby simplifying the process. For example, the first conductive layer 61-1 may be located in the same film layer as the first metal layer of the first source / drain electrode, and may be prepared using the same materials and the same fabrication process.

[0092] In an exemplary embodiment, the second conductive layer 61-2 may be a metal, for example, the second conductive layer 61-2 may be aluminum.

[0093] In an exemplary embodiment, the second conductive layer 61-2 can be located in the same film layer as the second metal layer of the first source / drain electrode or the second source / drain electrode, and can be prepared using the same materials and the same fabrication process, thereby simplifying the process. For example, the second conductive layer 61-2 can be located in the same film layer as the second metal layer of the first source / drain electrode, and can be prepared using the same materials and the same fabrication process.

[0094] In some embodiments, the conductive structure layer may include a single conductive layer, or a number of conductive layers other than two conductive layers stacked sequentially along the direction away from the substrate, such as three conductive layers, four conductive layers, five conductive layers, etc., which will not be described in detail herein.

[0095] In an exemplary embodiment, the second conductive layer 61-2 includes a first outer sidewall 61-2-1, a second outer sidewall 61-2-2, and a top surface 61-2-3. The first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 are located on opposite sides of the second conductive layer 61-2 in a direction parallel to the substrate. The extension lines of the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 intersect the plane of the substrate. The top surface 61-2-3 of the second conductive layer 61-2 is disposed on the side of the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 away from the substrate, and is connected to both the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2. The top surface 61-2-3 of the second conductive layer 61-2 is parallel to the substrate.

[0096] In an exemplary embodiment, the insulating dielectric layer 60 is disposed on the side of the top surface 61-2-3 of the second conductive layer 61-2 away from the substrate and in contact with the top surface 61-2-3. The orthographic projection of the insulating dielectric layer 60 on the substrate overlaps with the orthographic projection of the top surface 61-2-3 of the second conductive layer 61-2 on the substrate. For example, the orthographic projection of the insulating dielectric layer 60 on the substrate covers the orthographic projection of the top surface 61-2-3 of the second conductive layer 61-2 on the substrate. At least a portion of the insulating dielectric layer 60 is disposed between the conductive material layer 52 and the top surface 61-2-3 of the second conductive layer 61-2, thereby insulating the conductive material layer 52 from the top surface 61-2-3 of the second conductive layer 61-2, achieving lateral power disconnection of the conductive material layer 52, and thus achieving complete insulation of the conductive material layer 52.

[0097] In an exemplary embodiment, the top surface 61-2-3 of the second conductive layer 61-2 includes a groove 63, and a first flat region 64 and a second flat region 65 located on opposite sides of the groove 63 in the first direction D1. The first flat region 64 and the second flat region 65 are both parallel to the substrate. The groove 63 is recessed along the direction close to the substrate. The groove 63 can penetrate the second conductive layer 61-2 and the first conductive layer 61-1, exposing the second inorganic dielectric layer 105. The bottom of the groove 63 is the surface of the second inorganic dielectric layer 105 away from the substrate. At least part of the insulating dielectric layer 60 fills the groove 63 and contacts the sidewalls and bottom of the groove 63.

[0098] In an exemplary embodiment, the first outer wall 61-2-1 and the second outer wall 61-2-2 of the second conductive layer 61-2 are both recessed relative to the side of the insulating dielectric layer 60, forming a first undercut structure 71. The insulating dielectric layer 60 exposes the first undercut structure 71. The conductive material layer 52 is broken at the first undercut structure 71, forming a first material portion and a second material portion. The first material portion is located on the surface of the second inorganic dielectric layer 105 away from the substrate, and the second material portion is located on the surface of the insulating dielectric layer 60 away from the substrate. The first material portion and the second material portion are disconnected from each other through the first undercut structure 71. The conductive material layer 52 is not disposed on the inner wall of the first undercut structure 71, and the conductive material layer 52 does not contact the first undercut structure 71, thereby achieving longitudinal power disconnection of the conductive material layer 52 and achieving the effect of complete insulation of the conductive material layer 52.

[0099] The following is an exemplary description of the fabrication process of the first isolation structure of the display substrate. The "patterning process" described in this disclosure includes, for metallic, inorganic, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes processes such as organic material coating, mask exposure, and development. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying, spin coating, and inkjet printing; etching can be performed using any one or more of dry etching and wet etching, and this disclosure does not limit the methods. A "thin film" refers to a thin film made of a certain material on a substrate using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of this disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0100] In an exemplary embodiment, the fabrication process of the first isolation structure of the display substrate may include the following operations.

[0101] (101) A first conductive layer, a second conductive layer and a third conductive layer are formed.

[0102] In an exemplary embodiment, forming the first conductive layer, the second conductive layer, and the third conductive layer may include: sequentially depositing a first metal thin film, a second metal thin film, and a third metal thin film on the second inorganic dielectric layer 105; using a patterning process, forming the first conductive layer 61-1 from the first metal thin film, forming the second conductive layer 61-2 from the second metal thin film, and forming the third conductive layer 61-3 from the third metal thin film; the first conductive layer 61-1, the second conductive layer 61-2, and the third conductive layer 61-3 are sequentially stacked along the direction away from the substrate; a groove 63 is provided in the first conductive layer 61-1, the second conductive layer 61-2, and the third conductive layer 61-3; the groove 63 extends from the surface of the third conductive layer 61-3 away from the substrate, sequentially penetrating the third conductive layer 61-3, the second conductive layer 61-2, and the first conductive layer 61-1, and extending to the second inorganic dielectric layer 105, as shown in FIG7.

[0103] In an exemplary embodiment, the first conductive layer 61-1 may be located in the same film layer as the first metal layer of the first source / drain electrode, and is prepared by the same metal thin film and the same preparation process; the second conductive layer 61-2 may be located in the same film layer as the second metal layer of the first source / drain electrode, and is prepared by the same metal thin film and the same preparation process; the third conductive layer 61-3 may be located in the same film layer as the third metal layer of the first source / drain electrode, and is prepared by the same metal thin film and the same preparation process.

[0104] (102) Form the fourth conductive layer, the fifth conductive layer and the sixth conductive layer.

[0105] In an exemplary embodiment, forming the fourth conductive layer, the fifth conductive layer, and the sixth conductive layer may include: depositing a fourth metal thin film, a fifth metal thin film, and a sixth metal thin film sequentially on the side of the third conductive layer 61-3 away from the substrate on the substrate where the aforementioned pattern is formed; and using a patterning process, forming the fourth conductive layer 62-1 from the fourth metal thin film, forming the fifth conductive layer 62-2 from the fifth metal thin film, and forming the sixth conductive layer 62-3 from the sixth metal thin film; and forming a recessed area at the groove 63 on the surface of the sixth conductive layer 62-3 away from the substrate, as shown in FIG8.

[0106] In an exemplary embodiment, the fourth conductive layer 62-1 may be located in the same film layer as the first metal layer of the second source / drain electrode, and is prepared using the same metal thin film through the same preparation process; the fifth conductive layer 62-2 may be located in the same film layer as the second metal layer of the second source / drain electrode, and is prepared using the same metal thin film through the same preparation process; the sixth conductive layer 62-3 may be located in the same film layer as the third metal layer of the second source / drain electrode, and is prepared using the same metal thin film through the same preparation process.

[0107] (103) Etch away the third, fourth, fifth and sixth conductive layers.

[0108] In an exemplary embodiment, etching away the third, fourth, fifth, and sixth conductive layers may include: etching away the sixth, fifth, fourth, and third conductive layers on the substrate on which the aforementioned pattern is formed, exposing the second conductive layer 61-2 and the groove 63, as shown in FIG9.

[0109] (104) Form an insulating dielectric layer.

[0110] In an exemplary embodiment, forming an insulating dielectric layer may include: depositing an organic dielectric film on the side of the second conductive layer 61-2 away from the substrate on the substrate on which the aforementioned pattern is formed; and forming an insulating dielectric layer 60 by a patterning process. The insulating dielectric layer 60 is disposed on the surface of the second conductive layer 61-2 away from the substrate. At least a portion of the insulating dielectric layer 60 fills the groove 63. The insulating dielectric layer 60 exposes the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 of the second conductive layer 61-2, as shown in FIG10.

[0111] (105) Forming the first undercut structure.

[0112] In an exemplary embodiment, forming the first undercut structure may include: etching the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 of the second conductive layer 61-2 on the substrate on which the aforementioned pattern is formed, wherein the second conductive layer 61-2 has a different etching selectivity ratio than the first conductive layer 61-1, such that the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 of the second conductive layer 61-2 are recessed relative to the sides of the first conductive layer 61-1 and the insulating dielectric layer 60, respectively, to form the first undercut structure 71, as shown in FIG11. The first conductive layer 61-1, the second conductive layer 61-2, and the insulating dielectric layer 60 form a first isolation structure.

[0113] Figure 12 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of the present disclosure can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 12, the first isolation structure of the present disclosure is substantially the same as the isolation structure shown in Figure 6. The difference is that the first isolation structure 41 of the present disclosure includes a conductive structure and an insulating dielectric layer 60 stacked sequentially along the direction away from the substrate 101. The conductive structure includes a conductive structure layer 61, which includes a first conductive layer 61-1 and a second conductive layer 61-2 stacked sequentially along the direction away from the substrate 101. The second conductive layer 61-2 is disposed on the surface of the first conductive layer 61-1 away from the substrate 101, and the thickness of the second conductive layer 61-2 is greater than the thickness of the first conductive layer 61-1. The second conductive layer 61-2 includes a first outer sidewall 61-2-1, a second outer sidewall 61-2-2, and a top surface 61-2-3. The first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 are located on opposite sides of the second conductive layer 61-2 in the direction parallel to the substrate. The extension lines of the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 intersect the plane of the substrate. The first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 are both fourth flat surfaces. The top surface 61-2-3 of the second conductive layer 61-2 is disposed on the side of the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 away from the substrate, and is connected to the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2. The top surface 61-2-3 of the second conductive layer 61-2 is parallel to the substrate.

[0114] In an exemplary embodiment, the top surface of the second conductive layer 61-2 includes a groove 63, and a first flat region 64 and a second flat region 65 located on opposite sides of the groove 63 in the first direction D1. Both the first flat region 64 and the second flat region 65 are parallel to the substrate, and the groove 63 is recessed along a direction close to the substrate. An insulating dielectric layer 60 covers the first flat region 64 and the second flat region 65, covers the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 of the second conductive layer 61-2, and covers the outer sidewalls of the first conductive layer 61-1 located on opposite sides of the first direction D1; the insulating dielectric layer 60 exposes the groove 63.

[0115] In an exemplary embodiment, the groove 63 of the second conductive layer 61-2 includes a first inner sidewall 63-1 and a second inner sidewall 63-2. The first inner sidewall 63-1 and the second inner sidewall 63-2 are located on opposite sides of the groove 63 in the first direction D1. Both the first inner sidewall 63-1 and the second inner sidewall 63-2 are recessed relative to the side surface of the insulating dielectric layer 60, forming a second undercut structure 72. The insulating dielectric layer 60 exposes the second undercut structure 72 and does not contact the second undercut structure 72. The conductive material layer 52 is broken at the second undercut structure 72 to form a third material portion and a fourth material portion. The third material portion is located on the surface of the insulating dielectric layer 60 away from the substrate, and the fourth material portion is located at the bottom of the groove 63. The third material portion and the fourth material portion are disconnected from each other by the second undercut structure 72. The inner wall of the second undercut structure 72 is not covered with the conductive material layer 52. The conductive material layer 52 is not in contact with the first inner sidewall 63-1 and the second inner sidewall 63-2, thereby achieving longitudinal power disconnection of the conductive material layer 52 and achieving the effect of complete insulation of the conductive material layer 52.

[0116] Figure 13 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of the present disclosure embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 13, the first isolation structure of the present disclosure embodiment is substantially the same as the isolation structure shown in Figure 6. The difference is that the first isolation structure 41 of the present disclosure embodiment includes a conductive structure and an insulating dielectric layer 60 stacked sequentially along the direction away from the substrate 101. The conductive structure includes a conductive structure layer 61, which includes a first conductive layer 61-1 and a second conductive layer 61-2 stacked sequentially along the direction away from the substrate 101. The second conductive layer 61-2 is disposed on the surface of the first conductive layer 61-1 away from the substrate 101, and the thickness of the second conductive layer 61-2 is greater than the thickness of the first conductive layer 61-1. The second conductive layer 61-2 includes a top surface 61-2-3 on the side away from the substrate 101, and a first outer sidewall 61-2-1 and a second outer sidewall 61-2-2 located on opposite sides of the second conductive layer 61-2 in the first direction D1. The top surface 61-2-3 of the second conductive layer 61-2 is parallel to the substrate and is connected to the side of the first outer sidewall 61-2-1 and the second outer sidewall 61-2-2 away from the substrate.

[0117] In an exemplary embodiment, the first outer sidewall 61-2-1 is a fourth flat surface, and the second outer sidewall 61-2-2 is recessed relative to the side of the insulating dielectric layer 60, forming a first undercut structure 71. The insulating dielectric layer 60 covers the top surface 61-2-3 and the first outer sidewall 61-2-1. The conductive material layer 52 is isolated from the top surface 61-2-3 and the first outer sidewall 61-2-1 through the insulating dielectric layer 60, exposing the first undercut structure 71. The conductive material layer 52 is broken at the first undercut structure 71, forming a first material portion and a second material portion, which are disconnected from each other through the first undercut structure 71. The inner wall of the first undercut structure 71 is not covered with the conductive material layer 52, and the conductive material layer 52 does not contact the second outer sidewall 61-2-2, thus insulating the conductive material layer 52 from the second outer sidewall 61-2-2, achieving longitudinal power disconnection of the conductive material layer 52, thereby achieving complete insulation of the conductive material layer 52.

[0118] Figure 14 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure, wherein the isolation structure of the present disclosure embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 14, the first isolation structure of the present disclosure embodiment is substantially the same as the isolation structure shown in Figure 6, except that the first isolation structure 41 of the present disclosure embodiment includes a conductive structure and an insulating dielectric layer 60 stacked sequentially along the direction away from the substrate 101. The conductive structure includes a first conductive structure layer 61 and a second conductive structure layer 62 stacked sequentially along the direction away from the substrate 101. The first conductive structure layer 61 is disposed on the surface of the second conductive structure layer 62 on the side away from the substrate. The first conductive structure layer 61 includes a first conductive layer 61-1, a second conductive layer 61-2, and a third conductive layer 61-3 stacked sequentially along the direction away from the substrate 101. The thickness of the second conductive layer 61-2 is greater than the thickness of the first conductive layer 61-1, and the thickness of the second conductive layer 61-2 is greater than the thickness of the third conductive layer 61-3. The second conductive structure layer 62 includes a fourth conductive layer 62-1, a fifth conductive layer 62-2, and a sixth conductive layer 62-3 stacked sequentially along a direction away from the substrate 101. The thickness of the fifth conductive layer 62-2 is greater than the thickness of the fourth conductive layer 62-1, and the thickness of the fifth conductive layer 62-2 is greater than the thickness of the sixth conductive layer 62-3.

[0119] In an exemplary embodiment, the conductive structure includes outer sidewalls on opposite sides of a first direction D1, wherein the outer sidewalls of the conductive structure on opposite sides of the first direction D1 are both fourth flat surfaces 67, that is, the outer sidewalls of the first conductive structure layer 61 and the second conductive structure layer 62 on opposite sides of the first direction D1 are both fourth flat surfaces 67. At least a portion of the insulating dielectric layer 60 covers the outer sidewalls of the conductive structure on opposite sides of the first direction D1.

[0120] In an exemplary embodiment, the outer walls of the first conductive structure layer 61 and the second conductive structure layer 62 on opposite sides of the first direction D1 are respectively the outer walls of the conductive structure on opposite sides of the first direction D1. That is, the outer walls of the first conductive layer 61-1, the second conductive layer 61-2, and the third conductive layer 61-3 in the first conductive structure layer 61, together with the outer walls of the fourth conductive layer 62-1, the fifth conductive layer 62-2, and the sixth conductive layer 62-3 in the second conductive structure layer 62, form the outer walls of the conductive structure in the first direction D1. The outer walls of the first conductive layer 61-1, the second conductive layer 61-2, and the third conductive layer 61-3 in the first conductive structure layer 61 in the opposite direction of the first direction D1, together with the outer walls of the fourth conductive layer 62-1, the fifth conductive layer 62-2, and the sixth conductive layer 62-3 in the second conductive structure layer 62, form the outer walls of the conductive structure in the opposite direction of the first direction D1.

[0121] In an exemplary embodiment, the conductive structure includes a top surface located on the side away from the substrate. The top surface of the conductive structure is connected to the outer sidewalls of the conductive structure on opposite sides in the first direction D1, away from the substrate. The top surface of the conductive structure is the top surface of the sixth conductive layer 62-3 on the side away from the substrate. The top surface of the conductive structure includes a groove 63 and a first flat region 64 and a second flat region 65 located on opposite sides of the groove 63 in the first direction D1. The first flat region 64 and the second flat region 65 are both parallel to the substrate. The groove 63 is recessed towards the substrate. The groove 63 extends from the surface of the sixth conductive layer 62-3 away from the substrate, sequentially penetrating the sixth conductive layer 62-3, the fifth conductive layer 62-2, the fourth conductive layer 62-1, and the third conductive layer 61-3, and extends into the second conductive layer 61-2. The bottom of the groove 63 is the second conductive layer 61-2. The groove 63 includes inner sidewalls located on opposite sides in the first direction D1. Each inner sidewall of the groove 63 on opposite sides in the first direction D1 includes a third flat surface 66 and a second undercut structure 72. The third flat surface 66 is connected to the side of the second undercut structure 72 away from the substrate. The insulating dielectric layer 60 covers the third flat surface 66 and exposes the second undercut structure 72. The insulating dielectric layer 60 is disposed between the conductive material layer and the third flat surface 66. The conductive material layer on the insulating dielectric layer 60 is disconnected from the conductive material layer at the bottom of the groove 63 at the second undercut structure 72.

[0122] In an exemplary embodiment, the inner sidewalls of the first conductive structure layer 61 and the second conductive structure layer 62 on opposite sides in the first direction D1 are respectively the inner sidewalls of the groove 63 on opposite sides in the first direction D1. That is, the inner sidewalls of the second conductive layer 61-2 and the third conductive layer 61-3 in the first conductive structure layer 61 on opposite sides in the first direction D1, together with the inner sidewalls of the fourth conductive layer 62-1, the fifth conductive layer 62-2 and the sixth conductive layer 62-3 in the second conductive structure layer 62 on opposite sides in the first direction D1, form the inner sidewalls of the groove 63 on opposite sides in the first direction D1.

[0123] In an exemplary embodiment, the inner sidewalls of the fourth conductive layer 62-1, the fifth conductive layer 62-2, and the sixth conductive layer 62-3 on opposite sides of the first conductive structure layer 62, and the inner sidewalls of the third conductive layer 61-3 on opposite sides of the first conductive structure layer 61 on opposite sides of the first conductive structure layer 61 are respectively third flat surfaces 66; the inner sidewalls of the second conductive layer 61-2 on opposite sides of the first conductive structure layer 61 are all recessed relative to the third flat surfaces 66, forming a second undercut structure 72.

[0124] In an exemplary embodiment, the first conductive layer 61-1 can be located in the same film layer as the first metal layer of the first source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The first conductive layer 61-1 can be titanium.

[0125] In an exemplary embodiment, the second conductive layer 61-2 can be located in the same film layer as the second metal layer of the first source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The second conductive layer 61-2 can be aluminum.

[0126] In an exemplary embodiment, the third conductive layer 61-3 can be located in the same film layer as the third metal layer of the first source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The third conductive layer 61-3 can be titanium.

[0127] In an exemplary embodiment, the fourth conductive layer 62-1 can be located in the same film layer as the first metal layer of the second source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The fourth conductive layer 62-1 can be titanium.

[0128] In an exemplary embodiment, the fifth conductive layer 62-2 can be located in the same film layer as the second metal layer of the second source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The fifth conductive layer 62-2 can be aluminum.

[0129] In an exemplary embodiment, the sixth conductive layer 62-3 can be located in the same film layer as the third metal layer of the second source / drain electrode, and can be prepared using the same material and the same fabrication process, thereby simplifying the process. The sixth conductive layer 62-3 can be titanium.

[0130] Figure 15 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of this embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 15, the first isolation structure of this embodiment is substantially the same as the isolation structure shown in Figure 14, except that the outer walls of the second conductive structure layer 62 on opposite sides of the first direction D1 respectively cover the outer walls of the first conductive structure layer 61 on opposite sides of the first direction D1. The outer walls of the second conductive structure layer 62 on opposite sides of the first direction D1 are respectively the outer walls of the conductive structure on opposite sides of the first direction D1, and the outer walls of the second conductive structure layer 62 on opposite sides of the first direction D1 are both stepped. At least a portion of the insulating dielectric layer 60 covers the outer walls of the second conductive structure layer 62 on opposite sides of the first direction D1.

[0131] Figure 16 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure, wherein the isolation structure of the present disclosure embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 16, the first isolation structure of the present disclosure embodiment is substantially the same as the isolation structure shown in Figure 14, except that the inner sidewalls of the groove 63 on both sides opposite to each other in the first direction D1 are third flat surfaces 66, that is, the inner sidewalls of the first conductive structure layer 61 and the second conductive structure layer 62 on both sides opposite to each other in the first direction D1 are third flat surfaces 66. At least a portion of the insulating dielectric layer 60 fills the groove 63, and at least a portion of the insulating dielectric layer 60 covers the inner sidewalls of the groove 63 on both sides opposite to each other in the first direction D1. The outer sidewalls of the conductive structure on both sides opposite to each other in the first direction D1 include a fourth flat surface 67 and a first undercut structure 71, and the fourth flat surface 67 is connected to the side of the first undercut structure 71 away from the substrate.

[0132] In an exemplary embodiment, the outer walls of the fourth conductive layer 62-1, the fifth conductive layer 62-2, and the sixth conductive layer 62-3 on opposite sides of the first conductive structure layer 62, and the outer walls of the third conductive layer 61-3 on opposite sides of the first conductive structure layer 61 on opposite sides of the first conductive structure layer 61 are respectively fourth flat surfaces 67. The outer walls of the second conductive layer 61-2 on opposite sides of the first conductive structure layer 61 are all recessed relative to the fourth flat surfaces 67, forming a first undercut structure 71.

[0133] In an exemplary embodiment, the insulating dielectric layer 60 covers the fourth flat surface 67, and the insulating dielectric layer 60 exposes the first undercut structure 71.

[0134] Figure 17 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of this embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 17, the first isolation structure of this embodiment is substantially the same as the isolation structure shown in Figure 16, except that the inner sidewalls of the second conductive structure layer 62 on opposite sides of the first direction D1 respectively cover the inner sidewalls of the first conductive structure layer 61 on opposite sides of the first direction D1. The inner sidewalls of the second conductive structure layer 62 on opposite sides of the first direction D1 are respectively the inner sidewalls of the groove 63 on opposite sides of the first direction D1. The inner sidewalls of the second conductive structure layer 62 on opposite sides of the first direction D1 are both stepped. At least a portion of the insulating dielectric layer 60 covers the inner sidewalls of the second conductive structure layer 62 on opposite sides of the first direction D1.

[0135] Figure 18 is a cross-sectional view of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of this embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 18, the first isolation structure of this embodiment is substantially the same as the isolation structure shown in Figure 13. The difference is that the first isolation structure 41 of this embodiment includes a conductive structure and an insulating dielectric layer 60 stacked sequentially along a direction away from the substrate 101. The conductive structure includes a first conductive structure layer 61 and a second conductive structure layer 62 stacked sequentially along a direction away from the substrate 101. The first conductive structure layer 61 is disposed on the surface of the second conductive structure layer 62 on the side away from the substrate. The first conductive structure layer 61 includes a first conductive layer 61-1, a second conductive layer 61-2, and a third conductive layer 61-3 stacked sequentially along a direction away from the substrate 101. The thickness of the second conductive layer 61-2 is greater than the thickness of the first conductive layer 61-1, and the thickness of the second conductive layer 61-2 is greater than the thickness of the third conductive layer 61-3. The second conductive structure layer 62 includes a fourth conductive layer 62-1, a fifth conductive layer 62-2, and a sixth conductive layer 62-3 stacked sequentially along a direction away from the substrate 101. The thickness of the fifth conductive layer 62-2 is greater than the thickness of the fourth conductive layer 62-1, and the thickness of the fifth conductive layer 62-2 is greater than the thickness of the sixth conductive layer 62-3.

[0136] In an exemplary embodiment, the outer wall of the conductive structure on the side opposite to the first direction D1 is a fourth flat surface 67, that is, the outer walls of the first conductive layer 61-1, the second conductive layer 61-2 and the third conductive layer 61-3 in the first conductive structure layer 61, and the outer walls of the fourth conductive layer 62-1, the fifth conductive layer 62-2 and the sixth conductive layer 62-3 in the second conductive structure layer 62 are all the fourth flat surface 67, and the insulating dielectric layer 60 covers the outer wall of the conductive structure on the side opposite to the first direction D1.

[0137] In an exemplary embodiment, the outer wall of the conductive structure on the first direction D1 side includes a fourth flat surface 67 and a first undercut structure 71, with the fourth flat surface 67 connected to the side of the first undercut structure 71 away from the substrate. The outer walls of the fourth conductive layer 62-1, the fifth conductive layer 62-2, and the sixth conductive layer 62-3 on the first direction D1 side of the second conductive structure layer 62, and the outer wall of the third conductive layer 61-3 on the first direction D1 side of the first conductive structure layer 61, are respectively the fourth flat surface 67. The outer wall of the second conductive layer 61-2 on the first direction D1 side is recessed relative to the fourth flat surface 67, forming the first undercut structure 71. The insulating dielectric layer 60 covers the fourth flat surface 67 of the conductive structure on the first direction D1 side, exposing the first undercut structure 71.

[0138] Figure 19 is a cross-sectional schematic diagram of another isolation structure of the display substrate according to an embodiment of the present disclosure. The isolation structure of this embodiment can be an enlarged view of the first isolation structure in Figure 5. In an exemplary embodiment, as shown in Figure 19, the first isolation structure of this embodiment is substantially the same as the isolation structure shown in Figure 18, except that the outer wall of the second conductive structure layer 62 on the side opposite to the first direction D1 covers the outer wall of the first conductive structure layer 61 on the side opposite to the first direction D1. The outer wall of the second conductive structure layer 62 on the side opposite to the first direction D1 is the outer wall of the conductive structure on the side opposite to the first direction D1, and the outer wall of the second conductive structure layer 62 on the side opposite to the first direction D1 is stepped. At least a portion of the insulating dielectric layer 60 covers the outer wall of the second conductive structure layer 62 on the side opposite to the first direction D1.

[0139] On the other hand, this disclosure also provides a method for fabricating a display substrate, the display substrate including a display area, an aperture area located in the display area, and an encapsulation area located between the display area and the aperture area, the method for fabricating the display substrate including:

[0140] At least one isolation structure is formed on the substrate of the encapsulation region;

[0141] A conductive material layer is formed on the side of the at least one isolation structure away from the substrate;

[0142] The at least one isolation structure includes a conductive structure and an insulating dielectric layer, the conductive structure including at least a top surface on the side away from the substrate, and at least a portion of the insulating dielectric layer is disposed between the conductive material layer and the top surface.

[0143] This disclosure also provides a display device, which includes the aforementioned display substrate. The display device can be any product or component with display function, such as a mobile phone, wearable device, AR or VR display device, in-vehicle display device, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. The embodiments of this invention are not limited thereto.

[0144] While the embodiments disclosed herein are as described above, the content is merely for the purpose of facilitating understanding of this disclosure and is not intended to limit the invention. Any person skilled in the art may make any modifications and changes to the form and details of the implementation without departing from the spirit and scope of this disclosure; however, the patent protection scope of this invention shall still be determined by the scope defined in the appended claims.

Claims

1. A display substrate, comprising a display area, an aperture area located in the display area, and an encapsulation area located between the display area and the aperture area, the encapsulation area comprising at least one isolation structure disposed on a substrate and a conductive material layer, the conductive material layer being disposed on a side of the at least one isolation structure away from the substrate, the at least one isolation structure comprising a conductive structure and an insulating dielectric layer, the conductive structure comprising at least a top surface away from the substrate, and at least a portion of the insulating dielectric layer being disposed between the conductive material layer and the top surface.

2. The display substrate according to claim 1, wherein, The top surface of the conductive structure includes a groove and a first flat area and a second flat area located on opposite sides of the groove. The first flat area and the second flat area are both parallel to the substrate. The groove is recessed toward the substrate. At least part of the insulating dielectric layer covers the first flat area and the second flat area. The insulating dielectric layer is disposed between the first flat area and the second flat area and the conductive material layer.

3. The display substrate according to claim 2, wherein, The groove includes inner sidewalls located on opposite sides, at least one of the inner sidewalls on opposite sides includes a third flat surface, the insulating dielectric layer covers the third flat surface, and the insulating dielectric layer is disposed between the conductive material layer and the third flat surface.

4. The display substrate according to claim 3, wherein, The conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein the inner sidewalls of the first conductive structure layer and the second conductive structure layer on opposite sides are respectively the inner sidewalls of the opposite sides of the groove; or, the conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein the inner sidewalls of the second conductive structure layer on opposite sides respectively cover the inner sidewalls of the first conductive structure layer on opposite sides, wherein the inner sidewalls of the second conductive structure layer on opposite sides are respectively the inner sidewalls of the opposite sides of the groove; or, the conductive structure includes a conductive structure layer, wherein the inner sidewalls of the conductive structure layer on opposite sides are respectively the inner sidewalls of the opposite sides of the groove, and the conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along a direction away from the substrate.

5. The display substrate according to claim 2, wherein, The groove includes inner sidewalls on opposite sides. At least one of the inner sidewalls on opposite sides of the groove includes a second undercut structure and a third flat surface. The third flat surface is connected to the side of the second undercut structure away from the substrate. The insulating dielectric layer covers the third flat surface and exposes the second undercut structure. The insulating dielectric layer is disposed between the conductive material layer and the third flat surface. The conductive material layer on the insulating dielectric layer is disconnected from the conductive material layer at the bottom of the groove at the second undercut structure.

6. The display substrate according to claim 5, wherein, The conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate. The inner sidewalls of the first conductive structure layer and the second conductive structure layer on opposite sides are the inner sidewalls of the groove on opposite sides, respectively. At least one of the inner sidewalls of the first conductive structure layer on opposite sides includes the second undercut structure, and at least one of the inner sidewalls of the second conductive structure layer on opposite sides includes the third flat surface.

7. The display substrate according to claim 2, wherein, The groove includes inner sidewalls on opposite sides, at least one of the inner sidewalls on opposite sides of the groove includes a second undercut structure, the insulating dielectric layer exposes the second undercut structure, and the conductive material layer on the insulating dielectric layer is disconnected from the conductive material layer at the bottom of the groove at the second undercut structure.

8. The display substrate according to claim 7, wherein, The conductive structure includes a conductive structure layer, the inner sidewalls of the conductive structure layer on opposite sides being the inner sidewalls of the groove on opposite sides, the conductive structure layer including a first conductive layer and a second conductive layer stacked sequentially along the direction away from the substrate, and at least one of the inner sidewalls of the second conductive layer on opposite sides including the second undercut structure.

9. The display substrate according to any one of claims 1 to 8, wherein, The conductive structure includes two opposite outer sidewalls, and the top surface is connected to the opposite side of the conductive structure away from the substrate. At least one of the opposite outer sidewalls of the conductive structure includes a fourth flat surface. The insulating dielectric layer covers the fourth flat surface, and the insulating dielectric layer is disposed between the conductive material layer and the fourth flat surface.

10. The display substrate according to claim 9, wherein, The conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein the outer side walls of the first conductive structure layer and the second conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides; or, the conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate, wherein at least one outer side wall of the second conductive structure layer covers the outer side wall of the first conductive structure layer, and at least one outer side wall of the second conductive structure layer includes a fourth flat surface; or, the conductive structure includes a conductive structure layer, wherein the outer side walls of the conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides, and the conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along a direction away from the substrate.

11. The display substrate according to any one of claims 1 to 8, wherein, The conductive structure includes two opposite outer sidewalls, and the top surface is connected to the opposite side of the conductive structure away from the substrate. At least one of the opposite side outer sidewalls of the conductive structure includes a first undercut structure and a fourth flat surface. The fourth flat surface is connected to the first undercut structure away from the substrate. The insulating dielectric layer covers the fourth flat surface and exposes the first undercut structure. The insulating dielectric layer is disposed between the conductive material layer and the fourth flat surface. The conductive material layer is broken at the first undercut structure.

12. The display substrate according to claim 11, wherein, The conductive structure includes a first conductive structure layer and a second conductive structure layer stacked sequentially along a direction away from the substrate. The outer side walls of the first conductive structure layer and the second conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides. At least one of the outer side walls of the first conductive structure layer on opposite sides includes the first undercut structure, and at least one of the outer side walls of the second conductive structure layer on opposite sides includes the fourth flat surface.

13. The display substrate according to any one of claims 1 to 8, wherein, The conductive structure includes two opposite outer sidewalls, and the top surface is connected to the opposite side of the conductive structure away from the substrate. At least one of the opposite outer sidewalls of the conductive structure includes a first undercut structure, the insulating dielectric layer exposes the first undercut structure, and the conductive material layer is disconnected at the first undercut structure.

14. The display substrate according to claim 13, wherein, The conductive structure includes a conductive structure layer, and the outer side walls of the conductive structure layer on opposite sides are the outer side walls of the conductive structure on opposite sides. The conductive structure layer includes a first conductive layer and a second conductive layer stacked sequentially along the direction away from the substrate. At least one of the outer side walls of the second conductive layer on opposite sides includes the first undercut structure.

15. A display device comprising the display substrate according to any one of claims 1 to 14.

Images